Ring Counter DE
Ring Counter DE
Ring Counter DE
1. Asynchronous counter
2. Synchronous counter
1. Asynchronous Counter
In asynchronous counter we don’t use universal clock, only first flip
flop is driven by main clock and the clock input of rest of the
following flip flop is driven by output of previous flip flops. We can
understand it by following diagram-
It is evident from timing diagram that Q0 is changing as soon as the
rising edge of clock pulse is encountered, Q1 is changing when
rising edge of Q0 is encountered(because Q0 is like clock pulse for
second flip flop) and so on. In this way ripples are generated
through Q0,Q1,Q2,Q3 hence it is also called RIPPLE counter and
serial counter. A ripple counter is a cascaded arrangement of flip
flops where the output of one flip flop drives the clock input of the
following flip flop
2. Synchronous Counter
Unlike the asynchronous counter, synchronous counter has one
global clock which drives each flip flop so output changes in parallel.
The one advantage of synchronous counter over asynchronous
counter is, it can operate on higher frequency than asynchronous
counter as it does not have cumulative delay because of same clock
is given to each flip flop. It is also called as parallel counter.
Decade Counter
A decade counter counts ten different states and then reset to its
initial states. A simple decade counter will count from 0 to 9 but we
can also make the decade counters which can go through any ten
states between 0 to 15(for 4 bit counter).
Clock pulse Q3 Q2 Q1 Q0
0 0 0 0 0
1 0 0 0 1
2 0 0 1 0
3 0 0 1 1
4 0 1 0 0
5 0 1 0 1
6 0 1 1 0
7 0 1 1 1
8 1 0 0 0
9 1 0 0 1
10 0 0 0 0
A ring counter is a typical application of the Shift register. The ring counter is almost the same as the shift
counter. The only change is that the output of the last flip-flop is connected to the input of the first flip-
flop in the case of the ring counter but in the case of the shift register it is taken as output. Except for this,
all the other things are the same.
No. of states in Ring counter = No. of flip-flop used
So, for designing a 4-bit Ring counter we need 4 flip-flops.
In this diagram, we can see that the clock pulse (CLK) is applied to all the flip-flops simultaneously.
Therefore, it is a Synchronous Counter. Both PR and CLR are active low signal that always works in
value 0. These two values are always fixed. They are independent of the value of input D and the Clock
pulse (CLK).
4 states are:
1000
0100
0010
0001
In this way can design a 4-bit Ring Counter using four D flip-flops.
Types of Ring Counter: There are two types of Ring Counter:
1. Straight Ring Counter: It is also known as One hot Counter. In this counter, the output of the
last flip-flop is connected to the input of the first flip-flop. The main point of this Counter is that
it circulates a single one (or zero) bit around the ring.
Here, we use Preset (PR) in the first flip-flop and Clock (CLK) for the last three flip-flops.
2. Twisted Ring Counter OR JHONSON COUNTER
It is also known as a switch-tail ring counter, walking ring counter, or Johnson counter. It
connects the complement of the output of the last shift register to the input of the first register and
circulates a stream of ones followed by zeros around the ring.Here, we use Clock (CLK) for all
the flip-flops. In the Twisted Ring Counter, the number of states = 2 X the number of flip-flops.