Cours Logcomb - P1
Cours Logcomb - P1
Cours Logcomb - P1
Plan du cours
Combinational and sequential logic :
5 séances cours+TD (20 heures)
4 séances TP (16 heures)
Examen+controle (4 heures) 60 heures
Sequential automata :
4 séances cours+TD (16 heures)
Examen+controle (4 heures)
Combinational logic
Plan
Variables and logical functions
Boolean algebra
Logic diagrams
Timing diagrams
Combinational logic circuits
Representations of numbers: the codes
Introduction: From analog to digital
Since the 80s and the introduction of the CD, sound and image processing
chains have been digitized.
The transition from analog to digital allows for greater precision against
interference that may occur during transmission and storage.
Introduction: The digital
Definitions
Logical state (binary or discrete)
Null element: binary value 0 (false, no, low, open, off, empty)
Unit element: binary value 1 (true, yes, high, closed, on, full)
Logical variable (bit : binary digit)
Quantity represented by a symbol (letter or sign) which can take 2
logical states.
Logical function
Function represented by groups of variables linked by logical
operators which can only take 2 logical states 0 (false point) or 1 (true
point).
Binary system:
logical function
I L
logical variable off, on
open, closed
Introduction: The truth table
I L
0 0 False point
I L 1 1 True point
Open
Closed On
Off
Introduction
Convention for writing the truth table :
The variables a, b, and c a b c f(a,b,c) f(a,b,c) is a function
represent a binary word 0 0 0 0 1 logic of 3 variables
f(x) = x
binary system :
x f(x)
binary system :
Switches connected
in series x y f(x,y)
f(x,y) = x + y = x y
binary system :
Switches connected x
in parallel
y f(x,y)
f(x,y) = x y
f(x,y) = x + y
binary system :
:
x y f(x,y)
binary system :
:
x y f(x,y)
A A A
involution : 0 1 0
A=A 1 0 1
associativity : A B C B+C
BC A+(B+C)
A(BC) A+B
AB (A+B)+C
(AB)C
0 0 0 0 0 0 0
A + (B + C) = (A + B) + C
0 0 1 01 1
0 0 1
0
A (B C) = (A B) C
0 1 0 01 1
0 1
0 1
0
0 1 1 1 1
0 1
0 1
0
1 0 0 0 1
0 1
0 1
0
1 0 1 01 1
0 1
0 1
0
1 1 0 01 1
0 1 1
0
1 1 1 1 1 1 1
Boolean algebra
Distributivity :
AND on OR : A (B + C) = (A B) + (A C) = AB + AC
OR on AND : A + (BC) = (A + B) (A + C)
A B C B+C
BC A(B+C)
A+(BC) A+B
AB A+C
AC (A+B)(A+C)
AB+AC
0 0 0 0 0 0 0 0
0 0 1 01 0 0 0
1 0
0 1 0 01 0 0
1 0 0
0 1 1 1 0
1 0
1 0
1 0
1
1 0 0 0 0
1 0
1 0
1 0
1
1 0 1 01 1 0
1 1 1
1 1 0 01 1 1 0
1 1
1 1 1 1 1 1 1 1
Boolean algebra
Idempotence (no exponent or coefficient) :
AA=A A A AA A A A+A
A+A=A 0 0 0 0 0 0
1 1 1 1 1 1
absorption : A B A+B
AB A+(AB)
A(A+B)
0 0 0 0
A (A + B) = A
0 1 1
0 0
A + (A B) = A
1 0 1
0 1
Demonstrate algebraically 1 1 1 1
these two relations.
Boolean algebra
De Morgan : A B A+B
AB A+B
AB A B A+B
AB
0 0 0 1 1 1 1
A+B=AB
0 1 1
0 0
1 1 0 0
1
AB=A+B
1 0 1
0 0
1 0 1 0
1
1 1 1 0 0 0 0
Principle of duality
The dual expression of any logical expression (not equation) is
obtained by swapping the AND and OR operators and the elements 0
and 1 appearing in the expression..
Boolean algebra
Exercice :
Using the definitions, properties, and theorems of Boolean algebra,
develop and simplify the function defined by the following equation :
f(a,b,c) = (a+b+c)(a+b+c)(a+b+c)(a+b+c)
Representation of logical functions
Exemple : a b c f(a,b,c)
bc f(a,b,c)
0 0 0 00 0
F(a,b) = a bc
0 0 1 00 0
3 variables a, b et c
0 1 0 00 0
F(a,b) = a bc 0 1 1 11 1
F(a,b) = abc + abc 1 0 0 01 1
F(a,b) = abc + a(b+c) 1 0 1 01 1
F(a,b) = abc + ab + ac 1 1 0 01 1
1 1 1 10 0
F(a,b) = abc + ab + ac
F(a,b) = abc + ab(c+c) + ac(b+b)
F(a,b) = abc + abc + abc + abc + abc
F(a,b) = abc + abc + abc + abc
Representation of logical functions
Karnaugh maps
Let F be a function of n variables.
The Karnaugh map is a table of 2n cells corresponding
to the 2n input combinations in which the
corresponding values of the function are noted.
00
0 1 3 2
01
4 5 7 6
11
12 13 15 14
10
8 9 11 10
Simplification of logical functions
Méthode de Karnaugh :
Depending on the desired form, group the adjacent cells of the same
value (either 0 or 1) into the largest possible sets that correspond to
powers of 2. All these groupings correspond to prime implicants (or
minterms) and form the complete prime base. The sum of these
minterms gives a simplified expression of the logical function but not
its minimal form..
The minimal form is obtained by summing the main prime implicants
(irredundant), meaning a grouping in which there is at least one cell
that can only be grouped by itself. Sometimes, multiple possibilities
are available, and the following rules will be followed :
All the 1 (or all the 0) must be grouped at least once.
The largest groupings should be prioritized.
The cells to be grouped must be grouped a minimum number of times
(starting with those that can only be grouped in one way).
Simplification of logical functions
Exemple :
F=abcd+abcd+abcd+abcd+abcd+abcd+abcd
F=abcd+abcd+abcd+abcd+abcd+abcd+abcd+abcd+abcd
F=acd(b+b)+abc(d+d)+bd(ac+ac+ac+ac)+abcd
F=acd+abc+bd[a(c+c)+a(c+c)]+abcd cd
F=acd+abc+bd(a+a)+abcd ab 00 01 11 10
F=acd+abc+bd+abcd 00 1 0 0 0 acd
F=acd+abc(d+d)+bd+abcd
F=acd+abcd+abcd+bd+abcd 01 1 1 1 0 abc
F=acd(1+b)+bd(ac+1)+abcd
11 0 1 1 0 bd
F=acd+bd+abcd
F is the sum of the main prime 10 0 0 0 1 abcd
implicants (irredundant).
Prime
Redundant
implicants
Simplification of logical functions
Exercice :
Simplify under the first and second technological forms the function
defined by the following truth table using the Karnaugh map method.:
a b c f(a,b,c)
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
Simplification of logical functions
Case of incompletely defined functions:
Some combinations can never exist.
The value of the function does not matter for certain combinations of
variables.
The value of the function is said to be indifferent or the forbidden
combination. The value of the function is then denoted by Φ or X and
can take either the value 1 or 0, depending on whether it is used for
simplification.
cd
ab 00 01 11 10
00 1 0 0 0 acd
01 1 1 Φ 0 bd
11 0 Φ 1 0 abd
F=acd+bd+abd
10 Φ Φ 0 1
Simplification of logical functions
Exercice :
Simplify the following function under the first technological form using
the Karnaugh map method :
cde
ab 000 001 011 010 110 111 101 100
00 1 1 1 1 0 1 0 1
01 1 0 0 0 0 0 0 1
11 1 0 0 0 1 0 0 1
10 1 1 1 1 0 1 1 1
Simplification of logical functions
Another approach :
c=0 c=1
de de
ab 00 01 11 10 ab 00 01 11 10
00 1 1 1 1 00 1 0 1 0
01 1 0 0 0 01 1 0 0 0
11 1 0 0 0 11 1 0 0 1
10 1 1 1 1 10 1 1 1 0
Representation of numbers: the codes
Natural integers
Base of a numbering system
Base conversion
Signed integers
Special codes
BCD code
Gray code
ASCII code
Representation of numbers: codes
-To encode integers, real numbers, or characters, bits are often grouped in
packets: a group of bits must form a code.
-Numbering systems:
A base consists of the set of different digits (or characters) used in the
numbering system. Each number can be expressed in polynomial form by
decomposing it according to the integer powers (positive or negative) of the
numbering base..
-Example :
- Base 10 or decimal, where each digit can take 10 values, and a number is a
polynomial of 10. :
Polynomial form :
8467110
base
8467110 8.10 4 + 4.103 + 6.10 2 + 7.101 + 1.100
Most significant Least rank 4 3 2 1 0
digit significant digit
Representation of numbers: codes
- Another example with a real number
Polynomial form:
n
N = ai .b i where n is the rank of the most significant digit.
i =0
Representation of numbers: codes
- Several bases are possible, but two of decimal binary hexadecimal
them are of particular interest: bases 2 0 0000 0
and 16. 1 0001 1
2 0010 2
Polynomial form in binary base : 3 0011 3
4 0100 4
101012 1.24 + 0.23 + 1.22 + 0.21 + 1.20 5 0101 5
rank 4 3 2 1 0
6 0110 6
7 0111 7
8 1000 8
9 1001 9
Polynomial form in hexadecimal base :
10 1010 a
a 2b3916 a.16 4 + 2.163 + b.16 2 + 3.161 + 9.160 11 1011 b
12 1100 c
rank 4 3 2 1 0
13 1101 d
14 1110 e
15 1111 f
Representation of numbers: codes
- Base conversion
Converting from one base to another is an important question.
Conversion to base 10 remains the simplest, as it only requires calculating the
value from the polynomial representation.
Note :
There is a very useful grouping, the byte, which consists of 8 bits. The
value of a byte ranges from 0 to 255 in base 10. Bits are grouped in
packets of 4 and expressed in base 16,
Example :
100011012 = 8d 16
Representation of numbers: codes
27 2
1 13 2
1
6 2
27 10 = 110112
3 2
0
1 1 2
1 0
- When converting from hexadecimal to decimal (or vice versa), the conversion
goes through binary to simplify the process.
Representation of numbers: codes
Signed integers :
The traditional method for encoding a signed number is called "sign-
magnitude," i.e., for a number coded on N bits, the most significant bit is used
to code the sign, and the remaining N-1 bits represent the absolute value of the
number :
(17)10 = 1 10001 2
Binary Gray
b2 b1 b0 gb12 bg11 g0
0 0 0 0 0 0
The construction is done graphically
0 0 1 0 0 1 by iteration or from the binary code
0 1 0 0 1 1 by creating an axis of symmetry.
0 1 1 0 1 0
1 0 0 1 1 0
1 0 1 1 1 1
1 1 0 1 0 1
1 1 1 1 0 0
Representation of numbers: codes
The output appears after the application of the input with a certain delay
called propagation time.
Combinational Logic Circuit
Combinational circuits can be used, for example :
to convert bits into digits representing a number (or letters or a specific code).
These circuits are called encoders (or decoders for the inverse operation).
For example, a Gray encoder or BCD.
to perform arithmetic operations on numbers. For example, an adder or a
multiplier.
to transmit or receive information over a single transmission line (a serial
line), which requires converting a number written in parallel form into a
sequence of bits in series and vice versa. This is the role of
multiplexer/demultiplexer circuits. Here is, for example, a serial-to-parallel
transformation followed by a parallel-to-serial transformation. :
Bytes Bytes
Serial bits Serial bits
DEMUX Processing MUX
Combinational Logic Circuit
The demultiplexer:
The demultiplexer is a circuit that directs an input to an output whose address
is provided in the form of a binary-coded number.
Y0
Demux 2 Y1
G to 4 Y2
Y3
a1 a0
a1 a0
I0
I1 mux
I2 2 to 4 Y
I3
I0
I1 Priority a1
I2 encoder a0
I3
A3 B3 A2 B2 A1 B1 A0 B0
C3 Adder C2 Adder C1 Adder
C0 Adder
C1 = 0
S3 S2 S1 S0
There are other circuits such as the multiplier, divider, or comparator….
Combinational Logic Circuit
Memory
PROMs are programmable read-only memories..
Examples (4-word by 4-bit PROM)):
1 0 0 1 1
2. Then:
2 0 1 0 0 F = 1.a2 .a1.a0 + 1.a2 .a1.a0 + 1.a2 .a1.a0 + 1.a2 .a1.a0
3 0 1 1 0
3. Its simplified form by the Karnaugh map :
4 1 0 0 0
F = a2 .a1 + a1.a0 + a2 .a1.a0
5 1 0 1 1
6 1 1 0 1
7 1 1 1 0
Combinational Logic Circuit
Implementation of a combinational logic function :
Example :
With the first form, we have
F = 1.a2 .a1.a0 + 1.a2 .a1.a0 + 0.a2 .a1.a0 + 0.a2 .a1.a0 + 0.a2 .a1.a0 + 1.a2 .a1.a0 + 1.a2 .a1.a0 + 0.a2 .a1.a0
We derive
F = a1.a0 .(1.a2 + 0.a2 ) + a1.a0 .(1.a2 + 1.a2 ) + a1.a0 .(0.a2 + 1.a2 ) + a1.a0 .(0.a2 + 0.a2 )
Therefore
F = a1.a0 .a2 + a1.a0 .1 + a1.a0 .a2 + a1.a0 .0
As the output equation of a multiplexer is F = I 0 .a1.a0 + I1.a1.a0 + I 2 .a1.a0 + I 3 .a1.a0
we obtain the following diagram by identifying the two expressions. :
a1
a0
a2 I0
1 I1
F
a2 I2
0 I3
Combinational Logic Circuit
Implementation of a combinational logic function :
Example :
With
F = 1.a2 .a1.a0 + 1.a2 .a1.a0 + 1.a2 .a1.a0 + 1.a2 .a1.a0
We implement a decoder and an OR gate.
Combinational Logic Circuit
Implementation of a combinational logic function :
Example :
With the form simplified by the Karnaugh map. :
F = a2 .a1 + a1.a0 + a2 .a1.a0
We implement F using NAND gates. :
Combinational Logic Circuit
The choice of the circuit or circuits depends on the logical function(s) to be
implemented. Each method has its advantages and disadvantages. It is
necessary to consider the number and cost of the packages used to calculate
the cost of the function, and to determine the number of logical layers
crossed to calculate its speed. The areas of application are as follows:
Elementary gates are used when there are few functions and input variables.
The decoder is used when there are few input variables (the packages have
a limited number of pins) and many outputs (an OR gate is wired for each
output).
The multiplexer allows for the implementation of only one function (it has a
single output) with a few input variables (one more than the decoder with an
equivalent package size). It requires the simplest wiring and the smallest
package.
The PROM is used when there are many input variables and few output
variables (a maximum of 8 or 16). For example, a 1024x8 PROM (1024
bytes) allows for the implementation of 8 functions with 10 variables each.
Combinational Logic Circuit
Temporal characteristics :
Sequential logic
Ei
Combinational Sj +
system
Sj-
Sequentiel system
Plan
Flip-flops
Counters
Registers
Memories