Cep of Aic
Cep of Aic
Cep of Aic
Karachi
Department of Electronics
Engineering
Group members:
Arham Zafar (EL-22093)
Syed Abdul Rafay Jilani (EL-22303)
Abdul Samad Khan (EL-22118)
Section: C
Course: AIC (EL-239)
Submitted to: Dr. Hashim Raza Khan
1
PART: 1
Vi Vou
VOLTAGE VOLTAGE
GAI SWIN
A single stage the gain provided by single stage op-amps is not sufficient. In such circuits two
stage op-amps are used. The first state of the op-amp provides the required large gain and
second stage gives the large voltage swings.
VOLTAGE SWING:
Voltage swing is just an English term widely used by engineers, describing the voltage level going
up and down. Like having been said, it usually implies the difference between the highest and
the lowest in voltage that the system operates.
TOPOLOGIES:
From survey I found 3 types of topologies:
• Telescopic amplifier.
• Simple two stage cascade amplifier.
• Folded cascode amplifier.
This circuit is called a Telescopic cascaded op-amp because the transistors are cascades between
the power supplies in series and the transistor in the differential pair. This design increases the
output impedance and voltage gain due to the cascade transistor and as lower power
consumption compared to other topologies. Its output swing is very small and it suitable for
applications where the input and output need to connect directly since it reduces its linearity
range.
2
• The circuit requires a current mirror to copy the current from one branch to to the
other so that the output can be single ended without making the output swing half of
the fully differential counterpart.
• The two transistors forming the input differential pair need a sufficient common mode
voltage to keep them in saturation.
• The two cascode transistors in both the cascode structures also require a bias voltage
to keep them in saturation.
• The tail current source here shows that the tail current would be double the amount
of current in each branch of the op amp.
• This cascade structure allows for a higher output gain which when multiplier by
the gm of the input transistor
• As this circuit is cascaded therefore its output will not be disturb from input due
to internal parasitic capacitance.
• Its frequency response is also good due to more cascading
• Its output impedance is also high.
• It also has low power consumption
• Another drawback is that extra poles are added to the small-signal transfer
function of the Op-Amp, exacerbating stability issue.
One of the drawbacks of this implementation is the limited output swing. Each transistor
cascaded on top of another one, adds an overdrive voltage to the headroom of output branch
which will limit the output swing.
3
2.SIMPLE TWO STAGE CASCODE AMPLIFIER:
This topology consists of eight transistors, with each transistor performing specific function.
Transistor M1 and M2 are the input for the differential amplifier (stage-1), which converts
voltage signals into current. Transistors M3, M4, and M6 act as a current mirror, while transistor
M6 and M7 form the second stage which provides the voltage swing. amplifier
• As it is a two stage opamp it is will provide us a very good gain and voltage swing.
• Its output signal will be phase shifted as its second stage is a common source.
• One more advantage of this circuit is that it can provide us a high input and output
impedance.
• Well besides benefits one biggest disadvantage is that its frequency response will not
be so good.
• Its power consumption is also very high.
In order to overcome the drawbacks of telescopic cascode op-amp namely limited output swing,
and difficulty in shorting the input and output a "folded cascode" op-amp can be used. The idea
of folding is that in a cascode differential amplifier the input device is replaced by the opposite
type while still converting the input voltage to a current as shown in Figure below
4
Tradeoffs & benefits:
5
PART: 2
Circuit design:
Two stage op-amp consist of three subdivisions which were a differential gain stage, gain stage
and bias stage. The first stage which was the differential stage of the circuit provided a higher
gain while the second stage which was known as the gain stage helped to provide an
additional gain in order to obtain a large output swing. Figure below shows the schematic of
the two stage CMOS op-amp that will be designed through this project.
6
Transistor Q4, Q5, Q6 and Q7 form the differential stage of the op-amp. The two NMOS
transistors which are Q4 and Q5 form the differential inputs of the amplifier. The gate Q4
and Q5 are the inverting and non-inverting inputs respectively. The active load transistors
which are Q6 and Q7 are the main components that contribute to the output gain of first
stage. The advantages of using the current mirror active load transistors Q6 and Q7 are that
current mirror can help in the conversion of the input signal from the differential to single-
ended while the load helps with common mode rejection ratio. The current of M1 and M3
are equal because Q4 is mirrored by Q6 and the current of Q5 and Q7 are the same because
Q7 is subtracted from the current from Q5. The transistors Q2 and Q8 form the second stage
which was a current sink load inverter. The output from the drain of Q5 and amplifies it
through Q8 which called as common source configuration (Verma et al., 2013). Besides, the
biasing of the op-amp was achieved with four transistors. Transistor Q1 and Q3 controlled
by the bias string where it sink a certain amount of current based from the gate to source
voltage. Compensation capacitor (CC) is connected to the output of the first stage. Its
function was to reduce the frequency of the dominant pole and move the output pole away
from the origin (Razavi, 2001). Load capacitor was connected at the output of the op-amp.
7
RESULTS
The result for the DC analysis of the proposed circuit is simulated in order to observe the
operation of the transistor. Figure below shows the graph of Id versus Vgs for the transistor
Q8
ASSUMPTIONS
• W/L Ratio
We can select the ratio of W/L:
𝒘
ID = 0.5 (µ cox (VGS − Vt)2)
𝒍
by manipulating,
𝒘 𝟐𝑰 𝑫
=µ 𝐜𝐨𝐱(𝐕𝐆𝐒−𝐕𝐭)𝟐
𝒍
• Other Parameters
Other parameters which are given in the table are constant for all MOSFETS. The only change
is the W/L ratio
8
• why the w/l ration of all mosfet is different:
The answer is that we want to make our circuit working in amplifier mode. By making all the
mosfet’s w/l ratio same it will behave as current mirror amplifier. The w/l ratio is decided by
this relation for every mosfet
𝐼𝑜𝑢𝑡 (𝑊⁄𝐿)𝑜𝑢𝑡
=
𝐼𝑟𝑒𝑓 (𝑊⁄𝐿)𝑟𝑒𝑓
The gain of the whole two stage amplifier can be obtained by the following equation
9
PART: 3
DESIGN AND ANALYSIS OF TWO STAGE OPAMP WITH CASCADED CURRENT SOURCES:
The circuit is same as discussed in part 2 of this survey with modification of cascaded current
source so let us see the advantage of this modification.
Circuit design:
10
Output signal:
Comments:
• The cascaded current source is more suitable for 1st stage of op-amp because the 2nd stage
is only giving us voltage swing. So, there is no need of adding cascade current source to it.
11
Trade offs & benefits:
• The first trade off for this configuration is that the no of transistor are increased so the
power consumption is high.
• Open loop gain is also decreased.
• The benefit of this configuration is that we don’t need to take care of the biasing for now
as it will always remain in saturation.
• The drawback of this configuration is that the range of the load which I haven’t mentioned
in the circuit is compromised.
Contribution:
Abdul Rafay Jilani (EL-22303):
Worked on PART 1 LITERATURE SURVEY ON POSSIBLE TOPOLIGIES IN TWO STAGE OP AMP
(and report).
References:
1. GitHub - kanadmainkar/Design-of-a-Telescopic-Operational-Amplifier
2. Dewangan S., Verma J. – "Design of Fully Differential Telescopic Op-amp with
Common Mode
Feedback in 0.25μm CMOS Technology" - Rungta International Journal of Electrical and
Electronics Engineering Volume 1 Issue 1 (March 2016)
3. Folded-Cascode-Op-amp | Analog-CMOS-Design || Electronics Tutorial
(electronics-tutorial.net)
4. Razavi, B. (2001). Design of Analog CMOS Integrated Circuit. McGraw-Hill.
Differntial Input to Single Ended Output, Two stage Op-amp (slideshare.net)
12