Code: BCS302 Course: Digital Design & Computer Organization

Credits: 4 CIE: 50 Marks

L:T:P - 3:0:2 SEE: 50 Marks
SEE Hours: 3 Total Marks:100

Prerequisites if any Fundamentals of Logic

1. To provide the knowledge to explain the fundamentals of Logic circuits and
combinational circuits.
2. To introduce the design of sequential circuit systems, Registers and Counters
Learning objectives 3. The basics involved in number representation and arithmetic operations in the
computer system.
4. Basic processor concept, instruction execution and Bus architecture,
Memory architecture and mapping techniques.

Course Outcomes:
On the successful completion of the course, the student will be able to
COs Course Outcomes Bloom’s level
CO1 Use logic minimization techniques and design combinational circuits using logic gates. Apply
CO2 Design and analyze sequential circuits systems, Registers and Counters. Apply
Use algorithms to perform fast multiplication, division and to represent floating point
CO3 Apply
numbers in binary.
Explain the basic processing unit and design of control system, memory architecture
CO4 Understanding
and mapping techniques.

Mapping with POs and PSOs:

COs PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2
CO1 3 3 2 1 1 - - - 1 1 - 1 - 2
CO2 3 3 2 1 1 - - - 1 1 - 1 - 2
CO3 3 2 2 - - - - - 2 2 - 1 - 3
CO4 3 2 2 - - - - - 2 2 - 1 - 3
Mapping Strength: Strong– 3 Medium – 2 Low – 1
Course Structure
No. of No. of No. of
Module 1-Combinational Circuits Lecture Tutorial Practical
Hours Hours Hours
Simplification of Boolean Functions: The Map Method, Two-and
1.1 2 0 -
Three Variable Maps, Four- Variable Maps, Don't-Care Conditions
1.2 Combinational Logic: Adders, Subtractors 2 0 2
1.3 Binary Parallel Adder, Decimal Adder 3 0 1
1.4 Decoders, Multiplexer 3 0 2
Module 2-Sequential Circuits
2.1 Sequential Logic: Introduction, Flip-Flops, Triggering of Flip Flops 2 0 2
2.2 Analysis of Clocked Sequential Circuits 2 0 -
2.3 State Reduction and Assignment 1 0 -
2.4 Design Procedure 1 0 -
2.5 Registers, Counters: Introduction, Registers 1 0 -
Shift Registers – Serial Transfer, Bidirectional shift register with
2.6 2 0 1
Parallel load
 Synchronous counters
2.7 1 0 2
Asynchronous Counters – Ripple Counters – Binary ripple counter
Module 3-Arithmetic Unit
Arithmetic unit: Multiplication of Positive numbers A signed operand
3.1 2 0 -
multiplication
3.2 Bit pair recoding of multipliers, carry save addition of summands 3 0 -
3.3 Integer division – Restoring and Non-restoring division 2 0 -
Module 4-The Processor
4.1 The Processor: Fundamental concepts 1 0 -
4.2 Execution of complete instruction, Multiple-Bus organization 2 0 -
4.3 Micro programmed control unit – Organization of CU to allow 4 0 -
conditional branching, Microroutine for instruction branch < 0
Module 5-Memory Unit
5.1 Memory Unit: Basic concepts, Internal organization of memory chips, -
3 0
Structure of larger memory.
5.2 Cache memories, Mapping functions 3 0 -
Total No. of Lecture Hours 40 - -
Total No. of Tutorial Hours 00 -
Total No. of Practical Hours 10

Integrated Lab Component: Digital Design & Computer Organization

Sl. PART-A
COs
No HARDWARE
a) Implement Half adder and Full adder using logic gates.
1. CO1
b) Implement Half subtractor, Full subtractor using logic gates
2. CO1 Implement BCD to Excess-3 using basic gates.
3. CO1 Realize a full adder or any Boolean function using 3:8 decoder IC.
Given any four variable logic expression, realize the simplified logic expression using 8:1
4. CO1
multiplexer
5. CO2 Realize a JK master Slave Flip- Flop and verify its truth table.
6. CO2 Realize mod-4 and mod-6 counter using Synchronous counter design
PART-B
SIMULATION USING XILINX
Design Verilog HDL to implement simple circuits using structural, Data flow and Behavioural
1. CO1
model.
2. CO1 Write a VHDL code for a Half –Adder , Simulate and verify its working.
3. CO1 Write a VHDL code for a Full –Adder , Simulate and verify its working.
4. CO1 Write a VHDL code for a Full –Subtractor, Simulate and verify its working.
5. CO1 Write a VHDL code for 2:1, 4:1 and 8:1 multiplexer , Simulate and verify its working.
6. CO2 Write a VHDL code for a SR, D and JK flip flop , Simulate and verify its working.
Textbooks:
1. Digital Logic and Computer Design : M. Morris Mano, Pearson, 2016
2. Computer Organization: C Hamacher, Z Vranesic, S Zaky:, Tata McGraw Hill,
5th Edition, 2011.

Reference Books:
1. Computer Architecture A Quantitative Approach: John L Hennessy, David A
Patterson, Elsevier, 5th Edition 2012.
2. The Elements of Computing System – Building the Modern Computer from First
Principles: Noam Nisan, Shimon Schocken, The MIT Press (2005).
3. Digital Principles and Applications: Donald P Leach, Albert Paul Malvino &
Goutham Saha, TMH, 6th Edition, 2006.

Online Resources:
1. NPTEL: Switching Circuits and logic design
https://onlinecourses.nptel.ac.in/noc21_cs64
2. NPTEL: Computer Organization and Architecture A Pedagogical
Aspect https://onlinecourses.nptel.ac.in/noc19_cs04/preview
3. Edx: Computation Structures 3:Computer Organization
https://www.edx.org/course/computation-structures 3-computer-mitx-
6-004-3x0
4. Coursera: Digital Systems - https://www.coursera.org/learn/digital-
systems