Cat 5 Cable Modeling for DVI/HDMI links

Donald Bennett & Raj Nair ComLSI Inc.

6065 E University Dr. Ste. C, Mesa, AZ 85205, USA www.comlsi.com +1 (480) 325-6247 1. Introduction Category 5 (CAT5) cable is a multi-pair (usually 4 pair) cable that consists of twisted pair conductors, used mainly for data transmission. Basic CAT5 cable was designed for characteristics of up to 100 MHz. CAT5 cable is typically used for Ethernet networks running at 10 or 100 Mbps. The quality of unshielded twisted wire pair (UTP) may vary from telephone-grade wire to very high-speed cable. Each pair is twisted with a different number of twists per inch to help eliminate interference from adjacent pairs and other electrical devices. The EIA/TIA (Electronic Industry Association/Telecommunication Industry Association) has established standards of UTP for different categories of wire.

Figure 1: Category 5, 5e and 6 loss and crosstalk Table-1 above compares characteristics of three categories of cable, which along with BER of 10-9 in DVI/HDMI links and the corresponding SNR point to their potential use for video cabling. In this paper, the first of a series of articles discussing advancements in wired video transmission links, we disclose simple modelling

techniques that assist in the validation of complete DVI / HDMI transceiver links. In succeeding papers, we will describe interconnect and circuit enhancements enabling high-definition video over Cat-5 UTP and equivalent cabling.

2. Transmission line model

The behaviour of each twisted pair is determined by the complex three-dimensional electromagnetic field in the region within and surrounding the cable. For communications link performance verification we require a simplified representation of the cable that is computationally viable and can be included within the circuit verification environment. The model also needs to correctly represent important cable parameters such as delay, near and far end crosstalk and cable losses.

Figure 2: Transmission line pair Figure 2 shows a single transmission line pair. The transmission lines are divided into short elements of equal length and equal impedance. For a fully differential signal the current and voltage of the bottom wire is a mirror image of the current and voltage of the top wire. In this simplified case the voltage change across and current through each element is given by: dI dV = Rdx I + Ldx dt
dI = I 0 dx + Cdx dV dt

where dx is the length of the element, R is resistance per unit length, L is the inductance per unit length, C is capacitance per unit length and Io is (voltage controlled) current per unit length. Io is usually written in the form GV where G is a frequency dependent conductance. Combining the above two equations and eliminating I results in the following equation for the voltage at each position along the line as a function of time.

I 2V 2V V + L 0 + RI 0 = LC 2 + RC 2 t t t x

3. CppSim Modelling
The following, simple C++ module was written and added to the CppSim [1] behavioural modelling environment. CppSim was chosen as a possible modelling environment given its capacity for behavioural representation of complex analog circuits and systems. The CppSim transmission line module uses a finite difference method to solve the above uncoupled transmission line equation assuming Io=0. An example CppSim output is shown in figure 3.

// Transmission line module ///////////////////////////// module: tline parameters: double r, double l, double c, double length, double termination inputs: double a outputs: double b static_variables: double *Vplus double dx int nx double waveVelocity double dx2 double *V double *Vminus double TMP1; double TMP2; double TMP3; double TMP4; classes: init: a = 0; b = 0; waveVelocity=sqrt(1/(c*l)); dx=4*Ts*waveVelocity; nx=length/dx+2; if (nx<50) { printf("Error - Time step too long for transmission line\n"); printf("Try reducing the period Ts\n"); exit(1); } dx2=dx*dx; V=new double[nx]; Vplus=new double[nx]; Vminus=new double[nx]; for(int i=0;i<nx;i++){ V[i]=0.0; Vplus[i]=0.0; Vminus[i]=0.0; } code: // Store the previous two time steps for(int i=0;i<nx;i++){ Vminus[i]=V[i]; V[i]=Vplus[i]; } // Boundary condition at input to the tline Vplus[1]=a; // Solve the tline for(int i=2;i<nx-2;i++){ TMP1=(V[i+1]-2*V[i]+V[i-1])*(Ts/dx2); TMP2=(r*c/2)*Vminus[i]+(2*l*c*V[i])/Ts; TMP3=(l*c*Vminus[i])/Ts; TMP4=((r*c/2)+(l*c)/Ts); Vplus[i]=(TMP1+TMP2-TMP3)/TMP4; } // Solve the termination resistor int i=nx-2; double rt=termination/dx; TMP1=(V[i+1]-2*V[i]+V[i-1])*(Ts/dx2); TMP2=(rt*c/2)*Vminus[i]+(2*l*c*V[i])/Ts; TMP3=(l*c*Vminus[i])/Ts; TMP4=((rt*c/2)+(l*c)/Ts); Vplus[i]=(TMP1+TMP2-TMP3)/TMP4; // Zero current boundary condition Vplus[0]=Vplus[1]; Vplus[nx-1]=Vplus[nx-2]; // Set the output terminal to the voltage at the node // between the end of the tline and the termination resistor b=Vplus[nx-3];

Figure 3: CppSim transmission line module and results This simple behavioural model can be used to estimate the delay and static resistive loss of a single wire pair. However, it does not provide any information on near and far end crosstalk or frequency dependent attenuation, critical aspects affecting BER. The above module may also be written in other simulation environments such as Matlab but it would need to be extended to model up to eight or more coupled transmission lines. These equations, which are represented in vector form, require matrix manipulation (change of basis) to uncouple the transmission line behaviour and advanced numerical techniques to ensure convergence and stability. Fortunately this code has already been written and is contained within the HSpice [2] circuit simulator. Hspice thus has the advantage of an integrated field solver to calculate the coupling matrices in addition to being capable of accurate circuit simulations.

4. Hspice W model
Figure 4 shows a simplified two dimensional model of a Cat-5 cable. Two sets of polar coordinates define the relative position of each wire at a fixed position along the cable length. These coordinates determine the electro-magnetic coupling calculated by a field solver at each point along the cable twist. The field solver calculation is implemented as part of an Hspice W transmission line model.

Figure 4: Cat 5 Cable cross section model Each copper wire in this model is 0.5mm diameter with 0.2mm insulation. The insulation has an assumed relative dielectric constant of 4. Simulations were run using r=4 (extremely pessimistic) in the entire space occupied by 15m wires. Figure 5 shows a pulse arriving back at the source using different values of termination resistor. These results indicate that the differential cable impedance is approximately 70ohms with a transit delay of 200ns over 30m. Real cat5 cables have Zo~100ohms and delays of approximately 140ns for this length of cable. This indicates that the effective dielectric constant of the cable is less than the r of the insulator. Figure 4 indicates that the space occupied by the E-field is mostly air. Using r=1.8 (closer to air than the insulator) results in Zo~100ohms with delay of approximately 4.6ns/m. With this value of r the attenuation of a 400ps pulse over 100m is approximately 29dB (figure 6). The loss for a 5ns pulse is 10dB at 100m. Note that this is for a fixed set of orientation angles along the cable. Higher loss is expected when impedance variations along the cable and increased length due to the twist are taken into account.

Figure 5: Pulse arriving back at the source (rt=40,50,60,70,80ohms)

Figure 6: 400ps(blue) and 5ns(red) pulse attenuation at the end of a 100m cable

Figure 7: 5ns pulse far-end crosstalk (100m cable) Figure 7 shows ~27dB far end crosstalk from the inner wire pair to the outer three wire pairs shown in figure 4 for a fixed set of twist orientation angles. This reduces to approximately 20dB at 1.25GHz fundamental frequency (Figure 8).

Figure 8: 400ps pulse far end crosstalk (100m cable)

Figure 9: 5ns pulse near end crosstalk (100m cable) Figure 9 shows ~22dB near end crosstalk from the inner wire pair to the outer three wire pairs shown in figure 4 for a fixed set of twist orientation angles. This remains at approximately 22dB at 1.25GHz fundamental frequency (figure 10).

Figure 10: 400ps pulse near end crosstalk (100m cable)

Figure 11: Cable split into four sections with different rotation angles for each twisted pair 10ns pulse (red), 0.8ns pulse (green) and 1.0ns pulse (blue) Figure 11 shows the same 100m cable split into four sections with each twisted pair rotated to a different angle in each section. The three impedance discontinuities give rise to reflections and instability at the two higher frequencies, rendering simulation results questionable. Figure 12 shows an eye diagram for a single section 15m cable with a random signal on all wire pairs. The eye opening corresponds to the central region of each differential signal not obscured by the retracing horizontal lines. Jitter can be seen as the time-uncertainty at differential crossover, and is low for the 1/10th frequency clock signal. Figure 13 shows degraded results using the same signal set and cable length but with the cable split into four sections and randomised pair twist. Observe that this model leads to substantially greater jitter while not representing delay differences due to effective length differences as a consequence of twist variation between signal pairs correctly.

5. Conclusions
The combination of field solver and multi conductor W model in Hspice can be used to simulate all the key signal degradation characteristics such as frequency dependant loss, delay, near and far end coupling and the effect of discontinuities for different UTP cable geometries. An 8-wire cable model [3] has been developed and validated with respect to published measurements. The model provides a pessimistic view of crosstalk and inter-pair coupling. Key interconnect variance aspects captured within the model include: a) Intra-pair and inter-pair coupling and corresponding impedance, X-talk b) Resistive loss effects, both wire and dielectric

This computationally simple model enables simulations of full DVI transceiver links within a single verification environment. Aspects that have been determined to be exceedingly complex to capture in a model include intra-pair skew and inter-pair skew due to twist variance as well as gradual impedance discontinuities introduced by intra-pair separation along the cable or at the connectors. These need to be represented in a system level model.

Figure 12: 15m single section cable eye diagrams

Figure 13: EYE diagrams for 15m cable with 4 sections

6. References
1. M. H. Perrott, CppSim, a Behavioral Simulation package, http://wwwmtl.mit.edu/researchgroups/perrottgroup/tools.html 2. HSpice, an industry standard Spice simulation tool from Synopsys, Inc. www.synopsys.com 3. Donald Bennett, Simple 8-wire cable model for DVI / HDMI applications, ComLSI, Inc. www.comlsi.com

About the authors

Rajendran (Raj) Nair: Raj has 20 years of experience in electronics in the areas of robotics, instrumentation design and VLSI design & manufacture. He served previously at L&T, LSU-CCEER, Lovoltech Inc. and also served with Intel Corporation where he was responsible for strategic research and program management in the areas of microprocessor Power

Delivery, High-speed IO and Packaging. Mr. Nair founded and is currently the President/CEO of ComLSI, an Analog IP company specializing in power related EDA development, high-speed communication links and analog and mixed-signal design. He holds 35 US and international patents and has numerous publications in IEEE journals and conference proceedings. He is a Senior Member of the IEEE and an individual member of the VSI Alliance. Raj can be reached at [email protected]. Donald Bennett: Don has a BSc Physics, and PhD in Semiconductor Process Modeling from the Universiy of Glasgow, Scotland, UK. He has 15 years as device physicist and IC design engineer. Previously, he worked at ST Microelectronics in the UK. Now he is engaged in power related EDA software development and high-speed IO investigations at ComLSI. Previous publications include articles on radiation related defects in semiconductors and IC power noise simulation. Don can be reached at [email protected].