DPP 06 (Student Sheet) 3

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TARGET : GATE 2023/24

Analog Electronics
Topic : Operational Amplifier DPP : 06
Date : 27/07/2022 Daily Practice Problem for Mind Map

..Common Data for Q.1 & Q.2..


Three inverting amplifiers, each with R2  150k and R1  15k are connected in cascade. Each op-amp has a
low-frequency gain of A0  5104 and a unity-gain bandwidth of fT  1.5 MHz . Where resistance R2 is used as
a feedback resistor.
Question 1
The value of low-frequency closed-loop gain of the overall system is _________(rounded upto two
decimal places).
Question 2
The value of the -3 dB frequency (in Hz) overall system is_________(rounded upto two decimal places).

..Common Data for Q.3 to Q.5..


An inverting amplifier circuit has a voltage gain of -25. The op-amp used in the circuit has a low-frequency
voltage gain of 5104 and a unity-gam bandwidth of 1 MHz.
Question 3
The value of dominant pole frequency (in Hz) of the op-amp is_________(rounded upto two decimal
places).
Question 4
The value of small-signal bandwidth. f3dB (in kHz) of the inverting amplifier is_________(rounded upto
two decimal places).
Question 5
The value of magnitude of the closed-loop voltage gain at 0.5 f3dB is_________(rounded upto two
decimal places).
Question 6
An audio amplifier system, using a non-inverting op-amp circuit, needs to have a small-signal bandwidth
of 20 kHz. The open-loop low-frequency voltage gain of the op-amp is 105 and the unity-gain bandwidth
is 1 MHz. The value of maximum closed-loop voltage gain that can be obtained for these specifications
is_________(rounded upto two decimal places).
TARGET : GATE 2023/24, DPP-06 2 GATE ACADEMY®
Question 7
If an op-amp has a slew-rate of 5 V/s is. The value of full-power bandwidth (in kHz) for a peak output
voltage of 5 V is_________(rounded upto two decimal places).
Question 8
An op-amp with a slew rate of 8 V/s is driven by a 250 kHz sine wave. The value of maximum output
amplitude (in volt) at which slew-rate limiting is reached is_________(rounded upto two decimal places).
Question 9
An amplifier system is to be designed to provide an undistorted 10 V peak sinusoidal signal at a frequency
of f  12 kHz . The value of minimum slew rate (in V/s) required for the amplifier is
_________(rounded upto two decimal places).
Question 10
Consider the circuit shown in below, the value of common mode rejection ratio of the circuit
is_________(rounded upto two decimal places).
+ +
Vd V0  8 V V0  12 mV
– –
Vi1  0.5 mV Vi1  1 mV
Vi 2   0.5 mV Vi2  1 mV

Fig. Differential mode operation Fig. Common mode operation

Question 11
Consider the circuit shown in below figure. The value of ratio of resistance ( R2 /R1 ) is required for
oscillation of the circuit is ________ (rounded upto one decimal place).
R2

R1

v0

R L
L R

Question 12
The value of output voltage (in mV) of an op-amp for input voltages of Vi1  150 V and Vi 2  140 V .
The amplifier has a differential gain of Ad = 4000 and value of CMRR is 100_________(rounded upto
two decimal places).
Question 13
Consider a non-inverting amplifier shown in below figure, the value of output voltage (in volt) of the
circuit is_________(rounded upto two decimal places).
GATE ACADEMY® 3 TARGET : GATE 2023/24, DPP-06

33k R f  330 k
V1  0.2 V

22k
V2   0.5 V
V0
12k
V3  0.8 V

Question 14
Consider a circuit shown in below figure, the value of voltage 'V2  V3 ' (in volt) of the circuit
is_________(rounded upto two decimal places).
200k

20k

V2

V1  0.2 V V3

200k

10 k

Question 15
Consider a circuit shown in below figure, the value of output voltage (in volt) of the circuit
is_________(rounded upto two decimal places).
100k
V1  0.1V 20k

10k V0
400 k
20k
TARGET : GATE 2023/24, DPP-06 4 GATE ACADEMY®
Question 16
Consider a circuit shown in below figure, the value of output voltage (in volt) of the circuit
is_________(rounded upto two decimal places).
600 k
300 k
15k
25 mV

30 k
30 k
20 mV + V0
+

15 k

Question 17
The value of total offset voltage (in mV) for the circuit shown in below figure, for an op-amp with
specified values of input offset voltage VIO  6 mV and input offset current I IO  120 nA
is_________(rounded upto two decimal places).
200 k

2 k
VI
V0
+

2 k

Question 18
For an op-amp having a slew rate of SR  2.4 V/μs , the value of maximum closed-loop voltage gain that
can be used when the input signal varies by 0.3 V in 10  sec is_________(rounded upto two decimal
places).
Question 19
The value of cutoff frequency (in kHz) of a first-order low-pass filter shown in below figure
is_________(rounded upto two decimal places).
10k 10k

2.2k V0
Vin

0.05 F
GATE ACADEMY® 5 TARGET : GATE 2023/24, DPP-06
Question 20
The value of cutoff frequency (in kHz) of a low-pass filter shown in below figure is_________(rounded
upto two decimal places).
10k 10k

20 k 20k V0
Vin

0.02 F 0.02 F

Question 21
Consider the circuit shown in below figure, the value of the sum of the lower and upper cutoff frequencies
(in kHz) of the band pass filter is_________(rounded upto two decimal places).
4.1k 4.1k 20k 20k

20k
0.05 F V0
Vin

10k 0.02 F

Question 22
Consider the circuit shown in below figure, given parameters of circuit are R1  1 k , R2  10 k ,
RA  1 M , RB  10 k , vIN  1 V , and vx  0.1 V , the value of open-loop gain of the Op-amp ‘ AO ’
is_________(rounded upto two decimal places).
R1 Vx R2

RA
VIN +–
RB VOU T
TARGET : GATE 2023/24, DPP-06 6 GATE ACADEMY®
..Common Data for Q.22 & Q.23..

A particular op-amp has parameter AO  105 and rin  1 M . If R2  19 k and R1  1 k


I in

vin Rin v rin


V0

A0v
R2

R1

Question 23
The value of closed-loop gain of the circuit is_________(rounded upto two decimal places).
Question 24
The value of input resistance (in M  ) is_________(rounded upto two decimal places).
Question 25
An op-amp has an open-loop gain of 2 104 and a dominant open-loop breakpoint at 12Hz. A non-
inverting amplifier is made with R2  270 k and R1  5.6 k where R2 is the feedback resistor. The
value of bandwidth (in kHz) of the closed-loop amplifier is_________(rounded upto two decimal places).
Question 26
Consider the circuit shown in below Figure, the output of Op-Amp is V0 when switch ‘S’ is open and the
1

output of Op-Amp is V0 , when switch ‘s’ is closed. The value of sum of voltage V0  V0
2 1 2
 (in volt) is
________. (Rounded upto two decimal place)
R1  5k R2  50k
V1  1V

V0

R3  10k R4  10k
S

Question 27
Consider is low pass active filter shown in below figure, the value of the gain at 100 kHz is _________.
(Rounded upto two decimal place)
10 k
Vin
V0
1000 pF

100k
10k
GATE ACADEMY® 7 TARGET : GATE 2023/24, DPP-06
Question 28
Consider the circuit shown in below figure which is work as a active filter, which option is correct.
R4

C1 C2 V0

R3
R1
Vin
C3 R2

(A) Low pass filter (B) Band pass filter


(C) Band stop filter (D) All pass filter
Question 29
Consider the second-order low-pass filter circuit shown in below figure, if the filter were to have cut-off
frequency of 10 kHz, Q-factor of 0.707. The value of capacitor C 2 (in nF) is ________. (Rounded upto
two decimal place)
C1  1.126 nF

R3  20 k

R1  10 k V0
Vin
R2  20 k
C2

Question 30
The relaxation oscillator circuit shown in below figure, operates on a power supply voltage of 15 V .
Given that the op-amp has positive and negative saturation output voltage of 13 A and 13 A
respectively. The value of frequency (in kHz) of the output wave form is _________. (Rounded upto two
decimal place)
RF  10 k

V0
C  0.01 F

R2  10 k

R1  47 k
TARGET : GATE 2023/24, DPP-06 8 GATE ACADEMY®
Question 31
Given figure shown in below an Op-Amp based constant current source. The value of resistor R in ohms 
, so that a current of 25 mA flows through the Light Amplification by stimulated emission of radiation
(LASER) diode is _______. (Rounded upto two decimal place)
15 V

15 V

2.5 V
15 V

Laser diode

Question 32
Consider the circuit shown in below figure is a low pass filter circuit. The value of cut-off frequency and
the gain value at four times the cut-off frequency are respectively.
R  10k
Vin
V0
C  1000 pF

R1  100k
R2  10 k

(A) 15.7 kHz, 8.8 dB (B) 15.9 kHz, 8.8 dB


(C) 15.1 kHz, 8.8 dB (D) 15.9 kHz, 8.9 dB
Question 33
For the comparator circuit shown in below figure, diodes D1 and D2 have forward-biased voltage drop
equal to 0.7 V each. What is the state of LED-1 and LED-2 (whether ON or OFF) when the switch SW-1
is in position-A?
SW  1
A
V R1

V V0
B
D1 D2

LED  1 LED  2

(A) LED-1 ON, LED-2 OFF (B) LED-1 ON, LED-2 ON


(C) LED-1 OFF, LED-2 ON (D) LED-1 OFF, LED-2 OFF
GATE ACADEMY® 9 TARGET : GATE 2023/24, DPP-06
Question 34
Consider the circuit shown in below figure, Given that the Op-Amp is ideal and R2 / R1  5 The
mathematical operation performed by the amplifier circuit is.
R1 R2

R2
R1

Vs
1
V0
Vs2

(A) Subtractor (B) Multiplier


(C) Adder (D) Divider
Question 35
Consider a transfer characteristics of some op-amp circuit. It could possibly be
V0

VSAT

Vi
0

VSAT

(A) an inverting comparator (B) a non-inverting comparator


(C) an inverting amplifier with hysteresis (D) a non-inverting amplifier with hysteresis
Question 36
For the Op-Amp circuit shown in below figure, the value of sum of resistance R1 and R2 (in kHz) such
that output voltage of Op-Amp is v0  5va  3vb _________. (Rounded upto two decimal place)
250 k

R1
va
R1 v0
vb

R2

Question 37
Consider the circuit shown in below figure. The value of ratio of resistance ( R2 /R1 ) is required for
oscillation of the circuit is ________ (rounded upto one decimal place).
TARGET : GATE 2023/24, DPP-06 10 GATE ACADEMY®
R2

R1

v0

C R
R C

Question 38
Consider the circuit shown in below figure, the value of output voltage V0  t  (in mV) at t  2 msec is
_________. (Rounded upto two decimal place)
1 F

R1  250 k
1 u t  V
v0 t 
1 u t V
R2  500 k

Question 39
Consider the circuit shown in below figure, the value of the current ' I L ' (in mA) is __________. (Rounded
upto two decimal place)
RF  100 k

vin  2 V RL
R1  10 k v2
IL
R2  50 k

..Common Data for Q.40 to Q.42..


For the amplifier circuit shown in below figure,

RS  50 k v0

RL  1 k
vi

Question 40
The value of ideal closed-loop voltage gain is ________. (Rounded upto two decimal place)
GATE ACADEMY® 11 TARGET : GATE 2023/24, DPP-06
Question 41
The actual value of closed-loop voltage gain if the open-loop gain is Aod  150,000 ________. (Rounded
upto two decimal place)
Question 42
The value open-loop gain such that actual closed-loop gain is within 1 percent of the ideal value
is________. (Rounded upto two decimal place)
Question 43
Consider the circuit shown in below figure. The output current of the op-amp is 1.2 mA and the transistor
current gain is   75 . The value of resistance R (in  ) is_________. (Rounded upto two decimal)
25 V

10 V +

Question 44
Consider the adjustable gain difference amplifier circuit shown in below figure. Variable resistor RV is
used to vary the gain. The value of output voltage V0 , as a function of VI1 and VI2 , is given by
R1 R2 R2
VI1

V0
VI2
R1
RV

R2 R2

2R2  R2  2R2  R2 
(A) V0  1 VI  VI1 
r1  RV  2
(B) V0  1 VI  VI1 
r1  RV  2
2R  R  2R  R 
(C) V0  2 1  2  VI1  VI2  (D) V0  2 1  2  VI1  VI2 
r1  RV  r1  RV 
Question 45
Consider the circuit shown in below figure. Assume ideal op-amp are used. The input voltage is
V 
VI  0.5sin t . The value of the ratio of the voltage  OB  is ________. (Rounded upto two decimal
 VOC 
place)
TARGET : GATE 2023/24, DPP-06 12 GATE ACADEMY®
40 k

12 k

12 k
+
+
VOB

V0
30 k
Vi
12 k

12 k
+
VOC

..Common Data for Q.46 & Q.47..


Consider the circuit shown in below Figure, is a first-order low-pass active filter.
C 2  1 F

R2  10 k
R1  1 k
Vi
V0

Question 46
The value of DC voltage of the circuit is __________. (Rounded upto two decimal place)
Question 47
The value of frequency (in Hz) the magnitude of the voltage gain a factor of 2 less that the DC value is
known as 3  dB frequency is ___________. (Rounded upto two decimal place)

..Common Data for Q.48 & Q.49..


Consider the circuit shown in below Figure, is a first-order low-pass active filter.
C2

R2
R1
Vi
V0
GATE ACADEMY® 13 TARGET : GATE 2023/24, DPP-06
Question 48
The value of sum of the resistance ' R1  R2 ' (in k ) such that input resistance is 20 k and the low
frequency gain is 15 , and 3 dB frequency is 5 kHz ________. (Rounded upto two decimal place)
Question 49
The value of capacitance C 2 (in pF) such that input resistance is 20 k and the low frequency gain is
15 , and 3 dB frequency is 5 kHz ________. (Rounded upto two decimal place)
Question 50
In the circuit shown in below figure, assume that Q1 and Q2 are identical transistors. The value of output
voltage V0 (in volt) is ________. (Rounded upto two decimal place)
Q1 Q2

R1  10 k R2  20 k
V1  10 V V2  20 V

333 k

20 k

V0
20 k

333 k

..Common Data for Q.51 to Q.54..


Because of a manufacturing error, the open-loop gain of each op-amp in the circuit in Figure, is only AOL  100 .
The open-loop input and output resistance are Ri  10 k and R0  1 k , respectively.
1 k
Rif 100 

1 k
100 Rof
V0
1 V02
VI

Question 51
The value of input resistance Rif (in  ) is ___________. (Rounded upto two decimal place)
Question 52
The value of Output resistance R0 f (in  ) is ___________. (Rounded upto two decimal place)
TARGET : GATE 2023/24, DPP-06 14 GATE ACADEMY®
Question 53
The value of Actual closed loop gain of the circuit is ___________. (Rounded upto two decimal place)
Question 54
The value of the ratio of Actual closed loop gain to the ideal closed loop gain is ___________. (Rounded
upto two decimal place)
Question 55
An inverting amplifier has parameters R2  150 k and R1  15 k . Bias current of 2 A are leaving
each Op-Amp terminal, otherwise Op-Amp is ideal. The value of output voltage (in volt) if the input
voltage is 20 mV is _______. (Rounded upto one decimal place)

..Common Data for Q.56 to Q.57..

For the circuit shown in below figure, the Op-Amp are ideal except that the Op-Amps have bias current if
I B  3 A entering each op-amp terminal.

50 k

10 k
V02

V01

RA 20 k

VI
20 k
V03

RB

Question 56
The value of sum of voltage ‘ V01  V02  V03 ’ (in Volt) for which input voltage VI  0 and resistance
RA  RB  0 is _________. (Rounded upto two decimal place)

Question 57

The values of sum of resistance  RA  RB  (in k ) for input bias current compensation is
_____________. (Rounded upto two decimal place)

..Common Data for Q.58 & Q.60..

Consider the band pass filter shown in below Figure, given that circuit parameters,
C  0.1 F, R1  85 k, R2  R3  300 , R4  3 k and R5  30 k .
GATE ACADEMY® 15 TARGET : GATE 2023/24, DPP-06
R1

R1

C
C
R4 R5
Vi R2
R5

V0

Question 58
The value of magnitude of maximum voltage gain AV (max) of the circuit is _________. (Rounded upto
two decimal place)
Question 59
The value of frequency to (in kHz) at which AV (max) occurs is ________. (Rounded upto two decimal
place)
Question 60
The value of 3  dB frequency (in kHz) is ___________. (Rounded upto two decimal place)
Question 61
Consider circuit shown in below Figure, the value of cut-off frequency (in rad / sec ) of the circuit is.
R2

R1 C

V0
Vi

1 1
(A) (B)
R2C R1C
R2
(C) R1C (D)
R1
Question 62
Consider circuit shown in below Figure, the value of cut-off frequency (in rad / sec ) of the circuit is.
C R2

R1

V0
Vi
TARGET : GATE 2023/24, DPP-06 16 GATE ACADEMY®
1 1
(A) (B)
R2C R1C
R2
(C) R1C (D)
R1
Question 63
The circuit shown in below figure, is a band pass filter. If R1  10 k . The value of resistance R2 (in k
) such a that magnitude of the midband gain is 50 and the cutoff frequency are 200 Hz and 5 kHz is
___________. (Rounded upto two decimal place)
C2

R1 C1 R2
Vi
V0

Question 64
The saturated output voltage are VP for the Schmitt trigger shown in below Figure. If
VP  12 V, VREF  10 V and R3  10 k , The value of sum of resistance ‘ R1  R2 ’ (in kHz) such that
switching point is VS  5 V and the hysteresis width is 0.2 V is _________. (Rounded upto two decimal
place)
Vi
V0
R1

R2
R3

VREF

..Common Data for Q.65 & Q.66..


Consider the circuit shown in below figure, given that the reverse breakdown Zener voltage is VZ  5.6V and the
forward diode voltage is V  0.6 V .

V0
Vi
20 k

DZ1 DZ2

Question 65
The plot of the voltage transfer characteristics of the comparator circuit is assuming the open-loop gain in
infinite.
GATE ACADEMY® 17 TARGET : GATE 2023/24, DPP-06
(A) if the saturated output voltage is VP  6.2V, then the circuit behave as a comparator.

(B) if the saturated output voltage is VP  6.2V, then the circuit behave as a comparator.

(C) if the saturated output voltage is VP  6.2V, then the output will flip to either  VP or  VP and the
input no control.
(D) if the saturated output voltage is VP  6.2V, then the output will flip to either  VP or  VP and the
input no control.
Question 66
The plot of the voltage transfer characteristics of the comparator circuit is assuming the open-loop gain in
infinite and input voltage is 2.5 V.
(A) Circuit work as a comparator as long as V01  8.7 V and V02  – 3.7 V otherwise input has no control.
(B) Circuit work as a comparator as long as V01  8.7 V and V02  – 3.7 V otherwise input has no control.
(C) Circuit work as a comparator as long as V01  8.7 V and V02  – 3.7 V otherwise input has no control.
(D) Circuit work as a comparator as long as V01  8.7 V and V02  – 3.7 V otherwise input has no control.
Question 67
Consider the circuit shown in below figure. The value of ratio of resistance ( R2 /R1 ) is required for
oscillation of the circuit is ________ (rounded upto one decimal place).
R2

R1

v0

R C
C R

..Common Data for Q.68 & Q.69..


Consider the Schmit trigger shown in below Figure. The saturated output voltage of the op-amp are VH  10 V
and VL  10 V . Assume the diode turn-on voltage is 0.7 V. The range of the input voltage is 2  VI  2 V .
R3  75 k 
I R3
R1  25 k 
R2  20 k 
V0
VI IR 2
D1 D2

ID ID
2
1
TARGET : GATE 2023/24, DPP-06 18 GATE ACADEMY®
Question 68
The value of hysteresis voltage is ________. (Rounded upto two decimal place)
Question 69
The value of sum of current ' I D1  I D2  I R2  I R3 ' (in mA) if input voltage is 2 V is __________. (Rounded
upto two decimal place)
Question 70
The parameters of the transistor shown in below figure are   80 and VEB  on   0.6 V . The Zener diode
is ideal with VZ  6.8V and the op-amp is ideal. The value of load current ‘ I L ’ (in mA) is ____________.
(Rounded upto two decimal place)

V  20

R2  5 k 
+
VZ D1

Q

V0
IL
R1  10 k  RL

..Common Data for Q.71 to Q.74..


The inverting op-amp shown in below figure has parameters R1  25 k , R2  100 k and Aod  5103 . The
input voltage is from an ideal voltage source whose value is VI  1.0000V .
R2

R1
Vi
V0

Aod V2  V1 

Question 71
The value of closed-loop voltage gain of the circuit is ________. (Rounded upto two decimal place)
Question 72
The value of actual output voltage (in volt) of the circuit is ________. (Rounded upto two decimal
place)
GATE ACADEMY® 19 TARGET : GATE 2023/24, DPP-06
Question 73
What is the percentage difference between the actual output voltage and the ideal output voltage is
________. (Rounded upto two decimal place).
Question 74
What is the voltage (in mV) at the inverting terminal of the op-amp is ________. (Rounded upto two
decimal place).

..Common Data for Q.75 & Q.76..


An op-amp with an open-loop gain of Aod  7 103 is to be used in an inverting op-amp circuit. Let R2  100 k
and R1  10 k . If the output voltage is V0  7 V .
Question 75
The value of input voltage (in volt) is ________. (Rounded upto two decimal place).
Question 76
The voltage (in mV) at the inverting terminal of the op-amp is ________. (Rounded upto two decimal
place).

..Common Data for Q.77 & Q.78..


For the ideal inverting op-amp circuit with T-network, shown in figure, the circuit parameters are
R1  10 k, R2  R3  50 k , and R4  5 k .

R2 R3

R4

R1
Vi
V0

Question 77
The value of closed-loop voltage gain is ________. (Rounded upto two decimal place)
Question 78
The value of resistance R4 (in k ) to produce a voltage gain is -100 ________. (Rounded upto two
decimal place)
TARGET : GATE 2023/24, DPP-06 20 GATE ACADEMY®
Answer Key :
1. – 999.34 2. 706.64 3. 20 4. 40 5. 22.36
6. 50 7. 159 8. 5.09 9. 0.754 10. 666.7
11. 2.0 12. 45.8 13. – 16.5 14. 2.2 15. – 11.5
16. 6.4 17. 630 18. 80 19. 1.45 20. 0.397
21. 0.716 22. 8978.90 23. 19.99 24. 5001 25. 50.26
26. – 9.00 27. 1.73 28. C 29. 2.24 30. 2.133
31. 500.00 32. B 33. A 34. A 35. A
36. 100.00 37. 2 38. – 4.00 39. 0.6 40. 1
41. 0.99 42. 99.9 43. 109.6 44. A 45. – 1.73
46. – 10 47. 15.91 48. 320 49. 106 50. 0
51. 99.1 52. 18.4 53. 1.0 54. 0.65 55. – 0.5
56. 0.21 57. 18.33 58. 28.30 59. 5.30 60. 10.611
61. A 62. B 63. 524 64. 610.17 65. A, C
66. A 67. 2 68. 0.35 69. 0 70. 1.34
71. – 3.99 72. – 3.99 73. 0.10 74. 0.799 75. – 0.7011
76. – 1.00 77. – 60 78. 2.78

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