MSI MS-7857 Rev 1.0 PDF

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1

Cover Sheet
Block Diagram
1
2
FUSION mATX: 9.6 inch * 8.86 inch
(MS-7857M1 Ver:10)
Power Deliver Chart 3
Clock Distribution 4 CPU:
PWRGD&RESET Map 5 AMD FM2(Richland uPGA FAMILIES)
GPIO/MSIC TABLE 6
VRM Intersil 6277 3+2 PHASE 7 System Chipset:
AMD FM2 8 ~ 11 AMD - Bolton D3
DDR3 DIMM CH-A 12
DDR3 DIMM CH-B 13
DDR REF POWER AND CAPS 14 On Board Chipset:
EMI Reserved 15 CLOCK GEN --FCH internal clock gen
AMD Bolton D3 16~20
LPC Super I/O --F71808A
LAN-Realtek 8111E
SWITCH/HDMI CONN. 21
A
VGA CONN. 22
Azalia CODEC - Realtek ALC887/662 A

SATA/PS2/ FAN 23
LAN RTL8111E 24 Main Memory:
SUPER I/O F71808AU 25 DDR III * 2 (16 GB)
ACPI UPI & SYS POWER 26
FCH CORE & DDR POWER 27
Expansion Slots:
Azalia CODEC ALC887/662 28 PCI Express X16 Slot * 1
USB 2.0 CONN. 29
PCI Express X1 Slot * 2
USB 3.0 CONN. 30
USB POWER 31 VRM
PCIEXPRESS X16 SLOT 32 Controller - Intersil 6277 3+2 Phase
PCIE X1 SLOTs 33
ATX & Front Panel 34
Auto BOM Manual 35
History 36 MICRO-START INT'L CO.,LTD.
Title
MS-7857
Size Document Number Rev
Custom Cover Sheet 10
Date: Monday, December 17, 2012 Sheet 1 of 37
1
5 4 3 2 1

VGA CONNECTOR
FUSION BLOCK DIAGRAM
22

VGA
D D

HUDSON D3 VGA MAIN LINK DP 1


18

DDRIII 1333~1866 CHA UNBUFFERED


FM2 DDRIII DIMM1
HDMI CON DP0 12
21

PCIE GFX x16 PCIE x16 DDRIII 1333~1866 CHB UNBUFFERED


31 DDRIII DIMM2
13

PCIE INTERFACE
8~11

10/100/Giga bit
ETHERNET
C 24 C
8111EL
UMI

USB
REAR USB 2.0
/HDR AZALIA ALC887/662 28

Bolton D3/D4
USB
REAR USB 3.0
SERIAL ATA 3.0 i-SATA [4:1]
29
23
Only D3 support USB3.0

PCIE INTERFACE

B B

PCIE x1 SLOT1,2,
32 16~20 SPI Bus SPI ROM 16M
18

CPU CORE POWER


ACPI CONTROLLER NB CORE POWER
Intersil ISL6277
Intersil ISL6208 7
26

CPU VDDP Power


CPU VDDR Power
CPU VDDA Power
DUAL POWER SUPER I/O F71808A
26 25

DDR3 DRAM POWER


FCH CORE POWER 27
A A
KBD LPC DEBUG
MOUSE PORT
ATX CON 23 25
32
MICRO-START INT'L CO.,LTD.
Title
MS-7857ci20313
MS-7857
Size Document Number Rev
Custom Block Diagram 10
Date: Monday, December 17, 2012 Sheet 2 of 37
5 4 3 2 1
5 4 3 2 1

Power Deliver Chart VDDA25 (S0, S1)


AMD FM2 CPU
2.5V Shunt VDDA
Regulator 2.5V(1.8~2.7V) 0.5A
VDDCORE
VRM SW VCCP (S0, S1) / VCC_NB (S0, S1) 120A
0.8-2V
REGUALTOR VDDNBCORE
1.2V 50A
1.2V VDDR CPU_VDDR (S0, S1)
CPU_VDDR
D REGULATOR 5A D
1.2V
0R
1.2V VDDP CPU_VDDP (S0, S1) CPU_VDDP
OPTION 5A
CPU REGULATOR 1.2V
ATX P/S WITH 1A STBY CURRENT PW DDR3 MEM I/F 1.5V
5VSB 5V 3.3V 12V -12V 12V VCC_DDR (S0, S1, S3)
VCC_DDR
+/-5% +/-5% +/-5% +/-5% +/-5% +/-5%
0.8~2.3V 30 A
DDRIII DIMM X4
VDD MEM 7.5 A
0.75V VTT_DDR HUDSON 2/3
5VDIMM Linear 1.5V VDD SW VTT_DDR 2A
REGULATOR REGULATOR REGULATOR VDDPL_11_DAC 7 mA
VDDAN_11_ML 226 mA
VDDCR_11 1120 mA
VDDAN_11_SATA 1337 mA
VDDAN_11_CLK 340 mA
NB_VCC1P1 (S0, S1)
1.1V VCCP SW VDDAN_11_PCIE 1088 mA
C C
REGULATOR
VCC3 (S0, S1)
VDDIO_33_PCIGP 3.3V 102 mA
(S0, S1)
VDDPL_33_*_RUN 102 mA

VCC3_SB (S0, S1, S3, S5)


VCC3_SB SW VDDPL_33_*_ALW 25 mA
REGULATOR
VDDAN_33_HWM_ALW 12 mA
VDDAN_33_USB_S 470 mA
VDDXL_33_S 5 mA
VDDIO_33_S 59 mA

+1.1VDUAL(S0,S1,S3,S5)
VCC5_SB FET VCC5_SB 1.1V_SB Linear VDDCR/AN_11_SUSB_S 706 mA
REGULATOR REGULATOR
VDDCR/AN_11_USB_S 182 mA
VDDCR_11_S 272 mA
B VDDCR_11_SYS_S 70 mA B

VCC3_WAKE Linear
REGULATOR
AUDIO CODEC
VCC3 (S0, S1)
3.3V CORE 0.1A
+5VA (S0, S1)
+5VA Linear 5V ANALOG 0.1A
REGULATOR

SVCC(S0,S3)
SVCC Linear SUPER I/O
REGULATOR
+3.3V (S0, S1) 0.01A
VCC3_WAKE (S0, S1, S3, S5)
+3.3VDUAL (S3) 0.01A
VCC3_WAKE (S0, S1, S3, S5)

USB X6 FR USB X4 RL 2XPS/2


ENTHENET
VDD VDD 5VDual 3.3V 1.05V
X1 PCIE per X16 PCIE per
A 5VDual 5VDual 0.5A 70mA 300mA A
COM Port
3.3V 3.0A 3.3V 3.0A 3.8A 2.0A
12V 0.5A 12V 5.5A
-12V
3.3Vaux 0.1A 3.3VDual 0.3A MICRO-START INT'L CO.,LTD.
0.1A Title
MS-7857
Size Document Number Rev
Custom Power Deliver Chart 10
Date: Monday, December 17, 2012 Sheet 3 of 37
5 4 3 2 1
5 4 3 2 1

D
CH A CH B D

INTERNAL CLOCK MODE


DIMM1

DIMM2

DIMM3

DIMM4

PCICLK0
MEM_MA_CLK_H1/L1
MEM_MA_CLK_H2/L2
MEM_MA_CLK_H0/L0
MEM_MA_CLK_H3/L3

MEM_MB_CLK_H1/L1
MEM_MB_CLK_H2/L2

MEM_MB_CLK_H0/L0
MEM_MB_CLK_H3/L3

AMD PCICLK1

HUDSON-D3/D2 PCICLK2 33MHZ


SIO NCT6776F
PCICLK2
PCI_CLK2 PCI_CLK3 PCI_CLK4
PCICLK3
33MHZ
STRAPS SETTING,
PCICLK4 UNUSED CLOCKS

LPC_CLK0 LPCCLK1
LPCCLK0
LPCCLK1 33MHZ
STRAPS SETTING,

C C
RTCCLK RESERVE TP

AMD APU_CLKP/N FCH_APU_CLKP AZ_BIT_CLK

AZ_BITCLK 24MHZ
HD AUDIO
SPI_CLK
DISP_CLKP/N FCH_DISP_CLKP SPI_CLK
FM1 APU xxHZ SPI ROM & HEADER
100MHZ (NO SPREAD)

PE16_GXF_CLK/PE16_GXF_CLK#
FCH_GFX_CLKP/N PCIE GFX SLOT (FM1, 16 LANES) PCIEX16 SLOT
100MHZ

PE1_GPP_CLK0/PE1_GPP_CLK0#
FCH_GPP_CLK0P/N PCIE GPP SLOT1 (HUDSON-D3, 1 LANE) PCIE X1 SLOT
100MHZ

PE1_GPP_CLK1/PE1_GPP_CLK1#
FCH_GPP_CLK1P/N PCIE GPP SLOT2 (HUDSON-D3, 1 LANE) PCIE X1 SLOT
100MHZ

PE1_GPP_CLK2/PE1_GPP_CLK2#
FCH_GPP_CLK2P/N PCIE GPP SLOT3(HUDSON-D3, 1 LANE) PCIE X1 SLOT
100MHZ

USBCLK
14M_25M_48M_OSC
FCH_GPP_CLK3P/N

FCH_GPP_CLK4P/N PE_LAN_CLK/PE_LAN_CLK#
PCIE LAN (FM1, 1 LANE) reserve LAN_CLKREQ# PCIE LAN
SATA_X1

SATA_X2
100MHZ
B B
25M_X2

25M_X1

32K_X1

32K_X2
FOR SATA DNI
PCIE LAN RTL8111E
25MHZ 25M Hz RTC CLOCK
32.768K Hz
25M Hz

A A

MICRO-START INT'L CO.,LTD.


Title
MS-7857
Size Document Number Rev
Custom Clock Distribution 10
Date: Monday, December 17, 2012 Sheet 4 of 37
5 4 3 2 1
5 4 3 2 1

PWRGD MAP FM2


PWROK(Pin AG11)

POWER ON SEQUENCE
HUDSON D3/D2
APU_PG(Pin E26) APU_PWRGD

D D

PWR_BTN#(Pin J4)

SLP_S3#(Pin T3)

SLP_S5#(Pin W2) PWR_GD(Pin N7) FCH_PWRGD

NCT 6776F
SLP_S5# SLP_S5#(Pin 84)

SLP_S3# SUSB#(Pin 64) ATX_POWER

PSOUT# PSOUT# (Pin 60)


Pin8 ATX_PWROK U23 (UP7501) 5VDIMM
U54 (UP7704) VDDA_25

PSON# (Pin 63) PS_ON# Pin16

PSIN# (Pin 61)

PSIN# F_PANEL1
C C

ATX_PWROK U16
DDR_EN VCC_DDR
SLP_S5# NCP1587

VRM U5
ISL6328CR

VRM_PWRGD
ATX_PWROK VDDPWRGD(Pin 34)
APU_FM1R1 VCORE_EN
VCC_DDR EN(Pin 25)

APU_PWRGD PWROK(Pin 35)

D41 U32 CPU_VDD CPU_VDDP


CPU_VDDP_VDDR_EN CPU_VDDR
VRM_PWRGD NCP1587
U30
NBCORE_EN
NCP102 NB_VCC1P1
B
D40 B

U41
ATX_PWROK FCH_PWRGD
NB_VCC1P1 FCH_PWRGD_R
* MEANS OPTION
FP_RST#
*
SLP_S3#

RESET MAP FM2


APU_RST#
RESET_L(Pin AJ13)

HUDSON D3/D2
PCIE 16X slot PCIE_RST#(Pin AE2) APU_RST#(Pin F26)
PCIE LAN

PCIE 1X slot 1 PCIE_RST2#(Pin AB6)


PCIE 1X slot 2
A Super IO A_RST#(Pin AD5) A
LPC debug

Reserve TP PCIRST#(Pin AB5)


SYS_RESET#(Pin U4)
MICRO-START INT'L CO.,LTD.
ICS-9VRS4818 Title
CLK GEN F_PANEL MS-7857
FP_RST#
RESET_IN#(Pin 70) RESET#(Pin 12) Size Document Number Rev
Custom PWRGD/RESET MAP 10
Date: Monday, December 17, 2012 Sheet 5 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

SIO Fintek 71808A GPIO Config DDR DIMM Config.


Pin GPIO Power Rail Function description Comment DEVICE ADDRESS CLOCK
18 GP20 VSB IO_PME#
DIMM 1 MEM_MA_CLK_H1/L1
10100000B A0H
22 LED_VSB/GP24 VSB SUS_LED reserved

23 LED_VCC/GP25 VSB PWR_LED CH-A MEM_MA_CLK_H2/L2


D D
42 GP67 VSB USB_EN OD
DIMM 2 MEM_MB_CLK_H1/L1
10100001B A2H
53 GP00 VSB MB_ID0 GPI reserved

54 GP01 VSB MB_ID1 GPI reserved CH-B MEM_MB_CLK_H2/L2


55 GP02 VSB MB_ID2 GPI reserved

56 GP03 VCC USB_MODE1 IO/OD

SMBus TABLE
19 GP21 VSB USB_MODE2 IO/OD
49 GP30 VSB SIO_VCORE_EN GPI reserved

50 GP31 VSB SIO_VLDT_EN GPI reserved SOURCE SINGLE NAME LINKED DEVICE
DP0_AUXP_C
HDMI
/DP0_AUXN_C
APU
DP1_AUXP_C
Hudson D2/3
/DP1_AUXN_C
DP to VGA translator
FCH HUDSON D3/D2GPIO Config SCLK0/SDATA0 DIMMs,
C Pin pin Name Function description C

AJ3 AD0/GPIO0
J2 IR_LED#/LLB#/GPIO184 FCH SCLK1/SDATA1 PCIE SLOTs,
AD22 SATA_ACT#/GPIO67
TEMPIN3/TALERT#/ FCH_TALERT#:Thermal Alert.
M6 GPIO174 The FCH can be programmed to generate an
SMI, SCI, or IRQ13 through GPE, or generate an SMI SCLK3/SDATA3 TP
without GPE in response to the signal*s
assertion.

RESET TABLE
V3 SPI_CLK/GPIO162 SPI Clock
V6 SPI_DI/GPIO164 SPI Data In
V5 SPI_DO/GPIO163 SPI Data Output SOURCE SINGLE NAME LINKED DEVICE
T6 SPI_CS1#/GPIO165 SPI Chip Select1# PCIE_RST# PCIe 16X,LAN
V1 ROM_RST#/SPI_WP#/GPIO161 SPI write protect (active low)
Y6 SPI_HOLD#/GEVENT9# SPI HOLD#. Assert low to hold the SPI transaction. FCH
B
A_RST# SIO,LPC debug B

T8 USB_OC0#/SPI_TPM_CS#/ OC#0:USB 3.0 port 3,USB 2.0 port 13 PCIE_RST2# PCIE_1X


TRST#/GEVENT12#
J7 USB_OC1#/TDI/GEVENT13# OC#1:USB2.0 port 4,5
P5 USB_OC2#/TCK/GEVENT14# LDT_RST# APU
OC#2:USB2.0 port 8,9
P5 USB_OC3#/
OC#3:USB 3.0 port 0,USB 2.0 port 10 AZ_RST# AZALIA CODEC
AC_PRES/TDO/GEVENT15#
P6 USB_OC4#/IR_RX0/ OC#4:USB 3.0 port 1,USB 2.0 port 11 DDR3_RST# NC
GEVENT16#
T1 USB_OC5#/IR_TX0/ OC#5:USB2.0 port 2,3 FC_RST# DEBUG BUS
GEVENT17#
R8 USB_OC6#/IR_TX1/ OC#6:USB2.0 port 0,1 ROM_RST# NC
GEVENT6#
M7 BLINK/USB_OC7#/ OC#7:USB 3.0 port 2,USB 2.0 port12 FRONT
GEVENT18# FP_RST# FCH
PANEL
GPIO[171::173];GPIO[175::182]; Configure as one of the following:
A GPIO[193::194] 10-k次 5% pull-up resistor to A

+3.3V_S5.
10-k次 5% pull-down resistor.

MICRO-START INT'L CO.,LTD.


Title
MS-7857
Size Document Number Rev
Custom GPIO/MSIC TABLE 10
Date: Monday, December 17, 2012 Sheet 6 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

ISL6277 3+2 Phase(A) VCC5 VCC5 +12VIN VIN VCCP

1
+

+
EC72 EC24 EC18 EC15 EC16 EC30 EC23 EC29 EC17
R95 EC20

1
C1u16X5-RH

C470u2.5SO-HF

CD820u2.5SO-RH-3

CD820u2.5SO-RH-3

CD820u2.5SO-RH-3

CD820u2.5SO-RH-3

CD820u2.5SO-RH-3

CD820u2.5SO-RH-3

CD820u2.5SO-RH-3

CD820u2.5SO-RH-3
R89 R115

2
C137
VCC5 VCC5 VCC5 0R0805 0R0805 C141

C10u16Y1206
C80 C83 1R0805

2
C62 X_C0.1u16Y0402 VRM_PWRGD_R C90 C0.22u16X CD100u16SO-RH-1
C1u6.3X50402-HF
C78 X_C0.1u16Y0402 VRM_PWROK C1u6.3X50402-HF

C79 C2.2u6.3X50402-HF VCORE_EN R61 R99 R125 Q36 Q30


X_1KR1%0805 1KR1%0805 X_1KR1%0805 N-P0903BD_TO252-3-HF N-P0903BD_TO252-3-HF
D D

29

30

35
R193 10KR0402 G G
xinhai@schmatic update(2011/10/07)
S S VCCP

VDD

VIN
VDDP
R194 0R0805 CHOKE4
CH-0.3u50A0.6m-HF
VCORE_EN 9 41 R116 221KR1% 1 2 VCCP
ENABLE FCCM_NB

1
D VRM_PWRGD VRM_PWRGD_R D
28 VRM_PWRGD R79 0R0402 23

5
PG_NB R124 X_0R0402 PGOOD C64 Q37 Q31 R144 CP7 CP6
42
PGOOD_NB 24 R85 4 4
BOOT1 2.2R0805
10 VRM_PWROK 10 0R0805 3 3

2
4 PWROK C0.22u16X 2 2
10 APU_SVC SVC
6 25 UG1 1 1 C119 VSUM+ R72 3.65KR1%0402 R55 X_10KR0402 ISEN2
10 APU_SVD SVD UGATE1
8 C1000p50N
10 APU_SVT SVT ISEN1
TP1 5 R74 10KR0402
VR_HOT_L PH1 N-P0403BK_GEM-PAK8-RH N-P0403BK_GEM-PAK8-RH R77 X_10KR0402 ISEN3
VCC_DDR 7 26
VDDIO PHASE1 C43
C60 C100p50N0402 C0.22u16X0402-HF
27 LG1 VCCP
LGATE1 VIN VSUM- R36 1R1%0402
R49 C48 22
137KR1%0402 C330p50N0402 COMP C88
C29 R31 301R1%0402 34 R100 C171 C207 C247 C124
C330p16N0402-RH-1

1
BOOT2

C1u16X5-RH

+
VCCP C1000p50X0402 R66 33KR1%0402-RH C49 C10p25N0402-RH-2 20 0R0805 Q42 Q40 EC12
FB2

C190

C22u6.3X50805-RH

C22u6.3X50805-RH

C22u6.3X50805-RH

C22u6.3X50805-RH
C0.22u16X N-P0903BD_TO252-3-HF N-P0903BD_TO252-3-HF C198 CD100u16SO-RH-1

C10u16Y1206
D D
R32 3.83KR1%0402 21 33 UG2 R210

2
G G
FB UGATE2 10KR0402 S S
R59 CHOKE6
C52

10R0402 R30 C28 C1000p50X0402 32 CH-0.3u50A0.6m-HF


3.83KR1%0402 PHASE2 R209 0R0805
R42 0R0402 18 PH2 1 2
10 COREFB+ VSEN VCCP
31

1
C63 LGATE2 Q43 Q41
R41 0R0402 C330p16N0402-RH-1 19 LG2 4 4 R197 CP9 CP8
10 COREFB- RTN 3 3 2.2R0805
28 PWMY 2 2 R54 X_10KR0402 ISEN1

2
R58 C51 C94 C100p50N0402 PWM_Y 1 1
10R0402 C1000p50X0402 C157 R73
C99 C1000p50N VSUM+ R22 3.65KR1%0402 R56 X_10KR0402 ISEN3 X_10KR0402
R136 C116 43 36 R114 N-P0403BK_GEM-PAK8-RH N-P0403BK_GEM-PAK8-RH
143KR1%0402 C470p16X0402-RH COMP_NB BOOTX 0R0805 ISEN2 R38 10KR0402
C95 R137 C0.22u16X
CPU_VDDNB C470p16X0402-RH 499R1%0402 R131 37 UG1_NB VIN C44
C330p16N0402-RH-1

X_32.4KR1%0402 UGATEX C0.22u16X0402-HF


R143 44
5.6KR1%0402 FB_NB PH1_NB R29 VSUM- R40 1R1%0402
38
R122 R142 5.62KR1%0402 C118 C1500p50X0402 PHASEX 10KR0402

1
C1u16X5-RH
10R0402 Q7

+
C96

C20
39 LG1_NB N-P0903BD_TO252-3-HF EC26
R130 0R0402 45 LGATEX D D
Q8 CD100u16SO-RH-1
G G CPU_VDDNB

2
10 NB_SENSE+ VSEN_NB VCC5 R60 S S CHOKE2
C109 40 PWM2_NB 0R0805 CH-0.3u50A0.6m-HF
R138 0R0402 PWM2_NB N-P0903BD_TO252-3-HF
C 10 NB_SENSE- C330p16N0402-RH-1 C
1 2 CPU_VDDNB
16 15 ISEN1
R129 C108 ISUMP ISNE1

1
10R0402 C1000p50X0402 14 ISEN2 R75 Q25 Q24 R68
17 ISNE2 X_0R0402 4 4 CP4 CP5
ISUMN 2.2R0805
13 ISEN3 R76 3 3
ISEN3 X_0R0402 2 2 C67

2
1 1 C1000p50N
NB_VSUM+ 47 48 NB_ISEN1 NB_VSUM+ R111 3.65KR1%0402 R112 X_10KR0402 NB_ISEN2
VSUM+ ISUMP_NB ISNE1_NB
1 NB_ISEN2 N-P0403BK_GEM-PAK8-RH N-P0403BK_GEM-PAK8-RH NB_ISEN1 R119 10KR0402
46 ISEN2_NB R106 X_0R0402 C98
ISUMN_NB C0.22u16X0402-HF
R135 C112 C111 12 R120 NB_VSUM- R121 1R1%0402
R34 R20 C26 C42 C54 R139 C97 NTC 2 VCC5
NTC_NB
11KR0.5%0402-RH

C0.1u50X0805

C0.33u25X0805

2.61KR1%0402 C0.33u6.3X50402-RH 2.61KR1%0402 R126 X_10KR0402


11KR0.5%0402-RH

C0.22u25X0805

C0.33u6.3X50402-RH

C0.33u6.3X50402-RH

VCCP VRM_PWRGD

PAD GND
R33
R118 X_100R0402

422R1%0402

649R1%0402 11
IMON 3 R69

D
RT3 RT2 IMON_NB Q18 C35
X_10KR0402

R98
10KRT1% R53 10KRT1% R102 R48 G
X_100R0402 ISL62773HRZ_QFN48-HF 27KR1%0402-RH X_1KR0402
49

CLOSE CHOKE8 CLOSE CHOKE10

X_C0.1u16Y0402
S
C87
C
VRM_PWRGD_R

X_N-2N7002ET1G_SOT23-3-HF
R70 X_10KR0402 B

C1000p50X0402
R82 E

118KR1%0402
VSUM- NB_VSUM- 27KR1%0402-RH Q23
X_N-SST3904_SOT23
I32-627730C-I11

27.4KR1%0402

R103

10KRT1%0402

RT1
C30 C106
C0.1u16X0402 C0.1u16X0402

27.4KR1%0402

10KRT1%0402

RT4
R83
VCC5_SB +12VIN
VIN
Make sure +12VIN
connector plug in
C73

R86 ERT-J0EV474J R25 R8


1

C1000p50X0402
+

10KR0402 10.7KR1%0402
EC1 CLOSE Q1 or Q13 26,27,35 ATX_PWROK_5V
X
C4 C15 CD100u16SO-RH-1 Z VCORE_EN
2
C10u16Y1206

118KR1%0402

C1u16X5-RH ERT-J0EV474J Y
BOOT2_NB R97 PH2_NB 10 APU_FM2R1
C84
0R0805 C0.22u16X CLOSE Q7 or Q8 D2 S-BAT54A_SOT23

D
VCC5 Q10 R14 C19
N-P0903BD_TO252-3-HF VCORE_EN_R G Q16 G Q11 C1u10X
26,28 VCORE_EN_R

3.3KR1%0402
D D
B R101 R24 10KR0402 G G N-2N7002ET1G_SOT23-3-HF N-2N7002ET1G_SOT23-3-HF B
0R0805 S S Q9

S
N-P0903BD_TO252-3-HF CHOKE1
U6 ISL6208BCRZ_QFN8-HF CH-0.3u50A0.6m-HF
BOOT2_NB 2 1 UG2_NB R43 0R0805
R96 0R0805 7 BOOT UGATE 8 PH2_NB 1 2
FCCM PHASE CPU_VDDNB
6
GND_P

PWM2_NB VCC
3
5

C89 4 PWM 5 LG2_NB Q19 Q5


C1u6.3X50402-HF GND LGATE 4 4 R5 CP3 CP2
3 3 2.2R0805
9

2 2
2

1 1
C7 R127 NB_ISEN1
C1000p50X0402 CHOKE8 VIN
N-P0403BK_GEM-PAK8-RH N-P0403BK_GEM-PAK8-RH X_10KR0402 ATX_CPU1 +12VIN CH-1.2u15A1.7m-RH-2

2 4 1 2

GND

12V
R117 3.65KR1%0402
NB_VSUM+ C241

12V
1 3

GND
C0.1u16Y0402
NB_ISEN2 R110 10KR0402
C107

5
C0.22u16X0402-HF PWRCONN4P_WHITE-RH-3
VIN NB_VSUM- R128 1R1%0402
N93-04M0271-H06

CPU_VDDNB
C1u16X5-RH

C218

C215
C10u16Y1206

1
BOOT3 PH3

+
R223 C224 EC13 EC14 EC6 EC7 EC5 EC8
0R0805 C0.22u16X C68 C40

X_C470u2.5SO-HF

C470u2.5SO-HF

CD820u2.5SO-RH-3

CD820u2.5SO-RH-3

CD820u2.5SO-RH-3

CD820u2.5SO-RH-3
Q46

C22u6.3X50805-RH

C22u6.3X50805-RH
N-P0903BD_TO252-3-HF
VCC5 R222 10KR0402 G
D
Q44
D
S G N-P0903BD_TO252-3-HF
U17 S CHOKE7
R220 ISL6208BCRZ_QFN8-HF CH-0.3u50A0.6m-HF
0R0805 BOOT3 2 1 R224 0R0805
R216 0R0805 BOOT UGATE PH3
7 8 1 2 VCCP
6 FCCM PHASE
GND_P

A PWMY 3 VCC Q45 Q47 A


PWM LG3 R211 CP11 CP10
4 5 4 4
GND LGATE 3 3 2.2R0805
C222 2 2
9

C1u6.3X50402-HF 1 1 R35 X_10KR0402


ISEN1
C204
N-P0403BK_GEM-PAK8-RH N-P0403BK_GEM-PAK8-RH C1000p50X0402 R37 X_10KR0402
ISEN2

VSUM+ R23 3.65KR1%0402

ISEN3 R57 10KR0402


MICRO-START INT'L CO.,LTD.
Title
C45 MS-7857
C0.22u16X0402-HF
Size Document Number Rev
VSUM- R39 1R1%0402 Custom ISL6277 3+2 Phase 10
Date: Monday, December 17, 2012 Sheet 7 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

D D
FM2 PCIE I/F

mach@CRB PCIE AC Capacitors:75nF to 200nF


Layout: PLACE CAPS WITH APU < 1 INCH
ROUTE ALL PCIE AS 85OHM +/-10%
CPU1A
PCI EXPRESS
AD8 AC2 GFX_TXP0 C378 C0.1u10X0402
33 GFX_RX0P P_GFX_RXP0 P_GFX_TXP0 GFX_TXN0 GFX_TXC_0P 33
AD9 AC1 C366 C0.1u10X0402
33 GFX_RX0N P_GFX_RXN0 P_GFX_TXN0 GFX_TXC_0N 33
AC7 AC4 GFX_TXP1 C365 C0.1u10X0402
33 GFX_RX1P P_GFX_RXP1 P_GFX_TXP1 GFX_TXN1 GFX_TXC_1P 33
AC8 AC5 C377 C0.1u10X0402
33 GFX_RX1N P_GFX_RXN1 P_GFX_TXN1 GFX_TXP2 GFX_TXC_1N 33
AB5 AB2 C364 C0.1u10X0402
33 GFX_RX2P P_GFX_RXP2 P_GFX_TXP2 GFX_TXN2 GFX_TXC_2P 33
AB6 AB3 C376 C0.1u10X0402
33 GFX_RX2N P_GFX_RXN2 P_GFX_TXN2 GFX_TXP3 GFX_TXC_2N 33
AB8 AA2 C375 C0.1u10X0402
33 GFX_RX3P P_GFX_RXP3 P_GFX_TXP3 GFX_TXC_3P 33
AB9 AA1 GFX_TXN3 C363 C0.1u10X0402
33 GFX_RX3N P_GFX_RXN3 P_GFX_TXN3 GFX_TXC_3N 33
AA7 AA4 GFX_TXP4 C367 C0.1u10X0402
33 GFX_RX4P P_GFX_RXP4 P_GFX_TXP4 GFX_TXC_4P 33
AA8 AA5 GFX_TXN4 C368 C0.1u10X0402
33 GFX_RX4N P_GFX_RXN4 P_GFX_TXN4 GFX_TXP5 GFX_TXC_4N 33
Y5 Y2 C362 C0.1u10X0402
33 GFX_RX5P P_GFX_RXP5 P_GFX_TXP5 GFX_TXC_5P 33
Y6 Y3 GFX_TXN5 C374 C0.1u10X0402
33 GFX_RX5N P_GFX_RXN5 P_GFX_TXN5 GFX_TXC_5N 33
Y8 W2 GFX_TXP6 C357 C0.1u10X0402
33 GFX_RX6P P_GFX_RXP6 P_GFX_TXP6 GFX_TXC_6P 33

GRAPHICS
Y9 W1 GFX_TXN6 C354 C0.1u10X0402
33 GFX_RX6N P_GFX_RXN6 P_GFX_TXN6 GFX_TXP7 GFX_TXC_6N 33
W7 W4 C393 C0.1u10X0402
33 GFX_RX7P P_GFX_RXP7 P_GFX_TXP7 GFX_TXN7 GFX_TXC_7P 33
W8 W5 C394 C0.1u10X0402
33 GFX_RX7N P_GFX_RXN7 P_GFX_TXN7 GFX_TXC_7N 33
C V5 V2 GFX_TXP8 C352 C0.1u10X0402 C
33 GFX_RX8P P_GFX_RXP8 P_GFX_TXP8 GFX_TXC_8P 33
V6 V3 GFX_TXN8 C355 C0.1u10X0402
33 GFX_RX8N P_GFX_RXN8 P_GFX_TXN8 GFX_TXC_8N 33
V8 U2 GFX_TXP9 C385 C0.1u10X0402
33 GFX_RX9P P_GFX_RXP9 P_GFX_TXP9 GFX_TXC_9P 33
V9 U1 GFX_TXN9 C386 C0.1u10X0402
33 GFX_RX9N P_GFX_RXN9 P_GFX_TXN9 GFX_TXP10 GFX_TXC_9N 33
U7 U4 C383 C0.1u10X0402
33 GFX_RX10P P_GFX_RXP10 P_GFX_TXP10 GFX_TXN10 GFX_TXC_10P 33
U8 U5 C382 C0.1u10X0402
33 GFX_RX10N P_GFX_RXN10 P_GFX_TXN10 GFX_TXC_10N 33
T5 T2 GFX_TXP11 C391 C0.1u10X0402
33 GFX_RX11P P_GFX_RXP11 P_GFX_TXP11 GFX_TXN11 GFX_TXC_11P 33
T6 T3 C390 C0.1u10X0402
33 GFX_RX11N P_GFX_RXN11 P_GFX_TXN11 GFX_TXP12 GFX_TXC_11N 33
T8 R2 C388 C0.1u10X0402
33 GFX_RX12P P_GFX_RXP12 P_GFX_TXP12 GFX_TXN12 GFX_TXC_12P 33
T9 R1 C389 C0.1u10X0402
33 GFX_RX12N P_GFX_RXN12 P_GFX_TXN12 GFX_TXP13 GFX_TXC_12N 33
R7 R4 C350 C0.1u10X0402
33 GFX_RX13P P_GFX_RXP13 P_GFX_TXP13 GFX_TXC_13P 33
R8 R5 GFX_TXN13 C349 C0.1u10X0402
33 GFX_RX13N P_GFX_RXN13 P_GFX_TXN13 GFX_TXC_13N 33
P5 P2 GFX_TXP14 C359 C0.1u10X0402
33 GFX_RX14P P_GFX_RXP14 P_GFX_TXP14 GFX_TXC_14P 33
P6 P3 GFX_TXN14 C358 C0.1u10X0402
33 GFX_RX14N P_GFX_RXN14 P_GFX_TXN14 GFX_TXP15 GFX_TXC_14N 33
P8 N2 C398 C0.1u10X0402
33 GFX_RX15P P_GFX_RXP15 P_GFX_TXP15 GFX_TXC_15P 33
P9 N1 GFX_TXN15 C399 C0.1u10X0402
33 GFX_RX15N P_GFX_RXN15 P_GFX_TXN15 GFX_TXC_15N 33
AF5 AF2
P_GPP_RXP0 P_GPP_TXP0
AF6 AF3
P_GPP_RXN0 P_GPP_TXN0
AF8 AE2
P_GPP_RXP1 P_GPP_TXP1
AF9 AE1
P_GPP_RXN1 P_GPP_TXN1
AE7 AE4
P_GPP_RXP2 P_GPP_TXP2
GPP

AE8 AE5
LAN_RXC_P P_GPP_RXN2 P_GPP_TXN2 LAN_TXP C226 C0.1u10X0402
25 LAN_RXC_P AD5 AD2 LAN_TXC_P 25
LAN_RXC_N P_GPP_RXP3 P_GPP_TXP3 LAN_TXN C225 C0.1u10X0402
25 LAN_RXC_N AD6 AD3 LAN_TXC_N 25
P_GPP_RXN3 P_GPP_TXN3
AJ8 AJ5 UMI_TX0P_APU C259 C0.1u10X0402
16 UMI_RX0P P_UMI_RXP0 P_UMI_TXP0 UMI_TX0P 16
AJ7 AJ4 UMI_TX0N_APU C260 C0.1u10X0402
16 UMI_RX0N P_UMI_RXN0 P_UMI_TXN0 UMI_TX1P_APU UMI_TX0N 16
B AH6 AH3 C317 C0.1u10X0402 B
16 UMI_RX1P P_UMI_RXP1 P_UMI_TXP1 UMI_TX1N_APU UMI_TX1P 16
AH5 AH2 C318 C0.1u10X0402
16 UMI_RX1N P_UMI_RXN1 P_UMI_TXN1 UMI_TX1N 16
AH9 AG1 UMI_TX2P_APU C331 C0.1u10X0402
UMI

16 UMI_RX2P P_UMI_RXP2 P_UMI_TXP2 UMI_TX2N_APU UMI_TX2P 16


AH8 AG2 C335 C0.1u10X0402
16 UMI_RX2N P_UMI_RXN2 P_UMI_TXN2 UMI_TX2N 16
AG8 AG5 UMI_TX3P_APU C257 C0.1u10X0402
16 UMI_RX3P P_UMI_RXP3 P_UMI_TXP3 UMI_TX3P 16
AG7 AG4 UMI_TX3N_APU C258 C0.1u10X0402
16 UMI_RX3N P_UMI_RXN3 P_UMI_TXN3 UMI_TX3N 16

CPU_VDDP R231 196R1% APU_P_ZVDDP AJ2 AJ1 APU_P_ZVSS R230 196R1%


P_ZVDDP P_ZVSS
Layout: Layout:
Place within 1.5'' of APU ZIF-SOCKET904-HF-2 Place within 1.5'' of APU
N12-9040040-L06

A A

MICRO-START INT'L CO.,LTD.


Title
MS-7857
Size Document Number Rev
Custom FM2 PCIE I/F 10
Date: Monday, December 17, 2012 Sheet 8 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

FM2 DDR3 I/F 13 MEM_MB_DQS_L[7..0]


12 MEM_MA_DQS_L[7..0]
13 MEM_MB_DQS_H[7..0]
12 MEM_MA_DQS_H[7..0]
13 MEM_MB_DM[7..0]
12 MEM_MA_DM[7..0]
MEM_MA_DATA[63..0] 12
CPU1B

MEM_MA_ADD0 V27 F16 MEM_MA_DATA0


MEM_MA_ADD1 MA_ADD0 MA_DATA0 MEM_MA_DATA1
P27 G16 MEM_MB_DATA[63..0] 13
MEM_MA_ADD2 MA_ADD1 MA_DATA1 MEM_MA_DATA2 CPU1C
R25 H18
D MEM_MA_ADD3 MA_ADD2 MA_DATA2 MEM_MA_DATA3 D
P26 F19 MEMORY CHANNEL B
MEM_MA_ADD4 MA_ADD3 MA_DATA3 MEM_MA_DATA4 MEM_MB_ADD0 MEM_MB_DATA0
R24 F15 V31 A16
MEM_MA_ADD5 MA_ADD4 MA_DATA4 MEM_MA_DATA5 MEM_MB_ADD1 MB_ADD0 MB_DATA0 MEM_MB_DATA1
P24 H15 N28 C16
MEM_MA_ADD6 MA_ADD5 MA_DATA5 MEM_MA_DATA6 MEM_MB_ADD2 MB_ADD1 MB_DATA1 MEM_MB_DATA2
P23 E18 P29 B18
MEM_MA_ADD7 MA_ADD6 MA_DATA6 MEM_MA_DATA7 MEM_MB_ADD3 MB_ADD2 MB_DATA2 MEM_MB_DATA3
N26 F18 N29 A19
MEM_MA_ADD8 MA_ADD7 MA_DATA7 MEM_MB_ADD4 MB_ADD3 MB_DATA3 MEM_MB_DATA4
N23 N31 C15
MEM_MA_ADD9 MA_ADD8 MEM_MA_DATA8 MEM_MB_ADD5 MB_ADD4 MB_DATA4 MEM_MB_DATA5
M25 G20 M30 B15
MEM_MA_ADD10 MA_ADD9 MA_DATA8 MEM_MA_DATA9 MEM_MB_ADD6 MB_ADD5 MB_DATA5 MEM_MB_DATA6
V24 H20 M31 D17
MEM_MA_ADD11 MA_ADD10 MA_DATA9 MEM_MA_DATA10 MEM_MB_ADD7 MB_ADD6 MB_DATA6 MEM_MB_DATA7
N25 E23 M28 C18
MEM_MA_ADD12 MA_ADD11 MA_DATA10 MEM_MA_DATA11 MEM_MB_ADD8 MB_ADD7 MB_DATA7
M24 G23 M27
MEM_MA_ADD13 MA_ADD12 MA_DATA11 MEM_MA_DATA12 MEM_MB_ADD9 MB_ADD8 MEM_MB_DATA8
Y23 G19 L30 D20
MEM_MA_ADD14 MA_ADD13 MA_DATA12 MEM_MA_DATA13 MEM_MB_ADD10 MB_ADD9 MB_DATA8 MEM_MB_DATA9
12 MEM_MA_ADD[15..0] L27 E20 W31 A20
MEM_MA_ADD15 MA_ADD14 MA_DATA13 MEM_MA_DATA14 MEM_MB_ADD11 MB_ADD10 MB_DATA9 MEM_MB_DATA10
L24 F22 L29 D22
MA_ADD15 MA_DATA14 MEM_MA_DATA15 MEM_MB_ADD12 MB_ADD11 MB_DATA10 MEM_MB_DATA11
G22 K28 D23
MEM_MA_BANK0 MA_DATA15 MEM_MB_ADD13 MB_ADD12 MB_DATA11 MEM_MB_DATA12
12 MEM_MA_BANK0 W26 AB28 C19
MEM_MA_BANK1 MA_BANK0 MEM_MA_DATA16 MEM_MB_ADD14 MB_ADD13 MB_DATA12 MEM_MB_DATA13
12 MEM_MA_BANK1 V25 F24 13 MEM_MB_ADD[15..0] K31 D19
MEM_MA_BANK2 MA_BANK1 MA_DATA16 MEM_MA_DATA17 MEM_MB_ADD15 MB_ADD14 MB_DATA13 MEM_MB_DATA14
12 MEM_MA_BANK2 L26 H24 J31 A22
MA_BANK2 MA_DATA17 MEM_MA_DATA18 MB_ADD15 MB_DATA14 MEM_MB_DATA15
E27 C22
MEM_MA_DM0 MA_DATA18 MEM_MA_DATA19 MEM_MB_BANK0 MB_DATA15
E17 F27 13 MEM_MB_BANK0 W29
MEM_MA_DM1 MA_DM0 MA_DATA19 MEM_MA_DATA20 MEM_MB_BANK1 MB_BANK0 MEM_MB_DATA16
H21 H23 13 MEM_MB_BANK1 V30 C24
MEM_MA_DM2 MA_DM1 MA_DATA20 MEM_MA_DATA21 MEM_MB_BANK2 MB_BANK1 MB_DATA16 MEM_MB_DATA17
F25 E24 13 MEM_MB_BANK2 K29 B24
MEM_MA_DM3 MA_DM2 MA_DATA21 MEM_MA_DATA22 MB_BANK2 MB_DATA17 MEM_MB_DATA18
G29 E26 B26
MEM_MA_DM4 MA_DM3 MA_DATA22 MEM_MA_DATA23 MEM_MB_DM0 MB_DATA18 MEM_MB_DATA19
AF29 H26 D16 C27
MEM_MA_DM5 MA_DM4 MA_DATA23 MEM_MB_DM1 MB_DM0 MB_DATA19 MEM_MB_DATA20
AE25 B20 A23
MEM_MA_DM6 MA_DM5 MEM_MA_DATA24 MEM_MB_DM2 MB_DM1 MB_DATA20 MEM_MB_DATA21
AG21 G28 A25 B23
MEM_MA_DM7 MA_DM6 MA_DATA24 MEM_MA_DATA25 MEM_MB_DM3 MB_DM2 MB_DATA21 MEM_MB_DATA22
AF17 E29 D29 D26
MA_DM7 MA_DATA25 MEM_MA_DATA26 MEM_MB_DM4 MB_DM3 MB_DATA22 MEM_MB_DATA23
H29 AL29 A26
MA_DATA26 MEM_MA_DATA27 MEM_MB_DM5 MB_DM4 MB_DATA23
H30 AH25
MEM_MA_DQS_H0 MA_DATA27 MEM_MA_DATA28 MEM_MB_DM6 MB_DM5 MEM_MB_DATA24
C H17 H27 AK21 C28 C
MEM_MA_DQS_L0 MA_DQS_H0 MA_DATA28 MEM_MA_DATA29 MEM_MB_DM7 MB_DM6 MB_DATA24 MEM_MB_DATA25
G17 F28 AJ17 D28
MEM_MA_DQS_H1 MA_DQS_L0 MA_DATA29 MEM_MA_DATA30 MB_DM7 MB_DATA25 MEM_MB_DATA26
F21 F31 C31
MEM_MA_DQS_L1 MA_DQS_H1 MA_DATA30 MEM_MA_DATA31 MB_DATA26 MEM_MB_DATA27
E21 G31 D31
MEM_MA_DQS_H2 MA_DQS_L1 MA_DATA31 MEM_MB_DQS_H0 MB_DATA27 MEM_MB_DATA28
G26 A17 B27
MEM_MA_DQS_L2 MA_DQS_H2 MEM_MA_DATA32 MEM_MB_DQS_L0 MB_DQS_H0 MB_DATA28 MEM_MB_DATA29
G25 AD30 B17 A28
MEM_MA_DQS_H3 MA_DQS_L2 MA_DATA32 MEM_MA_DATA33 MEM_MB_DQS_H1 MB_DQS_L0 MB_DATA29 MEM_MB_DATA30
F30 AF30 B21 B30
MEM_MA_DQS_L3 MA_DQS_H3 MA_DATA33 MEM_MA_DATA34 MEM_MB_DQS_L1 MB_DQS_H1 MB_DATA30 MEM_MB_DATA31
E30 AG27 C21 C30
MEM_MA_DQS_H4 MA_DQS_L3 MA_DATA34 MEM_MA_DATA35 MEM_MB_DQS_H2 MB_DQS_L1 MB_DATA31
AE28 AF27 D25
MEM_MA_DQS_L4 MA_DQS_H4 MA_DATA35 MEM_MA_DATA36 MEM_MB_DQS_L2 MB_DQS_H2 MEM_MB_DATA32
AE29 AD31 C25 AJ30
MEM_MA_DQS_H5 MA_DQS_L4 MA_DATA36 MEM_MA_DATA37 MEM_MB_DQS_H3 MB_DQS_L2 MB_DATA32 MEM_MB_DATA33
AG24 AE31 B29 AK30
MEM_MA_DQS_L5 MA_DQS_H5 MA_DATA37 MEM_MA_DATA38 MEM_MB_DQS_L3 MB_DQS_H3 MB_DATA33 MEM_MB_DATA34
AG25 AG28 A29 AH28
MEM_MA_DQS_H6 MA_DQS_L5 MA_DATA38 MEM_MA_DATA39 MEM_MB_DQS_H4 MB_DQS_L3 MB_DATA34 MEM_MB_DATA35
AF20 AD28 AJ29 AJ27
MEM_MA_DQS_L6 MA_DQS_H6 MA_DATA39 MEM_MB_DQS_L4 MB_DQS_H4 MB_DATA35 MEM_MB_DATA36
AF21 AH29 AG30
MEM_MA_DQS_H7 MA_DQS_L6 MEM_MA_DATA40 MEM_MB_DQS_H5 MB_DQS_L4 MB_DATA36 MEM_MB_DATA37
AE16 AF26 AK25 AH31
MEM_MA_DQS_L7 MA_DQS_H7 MA_DATA40 MEM_MA_DATA41 MEM_MB_DQS_L5 MB_DQS_H5 MB_DATA37 MEM_MB_DATA38
AD16 AD25 AL25 AK28
MA_DQS_L7 MA_DATA41 MEM_MA_DATA42 MEM_MB_DQS_H6 MB_DQS_L5 MB_DATA38 MEM_MB_DATA39
AF23 AJ20 AL28
mach@CLOCK assignment can be changed MA_DATA42 MEM_MA_DATA43 MEM_MB_DQS_L6 MB_DQS_H6 MB_DATA39
AE23 AJ21
MA_DATA43 MEM_MA_DATA44 MEM_MB_DQS_H7 MB_DQS_L6 MEM_MB_DATA40
AD27 AL16 AJ26
MEM_MA_CLK_H0 MA_DATA44 MEM_MA_DATA45 MEM_MB_DQS_L7 MB_DQS_H7 MB_DATA40 MEM_MB_DATA41
12 MEM_MA_CLK_H0 U27 AE26 AL17 AH26
MEM_MA_CLK_L0 MA_CLK_H0 MA_DATA45 MEM_MA_DATA46 MB_DQS_L7 MB_DATA41 MEM_MB_DATA42
12 MEM_MA_CLK_L0 U26 AF24 AH23
MA_CLK_L0 MA_DATA46 MEM_MA_DATA47 MB_DATA42 MEM_MB_DATA43
T23 AD24 AJ23
MA_CLK_H1 MA_DATA47 MB_DATA43 MEM_MB_DATA44
U23 AK27
MA_CLK_L1 MEM_MA_DATA48 MEM_MB_CLK_H0 MB_DATA44 MEM_MB_DATA45
T25 AG22 13 MEM_MB_CLK_H0 U30 AL26
MA_CLK_H2 MA_DATA48 MEM_MA_DATA49 MEM_MB_CLK_L0 MB_CLK_H0 MB_DATA45 MEM_MB_DATA46
T26 AD21 13 MEM_MB_CLK_L0 U29 AJ24
MEM_MA_CLK_H3 MA_CLK_L2 MA_DATA49 MEM_MA_DATA50 MB_CLK_L0 MB_DATA46 MEM_MB_DATA47
12 MEM_MA_CLK_H3 R27 AE19 T29 AK24
MEM_MA_CLK_L3 MA_CLK_H3 MA_DATA50 MEM_MA_DATA51 MB_CLK_H1 MB_DATA47
12 MEM_MA_CLK_L3 R28 AG19 T28
MA_CLK_L3 MA_DATA51 MEM_MA_DATA52 MB_CLK_L1 MEM_MB_DATA48
AD22 R31 AK22
MEM_MA_CKE0 MA_DATA52 MEM_MA_DATA53 MB_CLK_H2 MB_DATA48 MEM_MB_DATA49
B 12 MEM_MA_CKE0 L23 AE22 T31 AH22 B
MEM_MA_CKE1 MA_CKE0 MA_DATA53 MEM_MA_DATA54 MEM_MB_CLK_H3 MB_CLK_L2 MB_DATA49 MEM_MB_DATA50
12 MEM_MA_CKE1 K26 AE20 13 MEM_MB_CLK_H3 P30 AL19
MA_CKE1 MA_DATA54 MEM_MA_DATA55 MEM_MB_CLK_L3 MB_CLK_H3 MB_DATA50 MEM_MB_DATA51
AD19 13 MEM_MB_CLK_L3 R30 AK19
MA_DATA55 MB_CLK_L3 MB_DATA51 MEM_MB_DATA52
AA24 AL23
MA0_ODT0 MEM_MA_DATA56 MEM_MB_CKE0 MB_DATA52 MEM_MB_DATA53
AC27 AG18 13 MEM_MB_CKE0 J30 AL22
MEM_MA1_ODT0 MA0_ODT1 MA_DATA56 MEM_MA_DATA57 MEM_MB_CKE1 MB_CKE0 MB_DATA53 MEM_MB_DATA54
12 MEM_MA1_ODT0 AA25 AE17 13 MEM_MB_CKE1 J28 AH20
MEM_MA1_ODT1 MA1_ODT0 MA_DATA57 MEM_MA_DATA58 MB_CKE1 MB_DATA54 MEM_MB_DATA55
12 MEM_MA1_ODT1 AC26 AF15 AL20
MA1_ODT1 MA_DATA58 MEM_MA_DATA59 MB_DATA55
AG15 AA30
MA_DATA59 MEM_MA_DATA60 MB0_ODT0 MEM_MB_DATA56
Y27 AD18 AC30 AJ18
MA0_CS_L0 MA_DATA60 MEM_MA_DATA61 MEM_MB1_ODT0 MB0_ODT1 MB_DATA56 MEM_MB_DATA57
AB26 AF18 13 MEM_MB1_ODT0 AA31 AH17
MEM_MA1_CS_L0 MA0_CS_L1 MA_DATA61 MEM_MA_DATA62 MEM_MB1_ODT1 MB1_ODT0 MB_DATA57 MEM_MB_DATA58
12 MEM_MA1_CS_L0 W23 AG16 13 MEM_MB1_ODT1 AC29 AJ15
MEM_MA1_CS_L1 MA1_CS_L0 MA_DATA62 MEM_MA_DATA63 MB1_ODT1 MB_DATA58 MEM_MB_DATA59
12 MEM_MA1_CS_L1 AB25 AD15 AK15
MA1_CS_L1 MA_DATA63 MB_DATA59 MEM_MB_DATA60
Y29 AH19
MEM_MA_RAS_L MB0_CS_L0 MB_DATA60 MEM_MB_DATA61
12 MEM_MA_RAS_L W25 AB29 AK18
MEM_MA_CAS_L MA_RAS_L MEM_MB1_CS_L0 MB0_CS_L1 MB_DATA61 MEM_MB_DATA62
12 MEM_MA_CAS_L Y24 13 MEM_MB1_CS_L0 Y30 AK16
MEM_MA_WE_L MA_CAS_L MEM_MB1_CS_L1 MB1_CS_L0 MB_DATA62 MEM_MB_DATA63
12 MEM_MA_WE_L Y26 13 MEM_MB1_CS_L1 AB31 AH16
MA_WE_L MB1_CS_L1 MB_DATA63
MEM_MA_RESET# J25 MEM_MB_RAS_L W28
12 MEM_MA_RESET# MEM_MA_HOT# MA_RESET_L 13 MEM_MB_RAS_L MEM_MB_CAS_L MB_RAS_L
12 MEM_MA_HOT# U24 13 MEM_MB_CAS_L AA27
MA_EVENT_L MEM_MB_WE_L MB_CAS_L
13 MEM_MB_WE_L AA28
MB_WE_L
APU_M_VREF K22
M_VREF MEM_MB_RESET#
13 MEM_MB_RESET# J27
R556 39.2R1%0402 APU_M_ZVDDIO MEM_MB_HOT# MB_RESET_L
VCC_DDR J24 13 MEM_MB_HOT# V28
M_ZVDDIO MB_EVENT_L
Layout: VCC_DDR
Place within 1.5'' of APU

ZIF-SOCKET904-HF-2 ZIF-SOCKET904-HF-2
R206 APU_M_VREF
A N12-9040040-L06 1KR1% VCC_DDR N12-9040040-L06 A

R219 1KR0402 MEM_MA_HOT#


R221 1KR0402 MEM_MB_HOT#

R205 C175 C641 C642


MICRO-START INT'L CO.,LTD.
C1000p50X0402

C0.1u10X0402

1KR1% Layout:
C1000p50X0402

Place within 1.0'' of APU Title


MS-7857
Size Document Number Rev
Custom FM2 DDR3 I/F 10
Date: Monday, December 17, 2012 Sheet 9 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

FM2 DISPLAY I/F ROUTE PCIE AS 85OHM +/-10%


PLACE CAPS WITH APU < 1 INCH
Trace length within 10"
HDT+ Connector
mach@DP0 for HDMI CPU1D VCC_DDR
ANALOG/DISPLAY/MISC Layout: Place within 1.5'' of APU J1
C146 C0.1u10X0402 DP0_TX0P_APU N4 G9 DP_AUX_ZVSS R555 150R1%0402 1 2 CPU_TCK
22 DP0_TX0P DP0_TXP0 DP_AUX_ZVSS CPU_VDDIO CPU_TCK
C142 C0.1u10X0402 DP0_TX0N_APU N5 3 4 CPU_TMS
22 DP0_TX0N DP0_TXN0 GND CPU_TMS
F8 APU_BLON 5 6 CPU_TDI
D C148 C0.1u10X0402 DP0_TX1P_APU DP_BLON APU_DIGON GND CPU_TDI CPU_TDO D
22 DP0_TX1P M2 G8 7 8
C153 C0.1u10X0402 DP0_TX1N_APU DP0_TXP1 DP_DIGON APU_BLPWM CPU_TRST_L R551 X_0R0402 GND CPU_TDO APU_PWROK_BUF
22 DP0_TX1N M3 E8 9 10
DP0_TXN1 DP_VARY_BL R552 X_10KR0402 CPU_TRST_L CPU_PWROK_BUF APU_LDT_RST_BUF
11 12
C140 C0.1u10X0402 DP0_TX2P_APU R553 X_10KR0402 CPU_DBRDY3 CPU_RST_L_BUF CPU_DBRDY
22 DP0_TX2P L2 E1 DP0_AUXP_C 22 13 14
DP0_TX2N_APU DP0_TXP2 DP0_AUXP CPU_DBRDY2 CPU_DBRDY0 CPU_DBREQ_L

DISPLAY PORT 0
C138 C0.1u10X0402 L1 E2 R554 X_10KR0402 15 16
22 DP0_TX2N DP0_TXN2 DP0_AUXN DP0_AUXN_C 22 CPU_DBRDY1 CPU_DBREQ_L
17 18 APU_TEST19
C155 C0.1u10X0402 DP0_TX3P_APU GND CPU_PLLTEST0 APU_TEST18
22 DP0_TX3P L4 F1 DP1_AUXP_C 18 19 20
C158 C0.1u10X0402 DP0_TX3N_APU DP0_TXP3 DP1_AUXP CPU_VDDIO CPU_PLLTEST1
22 DP0_TX3N L5 F2 DP1_AUXN_C 18
DP0_TXN3 DP1_AUXN

DISPLAY PORT MISC.


X_H2X10SM-1.27PITCH_BLUE-RH
C193 C0.1u10X0402 DP1_TX0P_APU K2 G1
18 DP1_TX0P
C197 C0.1u10X0402 DP1_TX0N_APU K3
DP1_TXP0 DP2_AUXP
G2
N31-2100170-S88
18 DP1_TX0N DP1_TXN0 DP2_AUXN VCC3 VCC3
DP0_TX0,TX1,TX2 and TX3
C195 C0.1u10X0402 DP1_TX1P_APU
18 DP1_TX1P
C194 C0.1u10X0402 DP1_TX1N_APU
J2
J1
DP1_TXP1 DP3_AUXP
E5
E6
DP0 DP0_AUX0 and DP0_HPD
18 DP1_TX1N DP1_TXN1 DP3_AUXN
C203 C0.1u10X0402 DP1_TX2P_APU J4 F5 R3 R2
18 DP1_TX2P DP1_TX2N_APU DP1_TXP2 DP4_AUXP
C206 C0.1u10X0402 X_10KR0402 X_10KR0402

DISPLAY PORT 1
18 DP1_TX2N J5
DP1_TXN2 DP4_AUXN
F6 DP1 DP1_TX0,TX1,TX2 and TX3
C174 C0.1u10X0402 DP1_TX3P_APU H2 G5
DP1_AUX0 and DP1_HPD Q2 Q1

B
18 DP1_TX3P DP1_TXP3 DP5_AUXP
C178 C0.1u10X0402 DP1_TX3N_APU H3 G6 X_N-SST3904_SOT23 X_N-SST3904_SOT23
18 DP1_TX3N DP1_TXN3 DP5_AUXN
mach@DP1 for CRT L7 E3 APU_PWRGD E C APU_PWROK_BUF APU_RST# R1 E C APU_LDT_RST_BUF
DP2_TXP0 DP0_HPD DP0_HPD_HDMI_C 22
L8 F3 DP1_HPD_VGA_C 18 X_0R0402
DP2_TXN0 DP1_HPD DP2_HPD R204 100KR0402
G3
DP2_HPD DP3_HPD R187 100KR0402
K5 E7
DP2_TXP1 DP3_HPD DP4_HPD R188 100KR0402
K6 F7
PULL UP K8
DP2_TXN1 DP4_HPD
DP5_HPD
G7 DP5_HPD R180 100KR0402
DP2_TXP2 APU_TEST4 TP37
C K9 T21 C
VCC_DDR
J7
DP2_TXN2 TEST4
TEST5
U21
AD14
APU_TEST5
APU_TEST6
TP38
TP41
VID OVERRIDE CIRCUIT
R235 1KR0402 APU_SIC_R DP2_TXP3 TEST6 APU_TEST9 TP34
J8 P21
R237 1KR0402 APU_SID DP2_TXN3 TEST9 APU_TEST10 TP36 VCC_DDR VCC_DDR
R21
TEST10 APU_TEST14 TP28
N7 F12
DISPLAY PORT 2

R244 300R0402 APU_RST# DP2_TXP4 TEST14 APU_TEST15 TP27


N8 E12
R239 300R0402 APU_PWRGD DP2_TXN4 TEST15 APU_TEST16 TP33
F13
TEST16 APU_TEST17 TP25
M5 E13
R263 300R0402 APU_PROCHOT# DP2_TXP5 TEST17 APU_TEST18 R156 1KR0402 R177 R160 R163 R152
M6 G13
TEST

R298 1KR0402 APU_THERMTRIP# DP2_TXN5 TEST18 APU_TEST19 R148 1KR0402 R175 R166
G14
TEST19

1KR0402

1KR0402

X_1KR0402

X_1KR0402
R295 1KR0402 APU_ALERT# M8 F14 APU_TEST20 R149 1KR0402 1KR0402 X_1KR0402
DP2_TXP6 TEST20 APU_TEST24 R153 1KR0402 CPU_VDDP
M9 E14
DP2_TXN6 TEST24 APU_TEST25_H R236 511R1%0402
AJ11
TEST25_H APU_TEST25_L R557 511R1%0402
AH11
TEST25_L APU_TEST28_H TP32 APU_SVC_R R162 0R0402
16 APU_CLK AL12 H10 APU_SVC 7
CLKIN_H TEST28_H APU_TEST28_L TP31 APU_SVD_R R167 0R0402
AK12 J10
CLK

16 APU_CLK# CLKIN_L TEST28_L APU_SVD 7


T22 APU_TEST30_H TP40 APU_SVT_R R155 33R0402
TEST30_H APU_TEST30_L APU_PWRGD APU_SVT 7
AG12 U22 TP42 R87 X_R/2
16 DISP_CLK DISP_CLKIN_H TEST30_L APU_TEST31 VRM_PWROK 7
AF12 AG31 R218 39.2R1%0402
16 DISP_CLK# DISP_CLKIN_L TEST31
V22 APU_TEST32_H TP39
APU_SVC_R TEST32_H APU_TEST32L TP35 VCC_DDR To overide VID:remove R159 R154 R151 R91
C1 R22
APU_SVD_R SVC TEST32_L APU_TEST35 R229 X_300R0402 R520,R521
C2 AE14
SVD TEST35

X_1KR0402

X_1KR0402

X_1KR0402

X_220R0402
APU_SVT_R D1 R234 300R0402 Stuff R82 to enter FIX mode
SVT
SER.

C292 X_C10p50N0402 AC10 APU_FM2R1 Sabine HDMI Design Guidance BOOT Voltage
FM2R1 APU_FM2R1 7
R238 10R0402 APU_SIC_R AK14 AG14 FCH_DMA_ACTIVE# FCH_DMA_ACTIVE#
HDMI enable strapping:
16
26 APU_SIC SIC DMAACTIVE_L
MISC

APU_SID AL14 AD10 LDTSTOP_L TEST35 PU TO VCC_DDR thru 300R SVC SVD Pre-PWROK metel VID V_FIX MODE
26 APU_SID SID LDTSTOP_L LDTSTOP_L 16
C291 C180p50N0402 G12 FM_IDLEEXIT_L 0 0 1.1 1.4
APU_RST# BP5/IDLEEXIT_L 3VDUAL 0 1 1.0 1.2
B 16 APU_RST# AF10 F9 B
APU_PWRGD RESET_L CORETYPE 1 0 0.9 1.0
16 APU_PWRGD AF14
C301 C180p50N0402 PWROK APU_FM2R1 R47 10KR0402 1 1 0.8 0.8
AJ13
APU_PROCHOT# RSVD1
AE10 AH13
CTRL

APU_THERMTRIP# PROCHOT_L RSVD2 VCC_DDR


AH14 AD12
APU_ALERT# THERMTRIP_L RSVD3
AJ14 K23
ALERT_L RSVD4
RSVD

K25 FCH_DMA_ACTIVE# R228 1KR0402


CPU_TDI RSVD5 VCC_DDR
G11 AB23
CPU_TDO
CPU_TCK
E10
E11
TDI
TDO
RSVD6
RSVD7
AC24
AG10
LDTSTOP_L R233 1KR0402 SCAN Conn,
CPU_TMS TCK RSVD8
F11
TMS
JTAG

CPU_TRST_L F10 C3 APU_TEST18 TP20


TRST_L VDDP_SENSE VDDP_SENSE 28
CPU_DBRDY G10 A3 APU_TEST19 TP19 R161 R51
CPU_DBREQ_L DBRDY VDDNB_SENSE NB_SENSE+ 7 APU_TEST24
E9 A4 TP24 1KR0402 10KR0402
DBREQ_L VDDIO_SENSE VDDIOFB+ 28
SENSE

B3 COREFB+ APU_TEST20 TP23


VDD_SENSE COREFB+ 7
C4

B
VDDR_SENSE VDDR_SENSE 28
B4 R179 0R0402 Q21
VSS_SENSE COREFB- 7
N-SST3904_SOT23

ZIF-SOCKET904-HF-2
R186 0R0402
NB_SENSE- 7 WARM RESET FM_IDLEEXIT_L E C FCH_IDLEEXIT_L 17

N12-9040040-L06 APU_RST# TP43


VCC_DDR 3VDUAL

VCC_DDR Layout: Place close to HDT header


VCC_DDR 3VDUAL
R296
10KR0402
R416
10KR0402 VCC_DDR 3VDUAL
GPU DEBUG R181
R168
1KR0402
1KR0402
CPU_TDI
CPU_TCK
R176 1KR0402 CPU_TMS
A APU_BLON CPU_TRST_L A
R300 R430 Q53 TP29 R164 1KR0402
B

10KR0402 10KR0402 N-SST3904_SOT23 APU_DIGON TP30 R189 300R0402 CPU_DBREQ_L


R262 R267 APU_BLPWM TP26
Q52 APU_ALERT# E C X_10KR0402 X_10KR0402 DP1_HPD_VGA_C TP21
B

FCH_TALERT# 18
N-SST3904_SOT23
Q48 VDDIOFB+ TP2
MICRO-START INT'L CO.,LTD.
B

APU_THERMTRIP# E C X_N-SST3904_SOT23 COREFB+ TP22


FCH_THERMTRIP# 17
Title
APU_PROCHOT# E C MS-7857
FCH_PROCHOT# 16
Size Document Number Rev
R265 0R0402 Custom FM2 DISPLAY/MSIC 10
Date: Monday, December 17, 2012 Sheet 10 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

VCCP VCCP
VCCP VCCP CPU1E CPU1H CPU1G
Bottom AK29 AF16 A18 P13
VDD VSS_115 VSS VSS_174 VSS_1 VSS_58
AA11 L17 R10 AF13 A21 VSS P19
VDD_1 VDD_51 VSS_116 VSS_175 VSS_2 VSS_59
AB7 L21 R12 AF11 A24 R3
C644 C650 C643 C649 C657 C670 C661 C666 C672 C671 C675 C683 C681 C680 C679 C676 VDD_2 VDD_52 VSS_117 VSS_176 VSS_3 VSS_60
Y20 M12 R20 AF22 A27 M4
VDD_3 VDD_53 VSS_118 VSS_177 VSS_4 VSS_61
M10 M16 T4 AF25 B16 R9
VDD_4 VDD_54 VSS_119 VSS_178 VSS_5 VSS_62

C10u6.3X50805

C10u6.3X50805

C10u6.3X50805

C10u6.3X50805
C22u6.3X50805-RH

C22u6.3X50805-RH

C22u6.3X50805-RH

C22u6.3X50805-RH

C22u6.3X50805-RH

C22u6.3X50805-RH

C22u6.3X50805-RH
P10 M18 T7 AF28 B19 G27

C22u6.3X50805-RH

C22u6.3X50805-RH

C22u6.3X50805-RH

C22u6.3X50805-RH

C22u6.3X50805-RH
VDD_5 VDD_55 VSS_120 VSS_179 VSS_6 VSS_63
T20 M20 T11 AF31 B22 G30
VDD_6 VDD_56 VSS_121 VSS_180 VSS_7 VSS_64
W11 N6 T13 AG3 N22 H4
AA13 VDD_7 VDD_57 N11 T19 VSS_122 VSS_181 AG9 B25 VSS_8 VSS_65 H5
VDD_8 VDD_58 VSS_123 VSS_182 VSS_9 VSS_66
AA21 N19 U9 AG11 B28 H6
VDD_9 VDD_59 VSS_124 VSS_183 VSS_10 VSS_67
AA3 N3 U10 AG13 C17 H7
VDD_10 VDD_60 VSS_125 VSS_184 VSS_11 VSS_68
AA6 P1 U12 AG17 C20 H9
AB1 VDD_11 VDD_61 P12 U20 VSS_126 VSS_185 AG20 C23 VSS_12 VSS_69 H11
D VDD_12 VDD_62 VSS_127 VSS_186 VSS_13 VSS_70 D
AB10 P20 V11 AG23 C26 H13
VDD_13 VDD_63 VSS_128 VSS_187 VSS_14 VSS_71
AB14 T1 V13 AG26 C29 H16
AB16 VDD_14 VDD_64 P4 V19 VSS_129 VSS_188 AG29 D2 VSS_15 VSS_72 H19
VDD_15 VDD_65 VSS_130 VSS_189 VSS_16 VSS_73
AB18 P7 V21 AH4 D3 H22
VDD_16 VDD_66 VSS_131 VSS_190 VSS_17 VSS_74
AB4 R11 W3 AH10 D4 H25
VCCP VCCP VCCP AC11 VDD_17 VDD_67 R13 W6 VSS_132 VSS_191 AH12 D5 VSS_18 VSS_75 H28
VDD_18 VDD_68 VSS_133 VSS_192 VSS_19 VSS_76
AC13 R19 W9 AH15 D6 H31
VDD_19 VDD_69 VSS_134 VSS_193 VSS_20 VSS_77
AC19 T10 W10 AH18 D7 M7
VDD_20 VDD_70 VSS_135 VSS_194 VSS_21 VSS_78
AC21 T12 W12 AH21 D8 M11
C660 C663 C655 C658 C646 C652 C668 C682 C674 C667 C665 VDD_21 VDD_71 VSS_136 VSS_195 VSS_22 VSS_79
AD1 U11 W20 AH24 D9 M15
VDD_22 VDD_72 VSS_137 VSS_196 VSS_23 VSS_80
AE3 V20 W22 AH27 D10 M17
VDD_23 VDD_73 VSS_138 VSS_197 VSS_24 VSS_81
X_C180p50N0402

X_C180p50N0402

X_C180p50N0402

X_C180p50N0402

C10u6.3X50805

C10u6.3X50805

C10u6.3X50805

C10u6.3X50805

C180p50N0402

C180p50N0402

C180p50N0402
AF4 U3 Y4 AH30 D11 M21
AF7 VDD_24 VDD_74 U6 Y7 VSS_139 VSS_198 AJ3 D12 VSS_25 VSS_82 N9
VDD_25 VDD_75 VSS_140 VSS_199 VSS_26 VSS_83
AG6 V1 Y11 AJ6 D13 N10
VDD_26 VDD_76 VSS_141 VSS_200 VSS_27 VSS_84
AH7 V10 Y13 AJ9 D14 N12
H12 VDD_27 VDD_77 V12 Y15 VSS_142 VSS_201 AJ10 D15 VSS_28 VSS_85 N20
VDD_28 VDD_78 VSS_143 VSS_202 VSS_29 VSS_86
H14 V4 Y17 AJ12 D18 J12
VDD_29 VDD_79 VSS_144 VSS_203 VSS_30 VSS_87
H8 V7 Y19 AJ16 D21 J14
VDD_30 VDD_80 VSS_145 VSS_204 VSS_31 VSS_88
J11 W13 Y21 AJ19 D24 J16
VDD_31 VDD_81 VSS_146 VSS_205 VSS_32 VSS_89
J13 W19 AA9 AD17 D27 J18
VDD_32 VDD_82 VSS_147 VSS_206 VSS_33 VSS_90
J15 J6 AA10 AD20 D30 J20
VDD_33 VDD_83 VSS_148 VSS_207 VSS_34 VSS_91
J17 N21 AA14 AD23 E4 J23
J19 VDD_34 VDD_84 U19 AA16 VSS_149 VSS_208 AD26 E15 VSS_35 VSS_92 K11
VCC_DDR VDD_35 VDD_85 VSS_150 VSS_209 VSS_36 VSS_93
J21 AE6 AA18 AD29 E16 K13
CPU_VDDNB Layout: VDDA25 caps within 0.6'' of APU VDD_36 VDD_86 VSS_151 VSS_210 VSS_37 VSS_94
J9 AC15 AA20 AK7 E19 K15
VDDA25 VDDA_25 K10 VDD_37 VDD_87 W21 AA22 VSS_152 VSS_211 AJ31 E22 VSS_38 VSS_95 K17
FB7 VDD_38 VDD_88 VSS_153 VSS_212 VSS_39 VSS_96
K12 Y1 AB13 AJ28 E25 K21
VDD_39 VDD_89 VSS_154 VSS_213 VSS_40 VSS_97
K14 Y10 AB15 AJ25 E28 J3
VDD_40 VDD_90 VSS_155 VSS_214 VSS_41 VSS_98
U13 Y12 AB17 AJ22 E31 L6
30L3A-40_0805-RH K16 VDD_41 VDD_91 Y14 AB19 VSS_156 VSS_215 AE9 F4 VSS_42 VSS_99 L9
C179 C239 C235 C180 C272 C264 C255 VDD_42 VDD_92 VSS_157 VSS_216 VSS_43 VSS_100
AC17 AA15 AB21 AE11 F17 L10
C136 C139 C71 VDD_43 VDD_93 VSS_158 VSS_217 VSS_44 VSS_101
Y18 AA17 AC3 AE12 F20 L12
VDD_44 VDD_94 VSS_159 VSS_218 VSS_45 VSS_102
C0.22u16X

C0.22u16X

C0.22u16X
C C
C180p50N0402

C180p50N0402

K18 AA19 AC6 AE15 F23 L14


C4.7u6.3X50805

C3300p50X0402-RH-1
VDD_45 VDD_95 VSS_160 VSS_219 VSS_46 VSS_103
C0.22u16X

C0.22u16X

C180p50N0402

K20 Y16 AC9 AE18 F26 L16


VDD_46 VDD_96 VSS_161 VSS_220 VSS_47 VSS_104
K4 AH1 AC12 AE21 F29 L18
L3 VDD_47 VDD_97 AF1 AC14 VSS_162 VSS_221 AE24 G15 VSS_48 VSS_105 L20
VDD_48 VDD_98 VSS_163 VSS_222 VSS_49 VSS_106
L11 K7 AC16 AE27 G18 L22
VDD_49 VDD_99 VSS_164 VSS_223 VSS_50 VSS_107
L15 AC18 AE30 G21 AL7
Place across each VDDIO-GND plane seam VDD_50 VSS_165 VSS_224 VSS_51 VSS_108
AC22 AK11 G24 AL27
AD4 VSS_166 VSS_225 AK13 R6 VSS_52 VSS_109 A15
ZIF-SOCKET904-HF-2 VSS_167 VSS_226 VSS_53 VSS_110
AD7 K1 AL21 AK17
VCCP VSS_168 VSS_227 VSS_54 VSS_111
AD11 G4 AL24 AL11
CPU_VDDR Layout: Place close to Pins N12-9040040-L06 AK20 VSS_169 VSS_228 M1 AL18 VSS_55 VSS_112 AL15
AH11,AJ11,AK11,AL11 VSS_170 VSS_229 VSS_56 VSS_113
AK23 H1 P11 AL13
VSS_171 VSS_230 VSS_57 VSS_114
AF19 J22
C214 C132 C188 AK26 VSS_172 VSS_231 AB11
VSS_173 VSS_232 ZIF-SOCKET904-HF-2
X_C10u6.3X50805

X_C10u6.3X50805

X_C10u6.3X50805

C271 C270 C263 C256 C280 C266 C254 C286 ZIF-SOCKET904-HF-2


N12-9040040-L06
N12-9040040-L06
C10u6.3X50805

C10u6.3X50805

C0.22u16X

C0.22u16X

C0.22u16X

C180p50N0402

C180p50N0402
C22u6.3X50805-RH

VCC_DDR
CPU1F VDDA25 FM1 DECOUPLING CAPS
K27 AE13 VSS VDD VDDNB VDDIO VDDP VDDR VDDA Mvref
VDDIO_1 VDDA_1 TP3
J29 AD13
U25 VDDIO_2 VDDA_2 TOTLE
VDDIO_3
T30 A7 POWER COMB COMB SPLIT SPLIT
VDDIO_4 VDDNB_1
V29 A6 PINS
VDDIO_5 VDDNB_2 CPU_VDDNB
L28 A5
CPU_VDDNB VDDIO_6 VDDNB_3
L31 A9 416 226 102 19 51 8 8 4 4 2 1
VDDIO_7 VDDNB_4
M22 C6
VDDIO_8 VDDNB_5 VALUE/SIZE/
M23 A10
M26 VDDIO_9 VDDNB_6 A11 VDDNB = 0.8V NEAR FAR
VDDIO_10 VDDNB_7 MATERIAL
C163 C162 C165 C166 C156 C161 C147 C151 C164 C69 C129 C74 C39 N24 A12 (Variable)
B VDDIO_11 VDDNB_8 B
N27 A13 22U/1206/X5R / 11 2 4 / 1 / / / /
VDDIO_12 VDDNB_9
C10u6.3X50805

C10u6.3X50805

C0.22u16X

C0.22u16X
X_C22u6.3X50805-RH

X_C22u6.3X50805-RH

X_C22u6.3X50805-RH

X_C22u6.3X50805-RH

C180p50N0402

C180p50N0402
C22u6.3X50805-RH

C22u6.3X50805-RH

N30 A14
C4.7u6.3X50805

VDDIO_13 VDDNB_10
P22 B5 10U/0805/X5R / 7 2 1 2+1(B) 1 / / / /
VDDIO_14 VDDNB_11
U31 B6
VDDIO_15 VDDNB_12
W24 B7 4.7U/0805/X5R / 3 1 4 2 2+2 2 2 1 /
V23 VDDIO_16 VDDNB_13 B8
VDDIO_17 VDDNB_14
V26 B9 0.22U/0603/X5R / 2 2 2+2 2 2+2 2 2 1 /
VDDIO_18 VDDNB_15
U28 B10
P25 VDDIO_19 VDDNB_16 B11 0.1U/0603/X5R
VCC_DDR VDDIO_20 VDDNB_17 / / / / / / / / / 1
P28
VDDIO_21 VDDNB_18
B12
0.01U/0603/X5R
/
P31
R23
VDDIO_22 VDDNB_19
B13
B14
/ 4 / / / / / / /
VDDIO_23 VDDNB_20
3.3 nF/0603/X5R
/
R26
R29
VDDIO_24 VDDNB_21
C5
C14
/ / / / / / / 1
C645 C651 C656 C685 C659 C684 C662 C669 C673 C664 C677 C678 C191 VDDIO_25 VDDNB_22
T24 C13 1 nF/0603/X5R / / / / / / / / / 1
W27 VDDIO_26 VDDNB_23 C12
VDDIO_27 VDDNB_24
C10u6.3X50805
C0.22u16X

C0.22u16X
C180p50N0402

C180p50N0402
C22u6.3X50805-RH

C22u6.3X50805-RH

C22u6.3X50805-RH

C22u6.3X50805-RH

1 nF/0603/X5R
C4.7u6.3X50805

C4.7u6.3X50805

C4.7u6.3X50805

C4.7u6.3X50805

L25
W30
VDDIO_28 VDDNB_25
C11
C10
/ / / / 4 / / / / /
VDDIO_29 VDDNB_26
Y22
VDDIO_30 VDDNB_27
C9 180 pF/0603/X5R / 3 1 2+2 2+2 2 / / / /
Y25 C8
VDDIO_31 VDDNB_28
Y28 C7
VDDIO_32 VDDNB_29
K24 A8
VDDIO_33 VDDNB_30 VDDNB_CAP C654 C22u6.3X50805-RH Layout: Place close to Pins M14,M13
AB22 M14
VDDIO_34 VDDNB_CAP_1 C653 C22u6.3X50805-RH placed on the bottomside CPU_VDDP CPU_VDDP
AB24 N13
VDDIO_35 VDDNB_CAP_2 C647 X_C22u6.3X50805-RH
AB27
VDDIO_36 C648 X_C10u6.3X5-HF
Bottom AB30
VDDIO_37

C284

C253

C269

C279
AC23 AL10
VDDIO_38 VDDR_1
AC25
AC28
VDDIO_39 VDDR_2
AK8
AK9
Bottom
VDDIO_40 VDDR_3

X_C180p50N0402

X_C180p50N0402

C180p50N0402

C180p50N0402
AC31 AL8 CPU_VDDR VDDR = 1.2V
CPU_VDDP VDDIO_41 VDDR_4
K30 AL9 VDDPCIE = 1.2V
VDDIO_42 VDDR_5
Y31 AK10 ONLY ONE SIDE OF VDDPCIE & VDDR MUST
A VDDIO_43 VDDR_6 A
AA26
VCCP J26
VDDIO_44 CONNECTED ON THE PCB.CONNECTING BOTH SIDES
VDDIO_45 IS ACCEPTABLE BUT NOT REQUIRED. BOTH SIDES
M29 AK4
C274 C285 C265 C281 C267 C252 C251 C277 C262 T27 VDDIO_46 VDDP_1 AK5 MUST BE DECOUPLED.
VDDIO_47 VDDP_2
AA23 AL5
VDDIO_48 VDDP_3
C1000p50X0402
C0.22u16X
C47u4X0805-RH

C180p50N0402

C180p50N0402

C180p50N0402

C180p50N0402
C10u6.3X5-HF

C10u6.3X5-HF

C640 AA29 AL3


C180p50N0402 VDDIO_49 VDDP_4
MEC1 AL4
MEC1 VDDP_5
MEC2
MEC3
MEC2 VDDP_6
AL6
AK3 CPU_VDDP MICRO-START INT'L CO.,LTD.
MEC4 MEC3 VDDP_7 AK6 Title
MEC4 VDDP_8
AK2 MS-7857
VDDP_9
VDDP and VDDR support two separate Size Document Number Rev
Custom
ZIF-SOCKET904-HF-2
power planes with single regulator FM2 POWER&DECOUPLING 10
N12-9040040-L06 Date: Monday, December 17, 2012 Sheet 11 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

VCC_DDR VCC3 VTT_DDR

MEM_MA_HOT#
MEM_MA_HOT# 9
9 MEM_MA_DQS_H[7..0]

9 MEM_MA_DQS_L[7..0]

170
173
176
179
182
183
186
189
191
194
197

236

120
240

167

187
198
51
54
57
60
62
65
66
69
72
75
78

68
53

79
48
49
DIMM1

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDSPD

VTT
VTT

NC/PAR_IN
NC/ERR_OUT
NC/TEST4
RSVD
FREE1
FREE2
FREE3
FREE4
9 MEM_MA_DATA[63..0]
MEM_MA_DATA0 3 188 MEM_MA_ADD0
DQ0 A0 MEM_MA_ADD[15..0] 9
MEM_MA_DATA1 4 181 MEM_MA_ADD1
D MEM_MA_DATA2 DQ1 A1 MEM_MA_ADD2 D
9 61
MEM_MA_DATA3 DQ2 A2 MEM_MA_ADD3
10 180
MEM_MA_DATA4 DQ3 A3 MEM_MA_ADD4
122 59
MEM_MA_DATA5 DQ4 A4 MEM_MA_ADD5
123 58
MEM_MA_DATA6 DQ5 A5 MEM_MA_ADD6
128 178
MEM_MA_DATA7 DQ6 A6 MEM_MA_ADD7
129 56
MEM_MA_DATA8 DQ7 A7 MEM_MA_ADD8
12 177
MEM_MA_DATA9 DQ8 A8 MEM_MA_ADD9
13 175
MEM_MA_DATA10 DQ9 A9 MEM_MA_ADD10
18 70
MEM_MA_DATA11 DQ10 A10/AP MEM_MA_ADD11
19 55
MEM_MA_DATA12 DQ11 A11 MEM_MA_ADD12
131 174
MEM_MA_DATA13 DQ12 A12 MEM_MA_ADD13
132 196
MEM_MA_DATA14 DQ13 A13 MEM_MA_ADD14
137 172
MEM_MA_DATA15 DQ14 A14 MEM_MA_ADD15
138 171
MEM_MA_DATA16 DQ15 A15
21
MEM_MA_DATA17 DQ16
22 39
MEM_MA_DATA18 DQ17 CB0
27 40 Vref-DQ : Reference voltage for DQ0每DQ63, CB0
MEM_MA_DATA19 DQ18 CB1
28 45
DQ19 CB2
MEM_MA_DATA20
MEM_MA_DATA21
140
DQ20 CB3
46 每CB7
141 158
DQ21 CB4
MEM_MA_DATA22 146
DQ22 CB5
159 and PAR_IN. When in single ended mode used for
MEM_MA_DATA23 147 164
MEM_MA_DATA24 30
DQ23
DQ24
CB6
CB7
165 DQS0每DQS7.
MEM_MA_DATA25 31
MEM_MA_DATA26 36
DQ25
7 MEM_MA_DQS_H0 Vref-CA : Reference voltage for A0-A15, BA0
DQ26 DQS0
MEM_MA_DATA27
MEM_MA_DATA28
37
149
DQ27 DQS0#
6
16
MEM_MA_DQS_L0
MEM_MA_DQS_H1
每BA2, RAS#, CAS#, WE#,
DQ28 DQS1
MEM_MA_DATA29
MEM_MA_DATA30
150
DQ29 DQS1#
15 MEM_MA_DQS_L1
MEM_MA_DQS_H2
S0#, S01#, CKE0, CKE1, ODT0 and ODT1.
C 155 25 C
MEM_MA_DATA31 DQ30 DQS2 MEM_MA_DQS_L2
156 24
MEM_MA_DATA32 DQ31 DQS2# MEM_MA_DQS_H3
81 34
MEM_MA_DATA33 DQ32 DQS3 MEM_MA_DQS_L3
82 33
MEM_MA_DATA34 DQ33 DQS3# MEM_MA_DQS_H4
87 85 RESET#(Output) : A synchronously forces
MEM_MA_DATA35 DQ34 DQS4 MEM_MA_DQS_L4
88 84
DQ35 DQS4#
MEM_MA_DATA36
MEM_MA_DATA37
200
201
DQ36 DQS5
94
93
MEM_MA_DQS_H5
MEM_MA_DQS_L5
all registered output LOW when RESET# is LOW.
DQ37 DQS5#
MEM_MA_DATA38 206
DQ38 DQS6
103 MEM_MA_DQS_H6 This signal can be used during power up to
MEM_MA_DATA39 207 102 MEM_MA_DQS_L6
MEM_MA_DATA40 90
DQ39
DQ40
DQS6#
DQS7
112 MEM_MA_DQS_H7 ensure that CKE is LOW and DQs are High-Z.
MEM_MA_DATA41 91 111 MEM_MA_DQS_L7
MEM_MA_DATA42 DQ41 DQS7#
96 43
MEM_MA_DATA43 DQ42 DQS8
97 42
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
209
210
215
DQ43
DQ44
DQ45
DQ46
DDR3 DQS8#

DM0/DQS9
NC/DQS9#
125
126
MEM_MA_DM0
MEM_MA_DM[7..0] 9
MEM_MA_DATA47 216 134 MEM_MA_DM1
MEM_MA_DATA48 DQ47 DM1/DQS10
99 135
MEM_MA_DATA49 DQ48 NC/DQS10# MEM_MA_DM2
100 143
MEM_MA_DATA50 DQ49 DM2/DQS11
105 144
MEM_MA_DATA51 DQ50 NC/DQS11# MEM_MA_DM3
106 152
MEM_MA_DATA52 DQ51 DM3/DQS12
218 153
MEM_MA_DATA53 DQ52 NC/DQS12# MEM_MA_DM4
219 203
MEM_MA_DATA54 DQ53 DM4/DQS13
224 204
MEM_MA_DATA55 DQ54 NC/DQS13# MEM_MA_DM5
225 212
MEM_MA_DATA56 DQ55 DM5/DQS14 MEM_SCLK R268
108 213 13 MEM_SCLK SCLK0 17
MEM_MA_DATA57 DQ56 NC/DQS14# MEM_MA_DM6 MEM_SDATA R266
109 221 13 MEM_SDATA SDATA0 17
MEM_MA_DATA58 DQ57 DM6/DQS15
B 114 222 B
MEM_MA_DATA59 DQ58 NC/DQS15# MEM_MA_DM7
115 230
MEM_MA_DATA60 DQ59 DM7/DQS16
227 231
MEM_MA_DATA61 DQ60 NC/DQS16#
228 161
MEM_MA_DATA62 DQ61 DM8/DQS17
233 162
MEM_MA_DATA63 DQ62 NC/DQS17#
234
DQ63 MEM_MA1_ODT0
195 MEM_MA1_ODT0 9
ODT0 MEM_MA1_ODT1
2 77 MEM_MA1_ODT1 9
VSS ODT1 MEM_MA_CKE0
5 50 MEM_MA_CKE0 9
VSS CKE0 MEM_MA_CKE1
8 169 MEM_MA_CKE1 9
VSS CKE1 MEM_MA1_CS_L0
11 193 MEM_MA1_CS_L0 9
VSS CS0# MEM_MA1_CS_L1
14 76 MEM_MA1_CS_L1 9
VSS CS1# MEM_MA_BANK0
17 71 MEM_MA_BANK0 9
VSS BA0 MEM_MA_BANK1
20 190 MEM_MA_BANK1 9
VSS BA1 MEM_MA_BANK2
23 52 MEM_MA_BANK2 9
VSS BA2
26
VSS MEM_MA_WE_L
29 73 MEM_MA_WE_L 9
VSS WE# MEM_MA_RAS_L
32 192 MEM_MA_RAS_L 9
VSS RAS# MEM_MA_CAS_L
35 74 MEM_MA_CAS_L 9
VSS CAS# MEM_MA_RESET#
38 168 MEM_MA_RESET# 9
VSS RESET#
41
VSS MEM_MA_CLK_H0
44 184 MEM_MA_CLK_H0 9
VSS CK0 MEM_MA_CLK_L0
47 185 MEM_MA_CLK_L0 9
VSS CK0# MEM_MA_CLK_H3
80 63 MEM_MA_CLK_H3 9
VSS CK1(NU) MEM_MA_CLK_L3 MEM_VREF_DQ_A
83 64 MEM_MA_CLK_L3 9
VSS CK1#(NU)
86
VSS MEM_VREF_DQ_A
89 1
VSS VREFDQ MEM_VREF_CA
92 67 MEM_VREF_CA
VSS VREFCA MEM_SCLK
95 118
A VSS SCL MEM_SDATA C46 C56 A
98 238
VSS SDA C1000p50X0402
101 237 VCC3 C0.1u16X
VSS SA1
MEC1
MEC2
MEC3

104 117
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS SA0

DDRIII-240P_BLACK-RH-8 MICRO-START INT'L CO.,LTD.


107
110
113
116
119
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
199
202
205
208
211
214
217
220
223
226
229
232
235
239
MEC1
MEC2
MEC3

Title
N13-2400701-A10 MS-7857
DIMM1(CHANNEL-A A1)
Size Document Number Rev
Custom DDR3 DIMM CH-A 10
Date: Monday, December 17, 2012 Sheet 12 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

VCC_DDR VCC3 VTT_DDR

MEM_MB_HOT#
MEM_MB_HOT# 9
9 MEM_MB_DQS_H[7..0]

9 MEM_MB_DQS_L[7..0]

170
173
176
179
182
183
186
189
191
194
197

236

120
240

167

187
198
51
54
57
60
62
65
66
69
72
75
78

68
53

79
48
49
DIMM2

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDSPD

VTT
VTT

NC/PAR_IN
NC/ERR_OUT
NC/TEST4
RSVD
FREE1
FREE2
FREE3
FREE4
MEM_MB_DATA0 3 188 MEM_MB_ADD0
9 MEM_MB_DATA[63..0] DQ0 A0 MEM_MB_ADD[15..0] 9
MEM_MB_DATA1 4 181 MEM_MB_ADD1
MEM_MB_DATA2 DQ1 A1 MEM_MB_ADD2
9 61
MEM_MB_DATA3 DQ2 A2 MEM_MB_ADD3
10 180
D MEM_MB_DATA4 DQ3 A3 MEM_MB_ADD4 D
122 59
MEM_MB_DATA5 DQ4 A4 MEM_MB_ADD5
123 58
MEM_MB_DATA6 DQ5 A5 MEM_MB_ADD6
128 178
MEM_MB_DATA7 DQ6 A6 MEM_MB_ADD7
129 56
MEM_MB_DATA8 DQ7 A7 MEM_MB_ADD8
12 177
MEM_MB_DATA9 DQ8 A8 MEM_MB_ADD9
13 175
MEM_MB_DATA10 DQ9 A9 MEM_MB_ADD10
18 70
MEM_MB_DATA11 DQ10 A10/AP MEM_MB_ADD11
19 55
MEM_MB_DATA12 DQ11 A11 MEM_MB_ADD12
131 174
MEM_MB_DATA13 DQ12 A12 MEM_MB_ADD13
132 196
MEM_MB_DATA14 DQ13 A13 MEM_MB_ADD14
137 172
MEM_MB_DATA15 DQ14 A14 MEM_MB_ADD15
138 171
MEM_MB_DATA16 DQ15 A15
21
MEM_MB_DATA17 DQ16
22 39
MEM_MB_DATA18 DQ17 CB0
27 40
MEM_MB_DATA19 DQ18 CB1
28 45
MEM_MB_DATA20 DQ19 CB2
140 46
MEM_MB_DATA21 DQ20 CB3
141 158
MEM_MB_DATA22 DQ21 CB4
146 159
MEM_MB_DATA23 DQ22 CB5
147 164
MEM_MB_DATA24 DQ23 CB6
30 165
MEM_MB_DATA25 DQ24 CB7
31
MEM_MB_DATA26 DQ25 MEM_MB_DQS_H0
36 7
MEM_MB_DATA27 DQ26 DQS0 MEM_MB_DQS_L0
37 6
MEM_MB_DATA28 DQ27 DQS0# MEM_MB_DQS_H1
149 16
MEM_MB_DATA29 DQ28 DQS1 MEM_MB_DQS_L1
150 15
MEM_MB_DATA30 DQ29 DQS1# MEM_MB_DQS_H2
155 25
MEM_MB_DATA31 DQ30 DQS2 MEM_MB_DQS_L2
156 24
MEM_MB_DATA32 DQ31 DQS2# MEM_MB_DQS_H3
C 81 34 C
MEM_MB_DATA33 DQ32 DQS3 MEM_MB_DQS_L3
82 33
MEM_MB_DATA34 DQ33 DQS3# MEM_MB_DQS_H4
87 85
MEM_MB_DATA35 DQ34 DQS4 MEM_MB_DQS_L4
88 84
MEM_MB_DATA36 DQ35 DQS4# MEM_MB_DQS_H5
200 94
MEM_MB_DATA37 DQ36 DQS5 MEM_MB_DQS_L5
201 93
MEM_MB_DATA38 DQ37 DQS5# MEM_MB_DQS_H6
206 103
MEM_MB_DATA39 DQ38 DQS6 MEM_MB_DQS_L6
207 102
MEM_MB_DATA40 DQ39 DQS6# MEM_MB_DQS_H7
90 112
MEM_MB_DATA41 DQ40 DQS7 MEM_MB_DQS_L7
91 111
MEM_MB_DATA42 DQ41 DQS7#
96 43
MEM_MB_DATA43 DQ42 DQS8
97 42
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
209
210
215
DQ43
DQ44
DQ45
DQ46
DDR3 DQS8#

DM0/DQS9
NC/DQS9#
125
126
MEM_MB_DM0
MEM_MB_DM[7..0] 9
MEM_MB_DATA47 216 134 MEM_MB_DM1
MEM_MB_DATA48 DQ47 DM1/DQS10
99 135
MEM_MB_DATA49 DQ48 NC/DQS10# MEM_MB_DM2
100 143
MEM_MB_DATA50 DQ49 DM2/DQS11
105 144
MEM_MB_DATA51 DQ50 NC/DQS11# MEM_MB_DM3
106 152
MEM_MB_DATA52 DQ51 DM3/DQS12
218 153
MEM_MB_DATA53 DQ52 NC/DQS12# MEM_MB_DM4
219 203
MEM_MB_DATA54 DQ53 DM4/DQS13
224 204
MEM_MB_DATA55 DQ54 NC/DQS13# MEM_MB_DM5
225 212
MEM_MB_DATA56 DQ55 DM5/DQS14
108 213
MEM_MB_DATA57 DQ56 NC/DQS14# MEM_MB_DM6
109 221
MEM_MB_DATA58 DQ57 DM6/DQS15
114 222
MEM_MB_DATA59 DQ58 NC/DQS15# MEM_MB_DM7
115 230
MEM_MB_DATA60 DQ59 DM7/DQS16
B 227 231 B
MEM_MB_DATA61 DQ60 NC/DQS16#
228 161
MEM_MB_DATA62 DQ61 DM8/DQS17
233 162
MEM_MB_DATA63 DQ62 NC/DQS17#
234
DQ63 MEM_MB1_ODT0
195 MEM_MB1_ODT0 9
ODT0 MEM_MB1_ODT1
2 77 MEM_MB1_ODT1 9
VSS ODT1 MEM_MB_CKE0
5 50 MEM_MB_CKE0 9
VSS CKE0 MEM_MB_CKE1
8 169 MEM_MB_CKE1 9
VSS CKE1 MEM_MB1_CS_L0
11 193 MEM_MB1_CS_L0 9
VSS CS0# MEM_MB1_CS_L1
14 76 MEM_MB1_CS_L1 9
VSS CS1# MEM_MB_BANK0
17 71 MEM_MB_BANK0 9
VSS BA0 MEM_MB_BANK1
20 190 MEM_MB_BANK1 9
VSS BA1 MEM_MB_BANK2
23 52 MEM_MB_BANK2 9
VSS BA2
26
VSS MEM_MB_WE_L
29 73 MEM_MB_WE_L 9
VSS WE# MEM_MB_RAS_L
32 192 MEM_MB_RAS_L 9
VSS RAS# MEM_MB_CAS_L
35 74 MEM_MB_CAS_L 9
VSS CAS# MEM_MB_RESET#
38 168 MEM_MB_RESET# 9
VSS RESET#
41
VSS MEM_MB_CLK_H0
44 184 MEM_MB_CLK_H0 9
VSS CK0 MEM_MB_CLK_L0
47 185 MEM_MB_CLK_L0 9
VSS CK0# MEM_MB_CLK_H3
80 63 MEM_MB_CLK_H3 9
VSS CK1(NU) MEM_MB_CLK_L3 MEM_VREF_DQ_B
83 64 MEM_MB_CLK_L3 9
VSS CK1#(NU)
86
VSS MEM_VREF_DQ_B
89 1
VSS VREFDQ MEM_VREF_CA
92 67 MEM_VREF_CA
VSS VREFCA MEM_SCLK C41
95 118 MEM_SCLK 12
VSS SCL MEM_SDATA C17
98 238 MEM_SDATA 12
VSS SDA C0.1u16X C1000p50X0402
101 237 VCC3
A VSS SA1 A
MEC1
MEC2
MEC3

104 117
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS SA0

DDRIII-240P_BLACK-RH-8
107
110
113
116
119
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
199
202
205
208
211
214
217
220
223
226
229
232
235
239
MEC1
MEC2
MEC3

N13-2400701-A10 MICRO-START INT'L CO.,LTD.


Title
DIMM2(CHANNEL-B B1) MS-7857
Size Document Number Rev
Custom DDR3 DIMM CH-B 10
Date: Monday, December 17, 2012 Sheet 13 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


A B C D E

DDR REF POWER & CAPS


De-coupling Caps For DIMMs
VCC_DDR

R12
1KR1% MEM_VREF_DQ_A VCC_DDR

4 4

R10 C13 C16 C173 C233 C201 C310 C211 C177 C228 C187
1KR1% X_C0.1u10X0402 X_C1000p50X0402 C1u10X C1u10X C1u10X C1u10X C1u10X C1u10X C1u10X C1u10X

VCC_DDR

R13
1KR1% MEM_VREF_DQ_B

R11 C53 C14


1KR1% X_C0.1u10X0402 X_C1000p50X0402

3 3

VCC_DDR VTT_DDR
VCC3

VCC_DDR

C186 C172 C327 C332 C338 C344


C342 C1000p50X0402 X_C0.1u16Y0402 X_C4.7u6.3X50805 X_C4.7u6.3X50805 C1u10X C1u10X
MEM_VREF_CA C0.1u16Y0402
R215
1KR1%

R217 C220 C216 C217 C221


1KR1%
C0.1u10X0402 C0.1u10X0402 C1000p50X0402 C1000p50X0402

2 2

1 1

MICRO-START INT'L CO.,LTD.


Title
MS-7857
Size Document Number Rev
Custom DDR REF POWER AND CAPS 10
Date: Monday, December 17, 2012 Sheet 14 of 37
A B C D E

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

D D

EMI Reserved
VCCP
VCC3
C346 C0.1u16Y0402
C485 C0.1u16Y0402 C273 C0.1u16Y0402
VCC5 C551 C0.1u16Y0402 C120 X_C0.1u16Y0402
C504 X_C0.1u16Y0402 C404 X_C0.1u16Y0402
C283 C0.1u16Y0402 C33 X_C0.1u16Y0402 C248 C0.1u16Y0402
C633 X_C0.1u16Y0402 C595 X_C0.1u16Y0402 C397 X_C0.1u16Y0402
C27 C0.1u16Y0402 C341 X_C0.1u16Y0402 C61 X_C0.1u16Y0402
C1 X_C0.1u16Y0402 C488 X_C0.1u16Y0402
C231 C0.1u16Y0402 C275 X_C0.1u16Y0402 C402 X_C0.1u16Y0402
C585 X_C0.1u16Y0402 C403 X_C0.1u16Y0402
C505 X_C0.1u16Y0402 C117 X_C0.1u16Y0402
C479 X_C0.1u16Y0402 C199 C0.1u16Y0402
C509 X_C0.1u16Y0402 C392 C0.1u16Y0402
VCC5 VCC3 C429 X_C0.1u16Y0402 C169 C0.1u16Y0402
C487 X_C0.1u16Y0402 C167 C0.1u16Y0402
C441 X_C0.1u16Y0402
C370 X_C0.1u16Y0402

VCC5_SB C387 X_C0.1u16Y0402


3VDUAL C170 X_C0.1u16Y0402
C405 X_C0.1u16Y0402 C189 C0.1u16Y0402
C500 C0.1u16Y0402 C507 X_C0.1u16Y0402 C384 X_C0.1u16Y0402
C557 X_C0.1u16Y0402 C599 X_C0.1u16Y0402
C C471 C0.1u16Y0402 C489 X_C0.1u16Y0402 C
C584 X_C0.1u16Y0402 C5 X_C0.1u16Y0402
C499 X_C0.1u16Y0402
C480 X_C0.1u16Y0402 VCC_DDR
VCC_DDR
+12V

C418 C0.1u16Y0402 C316 C18 C230 C240


VTT_DDR

C1000p50X0402

C1000p50X0402
C361 X_C0.1u16Y0402 C236 C202 C184 C182

C680p16X0402-RH

X_C0.1u16Y0402
C351 X_C0.1u16Y0402

C680p16X0402-RH

C680p16X0402-RH

C680p16X0402-RH

C680p16X0402-RH
C303 X_C0.1u16Y0402
C347 X_C0.1u16Y0402 C333 X_C0.1u16Y0402
C337 X_C0.1u16Y0402 C232 X_C0.1u16Y0402
C348 X_C0.1u16Y0402 C369 X_C0.1u16Y0402

VCC_DDR
VCC_DDR

C213 C249 C185 C289


VCC5

C1000p50X0402
C238 C234 C183 C237

C680p16X0402-RH

C680p16X0402-RH

C680p16X0402-RH

C1000p50X0402

C1000p50X0402

C1000p50X0402
C680p16X0402-RH
C3 X_C10u16Y1206
C115 X_C10u16Y1206

B B
C2 X_C10u6.3X50805

C8 X_C4.7u6.3X50805
C37 X_C4.7u6.3X50805

A A

MICRO-START INT'L CO.,LTD.


Title
MS-7857
Size Document Number Rev
Custom EMI Reserved 10
Date: Monday, December 17, 2012 Sheet 15 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

If PCI not implemented: Provide test points


HUDSON PCIE/PCI/APU/LPC/CLK or other means to allowaccess for debug purposes.
use these balls for alternate GPIO/GPO functions
or leave unconnected.
C580 X_C150p25N0402 PCI_CLK_SIO C561 C10p50N0402
U30E PCI_CLK_DEBUG C562 X_C10p50N0402
C579 C1000p50X0402 Layout:
HUDSON-2 Part 1 of 5 Place close to FCH
R459 33R0402 FCH_PCIE_RST#_R AE2 PCIE_RST# PCICLK0 AF3 PCI_CLK_SIO_R R435 33R0402 PCI_CLK_SIO
25,33 PCIE_RST# PCI_CLK_SIO 26
R434 33R0402 FCH_A_RST#_R AD5 A_RST# PCICLK1/GPO36 AF1
26 A_RST# PCI_CLK1 21
PCICLK2/GPO37 AF5 PCI_CLK2_R R437 0R0402 PCI_CLK_DEBUG
PCI_CLK_DEBUG 26

PCI CLKS
C439 C0.1u10X0402 UMI_RX0P_FCH AE30 UMI_TX0P PCICLK3/GPO38 AG2
8 UMI_RX0P PCI_CLK3 21
C435 C0.1u10X0402 UMI_RX0N_FCH AE32 UMI_TX0N PCICLK4/14M_OSC/GPO39 AF6
8 UMI_RX0N PCI_CLK4 21
D C433 C0.1u10X0402 UMI_RX1P_FCH AD33 UMI_TX1P D
8 UMI_RX1P
C438 C0.1u10X0402 UMI_RX1N_FCH AD31 UMI_TX1N PCIRST# AB5 PCIRST# TP52
8 UMI_RX1N
C436 C0.1u10X0402 UMI_RX2P_FCH AD28 UMI_TX2P
8 UMI_RX2P
C430 C0.1u10X0402 UMI_RX2N_FCH AD29 UMI_TX2N
8 UMI_RX2N
C427 C0.1u10X0402 UMI_RX3P_FCH AC30 UMI_TX3P AD0/GPIO0 AJ3
8 UMI_RX3P
C431 C0.1u10X0402 UMI_RX3N_FCH AC32 AL5
8

8
UMI_RX3N

UMI_TX0P AB33
UMI_TX3N

UMI_RX0P
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AG4
AL6
CLEAR CMOS
8 UMI_TX0N AB31 UMI_RX0N AD4/GPIO4 AH3
AB28 UMI_RX1P AD5/GPIO5 AJ5 CMOS CLEAR JUMPER
8 UMI_TX1P
AB29 UMI_RX1N AD6/GPIO6 AL1 CLR_COMS Clear CMOS
8 UMI_TX1N R270
Y33 UMI_RX2P AD7/GPIO7 AN5 1-2 Normal
8 UMI_TX2P
Y31 AN6 2-3 Clear CMOS

PCI EXPRESS INTERFACES


UMI_RX2N AD8/GPIO8 I_VSB3V
8 UMI_TX2N
8 UMI_TX3P Y28 UMI_RX3P AD9/GPIO9 AJ1
8 UMI_TX3N Y29 UMI_RX3N AD10/GPIO10 AL8
0R0402
AD11/GPIO11 AL3
R559 590R1%0402-RH PCIE_CALRP AF29 PCIE_CALRP AD12/GPIO12 AM7
R560 2KR1%0402 PCIE_CALRN AF31 PCIE_CALRN AD13/GPIO13 AJ6
FCH_VDD11_RUN D12
Layout: Place within 1 inch AD14/GPIO14 AK7 R269 S-BAT54C_SOT23 R272 BAT1
V33 GPP_TX0P AD15/GPIO15 AN8
V31 GPP_TX0N AD16/GPIO16 AG9 3VDUAL X Y BAT_R BAT 1 2
C444 C0.1u10X0402 GPP_TX1P W30 GPP_TX1P AD17/GPIO17 AM11
34 GPP_TXC_1P
C445 C0.1u10X0402 GPP_TX1N W32 GPP_TX1N AD18/GPIO18 AJ10

Z
34 GPP_TXC_1N X_0R0402 1KR1%0402
C497 C0.1u10X0402 GPP_TX2P AB26 GPP_TX2P AD19/GPIO19 AL12 BAT2P_BLACK-RH-1
34 GPP_TXC_2P
C498 C0.1u10X0402 GPP_TX2N AB27 GPP_TX2N AD20/GPIO20 AK11
34 GPP_TXC_2N

PCI INTERFACE
AA24 GPP_TX3P AD21/GPIO21 AN12
AA23 GPP_TX3N AD22/GPIO22 AG12 VBAT
AD23/GPIO23 AE12 AD23 AD23 21
C AA27 GPP_RX0P AD24/GPIO24 AC12 AD24 AD24 21 C
AA26 GPP_RX0N AD25/GPIO25 AE13 AD25 CLR_CMOS1
AD25 21
34 GPP_RX1P W27 GPP_RX1P AD26/GPIO26 AF13 AD26 AD26 21
R271 510R0402 VBAT_FCH1 1
34 GPP_RX1N V27 GPP_RX1N AD27/GPIO27 AH13 AD27 AD27 21
R498 VBAT_FCH 2
V26 GPP_RX2P AH14 X_0R0402 3 G
AD28/GPIO28
34 GPP_RX2P
34 GPP_RX2N W26 GPP_RX2N AD29/GPIO29 AD15
W24 GPP_RX3P AD30/GPIO30 AC15 C360 C587 N31-1030171+N33-1020301-RH
W23 AE16 C1u6.3X-HF C1u6.3X-HF
GPP_RX3N AD31/GPIO31
CBE0# AN3
N41-1030191-H06
CBE1# AJ8
Layout: Place within 1 inch CBE2# AN10
FCH_VDD11_RUN R572 2KR1%0402 CLK_CALRN F27 CLK_CALRN CBE3# AD12
FRAME# AG10
DEVSEL# AK9
G30 PCIE_RCLKP IRDY# AL10
G28 PCIE_RCLKN TRDY# AF10
PAR AE10
R567 0R0402 FCH_DISP_CLKP_R R26 DISP_CLKP STOP# AH1
10 DISP_CLK FCH_DISP_CLKN_R
R566 0R0402 T26 DISP_CLKN PERR# AM9
10 DISP_CLK#
SERR# AH8
H33 DISP2_CLKP REQ0# AG15
Fusion Mode:100Mhz INT H31 DISP2_CLKN REQ1#/GPIO40 AG13 Layout:Place x'tal within 1.5 inch of FCH
Non-Fusion Mode:200Mhz REQ2#/CLK_REQ8#/GPIO41 AF15
R564 10R0402 FCH_APU_CLKP_R T24 APU_CLKP REQ3#/CLK_REQ5#/GPIO42 AM17 PREQ3# FCH_32K_X1
10 APU_CLK FCH_APU_CLKN_R PREQ3# 21
R565 10R0402 T23 APU_CLKN GNT0# AD16
10 APU_CLK#
GNT1#/GPO44 AD13 Y3
R561 0R0402 FCH_GFX_CLKP_R J30 SLT_GFX_CLKP GNT2#/SD_LED/GPO45 AD21 FCH_32K_X2 4 1
33 PE16_GXF_CLK 4 1
R558 0R0402 FCH_GFX_CLKN_R K29 SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46 AK17 PGNT#3
33 PE16_GXF_CLK# PGNT#3 21
B CLKRUN# AD19 3 2 B
3 2
H27 GPP_CLK0P LOCK# AH9
H28 GPP_CLK0N 32.768KHZ12.5P_S
INTE#/GPIO32 AF18
R570 0R0402 FCH_GPP_CLK1P_R J27 GPP_CLK1P INTF#/GPIO33 AE18 R454 20MR
34 PE1_GPP_CLK1
R569 0R0402 FCH_GPP_CLK1N_R K26 GPP_CLK1N INTG#/GPIO34 AC16
34 PE1_GPP_CLK1#
INTH#/GPIO35 AD18
R322 0R0402 FCH_GPP_CLK2P_R F33 GPP_CLK2P
34 PE1_GPP_CLK2 FCH_GPP_CLK2N_R
R320 0R0402 F31 GPP_CLK2N C567 C553
34 PE1_GPP_CLK2#
C18p50N C18p50N
CLOCK GENERATOR

R331 0R0402 FCH_GPP_CLK3P_R E33 GPP_CLK3P


25 PE_LAN_CLK FCH_GPP_CLK3N_R LPC_CLK0
R330 0R0402 E31 GPP_CLK3N LPCCLK0 B25 mach@CRB use 22pF
25 PE_LAN_CLK# LPC_CLK0 21 LPC_AD[3..0]
LPCCLK1 D25 LPC_CLK1
LPC_AD0 LPC_CLK1 21 LPC_AD[3..0] 26
M23 GPP_CLK4P LAD0 D27
M24 GPP_CLK4N LAD1 C28 LPC_AD1
LPC

FCH_25M_X1 LAD2 A26 LPC_AD2 PLACE THESE COMPONENTS CLOSE TO


21 FCH_25M_X1 FCH_25M_X2 LPC_AD3
21 FCH_25M_X2 M27 GPP_CLK5P LAD3 A29 U600, AND USE GROUND GUARD FOR
M26 GPP_CLK5N LFRAME# A31 LPC_FRAME# 32K_X1 AND 32K_X2
LPC_DRQ#0 LPC_FRAME# 26
LDRQ0# B27 R337 X_10KR0402 3VDUAL
N25 GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49 AE27
N26 GPP_CLK6N SERIRQ/GPIO48 AE19 SERIRQ 26
C686 C10p50N0402 R23 GPP_CLK7P R383 X_10KR0402 VCC3
R24 GPP_CLK7N Note: LDT_PG, LDT_STP# & LDT_RST# are OD
DMA_ACTIVE# G25 FCH_DMA_ACTIVE# 10 and require a PU to the APU I/O rail.
R562 22R0402 FCH_48M N27 GPP_CLK8P PROCHOT# E28 They are also in the S5 domain to prevent glitching at
26 SIO_48M_CLK FCH_PROCHOT# 10
R27 E26 APU_PG_R R571 0R0402
APU

GPP_CLK8N APU_PG
APU_PWRGD 10 power up.
LDT_STP# G26 LDTSTOP_L_R R336 0R0402
LDTSTOP_L 10
APU_RST# F26 APU_RST#_R R343 0R0402
APU_RST# 10
A A
J26 14M_25M_48M_OSC

C457 C22p50N FCH_25M_X1 32K_X1 G2 FCH_32K_X1

C31 25M_X1 32K_X2 G4 FCH_32K_X2


2

Y2 R332
MICRO-START INT'L CO.,LTD.
S5 PLUS

25MHZ18P_D-1 1MR S5_CORE_EN H7 S5_CORE_EN 27


RTCCLK F1 Title
1

FCH_25M_X2 S5+_INT_ALTER R444 RTC_CLK 21


C458 C22p50N C33 25M_X2 INTRUDER_ALERT# F3 X_0R0402 MS-7857
VDDBT_RTC_G E6 VBAT_FCH
Size Document Number Rev
Custom HUDSON PCIE/PCI/APU/LPC/CLK 10
?
OB1-7857001
Date: Monday, December 17, 2012 Sheet 16 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

HUDSON ACPI/USB/AZ/GPIO
C548 C1000p50X0402
U30A
R419 33R0402 FCH_PCIE_RST2#_R AB6 PCIE_RST2#/GEVENT4# USBCLK/14M_25M_48M_OSC G8 14M_25M_48M_OSC TP49
34 PCIE_RST2# INT 10k PU R2 RI#/GEVENT22#
3VDUAL mach@???DS require external PU; USB_RCOMP R376 11.8KR1%0402

USB MISC
W7 SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP B9
DG/CRB W/O PU resister SLP_S3# R429 22R0402 SLP_S3#_R T3 SLP_S3#
26,27,28 SLP_S3#
R450 X_10KR0402 SLP_S3# SLP_S5# R431 22R0402 SLP_S5#_R W2 SLP_S5# USB_FSD1P/GPIO186 H1 Layout: Place within 1'' of FCH
26,27,28 SLP_S5#
D R451 X_10KR0402 SLP_S5# PSOUT# J4 PWR_BTN# USB_FSD1N H3 D
26 PSOUT# HUDSON-2
FCH_PWRGD N7 PWR_GOOD
28 FCH_PWRGD

USB 1.1
USB_FSD0P/GPIO185 H6
Part 4 of 5
21 FCH_TEST0 T9 TEST0 USB_FSD0N H5
3VDUAL T10

ACPI / WAKE UP EVENTS


TEST1/TMS
21 FCH_TEST1
21 FCH_TEST2 V9 TEST2 USB_HSD13P H10 USB13+ 31
R466 10KR0402 FCH_WAKE# AE22 GA20IN/GEVENT0# USB_HSD13N G10
26 A20GATE USB13- 31
26 KBRST# AG19 KBRST#/GEVENT1#
R345 X_10KR0402 LPC_SMI# Inte-grated PU R9 PME#/GEVENT3# USB_HSD12P K10
26 IO_PME# USB12+ 31
LPC_SMI# C26 LPC_SMI#/GEVENT23# USB_HSD12N J12 USB12- 31
T5 LPC_PD#/GEVENT5#

26,28,35 FP_RST# U4 SYS_RESET#/GEVENT19# USB_HSD11P G12 USB11+ 31


WD_PWRGD Pull up to +3.3V_S0 rail R447 X_0R0402 FCH_WAKE# K1 WAKE#/GEVENT8# USB_HSD11N F12
thru 8-KΩ to 10-KΩ resistor. 25,26,33,34 PE_WAKE# USB11- 31
V7 IR_RX1/GEVENT20# R248 X_300R0402 C311 X_C10p50N0402
VCC3 R10 THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD10P K12
10 FCH_THERMTRIP# USB10+ 31
C491 X_C1000p50X0402 WD_PWRGD AF19 WD_PWRGD USB_HSD10N K13
WD_PWRGD USB10- 31
R370 10KR0402 R251 X_300R0402 C313 X_C10p50N0402
R471 0R0402 FCH_RSMRST# U2 RSMRST# USB_HSD9P B11
26 IO_RSMRST# USB9+ 30
USB_HSD9N D11 USB9- 30
Rise time ≒ 50-ms RSRMT# should be asserted when AG24 CLK_REQ4#/SATA_IS0#/GPIO64 R207 X_300R0402 C181 X_C10p50N0402
+3.3V_S5 voltage rails ramp up at least 10-ms system power is being applied for the first time. AE24 CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD8P E10
3VDUAL before RSMRST# is deasserted RSMRST# should be deasserted sometime after S5 USB8+ 30
AE26 SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD8N F10 USB8- 30
power is up, and should stay deasserted until system
AF22 CLK_REQ0#/SATA_IS3#/GPIO60 R208 X_300R0402 C196 X_C10p50N0402
R470 X_22KR0402 FCH_RSMRST# power is removed. AH17 SATA_IS4#/FANOUT3/GPIO55 USB_HSD7P C10
AG18 SATA_IS5#/FANIN3/GPIO59 USB_HSD7N A10
C556

USB 2.0
35 SPKR AF24 SPKR/GPIO66
SCLK0 AD26 SCL0/GPIO43 USB_HSD6P H9
12 SCLK0 SDATA0
C1000p50X0402 AD25 SDA0/GPIO47 USB_HSD6N G9
12 SDATA0
C SCLK1 T7 SCL1/GPIO227 C
33,34 SCLK1
SDATA1 R7 SDA1/GPIO228 USB_HSD5P A8
33,34 SDATA1 USB5+ 30
AG25 CLK_REQ2#/FANIN4/GPIO62 USB_HSD5N C8 USB5- 30
AG22 CLK_REQ1#/FANOUT4/GPIO61 R226 X_300R0402 C244 X_C10p50N0402

GPIO
VCC3 R465 X_10KR0402 S5+_LLB# J2 IR_LED#/LLB#/GPIO184 USB_HSD4P F8
3VDUAL USB4+ 30
AG26 SMARTVOLT2/SHUTDOWN#/GPIO51 USB_HSD4N E8 USB4- 30
R317 2.2KR0402 SCLK0 R446 X_10KR0402 V8 DDR3_RST#/GEVENT7#/VGA_PD R227 X_300R0402 C250 X_C10p50N0402
R319 2.2KR0402 SDATA0 W8 GBE_LED0/GPIO183 USB_HSD3P C6 USB3+ 30
18 SPI_HOLD#_R Y6 SPI_HOLD#/GBE_LED1/GEVENT9# USB_HSD3N A6 USB3- 30
3VDUAL V10 GBE_LED2/GEVENT10# R533 X_300R0402 C622 X_C10p50N0402
VCC3 R344 10KR0402 AA8 GBE_STAT0/GEVENT11# USB_HSD2P C5 USB2+ 30
R469 2.2KR0402 SCLK1 AF25 CLK_REQG#/GPIO65/OSCIN/IDLEEXIT# USB_HSD2N A5
10 FCH_IDLEEXIT_L USB2- 30
R468 2.2KR0402 SDATA1 R518 X_300R0402 C620 X_C10p50N0402
mach@verify the ports being used USB_HSD1P C1 USB1+ 30
OC#7 M7 BLINK/USB_OC7#/GEVENT18# USB_HSD1N C3 USB1- 30
OC#6 R8 USB_OC6#/IR_TX1/GEVENT6# R509 X_300R0402 C607 X_C10p50N0402
OC#5 T1 USB_OC5#/IR_TX0/GEVENT17# USB_HSD0P E1 USB0+ 30
OC#4 P6 USB_OC4#/IR_RX0/GEVENT16# USB_HSD0N E3 USB0- 30

USB OC
OC#3 F5 USB_OC3#/AC_PRES/TDO/GEVENT15# R510 X_300R0402 C602 X_C10p50N0402
3VDUAL 21 OC#3 OC#2
21 OC#2 P5 USB_OC2#/TCK/GEVENT14# USBSS_CALRP C16USBSS_CALRP R361 1KR1%0402
OC#1 J7 USB_OC1#/TDI/GEVENT13# USBSS_CALRN A16USBSS_CALRN R360 1KR1%0402 FCH_VDD_11_SSUSB_S
21 OC#1
RN14 8P4R-10KR0402 OC#0 T8 USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12# Layout: Place within 1'' of FCH
21 OC#0
1 2 OC#1 USB_SS_TX3P A14 USB_SS_TX3P 31
3 4 OC#3 Inte-grated PU USB_SS_TX3N C14
OC#7 USB_SS_TX3N 31
5 6
7 8 OC#6 AZ_BITCLK_R AB3 AZ_BITCLK USB_SS_RX3P C12
AZ_SDATA_OUT_R USB_SS_RX3P 31
RN12 8P4R-10KR0402 AB1 AZ_SDOUT USB_SS_RX3N A12 USB_SS_RX3N 31
1 2 OC#2 AA2 AZ_SDIN0/GPIO167
B 3 4 OC#4 Y5 AZ_SDIN1/GPIO168 USB_SS_TX2P D15 B
USB_SS_TX2P 31

HD AUDIO
5 6 OC#0 Y3 AZ_SDIN2/GPIO169 USB_SS_TX2N B15 USB_SS_TX2N 31
7 8 OC#5 AZ_SDIN Y1 AZ_SDIN3/GPIO170
29 AZ_SDIN AZ_SYNC_R AD6 AZ_SYNC USB_SS_RX2P E14 USB_SS_RX2P 31

USB 3.0
AZ_RST_R AE4 AZ_RST# USB_SS_RX2N F14 USB_SS_RX2N 31
USB_SS_TX1P F15 USB_SS_TX1P 31
TP8 K19 PS2_DAT/SDA4/GPIO187 USB_SS_TX1N G15 USB_SS_TX1N 31
TP45 J19 PS2_CLK/CEC/SCL4/GPIO188
Layout: Place close to FCH J21 SPI_CS2#/GBE_STAT2/GPIO166 USB_SS_RX1P H13 USB_SS_RX1P 31
USB_SS_RX1N G13 USB_SS_RX1N 31
R457 33R0402 AZ_SDATA_OUT_R KBC Not Implemented: D21 PS2KB_DAT/GPIO189 USB_SS_TX0P J16
29 AZ_SDOUT AZ_BITCLK_R Use for alternate available function USB_SS_TX0P 31
R432 33R0402 C20 PS2KB_CLK/GPIO190 USB_SS_TX0N H16
29 AZ_BIT_CLK or leave not connected. USB_SS_TX0N 31
R433 33R0402 AZ_SYNC_R D23 PS2M_DAT/GPIO191
29 AZ_SYNC
R458 33R0402 AZ_RST_R C22 PS2M_CLK/GPIO192 USB_SS_RX0P J15
29 AZ_RST# USB_SS_RX0P 31
USB_SS_RX0N K15 USB_SS_RX0N 31
F21 KSO_0/GPIO209 FOR Pin H19,G19
AZ_SDIN C547 C15p50N0402 E20 KSO_1/GPIO210 SCL2/GPIO193 H19 Use as GPIO or configure as one of
F20 KSO_2/GPIO211 SDA2/GPIO194 G19 the following:
A22 KSO_3/GPIO212 SCL3_LV/GPIO195 G22 SCLK3 TP6 10-k次 5% pull-up resistor to
E18 KSO_4/GPIO213 SDA3_LV/GPIO196 G21 SDATA3 TP7 +3.3V_S5.
A20 KSO_5/GPIO214 EC_PWM0/EC_TIMER0/GPIO197 E22 10-k次 5% pull-down resistor.
R550 may stuff 15pF cap for EMI FOR GPIO[226:209] J18 KSO_6/GPIO215 EC_PWM1/EC_TIMER1/GPIO198 H22
KBC Not Implemented: H18 KSO_7/GPIO216 EC_PWM2/EC_TIMER2/WOL_EN/GPIO199 J22
Use for alternate available function FCH_GPIO199 21
AZ_BIT_CLK R456 X_10KR0402 G18 KSO_8/GPIO217 EC_PWM3/EC_TIMER3/GPIO200 H21
AZ_SDIN R455 X_10KR0402 or leave not connected. B21 KSO_9/GPIO218 FOR GPIO[208:197]
K18 KSO_10/GPIO219 KSI_0/GPIO201 K21 KBC Not Implemented:
A EMBEDDED CTRL Use for alternate available function A
D19 KSO_11/GPIO220 KSI_1/GPIO202 K22
A18 KSO_12/GPIO221 KSI_2/GPIO203 F22 or leave not connected.
C18 KSO_13/GPIO222 KSI_3/GPIO204 F24
B19 KSO_14/XDB0/GPIO223 KSI_4/GPIO205 E24
B17 KSO_15/XDB1/GPIO224 KSI_5/GPIO206 B23
A24
D17
KSO_16/XDB2/GPIO225
KSO_17/XDB3/GPIO226
KSI_6/GPIO207
KSI_7/GPIO208
C24
F18
MICRO-START INT'L CO.,LTD.
Title
MS-7857
Size Document Number Rev
OB1-7857001 ? Custom HUDSON ACPI/USB/AZ/GPIO 10
Date: Monday, December 17, 2012 Sheet 17 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

HUDSON SATA/VGA/SPI/HWM
SPI ROM & DEBUG HEADER
LAYOUT:
ROUTE SATA TX DIFF PAIR @ 100 OHM+/-10%
RX DIFF PAIR @ 90 OHM+/-10%
VCC3_ROM
U30B
SATA[3::0]Route to iSATA
GEN III 6.0 Gbit/S
D HUDSON-2 Part 2 of 5 SPI1 D
SATA_TX0+ AK19 SATA_TX0P SD_CLK/SCLK_2/GPIO73 AL14 3VDUAL VCC3_ROM 1 2
24 SATA_TX0+
SATA_TX0- AM19 SATA_TX0N SD_CMD/SLOAD_2/GPIO74 AN14 SPI_DATAIN 3 4 SPI_DATAOUT
24 SATA_TX0-
SD_CD#/GPIO75 AJ12 D32 EC69 1+ 2 CD10u16EL5-RH-1 SPI_CS# 5 6 SPI_CLK
SATA_RX0- AL20 SATA_RX0N SD_WP/GPIO76 AH12 C624 C0.1u16Y0402 7 8
24 SATA_RX0-
SATA_RX0+ AN20 SATA_RX0P SD_DATA0/SDATI_2/GPIO77 AK13 X_B140-13-F_SMA-RH SPI_HOLD# 9
24 SATA_RX0+

SD CARD
SD_DATA1/SDATO_2/GPIO78 AM13
SATA_TX1+ AN22 SATA_TX1P SD_DATA2/GPIO79 AH15 R511 X_R0805 H2X5[10]M-2PITCH_BLACK-RH-2
24 SATA_TX1+
SATA_TX1- AL22 SATA_TX1N SD_DATA3/GPIO80 AJ14
24 SATA_TX1-
SATA_RX1- AH20 SATA_RX1N GBE_COL AC4 GBE_COL
24 SATA_RX1-
SATA_RX1+ AJ20 SATA_RX1P GBE_CRS AD3 GBE_CRS VCC3_ROM VCC3_ROM
24 SATA_RX1+
GBE_MDCK AD9
SATA_TX2+ AJ22 SATA_TX2P GBE_MDIO W10 GBE_MDIO
24 SATA_TX2+
SATA_TX2- AH22 SATA_TX2N GBE_RXCLK AB8
24 SATA_TX2-
GBE_RXD3 AH7
SATA_RX2- AM23 SATA_RX2N GBE_RXD2 AF7
24 SATA_RX2- SATA_RX2+ AK23 SATA_RX2P GBE_RXD1 AE7 R547 R520 R545
24 SATA_RX2+
GBE_RXD0 AD7 1KR0402 10KR0402 10KR0402
SATA_TX3+ AH24 AG8 U41

GBE LAN
SATA_TX3P GBE_RXCTL/RXDV
24 SATA_TX3+
SATA_TX3- AJ24 SATA_TX3N GBE_RXERR AD1 GBE_RXERR SPI_CS# 1 8
24 SATA_TX3- CS# VCC
GBE_TXCLK AB7 SPI_DATAIN R546 0R0402 SPI_DATAIN_R 2 7 SPI_HOLD#
SATA_RX3- SPI_WP#_R R582 X_0R0402 SPI_WP# SO/SIO1 HOLD# SPI_CLK
24 SATA_RX3- AN24 SATA_RX3N GBE_TXD3 AF9 3 6
SATA_RX3+ SPI_CLK WP# SCLK SPI_DATAOUT
24 SATA_RX3+ AL24 SATA_RX3P GBE_TXD2 AG6 4 5
GND SI/SIO0
GBE_TXD1 AE8
AL26 SATA_TX4P GBE_TXD0 AD8 W25Q32BVSSIG-HF
AN26 AB9 C630 MACH@Reserve 0R serial resisters for
SATA_TX4N GBE_TXCTL/TXEN
GBE_PHY_PD AC2 X_C10p50N0402 SI overshoot/undershoot debug M31-25Q3203-W03
C AJ26 SATA_RX4N GBE_PHY_RST# AA7 C
AH26 SATA_RX4P GBE_PHY_INTR W9 GBE_PHY_INTR
SPI_HOLD# R577 X_0R0402
Layout:For SPI Trace length within 4'' SPI_HOLD#_R 17
AN29 SATA_TX5P
AL28 SATA_TX5N SPI_DI/GPIO164 V6 SPI_DATAIN
SPI_DATAOUT
AK27 SATA_RX5N
SERIAL ATA SPI_DO/GPIO163
SPI_CLK/GPIO162
V5
V3 SPI_CLK
GBE NOT ENABLED

SPI ROM
AM27 SATA_RX5P SPI_CS1#/GPIO165 T6 SPI_CS#
ROM_RST#/SPI_WP#/GPIO161 V1 SPI_WP#_R
AL29 NC6
3VDUAL
AN31 NC7
VGA_RED L30 HUDSON_VGA_R R403 10KR0402 GBE_MDIO
HUDSON_VGA_R 23
AL31 NC8 R327 150R1%0402
AL33 NC9 VGA_GREEN L32 HUDSON_VGA_G 1 2 GBE_COL
HUDSON_VGA_G 23 GBE_CRS
R325 150R1%0402 3 4
AH33 NC10 VGA_BLUE M29 HUDSON_VGA_B 5 6 GBE_RXERR
HUDSON_VGA_B 23
AH31 NC11 R323 150R1%0402 7 8 GBE_PHY_INTR

AJ33 M28 RN11 8P4R-10KR0402


VGA DAC

NC12 VGA_HSYNC/GPO68
HUDSON_VGA_HSYNC 23
AJ31 NC13 VGA_VSYNC/GPO69 N30 HUDSON_VGA_VSYNC 23

Layout: Place within 1'' of FCH


VGA_DDC_SDA/GPO70
VGA_DDC_SCL/GPO71
M33
N32
HUDSON_VGA_SDAT 23 VGA HPD
HUDSON_VGA_SCLK 23
R563 1KR1%0402 SATA_CALRP AF28 SATA_CALRP Layout: R within 1''
R573 931R1%0402 SATA_CALRN AF27 SATA_CALRN VGA_DAC_RSET K31 DAC_RSET R568 715R1%0402 VCC3
FCH_VDD11_RUN
AUX_VGA_CH_P V28 AUX_VGA_CH_P
SATA_LED# AD22 SATA_ACT#/GPIO67 AUX_VGA_CH_N V29 AUX_VGA_CH_N For FM1
35 SATA_LED#
B VCC_DDR B
AUXCAL U28 AUXCAL R574 100R1%0402 FCH_VDD11_RUN R306
TP46 FCH_SATA_X1 AF21 SATA_X1 X_10KR0402
External Clock Generator Mode: ML_VGA_L0P T31

C
Connect to 25.000-MHz XTAL or connect SATA_X1/X2 balls to DP1_TX0P 10 0.26mA
ML_VGA_L0N T33 DP1_TX0N 10
VGA MAINLINK

100MHz differential clock from external clock generator. ML_VGA_L1P T29 ML_VGA_HPD R309 X_10KR0402 B Q54
Integrated Clock Mode: DP1_TX1P 10
ML_VGA_L1N T28 X_N-SST3904_SOT23
Leave unconnected. DP1_TX1N 10
ML_VGA_L2P R32

E
FCH_SATA_X2 AG21 DP1_TX2P 10
TP44 SATA_X2 ML_VGA_L2N R30 DP1_TX2N 10
ML_VGA_L3P P29 DP1_TX3P 10
ML_VGA_L3N P28 R310 0R0402
DP1_TX3N 10 DP1_HPD_VGA_C 10
ML_VGA_HPD/GPIO229 C29 ML_VGA_HPD
R311
21 FANOUT0 AH16 FANOUT0/GPIO52 VIN0/GPIO175 N2 100KR0402
AM15 FANOUT1/GPIO53 VIN1/GPIO176 M3
AJ16 FANOUT2/GPIO54 VIN2/SDATI_1/GPIO177 L2 PIN N2,M3,L2,N4,P1,P3,M1,M5
PIN K3,K5,K6: HW MONITOR Use as GPIO182 or configure as one of
VIN3/SDATO_1/GPIO178 N4
Use as GPIO182 or configure as one of AK15 FANIN0/GPIO56 VIN4/SLOAD_1/GPIO179 P1 the following: R321 100KR0402
the following: AN16 FANIN1/GPIO57 VIN5/SCLK_1/GPIO180 P3 10-k次 5% pull-up resistor to
10-k次 5% pull-up resistor to AL16 FANIN2/GPIO58 VIN6/GBE_STAT3/GPIO181 M1 +3.3V_S5. AUX_VGA_CH_P C425 C0.1u10X0402 HUDSON_VGA_R C443 C10p50N0402
+3.3V_S5. 10-k次 5% pull-down resistor. AUX_VGA_CH_N DP1_AUXP_C 10
VIN7/GBE_LED3/GPIO182 M5 C428 C0.1u10X0402
DP1_AUXN_C 10
10-k次 5% pull-down resistor. K6 TEMPIN0/GPIO171 HUDSON_VGA_G C440 C10p50N0402
K5 TEMPIN1/GPIO172 NC1 AG16 R324 100KR0402 VCC3
K3 TEMPIN2/GPIO173 NC2 AH10 R249 R252 HUDSON_VGA_B C432 C10p50N0402
FCH_TALERT# M6 TEMPIN3/TALERT#/GPIO174 NC3 A28
10 FCH_TALERT#

1.8KR0402

1.8KR0402
NC4 G27
NC5 L4
A A

OB1-7857001 ?

MICRO-START INT'L CO.,LTD.


Title
MS-7857
Size Document Number Rev
Custom HUDSON SATA/VGA/HWM/SPI 10
Date: Monday, December 17, 2012 Sheet 18 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

HUDSON POWER&DECOUPLING Connected directly to the power plane with


width ≡ 100 mils with area fill under the FCH.
U30C

VCC3 +3.3V_FCH_R FCH_VDD11_RUN NB_VCC1P1


HUDSON-2 Part 3 of 5

R385 0R0805 102 mA AB17 VDDIO_33_PCIGP_1 VDDCR_11_1 T14 1414 mA R329 0R0805
AB18 VDDIO_33_PCIGP_2 VDDCR_11_2 T17 R339 0R0805
C512 C724 C707 C712 C713 AE9 VDDIO_33_PCIGP_3 VDDCR_11_3 T20 C706 C696 C446 C454
AD10 VDDIO_33_PCIGP_4 VDDCR_11_4 U16

C22u6.3X50805-RH

C1u6.3X50402-HF

C1u6.3X50402-HF

C1u6.3X50402-HF

C1u6.3X50402-HF

C22u6.3X50805-RH

C22u6.3X50805-RH
C2.2u6.3X50402-HF

C2.2u6.3X50402-HF
D AG7 VDDIO_33_PCIGP_5 VDDCR_11_5 U18 D

CORE S0
PCI/GPIO I/O
AC13 VDDIO_33_PCIGP_6 VDDCR_11_6 V14
AB12 VDDIO_33_PCIGP_7 VDDCR_11_7 V17 Power Rails Hudson D3
AB13 VDDIO_33_PCIGP_8 VDDCR_11_8 V20
AB14 VDDIO_33_PCIGP_9 VDDCR_11_9 Y17
AB16 VDDIO_33_PCIGP_10 VDDAN_11_CLK NB_VCC1P1 max 4118 mA
VDDPL_3.3V 47 mA H24 VDDPL_33_SYS VDDAN_11_CLK_1 H26 340 mA VDDCR_11_[9:1] 1120 mA
FCH_VDDPL_33_MLDAC 20 mA V22 VDDPL_33_DAC VDDAN_11_CLK_2 J25
mach@???if VGA translater is not used, 12 mA U22 K24 C690 C692 C468 VDDAN_11_CLK_[8:1]
power rails tied to GND.
VDDPL_33_ML VDDAN_11_CLK_3 340 mA
FCH_VDDAN_33_DAC_R 30 mA T22 VDDAN_33_DAC VDDAN_11_CLK_4 L22

C1u6.3X50402-HF

C1u6.3X50402-HF

C22u6.3X50805-RH
(VDDPL_33_DAC,VDDPL_33_ML,VDDAN_33_DAC)

CLKGEN I/O
FCH_VDDPL_33_SSUSB_S 11 mA L18 VDDPL_33_SSUSB_S VDDAN_11_CLK_5 M22 VDDAN_11_PCIE_[8:1] 1088 mA
FCH_VDDPL_33_USB_S 14 mA D7 VDDPL_33_USB_S VDDAN_11_CLK_6 N21
15mils 11 mA AH29 N22 VDDAN_11_SATA_[10:1]
VDDPL_3.3V_PCIE
15mils
VDDPL_33_PCIE VDDAN_11_CLK_7 1337 mA
VDDPL_3.3V_SATA 12 mA AG28 VDDPL_33_SATA VDDAN_11_CLK_8 P22
FCH_VDD11_RUN VDDAN_11_ML_[4:1] 226 mA
FCH_VDD11_RUN C437 X_C2.2u6.3X50402-HFLDO_CAP M31 LDO_CAP VDDAN_11_PCIE_1 AB24 1088 mA VDDPL_11_DAC 7 mA
L44 VDDAN_11_PCIE_2 Y21
VDDPL_11_DAC 7 mA V21 VDDPL_11_DAC VDDAN_11_PCIE_3 AE25 C701 C455 C702 C464 C456 C460
VDDAN_11_PCIE_4 AD24

PCI EXPRESS

C1u6.3X50402-HF

C1u6.3X50402-HF

C1u6.3X50402-HF

C1u6.3X50402-HF

C1u6.3X50402-HF

C1u6.3X50402-HF
220L200mA-300-RH FCH_VDD11_RUN 226 mA Y22 AB23 VCC3 max
mach@Internally generated 1.8V supply
VDDAN_11_ML_1 VDDAN_11_PCIE_5 234 mA
V23 VDDAN_11_ML_2 VDDAN_11_PCIE_6 AA22

MAIN LINK
for the RGB outputs??? C695 V24 AF26 VDDIO_33_PCIGP_[10:1]
VDDAN_11_ML_3 VDDAN_11_PCIE_7 102 mA
V25 VDDAN_11_ML_4 VDDAN_11_PCIE_8 AG27
C2.2u6.3X50402-HF FCH_VDD11_RUN VDDPL_33_SYS 47 mA
AB10 VDDIO_33_GBE_S VDDAN_11_SATA_1 AA21 1337 mA VDDPL_33_DAC 20 mA
C VDDAN_11_SATA_4 Y20 C
VDDAN_11_SATA_2 AB21 C711 C461 C708 C700 C448 C705 C447 VDDPL_33_ML 12 mA
VDDAN_11_SATA_3 AB22

C1u6.3X50402-HF

C1u6.3X50402-HF

C1u6.3X50402-HF

C1u6.3X50402-HF

C1u6.3X50402-HF

C1u6.3X50402-HF

C1u6.3X50402-HF
AB11 AC22 VDDPL_33_PCIE 11 mA

SERIAL ATA
VDDCR_11_GBE_S_1 VDDAN_11_SATA_5

GBE LAN
mach@???GbE MAC is not enalbed, AA11 VDDCR_11_GBE_S_2 VDDAN_11_SATA_6 AC21
power rails tied to GND. AA20 VDDPL_33_SATA
(VDDIO_33_GBE_S,VDDIO_GBE_S,VDDCR_11_GBE_S)
VDDAN_11_SATA_7 12 mA
VDDAN_11_SATA_8 AA18
AA9 VDDIO_GBE_S_1 VDDAN_11_SATA_9 AB20 VDDAN_33_DAC 30 mA
AA10 VDDIO_GBE_S_2 VDDAN_11_SATA_10 AC19

VCC3_SB max 597 mA


3VDUAL AVDD33_USB +3.3VALW_R 3VDUAL
VDDIO_33_S_[8:1] 59 mA
L26
60mils 470 mA G7 N18 59 mA 20mils R414 0R VDDIO_AZ_S
VDDAN_33_USB_S_1 VDDIO_33_S_1 26 mA
H8 VDDAN_33_USB_S_2 VDDIO_33_S_2 L19
220L2A-50 C728 C723 C725 J8 VDDAN_33_USB_S_3 VDDIO_33_S_3 M18 VDDXL_33_S 5 mA
K8 VDDAN_33_USB_S_4 VDDIO_33_S_4 V12 C524 C703 C717 C719

3.3V_S5 I/O
C22u6.3X50805-RH

C1u6.3X50402-HF

C1u6.3X50402-HF

K9 VDDAN_33_USB_S_5 VDDIO_33_S_5 V13 VDDAN_33_HWM_S 12 mA

C1u6.3X50402-HF

C1u6.3X50402-HF

C1u6.3X50402-HF

C1u6.3X50402-HF
M9 VDDAN_33_USB_S_6 VDDIO_33_S_6 Y12
M10 VDDAN_33_USB_S_7 VDDIO_33_S_7 Y13 VDDIO_GBE_S[2:1] GND
N9 VDDAN_33_USB_S_8 VDDIO_33_S_8 W11
N10 VDDIO_33_GBE_S GND
USB
VDDAN_33_USB_S_9
M12 VDDAN_33_USB_S_10
VDDXL_3.3V
AVDD11_USB N12 G24 5 mA 15mils VDDPL_33_USB_S
+1.1VDUAL
VDDAN_33_USB_S_11 VDDXL_33_S 14 mA
M11 VDDAN_33_USB_S_12
VDDCR_1.1V
20mils 20mils
VDDAN_33_USB_S_[12:1] 470 mA
B L27 220L2A-50 140 mA U12 VDDAN_11_USB_S_1 VDDCR_11_S_1 N20 272 mA B
U13 VDDAN_11_USB_S_2 VDDCR_11_S_2 M20
VDDPL_1.1V
VDDPL_33_SSUSB_S 11 mA
C545 C722 C721 C718 42 mA T12 VDDCR_11_USB_S_1 VDDPL_11_SYS_S J24 70 mA
C10u6.3X50805

T13 VDDCR_11_USB_S_2
VDDAN_3.3V_HWM
C0.1u10X0402

C0.1u10X0402
C2.2u6.3X50402-HF

+1.1VDUAL max 1230 mA


VDDAN_33_HWM_S M8 5 mA
282 mA P16 VDDIO_AZ 3VDUAL VDDCR_11_S_[2:1]
FCH_VDD_11_SSUSB_S
VDDAN_11_SSUSB_S_1 272 mA
M14 VDDAN_11_SSUSB_S_2
+1.1VDUAL N14 VDDAN_11_SSUSB_S_3 VDDIO_AZ_S AA4 26 mA 20mils R472 0R VDDCR_11_GBE_S[2:1] GND
P13 VDDAN_11_SSUSB_S_4
R467 0R0805 P14 VDDAN_11_SSUSB_S_5 VDDPL_11_SYS_S 70 mA
USB SS

C546 C729
424 mA N16 VDDCR_11_SSUSB_S_1 VDDAN_11_USB_S_[2:1] 140 mA

X_C0.1u10X0402

C1u6.3X50402-HF
N17 VDDCR_11_SSUSB_S_2
Hudson-2 design:Tie to GND (preferred)
C715 C576 C550 C714 C720 C710 C709 C716 P17 VDDCR_11_USB_S_[2:1]
VDDPL_33_SSUSB_S
VDDCR_11_SSUSB_S_3 42 mA
M17 VDDCR_11_SSUSB_S_4
C0.1u10X0402

C0.1u10X0402

C0.1u10X0402

C0.1u10X0402
C1u6.3X50402-HF

C1u6.3X50402-HF
C22u6.3X50805-RH

VDDAN_11_SSUSB_S_[5:1] Pankor
C2.2u6.3X50402-HF

VDDAN_11_SSUSB_S_[5:1] 282 mA
VDDCR_11_SSUSB_S_[4:1]
VDDCR_11_SSUSB_S_[4:1] 424 mA
POWER

OB1-7857001 ?

A A

MICRO-START INT'L CO.,LTD.


Title
MS-7857ci20313
Size Document Number Rev
Custom HUDSON POWER 10
Date: Monday, December 17, 2012 Sheet 19 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

D U30D LAYOUT: D
ROUTE THE POWER TRACES 15MILS WIDTH AT LEAST
HUDSON-2 PLACE THE DECOUPING CAPS CLOSE TO FCH ASAP
A3 VSS VSS T25 PLACE FB<=1" ,CAPS <=0.2"
Part 5 of 5
A33 VSS VSS T27
B7 VSS VSS U6
B13 VSS VSS U14 VCC3 FCH_VDDAN_33_DAC_R
D9 VSS VSS U17 VDDPL_3.3V VCC3 FCH_VDDPL_33_MLDAC VCC3
D13 VSS VSS U20 L21
E5 VSS VSS U21 L20 220L200mA-300-RH L23 220L200mA-300-RH
E12 VSS VSS U30
E16 VSS VSS U32 220L2A-50
E29 VSS VSS V11 C699 C698
F7 VSS VSS V16 C691 C470 C694

C0.1u10X0402
C2.2u6.3X50402-HF
F9 VSS VSS V18

C0.1u10X0402
C2.2u6.3X50402-HF

C2.2u6.3X50402-HF
F11 VSS VSS W4
F13 VSS VSS W6
F16 VSS VSS W25
F17 VSS VSS W28
F19 VSS VSS Y14
F23 VSS VSS Y16
F25 VSS VSS Y18
F29 VSS VSS AA6
G6 VSS VSS AA12
G16 VSS VSS AA13
G32 VSS VSS AA14
H12 VSS VSS AA16 +1.1VDUAL VDDCR_1.1V
H15 VSS VSS AA17 3VDUAL
C H29 VSS VSS AA25 3VDUAL FCH_VDDPL_33_SSUSB_S VDDXL_3.3V R356 0R C
J6 VSS VSS AA28
J9 VSS VSS AA30 L24 220L200mA-300-RH L22 220L200mA-300-RH
J10 AA32 C697 C481
GROUND

VSS VSS
J13 VSS VSS AB25

C1u6.3X50402-HF
C2.2u6.3X50402-HF
J28 VSS VSS AC6 C704 C689
J32 VSS VSS AC18
Pankor

C2.2u6.3X50402-HF

C2.2u6.3X50402-HF
K7 VSS VSS AC28
K16 VSS VSS AD27
K27 VSS VSS AE6
K28 VSS VSS AE15
L6 VSS VSS AE21
L12 VSS VSS AE28
L13 VSS VSS AF8
L15 VSS VSS AF12
L16 VSS VSS AF16
L21 VSS VSS AF33
M13 VSS VSS AG30
M16 VSS VSS AG32
M21 VSS VSS AH5 VCC3 VDDPL_3.3V_SATA
M25 VSS VSS AH11 3VDUAL
N6 VSS VSS AH18 FCH_VDDPL_33_USB_S VDDPL_3.3V_PCIE L42 220L200mA-300-RH
N11 VSS VSS AH19 VCC3
N13 VSS VSS AH21 L45 220L200mA-300-RH
N23 VSS VSS AH23 L41 220L200mA-300-RH C688
N24 VSS VSS AH25
For low current PLL, analog and IO power rails, a minimum

C2.2u6.3X50402-HF
P12 VSS VSS AH27 C726 C727
P18 VSS VSS AJ18 C687 trace width of 15 mils must be used, even if the formula
C1u6.3X50402-HF

above shows that a thinner trace is acceptable. The 15 mil


C2.2u6.3X50402-HF

B P20 VSS VSS AJ28 B


minimum trace width is required to minimize noise coupling;

C2.2u6.3X50402-HF
P21 VSS VSS AJ29
P31 VSS VSS AK21 if necessary, thinner trace can be used but not for more
P33 VSS VSS AK25 than 300 mils of trace length
R4 VSS VSS AL18
R11 VSS VSS AM21 It is recommended that each power supply or regulator
R25 VSS VSS AM25 on the motherboard be located within 3.0" of its respective
R28 VSS VSS AN1 load to minimize voltage drop and potential noise issues.
T11 VSS VSS AN18 To calculate the minimum power delivery trace width, use
T16 VSS VSS AN28 the formula: Vdroop = I*R, where R=老*L/A (老 = resistivity
T18 VSS VSS AN33 of
material, L = trace length, A = trace cross-sectional area).
N8 VSSAN_HWM VSSPL_DAC T21 Vdroop must be < 2.5% of the nominal power rail voltage
VSSAN_DAC L28 under maximum current conditions
K25 VSSXL VSSANQ_DAC K33
VSSIO_DAC N28
H25 VSSPL_SYS
3VDUAL VDDAN_3.3V_HWM
EFUSE R6 FCH_VDD11_RUN
D L25 220L200mA-300-RH
+12V R358 4.7KR0402 L43 X_220L200mA-300-RH
Pankor
FCH_VDD11_RUN VDDAN_11_CLK +1.1VDUAL VDDPL_1.1V C539 C534
OB1-7779001 ?
A
G

C0.1u10X0402
C2.2u6.3X50402-HF
Q58 L19 220L200mA-300-RH
S

Layout:
VSSPL_SYS;VSSAN_HWM CONNECT TO GND C466 C462 N-AO3400_SOT23-RH C
WITH A SEPREATED VIA C473
C0.1u10X0402

VDDPL_11_SYS_S should be tied


C2.2u6.3X50402-HF

L18 X_220L200mA-300-RH C693


to +1.1V_S5 rail if Wake on LAN
C2.2u6.3X50402-HF

A
B A
Pankor or USB 3.0 Wake (Hudson-D3
only) is supported; otherwise, it can C2.2u6.3X50402-HF
be tied to +1.1V_S0 rail.

MICRO-START INT'L CO.,LTD.


VDDPL_11_SYS_S Leakage Patch Title
Stuff A,C for Hudson D3 MS-7857
Stuff B,D for Hudson D2 Size
Custom
Document Number Rev
HUDSON GND 10
Date: Monday, December 17, 2012 Sheet 20 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

FCH REQUIRED STRAPS 3VDUAL 3VDUAL 3VDUAL 3VDUAL


VCC3 VCC3

R425 R475 R476 R346 R349 R352


10KR0402 10KR0402 X_10KR0402 X_10KR0402 10KR0402 X_2.2KR0402

16 RTC_CLK
D
16 PCI_CLK1 D
16 PCI_CLK3
16 PCI_CLK4
16 LPC_CLK0
16 LPC_CLK1

17 FCH_GPIO199

R426 R460 R436 R438 R347 R350


X_10KR0402 X_10KR0402 10KR0402 10KR0402 10KR0402 X_10KR0402 R353
2.2KR0402
MACH@All power must be removed after
changing S5_PLUS_MODE strap value.

RTCCLK PCI_CLK1 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 GPIO199

PULL
S5 PLUS MODE ALLOW PCIE USE DEBUG Reserved EC ENABLED INTERNAL CLOCK LPC ROM
HIGH
DISABLED GEN2 STRAPS GEN ENABLED
DEFAULT DEFAULT DEFAULT
PULL S5 PLUS MODE FORCE PCIE IGNORE Required setting EC DISABLED INTERNAL CLOCK
ENABLED GEN1 DEBUG for intergrated GEN DISABLED SPI ROM
LOW
STRAPS CLOCk MODE DEFAULT DEFAULT
C DEFAULT DEFAULT C

FCH DEBUG STRAPS FCH XOR CHAIN TEST

Provided test point access for lab use.


TP12
FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23] FANOUT0 18 FCH XOR CHAIN OUTPUT
TP14 AD27
AD27 16
TP13 AD26 TP5 FCH_25M_X1
AD26 16 FCH_25M_X1 16 FCH XOR CHAIN REF CLOCK
TP11 AD25 TP4 FCH_25M_X2
AD24 AD25 16 FCH_25M_X2 16
TP48
AD23 AD24 16
TP47
AD23 16
TP50 FCH_TEST0
FCH_TEST0 17 TEST2 TEST1 TEST0 Description
PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 TP51 FCH_TEST2 0 1 X Enable test mode
FCH_TEST2 17
Normal REFCLK USE DEFAULT DISABLE PCI
PULL USE PCI PLL RESERVED Termination PCIE STRAPS MEM BOOT
B
HIGH DEFAULT DEFAULT DEFAULT DEFAULT 3VDUAL
B
PULL Inverted REFCLK USE EEPROM ENABLE PCI
BYPASS PCI PLL RESERVED Termination XOR_TEST_X1
DOWN PCIE STRAPS MEM BOOT R499 X_2.2KR0402
FCH_TEST1 17

2
1
SHORTING PLUG

6.0
X_JUMP1X2A_RED-RH
XOR_TEST1
X_H1X2M_BLACK-RH
FCH ICE DEBUG /JTAG TEST PINS
FCH PCIE EEPROM STRAPS
TP18 FCH_TEST1FCH_JTAG_TMS
TP10 PREQ3# TP54 OC#0 FCH_JTAG_TRST#
PREQ3# 16 FCH_JTAG_TDI OC#0 17
TP9 PGNT#3 TP56 OC#1
PGNT#3 16 OC#1 17
TP17 OC#2 FCH_JTAG_TCK
OC#3 FCH_JTAG_TDO OC#2 17
TP55
OC#3 17

A A

MICRO-START INT'L CO.,LTD.


Title
MS-7857
Size Document Number Rev
Custom HUDSON STRAPS 10
Date: Monday, December 17, 2012 Sheet 21 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

VCC3
HDMI CONN,

C
R178 604R1%0402 DP0_TX0P_HDMI
R169 604R1%0402 DP0_TX0N_HDMI DP0_HPD_HDMI R94 10KR0402 B Q27
N-SST3904_SOT23
R191 604R1%0402 DP0_TX1P_HDMI

E
R195 604R1%0402 DP0_TX1N_HDMI VDD_VGA_HDMI VDD_VGA_HDMI VDD_VGA_HDMI
VCC3 R93 C76
HDMI_IMPEDANCE

100KR0402
DP0_HPD_HDMI_C 10

X_C0.1u16Y0402
D C66 C0.1u16Y0402 C65 C0.1u16Y0402 D

R81 R64 R90


2.2KR0402 2.2KR0402 1KR0402

1
8
U2 TCA9509DGKR_MSOP8-RH

VCCA
VCCB
DP0_AUXP_C 2 7 FB6 0R DP0_HDMI_CLK
10 DP0_AUXP_C A1 B1
R190 604R1%0402 DP0_TX2P_HDMI
R182 604R1%0402 DP0_TX2N_HDMI
DP0_AUXN_C 3 6 FB5 0R DP0_HDMI_DATA VDD_VGA_HDMI

GND
10 DP0_AUXN_C A2 B2
R196 604R1%0402 DP0_TXCP_HDMI

EN
R200 604R1%0402 DP0_TXCN_HDMI L02-2218023-T19
VCC5 VDD_VGA_HDMI R11-0000013-W08 stuff C75 X_C0.1u16Y0402

5
4
D

R65 10KR0402 DP0_HDMI_EN C55 C50


G Q38 C47 C0.1u16Y0402 X_C10p50N0402 X_C10p50N0402
N-2N7002ET1G_SOT23-3-HF
C154 I9B-9509D12-T07
S

5
U4
C0.1u16Y0402 DP0_HDMI_CLK 6 4 DP0_HPD_HDMI

DP0_HDMI_DATA 1 3

ESD-AOZ8902CIL-HF

2
D0G-0200529-A68

C C

DP CONOFIGERATION TABLE

VDD_VGA_HDMI INTERFACE DP PORT OF FM1


DP 3 2 1 0
HDMI ChannelClockCh 0 Ch 1 Ch 2
HDMI_1
SHELL1 21

5
L9 L8 U12 DP0_TX2P_HDMI 1 D2+
DP0_TX1N 1 4 DP0_TX1N_HDMI DP0_TX0P 1 4 DP0_TX2P_HDMI DP0_TXCN_HDMI 6 4 DP0_TX1N_HDMI 2
10 DP0_TX1N 10 DP0_TX0P D2 Shield
DP0_TX2N_HDMI 3 D2-
DP0_TX1P 2 3 DP0_TX1P_HDMI DP0_TX0N 2 3 DP0_TX2N_HDMI DP0_TXCP_HDMI 1 3 DP0_TX1P_HDMI DP0_TX1P_HDMI 4 D1+
10 DP0_TX1P 10 DP0_TX0N
5 D1 Shield
4P2R-0R0402-HE 4P2R-0R0402-HE ESD-AOZ8902CIL-HF DP0_TX1N_HDMI 6 D1-

2
DP0_TX0P_HDMI 7
R3C-0000012-W08 R3C-0000012-W08 D0G-0200529-A68 8
D0+
D0 Shield
DP0_TX0N_HDMI 9 D0- MEC1
DP0_TXCP_HDMI 10 CK+
CMC料號 :L12-9008104-I05 11 CK Shield
DP0_TXCN_HDMI 12
0 ohm料號 : R3C-0000012-W08 13
CK-
CE Remote
14 NC
VDD_VGA_HDMI DP0_HDMI_CLK 15
DP0_HDMI_DATA DDC CLK
VDD_VGA_HDMI 16 DDC DATA
17 GND
18 +5V
DP0_HPD_HDMI 19 HP DET

5
B L10 L7 U11 C77 C81 SHELL2 20 B
DP0_TX3N 1 4 DP0_TXCN_HDMI DP0_TX2P 1 4 DP0_TX0P_HDMI DP0_TX2P_HDMI 6 4 DP0_TX0P_HDMI
10 DP0_TX3N 10 DP0_TX2P

X_C10u10X50805-HF-2

C0.1u16Y0402
DP0_TX3P 2 3 DP0_TXCP_HDMI DP0_TX2N 2 3 DP0_TX0N_HDMI DP0_TX2N_HDMI 1 3 DP0_TX0N_HDMI CONN-HDMI19P_BLACK-RH-12
10 DP0_TX3P 10 DP0_TX2N
4P2R-0R0402-HE 4P2R-0R0402-HE ESD-AOZ8902CIL-HF N5I-19M0221-F02

2
R3C-0000012-W08 R3C-0000012-W08 D0G-0200529-A68

VCC5 VCC5

DP0_TX0P_HDMI DP0_TX1N_HDMI DP0_TX2P_HDMI DP0_TXCN_HDMI

C70 C100
R173 R192 R185 R198
X_C0.1u16Y0402

X_C0.1u16Y0402

180R0402-RH 180R0402-RH 180R0402-RH 180R0402-RH


DP0_TX0N_HDMI DP0_TX1P_HDMI DP0_TX2N_HDMI DP0_TXCP_HDMI

A A

MICRO-START INT'L CO.,LTD.


Title
MS-7857
Size Document Number Rev
Custom HDMI CONN. 10
Date: Monday, December 17, 2012 Sheet 22 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


8 7 6 5 4 3 2 1

VDD_VGA_HDMI
VGA CONNECTOR VDD_VGA_HDMI

C127 X_C0.1u16X0402
C92 X_C0.1u16X0402
R932-R934 CLOSE TO CRT CONNECTOR, THE
U10
ESD-AOZ8902CIL-HF U8

5
TRACE IMPEDANCE BETWEEN NB AND 150OHM ESD-AOZ8902CIL-HF

5
RESISTOR SHOULD BE 37OHM+/-15%, THE 6 4 RED_CONN
TRACE IMPEDANCE BETWEEN THE 2 150OHM VSYNC_CONN 6 4 DDCDATA_CONN
BLUE_CONN 1 3 GREEN_CONN
RESISTOR SHOULD BE 50 OHM +/-15%, PLACE ESD PROTECTION DIODES HSYNC_CONN 1 3 DDCCLK_CONN
D 1. CLOSE TO CONNECTOR PINS D
D0G-0200529-A68

2
THE IMPEDANCE BETWEEN THE 2ND RESISTOR 2. DIRECTLY ON SIGNAL TRACES
D0G-0200529-A68

2
TO THE CONNECTOR SHOULD BE 75OHM+/-15% 3. +5V & GND TRACE TO DIODE SHOULDBE
LESS THAN 100MILS AND 20MILS WIDE
Layout:PLACE L 90 DEGREE 4. THE ESD DIODE SHOULD BE THE FIRST DEVICE
FROM EACH OTHER FROM CONNECTOR
mach@The value of L,C refer to demo board,maybe adjusted for test L6 L5 CLOSE TO VGA Connector
VGA_R
18 HUDSON_VGA_R
10n300mA 10n300mA

R157 C131 C134 C130


150R1%0402 C3.3p50N0402 C3.3p50N0402 C10p50N0402

L4 L3
VGA_G
18 HUDSON_VGA_G
10n300mA 10n300mA

R146 C126 C128 C125


150R1%0402 C3.3p50N0402 C3.3p50N0402 C10p50N0402

L2 L1
VGA_B
18 HUDSON_VGA_B
C 10n300mA 10n300mA C
VDD_VGA_HDMI
R145 C122 C123 C121
150R1%0402 C3.3p50N0402 C3.3p50N0402 C10p50N0402

17
DDCCLK_5V R133 33R0402 DDCCLK_CONN 15 5
10
VSYNC_5V R108 27R0402 VSYNC_CONN 14 4
9
HSYNC_5V R134 27R0402 HSYNC_CONN 13 3 BLUE_CONN
8
DDCDATA_5V R107 33R0402 DDCDATA_CONN 12 2 GREEN_CONN
7
11 1 RED_CONN
C113 C103 C110 C93 6

X_C100p50N0402

X_C18p50N0402

X_C18p50N0402

X_C100p50N0402
VGA_1

16
VDD_VGA_HDMI DSUB-VGAF_BLUE-RH-18

VCC5
B N51-15F0801-K06 B

C105 C0.1u16Y0402 R141


X_2.2KR0402
5

1
4 HSYNC_5V
2 VDD_VGA_HDMI
18 HUDSON_VGA_HSYNC
U9 +12V R92 4.7KR0402
AHCT1G126GV_SOT23-5-RH C114 VDD_VGA_HDMI
3

Q26
T34-1G12609-N47 X_C10p50N0402
N-2N7002ET1G_SOT23-3-HF
FS1

G
1 2

S
VCC5

D
R104 R132
4.7KR0402 4.7KR0402 F-MICROSMD110F-RH C85 C86
D08-0100210-R02

X_C10u10X50805-HF-2

C0.1u16Y0402
VDD_VGA_HDMI R105 DDCDATA_5V
18 HUDSON_VGA_SDAT

VCC5 R140 DDCCLK_5V


18 HUDSON_VGA_SCLK
C91 C0.1u16Y0402 R109
X_2.2KR0402
5

1
4 VSYNC_5V
18 HUDSON_VGA_VSYNC 2
U7
A A
AHCT1G126GV_SOT23-5-RH
3

C104
T34-1G12609-N47 X_C10p50N0402

MICRO-START INT'L CO.,LTD.


Title
MS-7857
Size Document Number Rev
Custom VGA CONN. 10
Date: Monday, December 17, 2012 Sheet 23 of 37
8 7 6 5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

iSATA CONNECTOR Layout:For Gen 3.0,trace length within 2.5''


Multiple eSATA function

SATA1 SATA3

X2

X2
X2 X2

GND

GND
1 1

TX+

TX+
SATA_TX0+ C570 1 2 C0.01u16X0402 ST_TX0 2 SATA_TX2+ C568 1 2 C0.01u16X0402 ST_TX2 2
18 SATA_TX0+ 18 SATA_TX2+

TX- RX-

TX- RX-
SATA_TX0- C571 1 2 C0.01u16X0402 ST_TX#0 3 SATA_TX2- C569 1 2 C0.01u16X0402 ST_TX#2 3
18 SATA_TX0- 18 SATA_TX2-

GND

GND
4 4
D
18 SATA_RX0- SATA_RX0- C572 1 2 C0.01u16X0402 ST_RX#0 5 18 SATA_RX2- SATA_RX2- C574 1 2 C0.01u16X0402 ST_RX#2 5 D
SATA_RX0+ C573 1 ST_RX0 SATA_RX2+ C575 1 ST_RX2

RX+

RX+
18 SATA_RX0+ 2 C0.01u16X0402 6 18 SATA_RX2+ 2 C0.01u16X0402 6

GND

GND
7 7

X1

X1
X1 X1

SATA7PM_WHITE-ST-RH SATA7PM_WHITE-ST-RH
N5N-07M1881-L06 N5N-07M1881-L06
SATA2 SATA4

X2

X2
X2 X2

GND

GND
1 1

TX+

TX+
SATA_TX1+ C518 1 2 C0.01u16X0402 ST_TX1 2 SATA_TX3+ C522 1 2 C0.01u16X0402 ST_TX3 2
18 SATA_TX1+ 18 SATA_TX3+

TX- RX-

TX- RX-
SATA_TX1- C517 1 2 C0.01u16X0402 ST_TX#1 3 SATA_TX3- C521 1 2 C0.01u16X0402 ST_TX#3 3
18 SATA_TX1- 18 SATA_TX3-

GND

GND
4 4
SATA_RX1- C516 1 2 C0.01u16X0402 ST_RX#1 5 SATA_RX3- C520 1 2 C0.01u16X0402 ST_RX#3 5
18 SATA_RX1- 18 SATA_RX3-
SATA_RX1+ C515 1 ST_RX1 SATA_RX3+ C519 1 ST_RX3

RX+

RX+
18 SATA_RX1+ 2 C0.01u16X0402 6 18 SATA_RX3+ 2 C0.01u16X0402 6

GND

GND
7 7

X1

X1
X1 X1

SATA7PM_WHITE-ST-RH SATA7PM_WHITE-ST-RH
N5N-07M1881-L06 N5N-07M1881-L06
C C

PWM FAN CONTROL VCC5


CPU FAN
+12V
R45 0 to +3 V amplitude fan
tachometer input.
4.7KR0402

VCC5 VCC5 D1 1N4148W-F_SOD123-RH R27 27KR0402 CPUFAN_TAC 26


R19 4.7KR0402 C21 C0.1u16X0402
CPU_FAN1
R18 R9 100R0402 CPUFAN_PWM1 4 R28
R50 4.7KR0402 3 MEC1 10KR0402
4.7KR0402

2
D
G Q14 1
S N-2N7002ET1G_SOT23-3-HF C22
BH1X4B_WHITE-RH-2
D
CPUFAN_PWM C0.1u16Y0402
26 CPUFAN_PWM G

S
N32-1040731-H06
Q20
1

N-2N7002ET1G_SOT23-3-HF
+

EC3 CPUFAN_PWM1 C9 X_C0.1u16Y0402


CD100u16EL5-RH-1
2

B B

PS2 KEYBOARD & MOUSE CONNECTOR

SVCC2

SVCC2
R15
C36 X_C0.1u16Y0402 C6
2
4
6
8

C0.1u16Y0402 X_1KR1%0402
RN3
5

U1 8P4R-4.7KR
KBCLK_L KBDATA_L

16
17
6 4
1
3
5
7

KB_MS1
MSCLK_L 1 3 MSDATA_L 26 MSDATA MSDATA FB2 300L250mA-380_0402-RH MSDATA_L 7 10
8
ESD-AOZ8902CIL-HF 26 MSCLK MSCLK FB4 300L250mA-380_0402-RH MSCLK_L 11
2

12 9
D0G-0200529-A68 MS
26 KBDATA KBDATA FB1 300L250mA-380_0402-RH KBDATA_L 1 4
A A
2
26 KBCLK KBCLK FB3 300L250mA-380_0402-RH KBCLK_L 5
6 3
KB
C32 C23 C25 C24 CONN-KB_MS-RH
13
14
15

MICRO-START INT'L CO.,LTD.


C180p50N0402

C180p50N0402

C180p50N0402

C180p50N0402

Title
MS-7857
N56-12F0081-F02 Size Document Number Rev
Custom SATA/PS2/FAN 10
Date: Monday, December 17, 2012 Sheet 24 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

RTL8105E 10/100M LAN RTL8111E Giga LAN LANWAKE# R253 X_10KR0402


LAN1_VDD33

U22
Remove pull-up R if R existence on motherboard
17 PCIE interface 22 LAN_RXP C330 C0.1u16X0402 (or SB has internal pull-up R).
8 LAN_TXC_P HSIP HSOP LAN_RXC_P 8
18 23 LAN_RXN C326 C0.1u16X0402 LAN_RXC_N 8
8 LAN_TXC_N HSIN HSON
16 PE_LAN_CLK 19 25 PCIE_RST# 16,33
REFCLK_P PERSTB
16 PE_LAN_CLK# 20 16
REFCLK_N CLKREQB
VCC3 R257 1KR1%0402
D D
R256 15KR1%0402 LAN_ISOLATE# 26 1 TR_D0+
R258 X_R/2 LANWAKE# ISOLATEB PM Transceiver MDIP0 TR_D0-
17,26,33,34 PE_WAKE# 28
LANWAKEB
2 Near Lan Chip
Interface MDIN0
4 TR_D1+ RN6
MDIP1 TR_D1- TR_D0+ LAN1_TR_D0+
5 7 8
R245 2.49KR1%0402 LAN1_RSET MDIN1 TR_D0- LAN1_TR_D0-
46 5 6
RSET TR_D2+ TR_D1+ LAN1_TR_D1+
LAN1_VDD33 33 7 3 4
ENSWREG MDIP2 TR_D2- TR_D1- LAN1_TR_D1-
width>40mil MDIN2
8 1 2
Reserve ESD Protect
34 Regulator
LAN1_VDD33 VDDREG
35 10 TR_D3+ 8P4R-0R0402
VDDREG MDIP3 TR_D3-
MDIN3
11 GPO: R31-0000012-W08 NEAR CONNECTOR
C304 C306 LAN1_REGOUT 36
C0.1u16X0402 REGOUT 1: Link up
C4.7u6.3X50805
27 0: Link down LAN1_VDD33
DVDD33 POWER EEPROM LAN1_LINK100# RN8
39 40
DVDD33 LED0 LAN1_EESK TR_D2+ LAN1_TR_D2+ C219 X_C0.1u16X0402-RH-1
37 7 8
LED1/EESK LAN1_EECS R250 10KR0402 TR_D2- LAN1_TR_D2-
near pin <200mil LAN1_VDD33 42
AVDD33 EECS
30 5 6
47 32 LAN1_EEDI R247 10KR0402 TR_D3+ 3 4 LAN1_TR_D3+
AVDD33 EEDI LAN1_EEDO TR_D3- LAN1_TR_D3-
48 31 1 2
AVDD33 LED3/EEDO

5
12 D8
AVDD33 8P4R-0R0402 LAN1_TR_D0- 6 LAN1_TR_D1-
4
13 38 R246 1KR1%0402
LAN1_VDD10
29
DVDD10 GPO/SMBALERT LAN1_VDD33 R31-0000012-W08 LAN1_TR_D0+ 1 3 LAN1_TR_D1+
DVDD10
41
DVDD10 SMBCLK
14 8111E: stuff
R260 3 15 LAN1_SMB_DA R255 10KR0402 8105E: unstuff X_ESD-AOZ8902CIL-HF

2
AVDD10 SMBDATA
0R
45
D0G-0200529-A68
AVDD10 LAN1_CLK_LANI C268 C27p50N
C 6 43 C
AVDD10 CKXTAL1
9
AVDD10

2
CLOCK
GND
GND
LAN1_EVDD10 21 44 Y1 LAN1_VDD33
EVDD10 CKXTAL2
25MHZ18P_D-1

1
RTL8111E-VL-CG-RH LAN1_CLK_LANO C229 X_C0.1u16X0402-RH-1
24
49

C321 C323 C282 C27p50N


C1u6.3X50402-HF C0.1u16X0402 B06-081112C-R09
LAN Connector

5
D7
LAN1_VDD33 LAN1_TR_D2- 6 4 LAN1_TR_D3-

3.3v Power on rise time : 1~100ms. LAN1_VDD33 LAN1_TR_D2+ 1 3 LAN1_TR_D3+


For EMI
X_ESD-AOZ8902CIL-HF

2
Place near pin C212 C0.1u16X0402
MAX: 163mA LAN1_VDD33 D0G-0200529-A68
27 39 42 47 48 12 D6 2 1 X_ESD-MLVS0402M04-EM
3VDUAL 1 2 CP13 8111E: 200R
LAN1_GND/RCT USB_LAN1B
C314 C299 C297 C295 C294 C319 19 1pF 2pF
LAN1_EEDO LAN1_EEDO_ACT 19
1 2 CP12 R214 200R0402 20 D0G-0422003-P03 D0G-0200529-A68
20
C0.1u16X0402

C0.1u16X0402

C0.1u16X0402

C0.1u16X0402

C0.1u16X0402

C0.1u16X0402

LAN1_TCT 13
R213 LAN1_TR_D0+ PWR D0G-0422003-N47 D0G-0303309-C12
18
LAN1_TR_D0- TD1+
0R0402 12
LAN1_TR_D1+ TD1-
17
LAN1_TR_D1- TD2+
11
LAN1_TR_D2+ TD2-
16
LAN1_TR_D2- TD3+
B 8111E: stuff 8111E: 0R 10
TD3- B
8105E: unstuff LAN1_TR_D3+ 15
LAN1_TR_D3- TD4+
Place near pin 9
TD4- Giga-Lan 10/100-Lan
LAN1_GND/RCT 14
LAN1_EESK R225 200R0402 LAN1_LINK1000# GND
3 13 19 45 41 6 9 21
21
N58-22F0731-F02
LAN1_LINK100# 22 N58-22F0061-S42
LAN1_VDD10 22 N58-22F0731-S42
8111E: unstuff 8111E: 200R N58-22F0061-F02
8105E: stuff RJ45_USBX2_LEDX2_TX-GIGA-RH-5 N58-22F0731-I60
C302 C322 C308 C296 C298 C305 C309 Link Yellow Link Yellow
C0.1u16X0402 C0.1u16X0402 C0.1u16X0402 C0.1u16X0402 C0.1u16X0402 C0.1u16X0402 C0.1u16X0402 LAN1_TCT N58-22F0731-F02 Active Blinking Active Blinking
1000 Orange 100 Green
100 Green 10 None
C245 10 None
X_C0.01u16X0402 R14, R15, R17請 依 據 所 使 用 的 LAN connector上 的 LED亮 度 去 調 整 阻 值 19 19
8111E: stuff
8105E: unstuff
8105E POWER Consumption only support LED0+LED1/LED1+LED3 dual color LED 20 20
combinations when using EEPROM Yellow Yellow
3.3V mW
10 M Idle/TxRx 14/75 46/248 LAN1_EEDO_ACT
LAN1_LINK1000#
100 M Idle/TxRx 43/66 142/218 LAN1_LINK100#
width>60mil 21 Orange 21
2

2
S0 ALDPS 3.2 11 LAN1_VDD10
D5 D9 D10
CHOKE9
C210 C242 C246
22 Green 22
X_ESD-MLVS0402M04-EM

X_ESD-MLVS0402M04-EM

X_ESD-MLVS0402M04-EM
Green
C0.1u16X0402

C0.1u16X0402

C0.1u16X0402
8111E POWER Consumption LAN1_VDD10 1 2 LAN1_REGOUT
1

1
A A

3.3V mW
C300 C287
10 M Idle/TxRx 12/66 40/218 C0.1u16X0402 C10u6.3X50805CH-4.7u0.85A170mS-HF
X5R L04-47A7340-T04
100 M Idle/TxRx 31/44 102/145 OL4-7672004 MICRO-START INT'L CO.,LTD.
Giga Idle/TxRx 135/163 452/538 Title
near pin36 <200mil MS-7857
ALDPS 4 13
Size Document Number Rev
Custom LAN - RTL8111E 10
Date: Monday, December 17, 2012 Sheet 25 of 37
5 4 3 2 1

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5 4 3 2 1

Super I/O
VBAT

3VDUAL
Temperature Sensing
R396 Diode / Resistor SENSING CIRCUIT
LPC SUPER I/O F71808A 1MR0402

R496 COPEN#
Q65 10KR0402
LPC_AD[3..0] N-2N7002ET1G_SOT23-3-HF
16 LPC_AD[3..0]
U33 C528 close to PWM MOS

G
SIO_WAKE# X_C1000p16X0402
PE_WAKE# 17,25,33,34

S
D
A_RST# 2 53 MB_ID0
16 A_RST# LRESET# DCD#/SDA/GPIO00

LPC Interface
SERIRQ 3 54 MB_ID1 THERMD_VRM
D 16 SERIRQ SERIRQ RI#//OVT#GPIO01 D

UART Function
16 LPC_FRAME# LPC_FRAME# 4 55 MB_ID2

E
PCI_CLK_SIO LFRAM# CTS#/CIR_LED/GPIO02
9 56
16 PCI_CLK_SIO
16 SIO_48M_CLK
SIO_48M_CLK 10
PCICLK DTR#/CIRTX/GPIO03
57 STRAP_PWOK F71808A EUP Function C149 B Q39 FOR VRM
LPC_AD0 CLKIN RTS#/PWM/GPIO04 C2200p50X0402 P-PMBS3906_SOT23-RH
5 58
LPC_AD1 LAD0 DSR#/BEEP/GPIO05 STRAP4E_2E ATX_5VSB FCH HAS INTE-GRATED PU RESISTER
6 59
D02-0390619-P03

C
LPC_AD2 LAD1 SOUT/GPIO06/STRAP4E_2E TEMP_GND
7 60
LPC_AD3 LAD2 SIN/CIRWB#/GPIO07
8
LAD3 3VDUAL

Hardware Monitor,SPI Interface


SIO_WAKE# R463 10KR0402

CIRRX# 43 IO_PME# R487 X_10KR0402

KBC Function
COPEN# CIRRX#
44 12 KBRST# 17
VCCDDR_SIO COPEN# KBRST# USB_MODE1 R500 X_10KR0402 PSOUT# R415 X_10KR0402
45 13 A20GATE 17
VDDA_SIO VIN3(VDIMM) GA20 KBDATA
46
VIN2(VLDT) KDAT/GPIO10
14 KBDATA 24 close to SIO
VCORE_SIO 47 15 KBCLK USB_MODE2 R474 X_10KR0402 PWRBTN Check list pull up
VIN1(Vcore) KCLK/GPIO11 KBCLK 24
16 MSDATA MSDATA 24 THERM_SYS
SUS_ACK#/MDAT/GPIO12 MSCLK
24 CPUFAN_TAC 61 17 MSCLK 24
FANIN1(CPU) SUS_WARN#/MCLK/GPIO13/CIRWB#

E
24 CPUFAN_PWM 62
FANCTL1(CPU) C529 Q62 FOR SYSTEM
63 VOLTAGE SENSING(H/W Monitor) B
FANCTL2 64
FANIN2/GPIO35 VCC3 M/B ID C2200p50X0402 P-PMBS3906_SOT23-RH
FANCTL2/GPIO34
D02-0390619-P03

C
The best voltage input level is about 1V. TEMP_GND
18 IO_PME# IO_PME# 17 R442 X_2.2KR0402 MB_ID0
THERM_SYS GPIO20/PME# USB_MODE2 R448 X_2.2KR0402 MB_ID1
40 19
THERMD_VRM D2+ GPIO21/OVT#/FANIN3 USB_MODE1 R392 10KR1%0402 VCORE_SIO R461 X_2.2KR0402 MB_ID2
41 20 VCCP
D1+ GPIO22/PWM/ERP_CTRL1# SIO_WAKE#
42 21
VREF 5VA_PWOK#/GPIO23/WDTRST#/FANIN3 SUS_LED R393 X_47KR1%0402-HE
22 SUS_LED 35
GPIO24/LED_VSB PWR_LED R443 2.2KR0402 MB_ID0
23 PWR_LED 35
GPIO25/LED_VCC SYS5VSB_OFF C525 C0.1u16X0402 R449 2.2KR0402 MB_ID1
26
R422 0R0402 SIO_TSI_DAT ERP_CTRL0# SYS5VSB_OFF 27 R462 2.2KR0402 MB_ID2
C
10 APU_SID 51 C
R423 0R0402 SIO_TSI_CLK PECI/SDA/GPIO32 R380 10KR1%0402 VDDA_SIO
10 APU_SIC 52 CPU_VDD
SCL/GPIO33
R394 X_47KR1%0402-HE LPC Debug Port VCC3

C526 C0.1u16X0402 2 1 0 ROM TYPE


24 25 I_VSB3V I_VSB3V VCC_DDR R395 10KR1%0402 VCCDDR_SIO 0 0 0 defaul R548
R427 0R0402 SIO_FP_RST# S3_Gate# I_VSB3V
17,28,35 FP_RST# 27
RSTCON#/WDTRST#/GPIO26
0 0 1 Lenovo X_4.7KR0402
PCIRST_BUS1# 28 48 C527 C0.1u16X0402 0 1 0 Reserved
33 PCIRST_BUS1# PCIRST1# 3VSB 3VDUAL
PCIRST_BUS2# 29 0 1 1 Reserved 16 PCI_CLK_DEBUG R550 0R0402 FWH_INT#
PCIRST2#
ACPI Function

ATX_PWROK 35 38 VSB_5V
PWOK 5VSB
31
Power Pin

35 PSIN# PSIN#/GPIO27 3VDUAL


32 1 LPC_DEBUG1
17 PSOUT#
17,27,28 SLP_S3# 33
PSOUT#/GPIO14 3VCC VCC3 USB_MODE CONTROL 1 2
S3# ATX_5VSB A_RST# R549 22R0402 SIO_RST#
17,27,28 SLP_S5# 30 37 VBAT 3 4 VCC3
S5# VBAT LPC_AD0
35 ATX_PSON# 34 5 6
PSON# R473 10KR0402 R439 LPC_AD1
17 IO_RSMRST# 36 11 VCC5 7 8 VCC5
SIO_VCORE_EN RSMRST# GND TEMP_GND LPC_AD2
49 39 10KR0402 9
PSIN# PSON# pull high in page 33 SIO_VLDT_EN VCORE_EN/GPIO30 AGND(D-) R453 LPC_AD3
50 11 12
VLDT_EN/GPIO31
1
R452 C578 10KR0402 LPC_FRAME# 13 14
USB_FRONT 32
CP1 100KR0402 C1u10X
F71808A D
Q63
H2X7[10]M-2PITCH_BLACK-HF
N31-2071271-H06
2

X
G
F71808AU-LAB-RH S

N-2N7002ET1G_SOT23-3-HF
SIO_VLDT_EN R417 0R0402 Q64
CPU_VDDP_VDDR_EN 28 B02-7180834-F34

N-2N7002ET1G_SOT23-3-HF
D
D23 Z G
SIO_VCORE_EN R412 0R0402 S-BAT54C_SOT23
VCORE_EN_R 7,28 S

Y
B B

USB_MODE2
C537 C0.1u16X0402
3VDUAL
VCC3
C506 C0.1u16X0402 C531 C0.1u16X 3VDUAL
ATX_5VSB VBAT
C513 X_C100p50N0402
R397 10R0402 VSB_5V C530 C0.1u16X0402 ATX_5VSB
R399
VCC3 R421 4.7KR0402 PCIRST_BUS1# 4.7KR0402 VCC3 C591 C0.1u16X0402 R495
C588 C0.1u16X0402 10KR0402
R420 X_4.7KR0402 PCIRST_BUS2# C590 X_C0.1u16X0402-RH-1 VCC5 R494
ATX_PWROK 10KR0402
28 ATX_PWROK USB_REAR 32
VCC3
X

X
G
D21 S
Q69

N-2N7002ET1G_SOT23-3-HF
Z S-BAT54C_SOT23 R488 1KR0402 Q68
7,27,35 ATX_PWROK_5V

N-2N7002ET1G_SOT23-3-HF
STRAP4E_2E D25 Z G
D

R489 X_560R0402 S-BAT54C_SOT23 S


Y

R477 10KR0402

Y
R405 4.7KR0402 IO_RSMRST# 3VDUAL
3VDUAL LPC I/O STRAPPING RESISTOR STRAP_PWOK R478 X_560R0402
R407 4.7KR0402 PSOUT# USB_MODE1
Y

POWER-ON TRIP R497 1KR0402


R404 4.7KR0402 CIRRX# D22
3VDUAL
PCI_CLK_SIO C593 X_C22p50N0402 I_VSB3V Z X_S-BAT54C_SOT23 FANCTL2 R493 X_560R0402
A R413 X_4.7KR0402 SIO_VCORE_EN A
A_RST# C592 X_C0.1u16Y0402
C554

C555

R418 X_4.7KR0402 SIO_VLDT_EN


X

SIO_48M_CLK C594 X_C10p50N0402 PIN Function NET Name HI LO


R428 X_4.7KR0402 SIO_FP_RST#
X_C1u6.3X50402-HF

C0.1u16X0402

PSOUT# C536 X_C180p50N0402 59 Config 4E/2E SOUTA 4E 2E


57 STRAP_PWOK STRAP_PWOK PWOK (pin 35) for AMD PWOK (pin 35) for Intel MICRO-START INT'L CO.,LTD.
Title
MS-7857
Size Document Number Rev
Custom SUPER I/O 71808A 10
Date: Monday, December 17, 2012 Sheet 26 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

1.1VDUAL POWER [email protected] measurement:700mA


5VDIMM FOR DDR ATX_5VSB S0,S1,S3

ATX_5VSB

R71 510R0402 5VDIMM_5V ATX_5VSB R368 10R-1 C486 X_C0.1u16Y0402


VCC5
Q13
+1_1VDUAL

S
R67 10KR0402 R63 10R0402 P-P06P03LCGA_SOT89-3-HF 3VDUAL +1.1VDUAL
7,26,35 ATX_PWROK_5V

4
G 5VDIMM U31
C58 X_C0.1u16Y0402 C57 X_C0.1u16Y0402 5VDIMM 3 6

CNTL
VIN VOUT

D
5 C494
D 3VDUAL_POK 2 NC R371 D
R2

1
2
U3 EN X_C0.1u16Y0402 1KR1%0402
5 7 5VSBDRV1 C34 C0.018u16X0402-RH C493

5VCC
5VSB

GND
GND
17,26,28 SLP_S3# S3# 5VSB_DRV
6 C490 C492 1 7 C0.1u16X0402 C483
17,26,28 SLP_S5# S5# POK FB
C0.1u16X0402 C10u10X50805-HF-2 C10u10X50805-HF-2
ATX_5VSB Q22 UP0105PSW8_PSOP8-HF

8
9
N-P45N02LDG_TO252-RH C59
I31-0010502-U33

GND
D
R62 4.7KR0402 MODE 4 8 5VDRV1 R377

X_C0.1u16Y0402
G
MODE 5VCC_DRV
S R1 2.61KR1%0402
R78

3
X_0R0402 UP7501M8_SOT23-8-RH R88 C82
1.5KR-RH C0.022u50X
R84 Vo=0.8*(R1+R2)/R1
200KR1%0402 R375 10KR0402 Pd=( Vin - Vout] * Imax = (3.3 - 2.5) V * 0.75Amp = 0.6 W
3VDUAL
CRB: MODE Low support S0/S3 I32-0750109-U33 +12V
Hi support S0/S3/S5 VCC5
16 S5_CORE_EN
R378 X_0R0402 3VDUAL POWER
S0,S1,S3,S5,DEEP_S5 mach@Stuff when turn off VCC3_WAKE on S5 state
For special PSU sequence
5VDRV1_EN 32
Vout : 0.8 [( R593+R599))/R599 ] = 3.3 Volt
VCC3 ATX_5VSB Vout : 0.8 [( 10K+3.3K ) /3.3K ] = 3.22 Volt
VCC3
5VDIMM_5V R80 V OUT = 0.8x(R1+R2)/R1 (V)
56KR1%0402
R21 R44 ATX_5VSB
1KR0402 47KR0402
ATX_5VSB
C
D
S
5VDRV1 3VDUAL
3VDUAL C
G Q17 R342 10R0402 C465 C1u6.3X50402-HF G

S
D Q59
D
G C38 N-2N7002ET1G_SOT23-3-HF EC44 N-P45N02LDG_TO252-RH

4
S C0.1u16Y0402 CD470u16EL11.5-RH U29
Q12 VCC5 VCC3 2 1 3 6

CNTL
R26 EC70 close to ATX connector
+ VIN VOUT
4.99KR1%0402 N-2N7002ET1G_SOT23-3-HF 5 R2 R354
R357 200KR1%0402 NC C478
ATX_5VSB 2 10KR1%0402

1
EN EC48

+
C0.015u16X0402

1
EC37

GND
GND
1

1
EC2 EC58 EC41 3VDUAL_POK 1 R363 5VDRV1

CD1000u63EL11.5-RH
+

+
7

2
EC4 D POK FB 200KR1%0402

CD1000u63EL11.5-RH

CD1000u63EL11.5-RH
2

2
26 SYS5VSB_OFF G
Q60 UP0104PSU8_PSOP8-HF
CD1000u63EL11.5-RH

CD1000u63EL11.5-RH
X_CD1000u63EL11.5-RH
2

8
9
S
N-2N7002ET1G_SOT23-3-HF R1 R359
3.3KR1%0402
VCC3 VCC0 8REF VCC0_8REF
I31-0010402-U33
U26
C414 UP0111AMA5-00_SOT23-5-HF Pd=( Vin - Vout] * Imax = (5 - 2.5) V * 0.2 Amp = 0.5 W
C0.1u16X0402 1 5
VIN VOUT

CPU VDDA_25 POWER


GND

C409

3
FB

EN
C413

C412

R299 VCC0_8REF
0R0402 Layout:Route 50 mils AND 500 mils LONG
2

(USE 2x25 mil TRACES TO EXIT BALL FIELD)


[email protected] A
X_C0.1u16X0402

R303 10KR0402 +12V


B VCC3 B
C0.1u16X0402

X_C1u6.3X50402-HF

V0_8REF VCC3
R297
C406
C1u6.3X-HF
10KR0402 I71-LM35803-T07
I31-0111A09-U33 R294 U27B

8
X_100KR1%0402-RH LM358D_SOIC8
5 Q49
+ VDD_25_DRV D
7 G
6 S
- N-P3057LCG_SOT89-RH
DUAL POWER CONTROL VCC5_SB C408 R307

4
VCC5_SB C1u6.3X-HF X_1KR1%0402 R312
100KR0402
VDDA_25
C416
ATX_5VSB X_C2200p50X0402 VDDA_25
R2
1 +

ATX_5VSB
EC56 R304 2.15KR1%0402
CD100u16EL5-RH-1
2

1
R386 C411 X_C0.1u16X0402 C345

+
4.7KR0402 C503 EC33

X_C10u10X50805-HF-2
C1u16X5 CD100u16EL5-RH-1
S

2
R387 10KR R369 R301 V OUT = 0.8x(1K+2.15K)/1K=2.52 (V)
26 SYS5VSB_OFF G R1
X_0R 1KR1%0402
Q61
D

C508 P-P06P03LCG_SOT89-3-RH 3VDUAL Pd=( Vin - Vout] * Imax =( 3.3 - 2.5) V * 0.75 Amp = 0.6 W
C0.1u16X0402
A A

VCC5_SB
1 +

EC57 C532
X_CD100u16EL5-RH-1 C10u10X50805-HF-2
MICRO-START INT'L CO.,LTD.
2

Title
MS-7857
Size Document Number Rev
Custom ACPI UPI & SYS POWER 10
Date: Monday, December 17, 2012 Sheet 27 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

POWER EN & PWRGD LOGIC CIRCUIT DDR III 1.5V POWER 5VDIMM

1.5V@15A CHOKE3
CH-1.2u15A1.7m-RH-3
+12V +12V
5VDIMM_IN 1 2

X
C102 C101

1
DDR_EN D4 D3 C72

+
X_C0.1u16Y0402

C10u10X50805-HF-2
S-BAT54C_SOT23 Z S-BAT54C_SOT23 Z EC9 EC10

2
ATX_5VSB 5VDIMM 5VDIMM

CD470u6.3SO-RH

CD470u6.3SO-RH
D
1.02mA R199 Q28 X_C0.1u16Y0402

Y
D
R150 4.7KR0402 G Q34 2.2R0805 DDR_HG_R G
N-2N7002ET1G_SOT23-3-HF S
D D
N-P0903BD_TO252-3-HF

S
C135

X_C0.1u16Y0402
C150 C1u25X0805-RH VCC_DDR output 15A
R113 R123
1R0805 10KR1%0402 OCP:22.5A
C143 C0.1u10X0402 R183 3.09KR1%0402-RH VCC_DDR

5
U13 VCC_DDR
0.55mA 0.28mA C144 C470p16X0402-RH DDR_EN 7 1 DDR_BOOT R201 1R0805C152C0.22u25X0805 CHOKE5 CH-0.5u50A0.8m-HF

VCC
C

C
COMP/DIS BST DDR_HG
2
R172 4.7KR0402 B Q33 Q32 B R147 X_4.7KR0402 TG 8 DDR_PHASE 1 2
17,26,27 SLP_S5# ATX_PWROK 26 PHASE
Q35 Q29

GND
E

E
N-SST3904_SOT23

X_N-SST3904_SOT23
D D
DDR_FB 6 4 DDR_LG G G
FB BG

1
0.8 V R158

+
S S
NCP1587DR2G_SOIC8-RH 2.2R0805 C192 EC21 EC27 EC22 EC28

N-P0603BD_TO252-3-HF
X_N-P0603BD_TO252-3-HF
3
R202

C1u10X

2
11KR1%0402

CD1800u6.3EL20-RH-2

CD1800u6.3EL20-RH-2

CD1800u6.3EL20-RH-2

X_CD1800u6.3EL20-RH-2
R184
1.18KR1%0402 C133
VCC5_SB C2200p50X0402
R2 I32-0158703-O05
VCC5_SB R6
10KR0402
VCC_DDR TO VCORE_EN CONTROL C145 X_C0.01u16X0402 R170 X_1KR1%0402
R7 VCORE_EN_R
VCORE_EN_R 7,26
1.02mA X_4.7KR0402
D

R171 1KR1%0402 R174 56R0402


R52 G C10
X_4.7KR0402 X_C0.1u16Y0402 R1
C

V OUT =0.8 *(R1+R2) /R2


S

0.17mA B C11 0.8x(1.18+1)/1.18 (V)=1.48V R165 0R0402


10 VDDIOFB+
Q15
X_C0.1u16Y0402

X_N-SST3904_SOT23
E

R46 C31 Q6
X_4.7KR0402 X_C4.7u6.3X50805 X_N-2N7002ET1G_SOT23-3-HF

VCC3
C C
CHOKE10
CH-1.2u15A1.7m-RH-3

+12V 1 2

CPU_VDD POWER
C434 C453
1.2V@15A

1
C419

+
+12V

X_C0.1u16Y0402
S-BAT54C_SOT23 EC40 EC43

C10u10X50805-HF-2
D19

2
X_C0.1u16Y0402

CD470u6.3SO-RH

CD470u6.3SO-RH
R338 X Y Q55
D
2.2R0805 CPU_VDD_HG_RG
CPU_VDDP_VDDR_EN

Z
26 CPU_VDDP_VDDR_EN S
N-P0903BD_TO252-3-HF
D18 S-RB751V-40_SOD323-RH CPU_VDDP_VDDR_EN CPU_VDD output 15A
7 VRM_PWRGD
C463 C1u25X0805-RH
R314 R316 OCP:22.5A
1R0805 10KR1%0402
D17 X_S-RB751V-40_SOD323-RH NBCORE_EN C482 C0.1u10X0402 R355 3.09KR1%0402-RH

5
U28 CPU_VDD
C472 C470p16X0402-RH 7 1 CPU_VDD_BOOT
R362 1R0805C484C0.22u25X0805 CHOKE11 CH-0.5u50A0.8m-HF

VCC
COMP/DIS BST 2 CPU_VDD_HG
TG CPU_VDD_PHASE
8 1 2
PHASE
VCC3 Q56

GND
D
CPU_VDD_FB 6 4 CPU_VDD_LG G

1
FB BG R326

+
0.8 V S
NCP1587DR2G_SOIC8-RH N-P0603BD_TO252-3-HF 2.2R0805 C423 EC34 EC35 EC39

3
R348

C1u10X

2
R521 11KR1%0402
R351

CD820u2.5SO-RH-3

CD820u2.5SO-RH-3

CD820u2.5SO-RH-3
10KR0402
2KR1%0402 C442
D24 X_S-RB751V-40_SOD323-RH FCH_PWRGD_R
17,26,27 SLP_S3#
R2
I32-0158703-O05 C2200p50X0402

26 ATX_PWROK X
Z
17,26,35 FP_RST# Y
B B
D29 S-BAT54A_SOT23 C467 X_C0.01u16X0402 R340 X_1KR1%0402

R341 1KR1%0402 R334 56R0402


VCC5_SB
D

R486
0.585mA
8.2KR0402 SYS_PWRGD Q67
R1
G V OUT = 0.8x(1+2)/2 (V)=1.2V VDDP and VDDR support two separate
N-2N7002ET1G_SOT23-3-HF R335 0R0402 power planes with single regulator
10 VDDP_SENSE
S

C586 R333 0R0402


10 VDDR_SENSE
CPU_VDDP POWER CPU_VDDR POWER
X_C0.1u16Y0402

NB_VCC1P1
1.2 V@5A 1.2 V@5A
C

0.085
R484 4.7KR0402 B VDDR&VDDP IS COMBINED BY DEFAULT CPU_VDDP CPU_VDDR
Q66 VDDP_PWMONLY FOR NORMAL OPERATION(VDDR/VDDP COMBINED MODE) CPU_VDD CPU_VDDP CPU_VDD CPU_VDDR
N-SST3904_SOT23 VDDR_PWMIS FOR DEBUG/OC MODE (SEPERATE VDDR/VDDP)
E

R491 C583 R240 X_R0805 R243 X_R0805


X_10KR0402 C1u10X R241 X_R0805 R242 X_R0805

NB_VCC1P1 POWER VCC0_8REF


VTT_DDR POWER
1.1V@5A 0.75V@2A
+12V VTT_DDR VCC_DDR
CPU_VDD
VTT_DDR
R302
0.06mA 10KR0402 C320 X_C1000p50X0402 VCC5
I71-LM35803-T07
U27A
8

LM358D_SOIC8 R254 U23


NBCORE_EN 3 Q57 AVL:RDSON <28m ohm 1KR1%0402 1 8
+
1 NB_VCC1P1_DRV D
2 VIN NC3 7
G
VCC3 2 3 GND NC2 6
S
- N-P45N02LDG_TO252-RH REFIN VCNTL
4 5
Rise time ≒ 50-ms. C410 R313 9 VOUT NC1
4

GND

1
A C606 X_C0.1u16Y0402 Fall time ≒ 1-ms C1u6.3X-HF X_1KR1%0402 R328 C315 A

EC36
+

CD1000u63EL11.5-RH
Deasserted at least 80-ns before VDDCR_11 100KR0402 R259 C325 UP0109PSW8_PSOP8-HF
5

U38 NB_VCC1P1 I31-0109P02-U33

C1u10X
drops below 5% of its nominal value

1KR1%0402
2

C0.1u16Y0402
1 A
VCC
C417 NB_VCC1P1
4 R1 X_C2200p50X0402
Y FCH_PWRGD 17
FCH_PWRGD_R 2 B

GND R305 1KR1%0402


X_AHCT1G126GV_SOT23-5-RH
3

C415 X_C0.1u16X0402 C469 EC42 EC47


+

T34-1G12609-N47
2

MICRO-START INT'L CO.,LTD.


X_C10u10X50805-HF-2

CD1000u63EL11.5-RH

CD1000u63EL11.5-RH

R308 V OUT = 0.8x(R1+R2) /R2


2.7KR1%0402-HE R2 =0.8*(1.1k+2.7k) /2.7k Title
R513 33R0402 =1.125v MS-7857
Size Document Number Rev
Custom FCH CORE & DDR Power 10
Date: Monday, December 17, 2012 Sheet 28 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


8 7 6 5 4 3 2 1

VCC3
close PIN38 Close to Codec. close PIN38
EMI 6 Port Real Audio connector (option)
2 1CP15
AUDIO2A
C523 C514 C582 2 1CP14 3
C538 C577 C0.1u16X0402 C22u6.3X50805-RH X_C10u6.3X50805 LOUT_L R288 75R0402 LOUT_L_J 13 L
C10u6.3X50805 C0.1u16X0402 C596 X_C0.1u16X0402-RH-1

Green
12 LIN_OUT / LIN_IN
FRONT_JD R275 0R0402 FRONT_JD_J 11
C627 X_C0.1u16X0402-RH-1 LOUT_R R366 75R0402 LOUT_R_J 10 R
close PIN25

25
38
1
9
U32 C619 X_C0.1u16X0402-RH-1 AUDIOJACKX5_SPDIF-RH-8

2
N58-25F0161-K06

DVDD
DVDD-IO

LDO-OUT1
LDO-OUT2
47 36 LINE_OUT_R EC49 1+ 2 CD10u16EL5-RH-1 LOUT_R D16 D15
EPAD/SPDIF-IN FRONT-R LINE_OUT_L EC53 1+
35 2 CD10u16EL5-RH-1 LOUT_L R293 R289
FRONT-L

ESD-SFI0402ML080C-LF-HF

ESD-SFI0402ML080C-LF-HF
D SPDIFO1 48 22KR0402 22KR0402 D
SPDIF-OUT

1
5 41 SROUTR EC60 1+ 2 CD10u16EL5-RH-1 SROUT_R C459 X_C0.1u16X0402-RH-1
17 AZ_SDOUT SDATA-OUT SURR-R
R424 22R0402 AZSDIN0 8 39 SROUTL EC63 1+ 2 CD10u16EL5-RH-1 SROUT_L
17 AZ_SDIN SDATA-IN SURR-L C426 X_C0.1u16X0402-RH-1
17 AZ_SYNC 10
SYNC
17 AZ_RST# 11
RESET# CENOUT EC61 1+
43 2 CD10u16EL5-RH-1 CEN_OUT C407 X_C0.1u16X0402-RH-1
CENTER BASS EC64 1+
17 AZ_BIT_CLK 6 44 2 CD10u16EL5-RH-1 BAS_S
BCLK LFE

C552 X_C10p50N0402

C533 X_C10p50N0402

C549 C10p50N0402

17
46 SURR_BACK_R EC62 1+ 2 CD10u16EL5-RH-1 SURRBACK_R AUDIO2B
SIDE-R SURR_BACK_L EC65 1+
45 2 CD10u16EL5-RH-1 SURRBACK_L
FPAUD_PRESENCE# SIDE-L SURRBACK_L R514 75R0402 SURRBACK_L_J
2 9
C566 C10u6.3X50805 GPIO0/DMIC-CLK/SPDIF-OUT2 L
3 8 SIDESURR / LIN_OUT

Grey
REGREF
24 LINEIN_R EC54 1+ 2 X_CD10u16EL5-RH-1 LINE_IN_R
For 5+1 Port不上件 SURRBACK_JD R284 0R0402 SURRBACK_JD_J 7
SENSE_A LINE1-R LINEIN_L EC50 1+
13 23 2 X_CD10u16EL5-RH-1 LINE_IN_L For 3 Port上件 SURRBACK_R R504 75R0402 SURRBACK_R_J 6
SENSE_B Sense A LINE1-L R
34
Sense B AUDIOJACKX5_SPDIF-RH-8
15 LINE2_OUT_R EC45 1+ 2 CD100u16EL5-RH-1 LINE2_R
Close to Codec. MIC1_V_R 32
LINE2-R
14 LINE2_OUT_L EC46 1+ 2 CD100u16EL5-RH-1 LINE2_L C371 C372 N58-25F0161-K06
MIC1-VREFO-R LINE2-L

C470p16X0402-RH

C470p16X0402-RH
MIC2VREFO 30 R283 R285
MIC1_V_L MIC2-VREFO 22KR0402
28 22KR0402
SENSE_A R400 5.1KR1%0402 FRONT_JD MIC1-VREFO-L MIC1R EC51 1+
37 22 2 CD10u16EL5-RH-1 MIC1_R
R398 X_10KR1%0402LINE1_JD PIN37-VREFO MIC1-R MIC1L EC55 1+
LDOVDD 29 21 2 CD10u16EL5-RH-1 MIC1_L
R381 20KR1%0402 MIC1_JD LINE2_VREF LDO-IN MIC1-L
31
R384 39.2KR1%0402SURR_JD LINE2-VREFO
Close to Codec. 27

GPIO1/DMIC-DATA
VREF MIC2R C510 C4.7u6.3X50805 MIC2_R
33
Sense C MIC2-R
17 LIN_OUT CEN/BAS
40 16 MIC2L C511 C4.7u6.3X50805 MIC2_L
JDREF MIC2-L MIC1_V_L R445 2.2KR0402
C541

C535

R490 CD-R
20 TP53 A D
19 MIC1_V_R R464 2.2KR0402

16
TP16

AVSS1
AVSS2
CD-GND

DVSS
R480 5.1KR1%0402 SURRBACK_JD 12 18 AUDIO2C
BEEP CD-L TP15
X_C0.1u16X0402-RH-1

C10u6.3X50805

R481 10KR1%0402 CEN_JD SIDESURR SURR


20KR1%0402

R483 20KR1%0402 MIC2_JD MIC1_L R372 1KR0402 MIC1_L_J 5 L


SENSE_B R482 39.2KR1%0402LINE2_JD ALC887-VD2-CG-HF 4 LIN_IN /MIC_IN

Blue
4
7

26
42
C C
B E MIC1_JD 2
B05-LC88714-R09 MIC1_R R364 1KR0402 MIC1_R_J 1 R
LINE1_JD LIN_IN SPDIF_OUT AUDIOJACKX5_SPDIF-RH-8

2
For 5+1 Port不上件 R281 R282 D13 D14 N58-25F0161-K06
For 3 Port上件 C F 22KR0402 22KR0402

ESD-SFI0402ML080C-LF-HF

ESD-SFI0402ML080C-LF-HF
1

1
Azalia Front Audio Connector AUDIO CODE REGULATORS AUDIO2D
OPTION BOM Trace Width 30mils. CEN_OUT R503 75R0402 CEN_OUT_J
24
32 L

Orange
LDOVDD
LDOVDD 31 CEN/BAS
CEN_JD 30
For Medion BAS_S R515 75R0402 BAS_S_J 29 R
X VCC5_SB L33 AUDIOJACKX5_SPDIF-RH-8
Z MIC2VREFO
Y 220L200mA-300-RH N58-25F0161-K06
D27 R291 R290 C381 C380

C470p16X0402-RH

C470p16X0402-RH
S-BAT54ALT1G_SOT23-RH 22KR0402 22KR0402
C614 C615 D31 C558 C598
X C0.1u16X0402 C10u6.3X50805 C0.1u16X0402 C10u6.3X50805
Z LINE2_VREF X_Z-DFLT6V0A_SOD123-RH
Y
D28
2
4
6
8

RN19 S-BAT54ALT1G_SOT23-RH
8P4R-4.7KR0402
close L63
1
3
5
7

F_AUDIO1

33
B B
MIC2_L R523 75R0402 FMIC_L 1 2 AUDIO2E
MIC GND
MIC2_R R524 75R0402 MIC2RR R539 0R0402 M2C 3 4 F_PRESENCE# SROUT_L R516 75R0402 SROUT_L_J 28
MICPWR PRESENCE# L
27 SURR

Black
LINE2_R R527 75R0402 LINE2R R529 0R0402 L2C 5 6 MIC2_JD SURR_JD 26
FLINE OUTR LINE NEXT R SROUT_R R502 75R0402 SROUT_R_J 25
7
HPON
8 3 Port Real Audio connector (option) R
AUDIOJACKX5_SPDIF-RH-8

23
LINE2_L R525 75R0402 LINE2L 9 10 LINE2_JD
FLINE OUTL LINE NEXT L C373 C379 N58-25F0161-K06
D34 ESD-SFI0402ML080C-LF-HF

D35 ESD-SFI0402ML080C-LF-HF

D36 ESD-SFI0402ML080C-LF-HF

D37 ESD-SFI0402ML080C-LF-HF

C470p16X0402-RH

C470p16X0402-RH
H2X5[8]M_BLUE-RH-2 R286 R287
2

22KR0402 22KR0402
N31-2051491-H06 AUDIO1A
LINE_IN_R R373 X_75R0402 LOUT_R_J 10 15
LINE_IN_L R365 X_75R0402 LOUT_L_J 13
LINE1_JD R292 X_0R0402 FRONT_JD_J 11 14
1

12 16
3

LINE2R R538 22KR0402 X_JACK-AUDIOX3F_PK/GR/BU-RH-6


LINE2L R526 22KR0402 LIN_IN SPDIF OUT (REAR)
N54-13F0271-K06
OPTION AUDIO1B
LOUT_R R367 X_75R0402 SURRBACK_R_J 6
LOUT_L R374 X_75R0402 SURRBACK_L_J 9 LIN_OUT
FRONT_JD R274 X_0R0402 SURRBACK_JD_J 7 AUDIO2F
8 C353
For Lenovo VCC3
VCC5
C1u10X 21
20 DRIVE
TX

X_JACK-AUDIOX3F_PK/GR/BU-RH-6 SPDIFO1 R485 10R0402 SPDIFO1_R R492 0R SPDIFO1_C 19 IC SPDIF_OUT


N31-2071171-H06 MIC_IN
F_AUDIO_1 N54-13F0271-K06 EMI
LED
A A
1 2 R519 C581
FMIC_L 3 4 LINE2_JD X_10KR1%0402 C100p50N0402 AUDIOJACKX5_SPDIF-RH-8
MIC2RR 5 6 MIC2_JD AUDIO1C
7 8 MIC1_R_J 1
N58-25F0161-K06
LINE2R R528 X_0R0402 M2C 9 10 F_PRESENCE# MIC1_L_J 5 17
LINE2L R540 X_0R0402 L2C 11 12 MIC2_JD MIC1_JD 2 18
13 4

X_H2X7[14]M_ORANGE-RH C621
X_C0.1u16X0402-RH-1 X_JACK-AUDIOX3F_PK/GR/BU-RH-6
MICRO-START INT'L CO.,LTD.
Title
Analog Area Digital Area N54-13F0271-K06 MS-7857
Size Document Number Rev
Custom Azaliz - ALC887-VD2 10
Date: Monday, December 17, 2012 Sheet 29 of 37
8 7 6 5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


5 4 3 2 1

REAR PANEL USB CONNECTOR

FRONT USB PIN HEADER

NEAR USB CONNECTOR USB 2.0 trace length


D D
REAR side within 18'';
FRONT side within 6''
L46 L12-9008110-T34
1 4 SBD8+
17 USB8+
2 3 SBD8-
BOM Option 17 USB8-
MCZ1210AH900L2T
L56 L12-9008110-T34
L47
1 4 SBD0+
17 USB0+
1 4 SBD9+
17 USB9+
2 3 SBD0-
17 USB0-
SBD9-
MCZ1210AH900L2T SVCC6
Lenovo BOM 17 USB9- 2 3

MCZ1210AH900L2T SVCC2

L12-9008110-T34 C176
L57
1 4 SBD1+ F_USB_1
17 USB1+
1 2 X_C0.1u16Y0402
2 3 SBD1- 3 4 R_USB1
17 USB1-
5 6 9 11
MCZ1210AH900L2T 7 8
SVCC2 5
9 10 1 5
L12-9008110-T34 12 SBD8- 2 UP 6 SBD9-
SBD8+ 3 7 SBD9+
X_H2X6[11]M_YELLOW-RH U15 4 8
ESD-AOZ8902CIL-HF 1

5
10 12
N31-2061101-H06 SBD8- 6 4 SBD9- DOWN
USBAM_BLACK-RH-9
SBD8+ 1 3 SBD9+
SVCC6
N53-08M0291-F02

2
C SVCC6 C
U45 D0G-0200529-A68
ESD-AOZ8902CIL-HF
5

SBD0+ 6 4 SBD1+
F_USB1
SBD0- 1 3 SBD1- 1 2
SBD0- 3 4 SBD1-
SBD0+ 5 6 SBD1+
D0G-0200529-A68
2

7 8
10

H2X5[2]M_YELLOW-RH

N31-2051321-H06

SVCC5
Lenovo BOM

L58 L12-9008110-T34
1 4 SBD2+ F_USB_2
L48 L12-9008110-T34
17 USB2+
1 2 1 4 SBD4+
17 USB4+
2 3 SBD2- 3 4
B 17 USB2- B
5 6 2 3 SBD4- SVCC1
17 USB4-
MCZ1210AH900L2T 7 8 X_C0.1u16Y0402
9 10 MCZ1210AH900L2T C208
12
USB_LAN1A
L59
X_H2X6[11]M_YELLOW-RH 5 23
L49 PWR GND
1 4 SBD3+ SBD5- 6 24
17 USB3+ USB- GND
1 4 SBD5+ SBD5+ 7 25
2 3 SBD3- N31-2061101-H06 17 USB5+
8
USB+ GND
26
17 USB3-
2 3 SBD5-
GND UP GND
17 USB5-
MCZ1210AH900L2T 1 27
GND
MCZ1210AH900L2T SBD4- 2 PWR 28
L12-9008110-T34 SBD4+ 3
USB- GND
29
L12-9008110-T34 4 GND DOWN GND
USB+ GND
30

RJ45_USBX2_LEDX2_TX-GIGA-RH-5
SVCC5 SVCC5 SVCC1
N58-22F0731-F02
U42 U18
ESD-AOZ8902CIL-HF ESD-AOZ8902CIL-HF
5

5
F_USB2
SBD2+ 6 4 SBD3+ 1 2 SBD4- 6 4 SBD5+
SBD2- 3 4 SBD3-
SBD2- 1 3 SBD3- SBD2+ 5 6 SBD3+ SBD4+ 1 3 SBD5-
7 8
10
2

2
D0G-0200529-A68 H2X5[9]M_WHITE-RH D0G-0200529-A68
N31-2051461-H06

A A

MICRO-START INT'L CO.,LTD.


Title
MS-7857
Size Document Number Rev
C USB 2.0 CONN. 10
Date: Monday, December 17, 2012 Sheet 30 of 37
5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


E D C B A

USB 3.0 trace length


For Lenovo front USB3.0
Option BOM For Medion front USB3.0 Rear connector within 8''
U19
R441 X_300R0402 C563 X_C10p50N0402 R508 X_300R0402 C603 X_C10p50N0402 USB_SS_RX0N_R 1 USB_SS_RX0N_R
NC 10
USB_SS_RX0P_R 2 USB_SS_RX0P_R
NC 9
USB12- R379 X_0R0402 USB12-L USB12- R575 0R0402 USB12-M
17 USB12-
USB_SS_TX0N_R 4 7 USB_SS_TX0N_R
USB12+ USB12+L USB12+ USB12+M USB_SS_TX0P_R NC USB_SS_TX0P_R
R382 X_0R0402 R576 0R0402 5
17 USB12+ NC 6
ESD-PDY050003-2510-RH

8
R440 X_300R0402 C540 X_C10p50N0402 R507 X_300R0402 C605 X_C10p50N0402
D0G-03A0500-N52
USB13- R401 X_0R0402 USB13-L USB13- R584 0R0402 USB13-M
17 USB13-
4 4
USB13+ R402 X_0R0402 USB13+L USB13+ R583 0R0402 USB13+M
17 USB13+

L13 4P2R-0R0402-HE
C278 C0.1u10X0402 USB_SS_TX0N_C 1 4 USB_SS_TX0N_R
17 USB_SS_TX0N
USB_SS_TX2N R580 X_0R0402 USB_SS_TX2N_L USB_SS_TX2N R389 0R0402 USB_SS_TX2N_M C276 C0.1u10X0402 USB_SS_TX0P_C 2 3 USB_SS_TX0P_R
17 USB_SS_TX2N 17 USB_SS_TX0P
USB_SS_TX2P R581 X_0R0402 USB_SS_TX2P_L USB_SS_TX2P R388 0R0402 USB_SS_TX2P_M
17 USB_SS_TX2P
L14 4P2R-0R0402-HE
1 4 USB_SS_RX0N_R
17 USB_SS_RX0N
USB_SS_RX2N R578 X_0R0402 USB_SS_RX2N_L USB_SS_RX2N R391 0R0402 USB_SS_RX2N_M 2 3 USB_SS_RX0P_R
17 USB_SS_RX2N 17 USB_SS_RX0P
USB_SS_RX2P R579 X_0R0402 USB_SS_RX2P_L USB_SS_RX2P R390 0R0402 USB_SS_RX2P_M
17 USB_SS_RX2P

USB_SS_TX3N R588 X_0R0402 USB_SS_TX3N_L USB_SS_TX3N R408 0R0402 USB_SS_TX3N_M


17 USB_SS_TX3N
USB_SS_TX3P R587 X_0R0402 USB_SS_TX3P_L USB_SS_TX3P R409 0R0402 USB_SS_TX3P_M
17 USB_SS_TX3P

USB_SS_RX3N R586 X_0R0402 USB_SS_RX3N_L USB_SS_RX3N R410 0R0402 USB_SS_RX3N_M


17 USB_SS_RX3N
U20
USB_SS_RX3P R585 X_0R0402 USB_SS_RX3P_L USB_SS_RX3P R411 0R0402 USB_SS_RX3P_M USB_SS_TX1P_R 1 USB_SS_TX1P_R
17 USB_SS_RX3P NC 10
USB_SS_TX1N_R 2 USB_SS_TX1N_R
NC 9
U36 USB_SS_RX1P_R 4 7 USB_SS_RX1P_R
USB_SS_RX3P_LR USB_SS_RX3P_LR USB_SS_RX1N_R NC USB_SS_RX1N_R
1 NC 10 5 NC
6
USB_SS_RX3N_LR 2 USB_SS_RX3N_LR U43
NC 9
USB_SS_RX2N_MR 1 USB_SS_RX2N_MR ESD-PDY050003-2510-RH
NC 10

8
USB_SS_RX2P_LR 4 7 USB_SS_RX2P_LR USB_SS_RX2P_MR 2 USB_SS_RX2P_MR
NC NC 9 D0G-03A0500-N52
USB_SS_RX2N_LR 5 USB_SS_RX2N_LR
NC 6
USB_SS_TX2N_MR 4 7 USB_SS_TX2N_MR CMC料號 : L12-9008044-T34
X_ESD-PDY050003-2510-RH USB_SS_TX2P_MR NC USB_SS_TX2P_MR
5 6 0 ohm料號 : R3C-0000012-W08
3

8
NC
3 D0G-03A0500-N52 X_ESD-PDY050003-2510-RH 3

8
L31 X_4P2R-0R0402-HE
USB_SS_TX2P_L C564 X_C0.1u10X0402USB_SS_TX2P_LC 1 4 USB_SS_TX2P_LR D0G-03A0500-N52 L15 4P2R-0R0402-HE
L38 4P2R-0R0402-HE C293 C0.1u10X0402 USB_SS_TX1N_C 1 4 USB_SS_TX1N_R
17 USB_SS_TX1N
USB_SS_TX2N_L C565 X_C0.1u10X0402USB_SS_TX2N_LC 2 3 USB_SS_TX2N_LR USB_SS_TX2N_M C611 C0.1u10X0402 USB_SS_TX2N_MC 1 4 USB_SS_TX2N_MR
C290 C0.1u10X0402 USB_SS_TX1P_C 2 3 USB_SS_TX1P_R
17 USB_SS_TX1P
USB_SS_TX2P_M C610 C0.1u10X0402 USB_SS_TX2P_MC 2 3 USB_SS_TX2P_MR
L32 X_4P2R-0R0402-HE
USB_SS_RX2P_L 1 4 USB_SS_RX2P_LR L16 4P2R-0R0402-HE
L39 4P2R-0R0402-HE 1 4 USB_SS_RX1N_R
17 USB_SS_RX1N
USB_SS_RX2N_L 2 3 USB_SS_RX2N_LR USB_SS_RX2N_M 1 4 USB_SS_RX2N_MR
2 3 USB_SS_RX1P_R
17 USB_SS_RX1P
USB_SS_RX2P_M 2 3 USB_SS_RX2P_MR

U35
USB_SS_TX3N_LR 1 10 USB_SS_TX3N_LR
NC
USB_SS_TX3P_LR 2 9 USB_SS_TX3P_LR U44
NC
USB_SS_TX3P_MR 1 USB_SS_TX3P_MR
NC 10
USB_SS_TX2N_LR 4 7 USB_SS_TX2N_LR USB_SS_TX3N_MR 2 USB_SS_TX3N_MR
NC NC 9
USB_SS_TX2P_LR 5 6 USB_SS_TX2P_LR
NC USB_SS_RX3P_MR USB_SS_RX3P_MR
4 7
X_ESD-PDY050003-2510-RH USB_SS_RX3N_MR NC USB_SS_RX3N_MR SVCC4
5 NC 6
3

D0G-03A0500-N52 X_ESD-PDY050003-2510-RH
L12-9008110-T34

8
L29 X_4P2R-0R0402-HE
USB_SS_TX3P_L C559 X_C0.1u10X0402USB_SS_TX3P_LC 1 4 USB_SS_TX3P_LR D0G-03A0500-N52 L54

5
L36 4P2R-0R0402-HE 1 4 SBD10- U21
17 USB10-
USB_SS_TX3N_L C560 X_C0.1u10X0402USB_SS_TX3N_LC 2 3 USB_SS_TX3N_LR USB_SS_TX3N_M C609 C0.1u10X0402 USB_SS_TX3N_MC 1 4 USB_SS_TX3N_MR SBD10- 6 4 SBD11-
2 3 SBD10+
17 USB10+
USB_SS_TX3P_M C608 C0.1u10X0402 USB_SS_TX3P_MC 2 3 USB_SS_TX3P_MR SBD10+ 1 3 SBD11+
L30 X_4P2R-0R0402-HE MCZ1210AH900L2T
USB_SS_RX3P_L 1 4 USB_SS_RX3P_LR ESD-AOZ8902CIL-HF

2
L37 4P2R-0R0402-HE
USB_SS_RX3N_L 2 3 USB_SS_RX3N_LR USB_SS_RX3N_M 1 4 USB_SS_RX3N_MR
L55 D0G-0200529-A68
1 4 SBD11-
17 USB11-
USB_SS_RX3P_M 2 3 USB_SS_RX3P_MR
2 SBD11+ 2
17 USB11+ 2 3

MCZ1210AH900L2T
L12-9008110-T34
L12-9008110-T34
L50
USB13-L 1 4 SBD13-L SVCC10 L12-9008110-T34
L52
USB13+L 2 3 SBD13+L USB12-M 1 4 SBD12-M SVCC7

X_MCZ1210AH900L2T USB12+M 2 3 SBD12+M SVCC4

19

21
5

U34 SVCC3 R_USB30_1A R_USB30_1B


SBD13-L 6 4 SBD12-L MCZ1210AH900L2T

GND

GND
L51

5
U40 USB_SS_TX0P_R 9 USB_SS_TX1P_R 18
USB12+L SBD12+L SBD13+L SBD12+L SBD13-M SBD12-M SSTX2+ SSTX2+
1 4 1 3 L53 6 4 1 10
USB_SS_TX0N_R 8 VBUS2 USB_SS_TX1N_R 17 VBUS2
USB12-L 2 3 SBD12-L X_ESD-AOZ8902CIL-HF USB13+M 1 4 SBD13+M SBD13+M 1 3 SBD12+M SBD10- 2 SSTX2- SBD11- 11 SSTX2-
2

D2- D2-
4 13
X_MCZ1210AH900L2T D0G-0200529-A68 USB13-M 2 3 SBD13-M X_ESD-AOZ8902CIL-HF SBD10+ 3 GND SBD11+ 12 GND

2
USB_SS_RX0P_R D2+ USB_SS_RX1P_R D2+
L12-9008110-T34 MCZ1210AH900L2T
D0G-0200529-A68 6
7
SSRX2+
15
16
SSRX2+
USB_SS_RX0N_R 5 GND_D USB_SS_RX1N_R 14 GND_D
L12-9008110-T34

GND

GND
F_USB30_3 SSRX2- SSRX2-

USBAX2M_BLUE-RH-1 USBAX2M_BLUE-RH-1

20

22
X2
B18 X2 A18 N53-18M0021-F02
SVCC10 B17 RSVD RSVD A17 SVCC9 N53-18M0021-F02
RSVD RSVD
B16 A16
B15 RSVD RSVD A15
VBUS VBUS SVCC8 SVCC7
X1

X1
B14 A14
B13 VBUS VBUS A13 DATABAY FRONT_U3
B12 GND GND A12
GND

GND
GND GND USB_SS_TX2P_MR USB_SS_TX3P_MR
9 9
X1 1 SSTX2+ 1 SSTX2+
X1 USB_SS_TX2N_MR VBUS2 USB_SS_TX3N_MR VBUS2
B11 A11 8 8
USB_SS_RX3N_LR GND GND USB_SS_RX2N_LR SBD12-M SSTX2- SBD13-M SSTX2-
1 B10 A10 2 2 1
USB_SS_RX3P_LR STDA SSRX- STDA SSRX- USB_SS_RX2P_LR D2- D2-
B9 A9 4 4
STDA SSRX+ STDA SSRX+ SBD12+M GND SBD13+M GND
B8 A8 3 3
USB_SS_TX3N_LR GND GND USB_SS_TX2N_LR USB_SS_RX2P_MR D2+ USB_SS_RX3P_MR D2+
B7 A7 6 6
USB_SS_TX3P_LR B6 STDA SSTX- STDA SSTX- A6 USB_SS_TX2P_LR 7 SSRX2+ 7 SSRX2+
B5 STDA SSTX+ STDA SSTX+ A5 USB_SS_RX2N_MR 5 GND_D USB_SS_RX3N_MR 5 GND_D
GND

GND
SBD13+L B4 GND GND A4 SBD12+L SSRX2- SSRX2-
SBD13-L D+ D+ SBD12-L
B3 A3
B2 D- D- A2 USBM_BLUE-RH-4 USBM_BLUE-RH-4
X2

X2
B1 GND GND A1
RSVD RSVD
N53-09M0111-H06
MICRO-START INT'L CO.,LTD.
N53-09M0111-H06 Title
X_SLOT-PCI36P-2PITCH-RH-3
MS-7857
N11-0360201-F02 Size Document Number Rev
Custom USB 3.0 CONN. 10
Date: Monday, December 17, 2012 Sheet 31 of 37
E D C B A

PDF created with pdfFactory trial version www.pdffactory.com


8 7 6 5 4 3 2 1

Rear USB30 Power SVCC3 SVCC4


Option BOM
Front USB30 Power SVCC7 SVCC8(Medion) Front USB30 Power SVCC7 SVCC8(Lenovo)
VCC5 VCC5_SB

VCC5 VCC5_SB VCC5 VCC5_SB


SVCC3
SVCC3

1
2
U25 SVCC7 SVCC9
5 SVCC7 SVCC9

5VCC
5VSB
27 5VDRV1_EN S3#

1
2

1
2
D 6 7 U47 U37 D
OC# VOUT1
5 5

5VCC
5VSB

5VCC
5VSB
EC32 R264 C343 27 5VDRV1_EN S3# 27 5VDRV1_EN S3#
6 7 6 7
OC# VOUT1 OC# VOUT1
8

GND

1
VOUT2 EC66 R544 C631 EC59 R479 C589

CD1000u63EL11.5-RH
+
26 USB_REAR 4
EN

C0.1u16Y0402
8 8

GND

GND
1

1
VOUT2 VOUT2

X_680R0402-RH

X_CD1000u63EL11.5-RH
UP7536BMA8_SOT23-8-HF

CD1000u63EL11.5-RH
+

+
26 USB_FRONT 4 26 USB_FRONT 4
3

2
EN EN

X_C0.1u16Y0402
C0.1u16Y0402
X_680R0402-RH

X_680R0402-RH
UP7536BMA8_SOT23-8-HF X_UP7536BMA8_SOT23-8-HF

2
I36-7536B09-U33
I36-7536B09-U33 I36-7536B09-U33

VCC5 VCC5_SB VCC5 VCC5_SB VCC5 VCC5_SB

SVCC4 SVCC8 SVCC10


SVCC4 SVCC8 SVCC10
1
2

1
2

1
2
U24 U46 U49
5 5 5
5VCC
5VSB

5VCC
5VSB

5VCC
5VSB
27 5VDRV1_EN S3# 27 5VDRV1_EN S3# 27 5VDRV1_EN S3#
6 7 6 7 6 7
OC# VOUT1 OC# VOUT1 OC# VOUT1
EC31 R261 C329 EC71 R522 C628 EC70 R531 C618
C 8 8 8 C
GND

GND

GND
1

1
VOUT2 VOUT2 VOUT2

X_CD1000u63EL11.5-RH
CD1000u63EL11.5-RH

CD1000u63EL11.5-RH
+

+
26 USB_REAR 4 26 USB_FRONT 4 26 USB_FRONT 4
EN EN EN

X_C0.1u16Y0402
C0.1u16Y0402

C0.1u16Y0402
X_680R0402-RH

X_680R0402-RH

X_680R0402-RH
UP7536BMA8_SOT23-8-HF UP7536BMA8_SOT23-8-HF X_UP7536BMA8_SOT23-8-HF
3

2
I36-7536B09-U33
I36-7536B09-U33 I36-7536B09-U33

VCC5
Front USB20 Power SVCC5 SVCC6 Place close to UP7533 pin1
Rear USB20 Power SVCC1 SVCC2
VCC5 VCC5_SB
VCC5 VCC5_SB C636 C612 C168 C639 C339 C328 C205 C634

X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402
C0.1u16Y0402

C0.1u16Y0402
SVCC5
SVCC1 SVCC5

1
2
SVCC1 U48
1
2

U16 5

5VCC
5VSB
27 5VDRV1_EN S3#
5 6 7
5VCC
5VSB

27 5VDRV1_EN S3# OC# VOUT1


B 6 7 B
OC# VOUT1 EC68 R543 C629
EC25 R212 C209 8

GND

1
VOUT2

CD1000u63EL11.5-RH
+
8 4
GND

VOUT2 26 USB_FRONT EN
1

C0.1u16Y0402
CD1000u63EL11.5-RH
+

26 USB_REAR 4
EN

X_680R0402-RH
C0.1u16Y0402

UP7536BMA8_SOT23-8-HF

2
X_680R0402-RH

UP7536BMA8_SOT23-8-HF
3

I36-7536B09-U33
I36-7536B09-U33 VCC5_SB
Place close to UP7533 pin2

VCC5 VCC5_SB VCC5 VCC5_SB


C617 C200 C160 C334 C324 C638 C635 C637

X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402
SVCC2 SVCC6
SVCC2 SVCC6
1
2

1
2

U14 U39
5 5
5VCC
5VSB

5VCC
5VSB

27 5VDRV1_EN S3# 27 5VDRV1_EN S3#


6 7 6 7
OC# VOUT1 OC# VOUT1
EC19 R203 C159 EC67 R542 C613
8 8
GND

GND
1

VOUT2 VOUT2
CD1000u63EL11.5-RH

CD1000u63EL11.5-RH
+

26 USB_REAR 4 26 USB_FRONT 4
A EN EN A
C0.1u16Y0402

C0.1u16Y0402
X_680R0402-RH

X_680R0402-RH

UP7536BMA8_SOT23-8-HF UP7536BMA8_SOT23-8-HF
3

MICRO-START INT'L CO.,LTD.


Title
I36-7536B09-U33 I36-7536B09-U33 MS-7857
Size Document Number Rev
Custom FUSION 10
Date: Monday, December 17, 2012 Sheet 32 of 37
8 7 6 5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


8 7 6 5 4 3 2 1

PCI Express Slot x16


VCC3

PCI EXPRESS x16 Slot


R278 X_4.7KR0402 PE_JTAG_TDI
+12V
R279 X_4.7KR0402 PE_JTAG_TMS +12V PCIEX16_1
X2
R277 X_4.7KR0402 PE_JTAG_TCK X2
B1 A1
12V#B1 PRSNT1#
B2 A2
D R280 X_4.7KR0402 PE_JTAG_TRST# 12V#B2 12V D
B3 A3
RSVD#B3 12V#A3
B4 A4
SCLK1 GND#B4 GND PE_JTAG_TCK
17,34 SCLK1 B5 A5
SDATA1 SMCLK JTAG2 PE_JTAG_TDI
17,34 SDATA1 B6 A6
SMDAT JTAG3
B7 A7
GND#B7 JTAG4 PE_JTAG_TMS
VCC3 B8 A8
PE_JTAG_TRST# 3.3V#B8 JTAG5
B9 A9 VCC3
JTAG1 3.3V
3VDUAL B10 A10
PE_WAKE# 3.3VAUX 3.3V#A10 PCIE_RST_R# R315 0R0402 PCIE_RST_R# C424 X_C0.1u16Y0402
17,25,26,34 PE_WAKE# B11 A11 PCIE_RST# 16,25
WAKE# PWRGD R318 X_0R0402
PCIRST_BUS1# 26
B12 A12
RSVD#B12 GND#A12 PE16_GXF_CLK
B13 A13 PE16_GXF_CLK 16
GFX_TXC_15P GND#B13 REFCLK+ PE16_GXF_CLK#
8 GFX_TXC_15P B14 A14 PE16_GXF_CLK# 16
GFX_TXC_15N HSOP0 REFCLK-
8 GFX_TXC_15N B15 A15
HSON0 GND#A15 GFX_RX15P
B16 A16 GFX_RX15P 8
GND#B16 HSIP0 GFX_RX15N
B17 A17 GFX_RX15N 8
PRSNT2# HSIN0
B18 A18
GND#B18 GND#A18

GFX_TXC_14P B19 A19


8 GFX_TXC_14P HSOP1 RSVD
GFX_TXC_14N B20 A20
8 GFX_TXC_14N HSON1 GND#A20 GFX_RX14P
B21 A21 GFX_RX14P 8
GND#B21 HSIP1 GFX_RX14N
B22 A22 GFX_RX14N 8
GFX_TXC_13P GND#B22 HSIN1
8 GFX_TXC_13P B23 A23
GFX_TXC_13N HSOP2 GND#A23
8 GFX_TXC_13N B24 A24
HSON2 GND#A24 GFX_RX13P
B25 A25 GFX_RX13P 8
GND#B25 HSIP2 GFX_RX13N
B26 A26 GFX_RX13N 8
GFX_TXC_12P GND#B26 HSIN2
C
8 GFX_TXC_12P B27 A27 C
GFX_TXC_12N HSOP3 GND#A27
8 GFX_TXC_12N B28 A28
HSON3 GND#A28 GFX_RX12P
B29 A29 GFX_RX12P 8
GND#B29 HSIP3 GFX_RX12N
B30 A30 GFX_RX12N 8
RSVD#B30 HSIN3
B31 A31
PRSNT2##B31 GND#A31
B32 A32
GND#B32 RSVD#A32

GFX_TXC_11P B33 A33


8 GFX_TXC_11P GFX_TXC_11N HSOP4 RSVD#A33
8 GFX_TXC_11N B34 A34
HSON4 GND#A34 GFX_RX11P
B35 A35 GFX_RX11P 8
GND#B35 HSIP4 GFX_RX11N
B36 A36 GFX_RX11N 8
GFX_TXC_10P GND#B36 HSIN4
8 GFX_TXC_10P B37 A37
GFX_TXC_10N HSOP5 GND#A37
8 GFX_TXC_10N B38 A38
HSON5 GND#A38 GFX_RX10P
B39 A39 GFX_RX10P 8
GND#B39 HSIP5 GFX_RX10N
B40 A40 GFX_RX10N 8
GFX_TXC_9P GND#B40 HSIN5
8 GFX_TXC_9P B41 A41
GFX_TXC_9N HSOP6 GND#A41
8 GFX_TXC_9N B42 A42
HSON6 GND#A42 GFX_RX9P
B43 A43 GFX_RX9P 8
GND#B43 HSIP6 GFX_RX9N
B44 A44 GFX_RX9N 8
GFX_TXC_8P GND#B44 HSIN6
8 GFX_TXC_8P B45
HSOP7 GND#A45
A45 Placement Close To PCIE16_X1
GFX_TXC_8N B46 A46
8 GFX_TXC_8N HSON7 GND#A46
B47 A47 GFX_RX8P
GND#B47 HSIP7 GFX_RX8P 8
B48 A48 GFX_RX8N
PRSNT2##B48 HSIN7 GFX_RX8N 8
B49 A49
GND#B49 GND#A49 +12V +12V +12V VCC3 3VDUAL

GFX_TXC_7P B50 A50


8 GFX_TXC_7P GFX_TXC_7N HSOP8 RSVD#A50
B 8 GFX_TXC_7N B51 A51 B

1
HSON8 GND#A51 GFX_RX7P EC38 EC52 C395 C400 C401 C396 C421 C422

+
B52 A52 GFX_RX7P 8
GND#B52 HSIP8 GFX_RX7N
B53 A53 GFX_RX7N 8
GND#B53 HSIN8

X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402
GFX_TXC_6P

X_CD470u16EL11.5-RH

C0.1u16Y0402

C0.1u16Y0402

C0.1u16Y0402
CD470u16EL11.5-RH
B54 A54

2
8 GFX_TXC_6P HSOP9 GND#A54
GFX_TXC_6N B55 A55
8 GFX_TXC_6N HSON9 GND#A55
B56 A56 GFX_RX6P
GND#B56 HSIP9 GFX_RX6N GFX_RX6P 8
B57 A57 GFX_RX6N 8
GFX_TXC_5P GND#B57 HSIN9
8 GFX_TXC_5P B58 A58
GFX_TXC_5N HSOP10 GND#A58
8 GFX_TXC_5N B59 A59
HSON10 GND#A59 GFX_RX5P
B60 A60 GFX_RX5P 8
GND#B60 HSIP10 GFX_RX5N
B61 A61 GFX_RX5N 8
GFX_TXC_4P GND#B61 HSIN10
8 GFX_TXC_4P B62 A62
GFX_TXC_4N HSOP11 GND#A62
8 GFX_TXC_4N B63 A63
HSON11 GND#A63 GFX_RX4P
B64 A64 GFX_RX4P 8
GND#B64 HSIP11 GFX_RX4N
B65 A65 GFX_RX4N 8
GFX_TXC_3P GND#B65 HSIN11
8 GFX_TXC_3P B66 A66
GFX_TXC_3N HSOP12 GND#A66
8 GFX_TXC_3N B67 A67
HSON12 GND#A67 GFX_RX3P
B68 A68 GFX_RX3P 8
GND#B68 HSIP12 GFX_RX3N
B69 A69 GFX_RX3N 8
GFX_TXC_2P GND#B69 HSIN12
8 GFX_TXC_2P B70 A70
GFX_TXC_2N HSOP13 GND#A70
8 GFX_TXC_2N B71 A71
HSON13 GND#A71 GFX_RX2P
B72 A72 GFX_RX2P 8
GND#B72 HSIP13 GFX_RX2N
B73 A73 GFX_RX2N 8
GFX_TXC_1P GND#B73 HSIN13
8 GFX_TXC_1P B74 A74
GFX_TXC_1N HSOP14 GND#A74
8 GFX_TXC_1N B75 A75
HSON14 GND#A75 GFX_RX1P
B76 A76 GFX_RX1P 8
GND#B76 HSIP14 GFX_RX1N
B77 A77 GFX_RX1N 8
GFX_TXC_0P GND#B77 HSIN14
8 GFX_TXC_0P B78 A78
GFX_TXC_0N HSOP15 GND#A78
8 GFX_TXC_0N B79 A79
A HSON15 GND#A79 GFX_RX0P A
B80 A80 GFX_RX0P 8
GND#B80 HSIP15 GFX_RX0N
B81 A81 GFX_RX0N 8
PRSNT2##B81 HSIN15
B82 A82
RSVD#B82 GND#A82
X1
X1
SLOT-PCI164P_BLACK-2PITCH-RH-16 MICRO-START INT'L CO.,LTD.
Title
N11-1640551-K06 MS-7857ci20313
Size Document Number Rev
Custom PCIE X16 SLOT 10
Date: Monday, December 17, 2012 Sheet 33 of 37
8 7 6 5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


8 7 6 5 4 3 2 1

D PCI EXPRESS X1 Slot-2 D

PCI EXPRESS X1 Slot-3


3VDUAL +12V PCIEX1_1 +12V PCIE_RST2# C477 X_C0.1u16Y0402

VCC3 3VDUAL +12V PCIEX1_2 +12V


B1 A1
12V PRSNT1_# VCC3
B2 A2
12V#B2 12V#A2
B3 A3 B1 A1
RSVD 12V#A3 12V PRSNT1_#
B4 A4 B2 A2
SCLK1 GND GND#A4 VCC3 12V#B2 12V#A2
B5 A5 B3 A3
SDATA1 SMCLK JTAG2 RSVD 12V#A3
B6 A6 B4 A4
SMDATA JTAG3 SCLK1 GND GND#A4 VCC3
B7 A7 17,33 SCLK1 B5 A5
GND#B7 JTAG4 SDATA1 SMCLK JTAG2
B8 A8 17,33 SDATA1 B6 A6
3.3V JTAG5 SMDATA JTAG3
B9 A9 B7 A7
JTAG1 3.3V#A9 GND#B7 JTAG4
B10 A10 B8 A8
PE_WAKE# 3.3VAUX 3.3V#A10 PCIE_RST2# 3.3V JTAG5
B11 A11 B9 A9
WAKE_# PWRGD JTAG1 3.3V#A9
X1 B10 A10
X1 PE_WAKE# 3.3VAUX 3.3V#A10 PCIE_RST2#
17,25,26,33 PE_WAKE# B11 A11 PCIE_RST2# 17
WAKE_# PWRGD
B12 A12 X1
RSVD#B12 GND#A12 X1 EMI reserve
B13 A13 PE1_GPP_CLK1 16
GND#B13 REFCLK+
16 GPP_TXC_1P B14 A14 PE1_GPP_CLK1# 16 B12 A12
HSOP0+ REFCLK- RSVD#B12 GND#A12
16 GPP_TXC_1N B15 A15 B13 A13 PE1_GPP_CLK2 16
HSOP0- GND#A15 GND#B13 REFCLK+
B16 A16 GPP_RX1P 16 16 GPP_TXC_2P B14 A14 PE1_GPP_CLK2# 16

2
GND#B16 HSIP0+ HSOP0+ REFCLK-
B17 A17 GPP_RX1N 16 16 GPP_TXC_2N B15 A15
PRSNT2_# HSIP0- HSOP0- GND#A15 D20
B18 A18 B16 A16 GPP_RX2P 16
GND#B18 GND#A18 GND#B16 HSIP0+
X2 B17 A17 GPP_RX2N 16
X2 PRSNT2_# HSIP0-

X_ESD-SFI0603ML080C-LF-RH
B18 A18
GND#B18 GND#A18
C X2 C

1
X2

SLOT-PCI36P_BLACK-2PITCH-RH-10
N11-0360281-K06 SLOT-PCI36P_BLACK-2PITCH-RH-10
N11-0360281-K06

+12V
Place close to Pin A3,B3

C450 C474 C544 C502 C449 C501

X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402
C0.1u16Y0402

VCC3
B B

C475 C496 C451 C495 C420 C543


X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402

X_C0.1u16Y0402
C0.1u16Y0402

3VDUAL

C542 C452 C476


X_C0.1u16Y0402

X_C0.1u16Y0402
C0.1u16Y0402

A A

MICRO-START INT'L CO.,LTD.


Title
MS-7857
Size Document Number Rev
Custom FUSION 10
Date: Monday, December 17, 2012 Sheet 34 of 37
8 7 6 5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


8 7 6 5 4 3 2 1

ATX_5VSB
ATX CONNECTOR VCC3 RN9 VCC5 RN1
VCC5_SB X_8P4R-10R X_8P4R-10R
ATX_5VSB VCC3
C0.1u16Y0402 1 2 1 2
C340

25
3 4 3 4
5 6 5 6
13 1 7 8 7 8

25
VCC3 3.3V 3.3V VCC3 dischage R4
R406 14 2 VCC5_SB X_1KR0402
4.7KR0402 -12V 3.3V C336 RN10 RN2
15 3 C0.1u16Y0402 VCC5 X_8P4R-10R X_8P4R-10R
GND GND
1 2 1 2
D 16 4 VCC5 3 4 3 4 D
26 ATX_PSON# P_ON 5V VCC5
5 6 5 6
17 5 7 8 7 8
C312 GND GND C288
18 6 C0.1u16Y0402
X_C1000p50X0402 GND 5V R232 Q51
19 7 4.7KR0402 X_N-2N7002ET1G_SOT23-3-HF Q4
GND GND X_N-2N7002ET1G_SOT23-3-HF
D
20 8 VCC5_SB R276 X_1KR0402
-5V POK ATX_PWROK_5V 7,26,27 G
D
S VCC5_SB R17 X_1KR0402 G

VCC5 21 9 C261
ATX_5VSB S

2
5V 5VSB C1000p50X0402
22 10 D11
5V +12V +12V
C307 Q50

X_ESD-SFI0603ML080C-LF-RH
23 11 C227 C243 X_N-SST3904_SOT23 Q3

C
C0.1u16Y0402 5V +12V X_N-SST3904_SOT23

C
1
24 12 C0.1u16Y0402 VCC_DDR R273 X_1KR0402 B
GND 3.3V C0.1u16Y0402 R16 X_1KR0402
VCCP B
C356

E
ATX_POWER1 C12

E
VCC3
PWRCONN24P_WHITE-1 X_C0.1u16Y0402
C223 X_C0.1u16Y0402
N93-24M0131-H06
C0.1u16Y0402

C C

Front Panel Connector


POWER LED ATX_5VSB

Option BOM
R535
3VDUAL 300R
Medion Lenovo
R532 X_300R PWRLED
3VDUAL 3VDUAL F_PANEL2

C
VCC5
SATA_LED# 2 1 HDD+ R530 X_4.7KR0402 B C625
HDD- HDD+ 26 PWR_LED
Y X

X_C0.1u16Y0402
4 3 Q71

E
D30 R517 VCC5 SPK+ GNDL X_N-SST3904_SOT23
Z

X_BAV99LT1_SOT23 330R F_PANEL1 6 5 PWRLED


R501 NC1 SLED2
X_4.7KR0402 HDD+ 1 2 PWRLED 8 7 SUSLED
HDD+ PLED NC2 PLED1
B B
SATA_LED# 3 4 SUSLED SPK1 10 9 PWRSW+
18 SATA_LED# HDD- SLED SPK- PWSW+
5 6 PWRSW+ FP_RST# 12 11 R534 X_300R
RESET- PWSW+ RESET PWSW-
FP_RST# 7 8 14 NC 13 ATX_5VSB
17,26,28 FP_RST# RESET+ PWSW- GNDR
9 X_H2X7[13]M_BLACK-RH
C604 C597 NC
X_C4.7u6.3X50805 N31-2071111-H06
C0.1u16Y0402 H2X5[10]M_BLACK-RH R541
X_300R
N31-2051331-H06 3VDUAL

R537 1KR0402 SUSLED

C
R536 1KR0402 B C626
26 SUS_LED

X_C0.1u16Y0402
VCC5
POWER BUTTON For EMI Q72

E
HDD+ N-SST3904_SOT23

D33
X_1N4148W-F_SOD123-RH C616
ATX_5VSB ATX_5VSB X_C0.1u16Y0402
RN17 X_BAV99LT1_SOT23
1 2 VCC5 D26
BUZZER 3 4 BUZZER1 Y X For EMI
5 6 1 R506 SATA_LED#
A SPK1 A
7 8 2 4.7KR0402
Z

0.26mA
C

8P4R-390R0402-HE BUZZER PWRSW+ R505 100R0402 C632


PSIN# 26
R512 10KR0402 B Q70 X_C0.1u16Y0402
17 SPKR D09-0100111-A57
1

C623 Near Super I/O


X_C0.1u16Y0402 C600 C601
MICRO-START INT'L CO.,LTD.
E

N-SST3904_SOT23 X_C0.1u16Y0402 C0.01u16X0402


2

Title
MS-7857
Size Document Number Rev
Custom ATX & Front Panel 10
Date: Monday, December 17, 2012 Sheet 35 of 37
8 7 6 5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com


8 7 6 5 4 3 2 1

BIOS_LABEL Pangkor L10 LAN


HEAT SINK PCB
U902
Symbol ValueMSIP/N
RTL8111E-VB-GR-RHB06-081110C-R09金製程
AMI BIOS HUDSON
U30_X1
D2 RTL8111E-VL-CG-RHB06-081112C-R09銅製程
Label
XX1
XX1 HDMI Logo X_AMD-218-0755064-A13-RH BARCODE1
CODEC
D HDMI Royalty U909
PCB ALC887-VD-GR-RHB05-LC88704-R09金製程 D

Y01-RHDMI03-000 ALC887-VD2-CG-HFB05-LC88714-R09銅製程
ALC662 外部條碼
GD1-BC00038-F32
ALC892-GR-RHB05-LC89204-R09金製程
Label1 X_ALC662-VC1-GR-C1-RH ALC892-CG-RHB05-LC89214-R09 銅製程
HDMI Logo BARCODE2
XX2
XX2 PCB ALC662-VC1-GR-C1-RHB09-LC66234-R09金製程
HDMI Sticker
HEATSINK-14 ALC662-CG-RHB05-LC66204-R09銅製程
G51-M1SPX33-Q13 質保貼紙
E31-0404831-K08
GD1-BC00201-F32

U912
MANUAL PART CPU RM
Hudson-D3
75R

PROCESSOR1 X_75R0402
AVL:
D06-0100161-F52 U913 AMD-218-0755111-A14-RH-3
D06-0100101-K26
C
0R B01-21807S5-A08 C

BAT1_X1
BAT-BCR2032P-RH E95-0000003-H06
E95-0000003-H06 X_0R0402

PCB1
8

9
1

9
1
Rubber1 Rubber2 MH1 MH2
7 2 7 2
PCB PCB
P30-0785710-G37 6 3 6 3
P30-0785710-G37 rubber1/2 rubber1/2
X_MH001 X_MH001
5

4
Optics Orientation Holes
8

9
1

9
1

FM3 FM2 MH3 MH4


B 7 2 7 2 B

X_FM120 X_FM120
Simulation 6 3 6 3

FM6 FM5 X_MH001 X_MH001


5

X_JS2
X_FM120 X_FM120 VCC5
SIM1
FM8 FM1
X_PIN1*2
8

9
1

9
1

MH6 MH5
X_FM120 X_FM120 X_JS1 7 2 7 2

FM4 FM7 SIM2 6 3 6 3

X_PIN1*2
X_MH001 X_MH001
5

X_FM120 X_FM120

A A

MICRO-START INT'L CO.,LTD.


Title
MS-7857
Size Document Number Rev
Custom Auto BOM manual 10
Date: Monday, December 17, 2012 Sheet 36 of 37
8 7 6 5 4 3 2 1

PDF created with pdfFactory trial version www.pdffactory.com

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