POWER TRANSISTORS

Power transistors are devices that have controlled turn-on and turn-off characteristics.
These devices are used a switching devices and are operated in the saturation region resulting in
low on-state voltage drop. They are turned on when a current signal is given to base or control
terminal. The transistor remains on so long as the control signal is present. The switching speed
of modern transistors is much higher than that of thyristors and are used extensively in dc-dc and
dc-ac converters. However their voltage and current ratings are lower than those of thyristors
and are therefore used in low to medium power applications.
Power transistors are classified as follows
● Bipolar junction transistors(BJTs)
● Metal-oxide semiconductor filed-effect transistors(MOSFETs)
● Static Induction transistors(SITs)
● Insulated-gate bipolar transistors(IGBTs)
BIPOLAR JUNCTION TRANSISTORS
The need for a large blocking voltage in the off state and a high current carrying capability in the
on state means that a power BJT must have substantially different structure than its small signal
equivalent. The modified structure leads to significant differences in the I-V characteristics and
switching behavior between power transistors and its logic level counterpart.
POWER TRANSISTOR STRUCTURE
If we recall the structure of conventional transistor we see a thin p-layer is sandwiched between
two n-layers or vice versa to form a three terminal device with the terminals named as Emitter,
Base and Collector.
The structure of a power transistor is as shown below

Fig. 1: Structure of Power Transistor

A power transistor is a vertically oriented four layer structure of alternating p-type and n-type.
The vertical structure is preferred because it maximizes the cross sectional area and through
which the current in the device is flowing. This also minimizes on-state resistance and thus
power dissipation in the transistor.
The doping of emitter layer and collector layer is quite large typically 10 19 cm-3. A special layer
called the collector drift region (n-) has a light doping level of 1014.

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The thickness of the drift region determines the breakdown voltage of the transistor. The base
thickness is made as small as possible in order to have good amplification capabilities, however
if the base thickness is small the breakdown voltage capability of the transistor is compromised.
Practical power transistors have their emitters and bases interleaved as narrow fingers as shown.
The purpose of this arrangement is to reduce the effects of current crowding. This multiple
emitter layout also reduces parasitic ohmic resistance in the base current path which reduces
power dissipation in the transistor.
STEADY STATE CHARACTERISTICS
Figure 2(a) shows the circuit to obtain the steady state characteristics. Fig 2(b) shows the input
characteristics of the transistor which is a plot of versus . Fig 2(c) shows the output
characteristics of the transistor which is a plot versus . The characteristics shown are that
for a signal level transistor.
The power transistor has steady state characteristics almost similar to signal level transistors
except that the V-I characteristics has a region of quasi saturation as shown by figure 3.

Fig. 2: Characteristics of NPN Transistors

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 Fig. 3: Characteristics of NPN Power Transistors
There are four regions clearly shown: Cutoff region, Active region, quasi saturation and hard
saturation. The cutoff region is the area where base current is almost zero. Hence no collector
current flows and transistor is off. In the quasi saturation and hard saturation, the base drive is
applied and transistor is said to be on. Hence collector current flows depending upon the load.
The power BJT is never operated in the active region (i.e. as an amplifier) it is always operated
between cutoff and saturation. The is the maximum collector to emitter voltage that can be
sustained when BJT is carrying substantial collector current. The is the maximum
collector to emitter breakdown voltage that can be sustained when base current is zero and
is the collector base breakdown voltage when the emitter is open circuited.
The primary breakdown shown takes place because of avalanche breakdown of collector base
junction. Large power dissipation normally leads to primary breakdown.
The second breakdown shown is due to localized thermal runaway.
TRANSFER CHARACTERISTICS

Fig.4: Transfer Characteristics

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TRANSISTOR AS A SWITCH
The transistor is used as a switch therefore it is used only between saturation and cutoff. From
fig. 4 we can write the following equations

Fig. 5: Transistor Switch

Equation (1) shows that as long as the CBJ is reverse biased and transistor is in active
region, The maximum collector current in the active region, which can be obtained by setting
and is given as

If the base current is increased above increases, the collector current increases and
falls below . This continues until the CBJ is forward biased with of about 0.4 to 0.5V, the
transistor than goes into saturation. The transistor saturation may be defined as the point above
which any increase in the base current does not increase the collector current significantly.
In saturation, the collector current remains almost constant. If the collector emitter voltage is

the collector current is

4
Normally the circuit is designed so that is higher that . The ratio of to is called to
overdrive factor ODF.

The ratio of to is called as forced .

The total power loss in the two functions is

A high value of ODF cannot reduce the CE voltage significantly. However increases due to
increased base current resulting in increased power loss. Once the transistor is saturated, the CE
voltage is not reduced in relation to increase in base current. However the power is increased at a
high value of ODF, the transistor may be damaged due to thermal runaway. On the other hand if

the transistor is under driven it may operate in active region, increases resulting in
increased power loss.
SWITCHING CHARACTERISTICS
A forward biased p-n junction exhibits two parallel capacitances; a depletion layer capacitance
and a diffusion capacitance. On the other hand, a reverse biased p-n junction has only depletion
capacitance. Under steady state the capacitances do not play any role. However under transient
conditions, they influence turn-on and turn-off behavior of the transistor.
TRANSIENT MODEL OF BJT

Fig. 6: Transient Model of BJT

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 Fig.7: Switching Times of BJT
Due to internal capacitances, the transistor does not turn on instantly. As the voltage V B rises
from zero to V1 and the base current rises to I B1, the collector current does not respond
immediately. There is a delay known as delay time t d, before any collector current flows. The
delay is due to the time required to charge up the BEJ to the forward bias voltage V BE(0.7V). The
collector current rises to the steady value of ICS and this time is called rise time tr.
The base current is normally more than that required to saturate the transistor. As a result excess
minority carrier charge is stored in the base region. The higher the ODF, the greater is the
amount of extra charge stored in the base. This extra charge which is called the saturating charge
is proportional to the excess base drive.
This extra charge which is called the saturating charge, is proportional to the excess base drive
and the corresponding current Ie.

Saturating charge where is known as the storage time constant.

When the input voltage is reversed from V1 to -V2, the reverse current –IB2 helps to discharge the
base. Without –IB2 the saturating charge has to be removed entirely due to recombination and the
storage time ts would be longer.
Once the extra charge is removed, BEJ charges to the input voltage –V 2 and the base current falls
to zero. tf depends on the time constant which is determined by the reverse biased BEJ
capacitance.

PERFORMANCE PARAMETERS

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DC gain : Gain is dependent on temperature. A high gain would reduce the
values of forced .

: A low value of will reduce the on-state losses. is a function of the collector
circuit, base current, current gain and junction temperature. A small value of forced β decreases
the value of .

: A low value of will decrease the power loss in the base emitter junction.
increases with collector current and forced β.

Turn-on time : The turn-on time can be decreased by increasing the base drive for a fixed
value of collector current. is dependent on input capacitance does not change significantly
with . However tr increases with increase in .

Turn off time : The storage time ts is dependent on over drive factor and does not change
significantly with IC. tf is a function of capacitance and increases with I C. can be reduced
by providing negative base drive during turn-off. is less sensitive to negative base drive.

Cross-over : The crossover time is defined as the interval during which the collector
voltage rises from 10% of its peak off state value and collector current. falls to 10% of its
on-state value. is a function of collector current negative base drive.
Switching Limits
SECOND BREAKDOWN
It is a destructive phenomenon that results from the current flow to a small portion of the
base, producing localized hot spots. If the energy in these hot spots is sufficient the excessive
localized heating may damage the transistor. Thus secondary breakdown is caused by a localized
thermal runaway. The SB occurs at certain combinations of voltage, current and time. Since time
is involved, the secondary breakdown is basically an energy dependent phenomenon.
FORWARD BIASED SAFE OPERATING AREA ,FBSOA
During turn-on and on-state conditions, the average junction temperature and second
breakdown limit the power handling capability of a transistor. The manufacturer usually provide
the FBSOA curves under specified test conditions. FBSOA indicates the limits of the
transistor and for reliable operation the transistor must not be subjected to greater power
dissipation than that shown by the FBSOA curve.

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 Fig. 8: FBSOA of Power BJT
The dc FBSOA is shown as shaded area and the expansion of the area for pulsed operation of the
BJT with shorter switching times which leads to larger FBSOA. The second break down
boundary represents the maximum permissible combinations of voltage and current without
getting into the region of plane where second breakdown may occur. The final portion of
the boundary of the FBSOA is breakdown voltage limit .
REVERSE BIASED SAFE OPERATING AREA RBSOA
During turn-off, a high current and high voltage must be sustained by the transistor, in
most cases with the base-emitter junction reverse biased. The collector emitter voltage must be
held to a safe level at or below a specified value of collector current. The manufacturer provide
limits during reverse-biased turn off as reverse biased safe area (RBSOA).

Fig. 9: RBSOA of a Power BJT

The area encompassed by the RBSOA is somewhat larger than FBSOA because of the extension
of the area of higher voltages than upto at low collector currents. This operation of
the transistor up to higher voltage is possible because the combination of low collector current
and reverse base current has made the beta so small that break down voltage rises towards
.
POWER DERATING
The thermal equivalent is shown. If the total average power loss is ,

The case temperature is .

The sink temperature is

The ambient temperature is and

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 : Thermal resistance from junction to case .

: Thermal resistance from case to sink .

: Thermal resistance from sink to ambient .

The maximum power dissipation in is specified at .

Fig. 10: Thermal Equivalent Circuit of Transistor

BREAK DOWN VOLTAGES

A break down voltage is defined as the absolute maximum voltage between two terminals with
the third terminal open, shorted or biased in either forward or reverse direction.
VCEV(VCEX): The maximum voltage between the collector and emitter that can be sustained
across the transistor when it is carrying substantial collector current.
VCEO: The maximum voltage between the collector and emitter terminal with base open
circuited.
VEBO: This is the collector to base break down voltage when emitter is open circuited.

BASE DRIVE CONTROL

This is required to optimize the base drive of transistor. Optimization is required to increase
switching speeds. can be reduced by allowing base current peaking during turn-on,

resulting in low forces β at the beginning. After turn on, can be

increased to a sufficiently high value to maintain the transistor in quasi-saturation region. can
be reduced by reversing base current and allowing base current peaking during turn off since
increasing decreases storage time.
A typical waveform for base current is shown.

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 Fig. 11: Base Drive Current Waveform
Some common types of optimizing base drive of transistor are
● Turn-on Control.
● Turn-off Control.
● Proportional Base Control.
● Antisaturation Control

TURN-ON CONTROL

Fig. 12: Base current peaking during turn-on

When input voltage is turned on, the base current is limited by resistor and therefore initial

value of base current is , .

Capacitor voltage .

Therefore

Once input voltage becomes zero, the base-emitter junction is reverse biased and C 1
discharges through R2. The discharging time constant is . To allow sufficient charging
and discharging time, the width of base pulse must be and off period of the pulse must be

.The maximum switching frequency is .

TURN-OFF CONTROL

If the input voltage is changed to during turn-off the capacitor voltage is added to as
reverse voltage across the transistor. There will be base current peaking during turn off. As the
capacitor discharges, the reverse voltage will be reduced to a steady state value, . If

different turn-on and turn-off characteristics are required, a turn-off circuit using
may be added. The diode isolates the forward base drive circuit from the reverse base drive
circuit during turn off.

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 Fig: 13. Base current peaking during turn-on and turn-off

PROPORTIONAL BASE CONTROL

This type of control has advantages over the constant drive circuit. If the collector current
changes due to change in load demand, the base drive current is changed in proportion to
collector current.

When switch is turned on a pulse current of short duration would flow through the base of
transistor and is turned on into saturation. Once the collector current starts to flow, a
corresponding base current is induced due to transformer action. The transistor would latch on

itself and can be turned off. The turns ratio is . For proper operation of the
circuit, the magnetizing current which must be much smaller than the collector current should be
as small as possible. The switch can be implemented by a small signal transistor and
additional arrangement is necessary to discharge capacitor and reset the transformer core
during turn-off of the power transistor.

Fig. 14: Proportional base drive circuit

ANTISATURATION CONTROL

Fig: 15: Collector Clamping Circuit

If a transistor is driven hard, the storage time which is proportional to the base current increases
and the switching speed is reduced. The storage time can be reduced by operating the transistor

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in soft saturation rather than hard saturation. This can be accomplished by clamping CE voltage

to a pre-determined level and the collector current is given by .

Where is the clamping voltage and .

The base current which is adequate to drive the transistor hard, can be found from

and the corresponding collector current is .

Writing the loop equation for the input base circuit,

Similarly

Therefore

For clamping

Therefore
This means that the CE voltage is raised above saturation level and there are no excess carriers in
the base and storage time is reduced.

The load current is and the collector current with

clamping is

For clamping, and this can be accomplished by connecting two or more diodes
in place of . The load resistance should satisfy the condition ,

.
The clamping action thus results a reduced collector current and almost elimination of the
storage time. At the same time, a fast turn-on is accomplished.

However, due to increased , the on-state power dissipation in the transistor is

increased, whereas the switching power loss is decreased.
ADVANTAGES OF BJT’S
● BJT’s have high switching frequencies since their turn-on and turn-off time are low.
● The turn-on losses of a BJT are small.
● BJT has controlled turn-on and turn-off characteristics since base drive control is
possible.
● BJT does not require commutation circuits.
DEMERITS OF BJT
● Drive circuit of BJT is complex.
● It has the problem of charge storage which sets a limit on switching frequencies.
It cannot be used in parallel operation due to problems of negative temperature coefficient.

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POWER MOSFETS
INTRODUCTION TO FET’S
FET’s use field effect for their operation. FET is manufactured by diffusing two areas of p-type
into the n-type semiconductor as shown. Each p-region is connected to a gate terminal; the gate
is a p-region while source and drain are n-region. Since it is similar to two diodes one is a gate
source diode and the other is a gate drain diode.

Fig:1: Schematic symbol of JFET Fig. 2: Structure of FET with biasing

In BJT’s we forward bias the B-E diode but in a JFET, we always reverse bias the gate-source
diode. Since only a small reverse current can exist in the gate lead. Therefore , therefore

.
The term field effect is related to the depletion layers around each p-region as shown.
When the supply voltage is applied as shown it forces free electrons to flow from source to
drain. With gate reverse biased, the electrons need to flow from source to drain, they must pass
through the narrow channel between the two depletion layers. The more the negative gate
voltage is the tighter the channel becomes.
Therefore JFET acts as a voltage controlled device rather than a current controlled device.
JFET has almost infinite input impedance but the price paid for this is loss of control over the
output current, since JFET is less sensitive to changes in the output voltage than a BJT.
JFET CHARACTERISTICS

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The maximum drain current out of a JFET occurs when . As is increased for 0 to a
few volts, the current will increase as determined by ohms law. As approaches the
depletion region will widen, carrying a noticeable reduction in channel width. If is increased
to a level where the two depletion region would touch a pinch-off will result. now maintains
a saturation level . Between 0 volts and pinch off voltage is the ohmic region. After ,
the regions constant current or active region.
If negative voltage is applied between gate and source the depletion region similar to those
obtained with are formed but at lower values of . Therefore saturation level is
reached earlier.
We can find two important parameters from the above characteristics

● drain to source resistance = .

● = transconductance of the device = .

● The gain of the device, amplification factor .

SHOCKLEY EQUATION
The FET is a square law device and the drain current is given by the Shockley equation

and
MOSFET

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MOSFET stands for metal oxide semiconductor field effect transistor. There are two types of
MOSFET
● Depletion type MOSFET
● Enhancement type MOSFET
DEPLETION TYPE MOSFET

Symbol of n-channel depletion type MOSFET

It consists of a highly doped p-type substrate into which two blocks of heavily doped n-type
material are diffused to form a source and drain. A n-channel is formed by diffusing between
source and drain. A thin layer of is grown over the entire surface and holes are cut in
to make contact with n-type blocks. The gate is also connected to a metal contact surface but
remains insulated from the n-channel by the layer. layer results in an extremely high
input impedance of the order of to for this area.

Fig. 4: Structure of n-channel depletion type MOSFET

OPERATION
When and is applied and current flows from drain to source similar to JFET. When
, the negative potential will tend to pressure electrons towards the p-type substrate and
attracts hole from p-type substrate. Therefore recombination occurs and will reduce the number
of free electrons in the n-channel for conduction. Therefore with increased negative gate voltage
reduces.

For positive values, , additional electrons from p-substrate will flow into the channel and
establish new carriers which will result in an increase in drain current with positive gate voltage.
DRAIN CHARACTERISTICS

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TRANSFER CHARACTERISTICS

ENHANCEMENT TYPE MOSFET

Here current control in an n-channel device is now affected by positive gate to source voltage
rather than the range of negative voltages of JFET’s and depletion type MOSFET.
BASIC CONSTRUCTION
A slab of p-type material is formed and two n-regions are formed in the substrate. The source
and drain terminals are connected through metallic contacts to n-doped regions, but the absence
of a channel between the doped n-regions. The layer is still present to isolate the gate
metallic platform from the region between drain and source, but now it is separated by a section
of p-type material.

Fig. 5: Structure of n-channel enhancement type MOSFET

OPERATION
If and a voltage is applied between the drain and source, the absence of a n-channel will
result in a current of effectively zero amperes. With set at some positive voltage and set

16
at 0V, there are two reverse biased p-n junction between the n-doped regions and p substrate to
oppose any significant flow between drain and source.

If both and have been set at some positive voltage, then positive potential at the gate will
pressure the holes in the p-substrate along the edge of layer to leave the area and enter
deeper region of p-substrate. However the electrons in the p-substrate will be attracted to the
positive gate and accumulate in the region near the surface of the layer. The negative
carriers will not be absorbed due to insulating layer, forming an inversion layer which
results in current flow from drain to source.

The level of that results in significant increase in drain current is called threshold voltage .
As increases the density of free carriers will increase resulting in increased level of drain
current. If is constant is increased; the drain current will eventually reach a saturation
level as occurred in JFET.
DRAIN CHARACTERISTICS TRANSFER CHARACTERISTICS

SWITCHING CHARACTERISTICS
The switching model of MOSFET’s is as shown in the figure 6(a). The various inter electrode
capacitance of the MOSFET which cannot be ignored during high frequency switching are
represented by . The switching waveforms are as shown in figure 7 . The turn on
time is the time that is required to charge the input capacitance to the threshold voltage level.
The rise time is the gate charging time from this threshold level to the full gate voltage .
The turn off delay time is the time required for the input capacitance to discharge from
overdriving the voltage to the pinch off region. The fall time is the time required for the input
capacitance to discharge from pinch off region to the threshold voltage. Thus basically switching
ON and OFF depend on the charging time of the input gate capacitance.

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 Fig.6: Switching model of MOSFET

Fig.7: Switching waveforms and times of Power MOSFET

GATE DRIVE
The turn-on time can be reduced by connecting a RC circuit as shown to charge the capacitance
faster. When the gate voltage is turned on, the initial charging current of the capacitance is

.
The steady state value of gate voltage is

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 .

Where is the internal resistance of gate drive force.

Fig. 8: Fast turn on gate drive circuit 1

Fig. 8: Fast turn on gate drive circuit 2

The above circuit is used in order to achieve switching speeds of the order of 100nsec or less.
The above circuit has low output impedance and the ability to sink and source large currents. A
totem poll arrangement that is capable of sourcing and sinking a large current is achieved by the
PNP and NPN transistors. These transistors act as emitter followers and offer a low output
impedance. These transistors operate in the linear region therefore minimize the delay time. The
gate signal of the power MOSFET may be generated by an op-amp. Let V in be a negative
voltage and initially assume that the MOSFET is off therefore the non-inverting terminal of the
op-amp is at zero potential. The op-amp output is high therefore the NPN transistor is on and is a
source of a large current since it is an emitter follower. This enables the gate-source capacitance
Cgs to quickly charge upto the gate voltage required to turn-on the power MOSFET. Thus high
speeds are achieved. When Vin becomes positive the output of op-amp becomes negative the PNP
transistor turns-on and the gate-source capacitor quickly discharges through the PNP transistor.
Thus the PNP transistor acts as a current sink and the MOSFET is quickly turned-off. The
capacitor C helps in regulating the rate of rise and fall of the gate voltage thereby controlling the
rate of rise and fall of MOSFET drain current. This can be explained as follows

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 ● The drain-source voltage .
● If ID increases VDS reduces. Therefore the positive terminal of op-amp which is tied to
the source terminal of the MOSFET feels this reduction and this reduction is transmitted
to gate through the capacitor ‘C’ and the gate voltage reduces and the drain current is
regulated by this reduction.

COMPARISON OF MOSFET WITH BJT

● Power MOSFETS have lower switching losses but its on-resistance and conduction
losses are more. A BJT has higher switching loss bit lower conduction loss. So at high
frequency applications power MOSFET is the obvious choice. But at lower operating
frequencies BJT is superior.
● MOSFET has positive temperature coefficient for resistance. This makes parallel
operation of MOSFET’s easy. If a MOSFET shares increased current initially, it heats up
faster, its resistance increases and this increased resistance causes this current to shift to
other devices in parallel. A BJT is a negative temperature coefficient, so current shaving
resistors are necessary during parallel operation of BJT’s.
● In MOSFET secondary breakdown does not occur because it have positive temperature
coefficient. But BJT exhibits negative temperature coefficient which results in secondary
breakdown.
● Power MOSFET’s in higher voltage ratings have more conduction losses.
● Power MOSFET’s have lower ratings compared to BJT’s . Power MOSFET’s →
500V to 140A, BJT → 1200V, 800A.

MOSIGT OR IGBT

The metal oxide semiconductor insulated gate transistor or IGBT

combines the advantages of BJT’s and MOSFET’s. Therefore an IGBT
has high input impedance like a MOSFET and low-on state power loss
as in a BJT. Further IGBT is free from second breakdown problem
present in BJT.
IGBT BASIC STRUCTURE AND WORKING

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It is constructed virtually in the same manner as a power MOSFET. However, the substrate is
now a layer called the collector.
When gate is positive with respect to positive with respect to emitter and with gate emitter
voltage greater than , an n channel is formed as in case of power MOSFET. This
channel short circuits the region with emitter regions.

An electron movement in the channel in turn causes substantial hole injection from
substrate layer into the epitaxially layer. Eventually a forward current is established.

The three layers , and constitute a pnp transistor with as emitter, as base and
as collector. Also , and layers constitute a npn transistor. The MOSFET is formed with
input gate, emitter as source and region as drain. Equivalent circuit is as shown below.

Also serves as collector for pnp device and also as base for npn transistor. The two pnp and
npn is formed as shown.

When gate is applied MOSFET turns on. This gives the base drive to . Therefore
starts conducting. The collector of is base of . Therefore regenerative action takes place
and large number of carriers are injected into the drift region. This reduces the ON-state loss
of IGBT just like BJT.
When gate drive is removed IGBT is turn-off. When gate is removed the induced channel will
vanish and internal MOSFET will turn-off. Therefore will turn-off it turns off.

Structure of IGBT is such that is very small. If small will not conduct therefore IGBT’s
are different from MOSFET’s since resistance of drift region reduces when gate drive is applied
due to injecting region. Therefore ON state IGBT is very small.
IGBT CHARACTERISTICS
STATIC CHARACTERISTICS

Static V-I characteristics ( versus )

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 Same as in BJT except control is by . Therefore IGBT is a voltage controlled device.

Transfer Characteristics ( versus )

Identical to that of MOSFET. When , IGBT is in off-state.

Fig. 9: IGBT bias circuit

Fig:Output Characteristics Transfer Characteristics

SWITCHING CHARACTERISTIC OF IGBT

Figure below shows the switching characteristic of an IGBT. Turn-on time consists of delay

time and rise time .

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 Fig. : Switching Characteristics

The turn on delay time is the time required by the leakage current to rise to 0.1 , where
is the final value of collector current. Rise time is the time required for collector current to rise
from 0.1 to its final value . After turn-on collector-emitter voltage will be very small
during the steady state conduction of the device.

The turn-off time consists of delay off time and fall time . Off time delay is the time
during which collector current falls from to 0.9 and falls to threshold voltage .
During the fall time the collector current falls from 0.90 to 0.1 . During the turn-off time
interval collector-emitter voltage rises to its final value .
IGBT’s are voltage controlled power transistor. They are faster than BJT’s, but still not quite as
fast as MOSFET’s. the IGBT’s offer for superior drive and output characteristics when compared
to BJT’s. IGBT’s are suitable for high voltage, high current and frequencies upto 20KHz.
IGBT’s are available upto 1400V, 600A and 1200V, 1000A.
APPLICATIONS
Widely used in medium power applications such as DC and AC motor drives, UPS systems,
Power supplies for solenoids, relays and contractors.
Though IGBT’s are more expensive than BJT’s, they have lower gate drive requirements, lower
switching losses. The ratings up to 1200V, 500A.
SERIES AND PARALLEL OPERATION
Transistors may be operated in series to increase their voltage handling capability. It is very
important that the series-connected transistors are turned on and off simultaneously. Other wise,
the slowest device at turn-on and the fastest devices at turn-off will be subjected to the full
voltage of the collector emitter circuit and the particular device may be destroyed due to high
voltage. The devices should be matched for gain, transconductance, threshold voltage, on state
voltage, turn-on time, and turn-off time. Even the gate or base drive characteristics should be
identical.

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Transistors are connected in parallel if one device cannot handle the load current demand. For
equal current sharings, the transistors should be matched for gain, transconductance, saturation
voltage, and turn-on time and turn-off time. But in practice, it is not always possible to meet
these requirements. A reasonable amount of current sharing (45 to 55% with two transistors) can
be obtained by connecting resistors in series with the emitter terminals as shown in the figure 10.

Fig. 10: Parallel connection of Transistors

The resistor will help current sharing under steady state conditions. Current sharing under
dynamic conditions can be accomplished by connecting coupled inductors. If the current through

rises, the across increases, and a corresponding voltage of opposite polarity is

induced across inductor . The result is low impedance path, and the current is shifted to .
The inductors would generate voltage spikes and they may be expensive and bulky, especially at
high currents.

Fig. 11: Dynamic current sharing

BJTs have a negative temperature coefficient. During current sharing, if one BJT carries more
current, its on-state resistance decreases and its current increases further, whereas MOSFETS
have positive temperature coefficient and parallel operation is relatively easy. The MOSFET that
initially draws higher current heats up faster and its on-state resistance increases, resulting in
current shifting to the other devices. IGBTs require special care to match the characteristics due
to the variations of the temperature coefficients with the collector current.

AND LIMITATIONS
Transistors require certain turn-on and turn-off times. Neglecting the delay time and the
storage time , the typical voltage and current waveforms of a BJT switch is shown below.

24
 During turn-on, the collector rise and the is

During turn off, the collector emitter voltage must rise in relation to the fall of the
collector current, and is

The conditions and in equation (1) and (2) are set by the transistor switching
characteristics and must be satisfied during turn on and turn off. Protection circuits are normally
required to keep the operating and within the allowable limits of transistor. A
typical switch with and protection is shown in figure (a), with operating wave forms
in figure (b). The RC network across the transistor is known as the snubber circuit or snubber
and limits the . The inductor , which limits the , is sometimes called series
snubber.

Let us assume that under steady state conditions the load current is free wheeling through
diode , which has negligible reverse reco`very time. When transistor is turned on, the
collector current rises and current of diode falls, because will behave as short circuited.
The equivalent circuit during turn on is shown in figure below

25
The turn on is

Equating equations (1) and (3) gives the value of

During turn off, the capacitor will charge by the load current and the equivalent circuit
is shown in figure (4). The capacitor voltage will appear across the transistor and the is

Equating equation (2) to equation (5) gives the required value of capacitance,

Once the capacitor is charge to , the freewheeling diode will turn on. Due to the energy
stored in , there will be damped resonant circuit as shown in figure (5). The RLC circuit is
normally made critically damped to avoid oscillations. For unity critical damping, , and

equation yields

The capacitor has to discharge through the transistor and the increase the peak current
rating of the transistor. The discharge through the transistor can be avoided by placing resistor
across instead of placing across .

The discharge current is shown in figure below. When choosing the value of , the
discharge time, should also be considered. A discharge time of one third the switching
period, is usually adequate.

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ISOLATION OF GATE AND BASE DRIVES
Necessity
Driver circuits are operated at very low power levels. Normally the gating circuit are digital in
nature which means the signal levels are 3 to 12 volts. The gate and base drives are connected to
power devices which operate at high power levels.
Illustration
The logic circuit generates four pulses; these pulses have common terminals. The terminal ,
which has a voltage of , with respect to terminal , cannot be connected directly to gate
terminal , therefore should be applied between of transistor . Therefore there is
need for isolation between logic circuit and power transistor.

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There are two ways of floating or isolating control or gate signal with respect to ground.
● Pulse transformers
● Optocouplers
PULSE TRANSFORMERS
Pulse transformers have one primary winding and can have one or more secondary windings.
Multiple secondary windings allow simultaneous gating signals to series and parallel connected
transistors. The transformer should have a very small leakage inductance and the rise time of
output should be very small.
The transformer would saturate at low switching frequency and output would be distorted.

OPTOCOUPLERS
Optocouplers combine infrared LED and a silicon photo transistor. The input signal is applied to
ILED and the output is taken from the photo transistor. The rise and fall times of photo transistor
are very small with typical values of turn on time = and turn off of 300ns. This limits the
high frequency applications. The photo transistor could be a darlington pair. The phototransistor
require separate power supply and add to complexity and cost and weight of driver circuits.

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