Design and Implementation of Software-Defined Receiver

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Volume 9, Issue 6, June – 2024 International Journal of Innovative Science and Research Technology

ISSN No:-2456-2165 https://doi.org/10.38124/ijisrt/IJISRT24JUN1535

Design and Implementation of


Software-Defined Receiver
Vaibhav M. Nayakoji1; Dr. Hassanali G. Virani2
1
ME Student, ETC Department, 2Professor & HOD, ETC Department,
Goa Engineering College, Farmagudi, Ponda-Goa, 403401, India

Abstract:- Acquisition in software-defined GPS receivers Acquisition in GPS is primary and important step for
is computationally intensive and time-consuming, determining the code phase of the Pseudo Random Noise
especially with the increasing demand for rapid and (PRN) code and the doppler shift in the carrier frequency of
accurate positioning services driven by globalization and the received GPS signal. The efficacy of a GPS receiver
digitization. Software-defined receivers face challenges in system depends on swiftly and precisely measuring the code
satellite signal acquisition, which becomes more phase and doppler shift parameters in the received signal. A
demanding with longer signals. This paper aims to GPS receiver's average acquisition time is typically used to
enhance the efficiency of GPS signal acquisition, a critical evaluate its performance. This includes a two-dimensional
step for determining the code phase of PRN codes and the search over carrier frequency and code phase by correlating
doppler shift in carrier frequency. Real-time applications with locally replicated signals [4]. The computational
encounter issues under dynamic conditions and degraded capabilities of conventional computers are insufficient to
signals, as conventional computers lack the computational handle the heavy workload involving correlation and Fast
power for the necessary correlation and FFT operations. Fourier Transform (FFT), Inverse Fast Fourier Transform
To address these challenges, a method using GPU (IFFT) operations required for real-time signal acquisition.
acceleration for L1 signal acquisition is proposed. This
method combines signal acquisition with GPU parallel The signal acquisition process has a very heavy
computing using the SIMT model. A CPU-GPU platform computational burden, particularly when acquiring weak GPS
via CUDA programming allows the CPU to handle data signals or operating in challenging environments like dense
reading and intermediate processing, while the GPU foliage or indoor settings. To address these real time
performs the core acquisition algorithm in parallel. challenges and enhance navigation performance in situations
when signals are weak, including tunnels, dense foliage,
Keywords:- Software-Defined Receiver, Signal Acquisition, heavy indoors etc. a software-defined GPS L1 receiver has
GPS, Compute Unified Device Architecture(CUDA), GPU been designed and implemented. This receiver leverages
Acceleration, Parallel Computing. GPU to expedite real-time acquisition correlation. GPU offers
massive parallel computing capabilities with hundreds or
I. INTRODUCTION even thousands of stream processors, making them ideal for
accelerating signal processing tasks. By utilizing CUDA C, a
Global Navigation Satellite Systems (GNSS) proprietary parallel computing platform specific to NVIDIA
encompass a constellation of satellites orbiting earth, GPUs, the software receiver can efficiently handle the
transmitting positioning, navigation and timing (PNT) data. computational demands of acquisition [5].
Presently, GNSS comprises two fully operational global
systems: the United States’ GPS and the Russia’s GLONASS. Two essential parts of software-defined GPS receivers
Additionally, ongoing developing global and regional are the RF front end and the signal processing software.
systems include Europe’s GALILEO, China’s Bei-Dou, Typically, hardware like the Universal Software Radio
India’s IRNSS developed by the ISRO operational under the Peripheral (USRP) is used as the RF front end, facilitating
name NavIC and Japan’s QZSS. The conventional hardware- transmission and reception across a broad frequency
based implementation of GPS receiver limits flexibility as spectrum. By capturing RF-modulated signals at the L1
signal processing parameters cannot be easily adjusted. In frequency (1575.42 MHz), downconverting them to an
contrast, a software-defined GPS receiver offers Intermediate Frequency (IF), digitising the signal there, and
reconfigurability, upgradability and flexibility, allowing for using software-based signal processing, the RF front end of
the implementation of new algorithms for new GPS signals the software GPS receiver in this setup is able to extract
without necessitating hardware modifications [1][2][3]. position information from the navigation message at the
Moreover, software receivers provide transparency in signal software processing block [6][7]. The USRP-2932 module
processing enabling access to core data and functions for in- serves as the RF front end, while signal processing occurs
depth analysis and simulation of different scenarios. Four through software on a computer, utilizing its CPU-GPU
modules make up a typical software-defined GPS receiver; platform. The key parameters of the resulting data collected
RF front end, acquisition, tracking and position computation. from the front-end design for signal processing are:
Improving the acquisition process is crucial for faster GPS
position fixes, especially in kinematic conditions.

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Volume 9, Issue 6, June – 2024 International Journal of Innovative Science and Research Technology
ISSN No:-2456-2165 https://doi.org/10.38124/ijisrt/IJISRT24JUN1535

 Sampling frequency: 38.192MHz Where, 𝐴 represents the carrier power, 𝑑[𝑛] denotes the
 Intermediate frequency (IF): 9.548MHz. navigational data, 𝑐[𝑛] signifies the C/A code, 𝑓𝐼𝐹 , 𝑓𝑑 indicate
the intermediate frequency (IF) and doppler shift (Hz )
This paper presents the design and implementation of a respectively, 𝑇𝑠 = 1/𝐹𝑠 stands for the sampling period
software-defined GPS receiver with accelerated acquisition (seconds), 𝐹𝑠 is the sampling frequency (Hz), 𝜑 stands for the
correlation for L1 signals using a CUDA-enabled GPU initial carrier phase, 𝜏 represents the initial code delay
technology, to reduce the acquisition time of acquiring (samples), and 𝑁 accounts for additive white gaussian noise.
satellites. The main aim of the acquisition module is to aid the
tracking module. That implies the performance of GPS The acquisition process begins by removing the carrier
receiver is strongly influenced by the acquisition time. The from the signal by mixing it with a replica carrier. The
performance of signal acquisition in software defined GPS nominal carrier frequency, 𝑓𝐼𝐹 corresponds to the IF
receiver is effectively evaluated by measuring the acquisition frequency of the GPS signal, while the doppler shift, 𝑓𝑑 varies
time for real-GPS L1 signal data that was captured by USRP- with satellite movement. Typically, the doppler shift ranges
2932 [8][9]. from ±6 KHz for static or low dynamics users to ±10 KHz for
high dynamic users, setting the search range for the doppler
II. SOFTWARE-DEFINED GPS RECEIVER AND frequency of the IF signal [7][10]. This range defines the
SIGNAL ACQUISITION doppler frequency search space of the IF signal. Following
carrier frequency removal, the signal is correlated with a
A. Introduction to Software-Defined GPS Receiver replica of the satellite's C/A code. Since the initial delay 𝜏 in
Global Positioning System (GPS) is operated by the the C/A code is unknown, correlation is performed across all
U.S. Space Force, a branch of the U.S. Armed Forces. It was possible shifts in the replica C/A code. Thus, the acquisition
the first constellation to be established in space with its first process operates in a two-dimensional space encompassing
satellite being launched in 1978 and its first series of satellites code delay and doppler shift to the IF frequency, as shown in
fully operational by 1993 [14]. Two radio frequencies in the Fig.1.
UHF band are used to transmit GPS signals. The frequency
range between 500MHz and 3GHz is covered by the UHF
band. These frequencies are known as L1 and L2, and are
derived from a common frequency, f0 = 10.23MHz:

 fL1 = 154 f0 = 1575.42MHz,


 fL2 = 120 f0 = 1227.60MHz [7].

GPS serves a multitude of purposes and offers two


service levels ranging from Standard Positioning Service
(SPS) for civilian users and Restricted Service (RS) for
military and strategic purposes. It facilitates location
determination, navigation, tracking, mapping and timing
across various industries. GPS receivers are integral to
automobile navigation, aviation, maritime navigation,
precision agriculture, mining, construction, surveying,
archeology, geology and mapping. Additionally, GPS
satellites disseminate critical information related to ocean Fig 1: Two-Dimensional Signal Acquisition Search Matrix
conditions and provide timely alerts, such as Potential Fishing
Zones (PFZ)/ TUNA PFZ, Ocean State Forecast (OSF), High Signal Acquisition is the first module in the receiver
Wave Alerts (HWA) and Tsunami early warnings. chain following the RF front end, with its primary objective
being to facilitate subsequent tracking operations. When
B. Parallelized Signal Acquisition using GPS L1 Signal acquisition decision statistics are higher than the acquisition
The GPS receiver executes several critical operations threshold, the acquisition is considered successful. One of the
with acquisition being of paramount importance, due to its most important criteria for acquisition validation is the
significant impact on the performance of the GPS receiver. acquisition threshold, which is the ratio of the highest and
Acquisition is the process of identifying all the satellites that second highest correlation results in the carrier frequency and
the user can see. It requires determining the frequency and code phase search space.
code phase of the signal, two important properties.
For this purpose, a recent method in GPS signal
acquisition takes advantage of parallelizing the code phase
The received GPS signal after digitization of IF signal search, known as parallel code phase search acquisition. For
can be represented as acquisition in a GPS receiver, the PCPS algorithm has the
lowest computational complexity and is faster. There are
𝑟[𝑛] = √𝐴𝑑[𝑛]𝑐[𝑛 − 𝜏] cos[2𝜋(𝑓𝐼𝐹 + 𝑓𝑑 )𝑛𝑇𝑠 − 𝜑] + (1) mainly three signal acquisition methods:

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Volume 9, Issue 6, June – 2024 International Journal of Innovative Science and Research Technology
ISSN No:-2456-2165 https://doi.org/10.38124/ijisrt/IJISRT24JUN1535

 The serial search algorithm shifted code phase. Circular correlation is used through
 Parallel frequency space search acquisition algorithm fourier transforms. The inverse fourier transform can be used
 Parallel code phase search acquisition algorithm [7]. to get the time-domain representation of the cross correlation
once the frequency domain representation has been achieved
III. PRINCIPLE OF THE FFT-BASED PCPS [7].
ACQUISITION ALGORITHM
A block diagram illustrating the parallel code phase
Correlating the incoming signal with a PRN code is the search (PCPS) algorithm is depicted in Fig.2. The I signal is
aim of the acquisition process. A more effective method is produced by combining the incoming signal with a locally
used, as opposed to the serial search acquisition method, generated carrier signal and a locally created carrier signal,
which multiplies the input signal with a PRN code with 1023 which results in the I signal and with a 90° phase-shifted
distinct code phases. Circular cross-correlation between the version of the signal, which results in the Q signal. The DFT
input and the PRN code is used in this PCPS method without function receives the complex input signal, x(n) = I(n) +
jQ(n), which is created by combining the I and Q signals.

Fig 2: Block Diagram of PCPS Acquisition Algorithm

After being converted to the frequency domain, the code per acquisition, avoiding the need to consider 1023
generated PRN code is complex conjugated. The PRN code's different phases.
fourier transform is multiplied by the input's fourier
transform. An inverse fourier transform is used to transform To create the I and Q signal components, the incoming
this product back to the time domain. The correlation between signal is first multiplied by a locally generated cosine and sine
the input and the PRN code is represented by the absolute carrier wave, respectively. A complex input for fourier
value of the output of the inverse fourier transform. The PRN transform is created by combining these elements. The output
code phase of the incoming GPS signal is indicated by the from the block diagram's lower branch in Fig.2 is then
presence of a peak in the correlation. multiplied by the result of the fourier transform. This signal
is generated as follows: The PRN generator produces a PRN
Unlike other acquisition methods, the PCPS acquisition code without a code phase, which then undergoes a fourier
method significantly reduces the search space to 41 distinct transform and later subjected to complex conjugation. The
carrier frequencies. The generated PRN code needs to resulting product from the multiplication operation is fed into
perform fourier transform only once per acquisition. One an inverse fourier transform, executed using the built-in
fourier transform and one inverse fourier transform is CUDA function. Since the outputs of FFT and IFFT are
performed for each of the 41 frequencies, making the complex, absolute values are computed for all output
computational efficiency reliant on how these functions are components.
implemented. The frequency estimation accuracy is
comparable to that of the serial search approach; however, it
provides a correlation value for each sampled code phase,
allowing for a more precise determination of the PRN code
phase. This method only requires the generation of one PRN

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Volume 9, Issue 6, June – 2024 International Journal of Innovative Science and Research Technology
ISSN No:-2456-2165 https://doi.org/10.38124/ijisrt/IJISRT24JUN1535

IV. IMPLEMENTATION OF CUDA library within CUDA based on MIT’s FFTW software
PROGRAMMING MODEL package is employed. This library offers flexible
configuration options and can execute up to three-
For GPU programming in C/C++/Fortran, NVIDIA dimensional FFT operations on any number of points using
developed the freeware general-purpose parallel computing GPU execution units [5][11][12].
platform and programming model known as CUDA. Utilizing
CUDA C, this paper implements a GPU-based correlation. Three fundamental abstractions at the centre of CUDA
Due to CUDAs performance advantages and user-friendly are shared memories, a hierarchy of thread groups and barrier
environment, CUDA is selected for the GPU implementation. synchronisation. Programmers can access these abstractions
With the help of CUDA, developers can use C/C++ as a high- as minimum modifications to the language, which allows for
level programming language in a software environment. the nested fine-grained parallelism of data and threads within
Leveraging the parallel compute engine in NVIDIA GPU, the coarse-grained parallelism of data and tasks. With this
CUDA offers more efficient solutions for complex method, programmers can break down larger problems into
computational problems compared to traditional CPU-based smaller, more manageable subproblems that can be processed
approaches. The NVIDIA CUDA C compiler, NVCC is used independently in parallel by internal threads. All of the
to compile CUDA (.cu) files. Notably, CUDA incorporates threads in a block can work together to solve the finer parts
optimized libraries such as cuFFT for efficient FFT of the problems in parallel. By permitting thread
implementations [5][11]. Given the substantial FFT collaboration, this decomposition maintains language
operations required during signal acquisition, the CUFFT expressivity and scalability, as illustrated in Fig. 3.

Fig 3: CUDA’s Automatic Expandability

A kernel in CUDA is made up of several blocks The CPU serves as the host and the GPU operates as a
arranged into a grid, each of which contains threads. For GPU coprocessor or device, in the CUDA programming model. A
execution, the scalable Streaming Processor Array (SPA), complete CUDA program involves serial processing on the
Streaming Multiprocessor (SM) and Streaming Processor host and parallel processing of kernels on the device. The host
(SP) receive the grid, block and thread, respectively. Within handles GPU device initialization, memory allocation, data
kernels, parallelism is divided into two levels: parallelism initialization, data copying between host and device memory
between blocks in a grid and parallelism between threads via the PCI-E (Peripheral Component Interconnect Express)
within a block, where communication is enabled by shared bus and result retrieval. The device accesses multiple memory
memory. Blocks, which are further subdivided into even spaces, including global memory, constant memory, texture
smaller warps, are used by kernels to execute them, and each memory, shared memory and registers, for parallel
thread is uniquely recognised by its thread ID and block ID to computation and stores the output results in the video
differentiate it from other threads. 32 threads make up a warp, memory. Upon completion, the host finishes the CUDA
and eight SPs in the SM carry out each instruction to produce application by retrieving the results from the video memory
four warp instructions. back into computer memory, running algorithms and freeing
up internal storage and video memory.

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Volume 9, Issue 6, June – 2024 International Journal of Innovative Science and Research Technology
ISSN No:-2456-2165 https://doi.org/10.38124/ijisrt/IJISRT24JUN1535

To optimize speed, CUDA provides different types of speed are shared memory and global memory. An abstract
GPU memory. In the GPU-based correlator architecture memory type, local memory is used to store spilled registers.
design, registers, shared memory, local memory and global When a block uses more registers on an SM than are
memory are used. These memory types are allocated for the available, this is known as register spilling. With a bandwidth
thread, block and grid levels. The thread and memory of roughly 8 GB/s, the memory transfer between the host and
hierarchy are shown in detail in Fig.4. Different types of GPU device memory is the slowest. Between the GPU and CPU
memory have varying bandwidths. Registers, with a memory, there is a PCI-E connector that limits this bandwidth
bandwidth of almost 8 TB/s, offer the quickest memory value [13].
transfer. Following registers in terms of memory transfer

Fig 4: Memory Hierarchy in a GPU with Bandwidth of Various GPU Memory

V. ACCELERATION OF SIGNAL ACQUISITION In this design, the CPU serves as the host processor,
USING GPU guiding memory transfer and parallel computation to the
GPU. The signal acquisition process is implemented on the
A. A Process of Signal Acquisition in CPU and GPU CPU-GPU platform, where PRN code sequences are
The main objective is to reduce the acquisition time of generated. Code sequences and parameters (intermediate
software-defined GPS L1 receiver without compromising the frequency, sampling rate etc.) are moved from the CPU's
effectiveness to acquire the satellites. This involves memory to the GPU's memory. Parallel operations on the
developing an algorithm that can accelerate the process of GPU include FFT, carrier signal creation, product of signal &
acquiring satellites which will reduce the signal acquisition carrier, and inverse FFT. The CPU receives the correlation
duration, as the most time-consuming part of signal values that are obtained along with the code phase and
processing is the signal acquisition in GNSS receivers. doppler bin. These values identify the peak position,
Obtaining the doppler frequency, code phase and visible indicating the satellite's doppler frequency and code phase. A
satellites is the aim of the signal acquisition process. This is threshold must be exceeded for the satellite to be considered
achieved through PCPS method employing FFT. The GPU is effectively acquired.
widely recognised for its parallel computing architecture,
which allows multiple cores to perform computations
simultaneously [5][12]. In this paper, we are implementing
signal acquisition module based on GPU. The majority of
GPU computing platforms have a CPU setup.

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Volume 9, Issue 6, June – 2024 International Journal of Innovative Science and Research Technology
ISSN No:-2456-2165 https://doi.org/10.38124/ijisrt/IJISRT24JUN1535

B. Signal Acquisition Algorithm based on PCPS Method

Fig 5: Flow Diagram of the PCPS Acquisition Algorithm

The acquisition function employs the PCPS acquisition searches the same frequency bin for the second highest
algorithm [7]. The goal is to determine the signal parameters correlation peak. The signal detection rule then makes use of
for all available satellites within a long data record of a few the ratio between the two peaks. The receiver's preset
milliseconds. This implementation follows the block diagram acquisition threshold value is compared to the ratio.
of PCPS. Fig.5 displays the code's flow diagram.
Important operations such as FFT and its inverse (IFFT),
The acquisition function searches in 0.5 kHz frequency complex conjugation, element-wise complex multiplication,
steps for a GPS signal. There is a parallel code search element-wise complex summation and the peak detection of
performed for every frequency step. After saving the a signal are implemented using CUDA C programming and
correlation results, the function moves on to the next its associated libraries, enabling efficient execution on GPU
frequency step. As a result, the function steps through the hardware. SIMT (Single Instruction, Multiple Threads),
user-defined doppler space. Subsequently, the function parallel programming model is followed here by GPU. In the
searches for the highest correlation value or peak, among all SIMT execution model, the SIMD (Single Instruction,
frequency bins. After the peak is detected, the function Multiple Data) model is combined with multi-threading. In a

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Volume 9, Issue 6, June – 2024 International Journal of Innovative Science and Research Technology
ISSN No:-2456-2165 https://doi.org/10.38124/ijisrt/IJISRT24JUN1535

SIMT machine, there is a set of processors. Each of them satellite is about 0.66 to 32.25ms. Fig.6 represents a PCPS
enabled to execute N parallel threads, all executing the same acquisition plot for L1 signal. PCPS acquisition successfully
instruction simultaneously. What sets SIMT apart from SIMD detected PRN 22; On the other hand, if any PRN was not
is its capability to integrate a single instruction with multiple found, it would be indicated by the lack of a noticeable
registers, multiple addresses and multiple flow paths. This correlation peak.
feature enables the parallel processing of large vectors of
data. This execution model establishes a hierarchy of
execution units, such as blocks (set of threads) and grids (set
of blocks). For practical implementations, NVIDIA GPU
computing platform and the CUDA programming model are
opted.

VI. ACQUISITION RESULTS AND DISCUSSION

A. Requirement Specifications
The hardware environment consists of an Intel(R)
Core(TM) i7-14700HX CPU with a base frequency of 2.10
GHz and 16 GB of computer memory. The GPU is an
NVIDIA RTX 4060, featuring 8 GB of video memory and a
core frequency of 1830 MHz. The software environment
includes a 64-bit Windows 11 operating system. The software
development environment utilizes Microsoft's VS2022 and
NVIDIA's CUDA 12.4.
Fig 6: Acquisition Plot for PRN 22.
B. Results and Discussion
We successfully implemented acquisition using PCPS The acquisition plot indicates the presence of signals
algorithm and SIMT execution model via the CUDA from PRN 22, as evident from the significant peak. This peak
programming on NVIDIA GPU computing platform, to corresponds to the C/A code phase and the frequency of the
reduce the acquisition time of acquiring satellites. Software- signal. Fig.6 illustrates a typical acquisition plot for a visible
defined receiver efficiently executed the important operations satellite, showing a notable peak that signifies high
for GPS L1 such as a lot of FFT and its inverse (IFFT), correlation. In contrast, an acquisition plot for a satellite not
complex conjugation, element-wise complex multiplication, currently visible to the GPS receiver will show nearly
element-wise complex summation and the peak detection of identical values, indicating low correlation and the absence of
a signal, which are needed during the signal acquisition a distinct peak. This lack of a peak signifies that signals from
process on CUDA-enabled GPU through GPU computing such a PRN satellite are not present in the received signal.
and multi-thread processing. This designed software-defined
GPS receiver significantly accelerated the acquisition The correct visible satellites are identified by the
correlation process and successfully acquired the visible proposed algorithm. By comparing the highest peak in the
satellites. Doppler frequency and code phase search with the second
highest peak, the presence of any satellite is determined. Fig.6
The software-defined GPS L1 receiver using PCPS displays the distinct peak of PRN 22.
algorithm acquired satellites present in the IF data with the
corresponding code phase and doppler frequency. The VII. CONCLUSION AND FUTURE WORK
improvement in acquisition time efficiency was achieved
through GPU-based parallel correlation and parallelization of In this paper, GPS software receiving platform is
essential operations for GPS L1. With this implementation, designed and implemented successfully using GPU and GPS
the fast data processing in the GPU enables real-time software reception platform development is demonstrated
processing at an accelerated pace. The performance of signal using CUDA. The developed GPS software receiving
acquisition in software-defined GPS receiver is effectively platform calculates the acquisition time required to acquire
evaluated by measuring the acquisition time for real-GPS L1 the satellites using PCPS algorithm in parallel computing.
signal data that was captured by USRP-2932. The results The software module for software-defined receivers is
show that the GPU's acquisition speed is many times faster designed with each acquisition function built separately to
than the CPU's, ensuring the real-time processing of GPS L1 facilitate easy modification and adaptability. The result
signals. By employing the methods presented in this paper, highlights that the longer acquisition time in real-time
software-defined receivers achieve near optimal performance problems and in kinematic conditions or high dynamic
for GPS signal acquisition and achieves almost a 60% environment and in signal degraded environments such as
reduction in operating time when acquiring signals using indoors, tunnels, dense canopy, vegetation etc. is efficiently
GPU as compared to CPU. Simulated data produced by a solved by using GPU based software-defined receiver with
GNSS simulator is used to validate the software receiver's sample GPS L1 signal data, demonstrating their effectiveness
signal acquisition capability. With GPU processing the in meeting the objectives.
advantage is clear. Here, acquisition time required to acquire

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Volume 9, Issue 6, June – 2024 International Journal of Innovative Science and Research Technology
ISSN No:-2456-2165 https://doi.org/10.38124/ijisrt/IJISRT24JUN1535

In future, the acquisition algorithm used for GPS L1 [11]. NVIDIA cuFFT Library User’s guide 11.7, NVIDIA
C/A signals can be adopted in NavIC, where the rough Press, 2022.
estimates of code phase and carrier is calculated using PCPS [12]. David B. Kirk and Wen-mei W. Hwu, “Programming
acquisition. After the experience with GPS, implemention of Massively Parallel Processors-A Hands-on
this with NavIC satellites is possible. The tracking module Approach”, Elsevier Inc., 2013.
can also be designed and implemented based on GPU. The [13]. Rob Farber, “CUDA application design and
GPS software receiver implemented in this paper can be development”, Elsevier, Amsterdam, 2011.
applied to further research on GPU-based multi-frequency [14]. GPS, Website: www. novatel.com. Accessed: May,
and multi-constellation related algorithms. Based on GPS 2024.
experience, new CUDA features can be studied to enhance
the future GNSS's performance.

REFERENCES

[1]. Ghangho Kim, Hyoungmin So, Sanghoon Jeon,


Changdon Kee, Youngsu Cho and Wansik Choi, ”The
Development of Modularized Post Processing GPS
Software Receiving Platform”, International
Conference on Control, Automa tion and Systems
2008 Oct. 14-17, 2008 in COEX, Seoul, Korea.
[2]. Antoine Grenier, Elena Simona Lohan, Aleksandr
Ometov, Jari Nurmi, ”An Open-Source Software-
Defined Receiver for GNSS Algorithms Benchmark
ing”, Electrical Engineering Unit, Tampere
University, Tampere, Finland, 2022 14th International
Congress on Ultra Modern Telecommunications and
Control Systems and Workshops (ICUMT).
[3]. Global Navigation Satellite Systems (GNSS).
Website: www.unoosa.org. Accessed: May, 2024.
[4]. Yeqing Zhang, Meiling Wang, Yafeng Li,”
LowComputational Signal Acquisition for GNSS
Receivers Using a Resampling Strategy and Variable
Circular Correlation Time”, School of Automation,
Beijing Institute of Technology, Beijing 100081,
China.
[5]. NVIDIA CUDA C/C++ Programming Guide 12.4,
NVIDIA Press, 2024.
[6]. M. Venu Gopala Rao, D. Venkata Ratnam, “Faster
Acquisition Technique for Software-defined GPS
Receivers”. K.L. University, Guntur-522 502, In dia,
Defence Science Journal, Vol. 65, No. 1, January
2015, pp. 5-11, DOI: 10.14429/dsj.65.5579 2015,
DESIDOC.
[7]. K. Borre, D. M. Akos, N. Bertelsen, P. Rinder, and S.
H. Jensen, “A software defined GPS and Galileo
receiver: A single-frequency approach”, Springer
Science & Business Media, 2007.
[8]. M. Ettus, ”GETTING STARTED GUIDE- NI USRP-
29xx”, National Instruments, December, 2012.
[9]. M. Ettus, ”USRP users and developers guide”, Ettus
research LLC, 2005.
[10]. Shaik Fayaz Ahamed, G Sasibhushana Rao, L Ganesh,
“Fast Acquisition of GPSSignal using FFT
Decomposition”, Department of Electronics and Com
munications Engineering, V R Siddhartha
Engineering College, Vijayawada, India, Department
of Electronics and Communications Engineering,
Andhra University, Visakhapatnam, India,
Department of Electronics and Communi cations
Engineering ANITS, Visakhapatnam, India.

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