COUnit 2 Rest
COUnit 2 Rest
COUnit 2 Rest
Control field –
Address field –
Need for designing the micro-instruction sequencing technique : The first purpose is to minimize the size
of control memory because control memory is present inside the processor.The second purpose is to
execute the micro-instructions as fast as possible. Which means the address of the next micro-
instruction can be calculated as fast as possible.
The factors which are responsible for reducing the size of control memory are – Degree of parallelism i.e.
how many microoperations which can be performed simultaneously. wihege Representation/encoding of
control information. The way of specifying the address of next microinstruction. The number of
microoperations executed in the processor depends upon the processor architecture, and encoding of
instructions makes it short. But the major concern is to calculate the address of the next micro-
instruction. The address of the next micro-instruction can be – The address of the next micro-instruction
in the sequence i.e. one after the other. Branch address(which can be conditional or unconditional).
Calculated on the basis of the opcode of the instruction. The address of the first micro-instruction can be
calculated once from the opcode of the instruction which is present in the instruction register, then that
address is loaded into CMAR (Control Memory Address Register).
Computer processing technique to boost memory performance Cache prefetching is a technique used by
computer processors to boost execution performance by fetching instructions or data from their original
storage in slower memory to a faster local memory before it is actually needed (hence the term
'prefetch'). Most modern computer
processors have fast and local cache memory in which prefetched data is held until it is required. The
source for the prefetch operation is usually main memory. Because of their design, accessing cache
memories is typically much faster than accessing main memory, so prefetching data and then accessing it
from caches is usually many orders of
magnitude faster than accessing it directly from main memory. Prefetching can be done with non-
blocking cache control instructions. Data vs. Instruction cache prefetching Cache prefetching can either
fetch data or instructions into cache. Data prefetching fetches data before it is needed. Because data
access patterns show less regularity than
instruction patterns, accurate data prefetching is generally more challenging than instruction
prefetching. Instruction prefetching fetches instructions before they need to be executed. The first
mainstream microprocessors to use some form of instruction prefetch were the Intel 8086 (six bytes)
and the Motorola 68000 (four bytes). In recent years, all high-performance processors use prefetching
techniques.
Emulation:
- Emulation is the process in which a target CPU and its corresponding hardware would be
emulated exactly the same way.
- Emulation is a relatively old concept and is not widely used to emulate full scale OS usage.
- Emulation is possible for any hardware and it does not affect the underlying OS ( host ).
Cache Memory:
Cache Memory is a special very high-speed memory. The cache is a smaller and faster memory
that stores copies of the data from frequently used main memory locations. There are various
different independent caches in a CPU, which store instructions and data. The most important
use of cache memory is that it is used to reduce the average time to access data from the main
memory.
Cache memory is an extremely fast memory type that acts as a buffer between RAM and the
CPU.
Branch Instruction