® INA

155 INA155
INA
155

For most current data sheet and other product

information, visit www.burr-brown.com

Single-Supply, Rail-to-Rail Output, CMOS

INSTRUMENTATION AMPLIFIER
FEATURES APPLICATIONS
● RAIL-TO-RAIL OUTPUT SWING: Within 10mV ● INDUSTRIAL SENSOR AMPLIFIERS
● LOW OFFSET VOLTAGE: ±200µV Bridge, RTD, Thermocouple, Flow, Position
● LOW OFFSET DRIFT: ±5µV/°C ● MEDICAL EQUIPMENT
● INTERNAL FIXED GAIN = 10V/V OR 50V/V ECG, EEG, EMG Amplifiers
● SPECIFIED TEMPERATURE RANGE: ● DRIVING A/D CONVERTERS
–55°C to +125°C ● PCMCIA CARDS
● LOW INPUT BIAS CURRENT: 0.2pA ● AUDIO PROCESSING
● WIDE BANDWIDTH: 550kHz in G = 10 ● COMMUNICATIONS
● HIGH SLEW RATE: 6.5V/µs ● TEST EQUIPMENT
● LOW COST ● LOW COST AUTOMOTIVE INSTRUMENTATION
● SO-8 AND TINY MSOP-8 PACKAGES

DESCRIPTION
The INA155 is a low-cost CMOS instrumentation Gain can be set to 10V/V or 50V/V by pin strapping.
amplifier with rail-to-rail output swing optimized for Gains between these two values can be obtained with
low voltage, single-supply operation. the addition of a single resistor. The INA155 is fully
Wide bandwidth (550kHz in G = 10) and high slew specified over the supply range of +2.7 to +5.5V.
rate (6.5V/µs) make the INA155 suitable for driving The INA155 is available in MSOP-8 and SO-8 sur-
sampling A/D converters as well as general purpose face-mount packages. Both are specified for operation
and audio applications. Fast settling time allows use over the temperature range –55°C to 125°C.
with higher speed sensors and transducers and rapid
scanning data acquisition systems.

G = 10 pins open
RG V+
G = 50 pins connected RG

1 8 7

INA155
5kΩ 5kΩ

200kΩ 22.2kΩ 22.2kΩ 200kΩ

5
Ref + –
VO = (VIN – VIN) • G + VREF

A1
– 2
VIN
6
A2 VO
3
V+IN

V–
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132

©1999 Burr-Brown Corporation PDS-1529B Printed in U.S.A. February, 2000

SBOS114
SPECIFICATIONS: VS = +2.7V to +5.5V
Boldface limits apply over the specified temperature range, TA = –40°C to +85°C
At TA = +25°C, RL = 10kΩ connected to VS/2. RG pins open (G = 10), and Ref = VS /2, unless otherwise noted.

INA155E, U INA155EA, UA
PARAMETER CONDITION MIN TYP MAX MIN TYP MAX UNITS
INPUT
Offset Voltage, RTI VOS VS = +5.0V, VCM = VS/2 ±0.2 ±1 ✽ ✽ mV
Over Temperature ±1.5 ✽ mV
Drift dVOS/dT ±5 ✽ µV/°C
vs Power Supply PSRR VS = +2.7V to +6V, VCM = 0.2 • VS ±50 ±200 ✽ ✽ µV/V
Over Temperature ±250 ✽ µV/V
vs Time ±0.4 ✽ µV/mo
INPUT VOLTAGE RANGE
Safe Input Voltage (V–) – 0.5 (V+) + 0.5 ✽ ✽ V
Common-Mode Range(1) VCM VS = 5.5V 0.3 5.2(2) ✽ ✽ V
VS = 2.7V 0.2 2.5(2) ✽ ✽ V
Common-Mode Rejection Ratio CMRR VS = 5.5V, 0.6V < VCM < 3.7V, G = 10 92 100 80 ✽ dB
Over Temperature 85 79 dB
VS = 5.5V, 0.6V < V CM < 3.7V, G = 50 86 90 77 ✽ dB
Over Temperature 85 76 dB
INPUT IMPEDANCE
Differential 1013 || 3 ✽ Ω || pF
Common-Mode 1013 || 3 ✽ Ω || pF
INPUT BIAS CURRENT
Input Bias Current IB ±1 ±10 ✽ ✽ pA
Offset Current IOS ±1 ±10 ✽ ✽ pA
NOISE, RTI RS = 0Ω, G = 10 or 50
Voltage Noise: f = 0.1Hz to 10Hz 4.5 ✽ µV/Vp-p
Voltage Noise Density: f = 10Hz 260 ✽ nV/√Hz
f = 100Hz 99 ✽ nV/√Hz
f = 1kHz 40 ✽ nV/√Hz
Current Noise: f = 1kHz 2 ✽ fA/√Hz
GAIN 10 50 ✽ ✽ V/V
Gain Equation G = 10 + 400kΩ/(10kΩ + RG) ✽ V/V
Gain Error(3) VS = 5.5V, VO = 0.01V to 5.49V, G = 10 ±0.02 ±0.1 ✽ ✽ %
vs Temperature ±2 ±10 ✽ ✽ ppm/°C
VS = 5.5V, VO = 0.05V to 5.45V, G = 50 ±0.05 ±0.25 ✽ ✽ %
vs Temperature ±15 ±30 ✽ ✽ ppm/°C
Nonlinearity VS = 5.5V, G = 10 or 50 ±0.005 ±0.015 ✽ ✽ % of FSR
Over Temperature ±0.015 ✽ % of FSR
OUTPUT
Voltage Output Swing from Rail RL = 10kΩ, GERR < 0.1% 5 10 ✽ ✽ mV
Over Temperature 10 ✽ mV
Short-Circuit Current Short Circuit to Ground ±50 ✽ mA
Capacitance Load (stable operation) See Typical Curve ✽
FREQUENCY RESPONSE
Bandwidth, –3dB BW G = 10 550 ✽ kHz
G = 50 110 ✽ kHz
Slew Rate SR VS = 5.5V, CL = 100pF 6.5 ✽ V/µs
Settling Time: 0.1% tS VS = 5.5V, VO = 2V Step, CL = 100pF, G = 10 5 ✽ µs
VS = 5.5V, VO = 2V Step, CL = 100pF, G = 50 11 ✽ µs
0.01% VS = 5.5V, VO = 2V Step, CL = 100pF, G = 10 8 ✽ µs
VS = 5.5V, VO = 2V Step, CL = 100pF, G = 50 15 ✽ µs
Overload Recovery 50% Input Overload 0.2 ✽ µs
Total Harmonic Distortion + Noise THD+N See Typical Curve ✽
POWER SUPPLY
Specified Voltage Range +2.7 +5.5 ✽ ✽ V
Operating Voltage Range +2.5 to +6 ✽ V
Quiescent Current VIN = 0, IO = 0 1.7 2.1 ✽ ✽ mA
Over Temperature VIN = 0, IO = 0 2.6 ✽ mA
TEMPERATURE RANGE
Specified Range –40 +85 ✽ ✽ °C
Operating Range –65 +150 ✽ ✽ °C
Storage Range –65 +150 ✽ ✽ °C
Thermal Resistance θJA
MSOP-8 Surface Mount 150 ✽ °C/W
SO-8 Surface Mount 150 ✽ °C/W
✽ Same as INA155E, U.
NOTES: (1) For further information, refer to typical performance curves on common-mode input range. (2) Operation above (V+) – 1.8V (max) results in reduced common-mode
rejection. See discussion and Figure 6 in the text of this data sheet. (3) Does not include error and TCR of additional optional gain-setting resistor in series with RG, if used.

INA155 2
SPECIFICATIONS: VS = +2.7V to +5.5V
Boldface limits apply over the specified temperature range, TA = –55°C to +125°C
At TA = +25°C, RL = 10kΩ connected to VS/2. RG pins open (G = 10), and Ref = VS /2, unless otherwise noted.

INA155E, U INA155EA, UA
PARAMETER CONDITION MIN TYP MAX MIN TYP MAX UNITS
INPUT
Offset Voltage, RTI VOS VS = +5.0V, VCM = VS/2 ±0.2 ±1 ✽ ✽ mV
Over Temperature ±2 ✽ mV
Drift dVOS/dT ±5 ✽ µV/°C
vs Power Supply PSRR VS = +2.7V to +6V, VCM = 0.2 • VS ±50 ±200 ✽ ✽ µV/V
Over Temperature ±250 ✽ µV/V
vs Time ±0.4 ✽ µV/mo
INPUT VOLTAGE RANGE
Safe Input Voltage (V–) – 0.5 (V+) + 0.5 ✽ ✽ V
Common-Mode Range(1) VCM VS = 5.5V 0.3 5.2(2) ✽ ✽ V
VS = 2.7V 0.2 2.5(2) ✽ ✽ V
Common-Mode Rejection Ratio CMRR VS = 5.5V, 0.6V < VCM < 3.7V, G = 10 92 100 80 ✽ dB
Over Temperature 82 78 dB
VS = 5.5V, 0.6V < V CM < 3.7V, G = 50 86 90 77 ✽ dB
Over Temperature 84 76 dB
INPUT IMPEDANCE
Differential 1013 || 3 ✽ Ω || pF
Common-Mode 1013 || 3 ✽ Ω || pF
INPUT BIAS CURRENT
Input Bias Current IB ±1 ±10 ✽ ✽ pA
Offset Current IOS ±1 ±10 ✽ ✽ pA
NOISE, RTI RS = 0Ω, G = 10 or 50
Voltage Noise: f = 0.1Hz to 10Hz 4.5 ✽ µV/Vp-p
Voltage Noise Density: f = 10Hz 260 ✽ nV/√Hz
f = 100Hz 99 ✽ nV/√Hz
f = 1kHz 40 ✽ nV/√Hz
Current Noise: f = 1kHz 2 ✽ fA/√Hz
GAIN 10 50 ✽ ✽ V/V
Gain Equation G = 10 + 400kΩ/(10kΩ + RG) ✽ V/V
Gain Error(3) VS = 5.5V, VO = 0.01V to 5.49V, G = 10 ±0.02 ±0.1 ✽ ✽ %
vs Temperature ±2 ±10 ✽ ✽ ppm/°C
VS = 5.5V, VO = 0.05V to 5.45V, G = 50 ±0.05 ±0.25 ✽ ✽ %
vs Temperature ±15 ±30 ✽ ✽ ppm/°C
Nonlinearity VS = 5.5V, G = 10 or 50 ±0.005 ±0.015 ✽ ✽ % of FSR
Over Temperature ±0.015 ✽ % of FSR
OUTPUT
Voltage Output Swing from Rail RL = 10kΩ, GERR < 0.1% 5 10 ✽ ✽ mV
Over Temperature 10 ✽ mV
Short-Circuit Current Short Circuit to Ground ±50 ✽ mA
Capacitance Load (stable operation) See Typical Curve ✽
FREQUENCY RESPONSE
Bandwidth, –3dB BW G = 10 550 ✽ kHz
G = 50 110 ✽ kHz
Slew Rate SR VS = 5.5V, CL = 100pF 6.5 ✽ V/µs
Settling Time: 0.1% tS VS = 5.5V, VO = 2V Step, CL = 100pF, G = 10 5 ✽ µs
VS = 5.5V, VO = 2V Step, CL = 100pF, G = 50 11 ✽ µs
0.01% VS = 5.5V, VO = 2V Step, CL = 100pF, G = 10 8 ✽ µs
VS = 5.5V, VO = 2V Step, CL = 100pF, G = 50 15 ✽ µs
Overload Recovery 50% Input Overload 0.2 ✽ µs
Total Harmonic Distortion + Noise THD+N See Typical Curve ✽
POWER SUPPLY
Specified Voltage Range +2.7 +5.5 ✽ ✽ V
Operating Voltage Range +2.5 to +6 ✽ V
Quiescent Current VIN = 0, IO = 0 1.7 2.1 ✽ ✽ mA
Over Temperature VIN = 0, IO = 0 2.8 ✽ mA
TEMPERATURE RANGE
Specified Range –55 +125 ✽ ✽ °C
Operating Range –65 +150 ✽ ✽ °C
Storage Range –65 +150 ✽ ✽ °C
Thermal Resistance θJA
MSOP-8 Surface Mount 150 ✽ °C/W
SO-8 Surface Mount 150 ✽ °C/W
✽ Same as INA155E, U.
NOTES: (1) For further information, refer to typical performance curves on common-mode input range. (2) Operation above (V+) – 1.8V (max) results in reduced common-mode
rejection. See discussion and Figure 6 in the text of this data sheet. (3) Does not include error and TCR of additional optional gain-setting resistor in series with RG, if used.

3 INA155
PIN CONFIGURATION ELECTROSTATIC
Top View SO-8 (U), MSOP-8 (E)
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
RG 1 8 RG
appropriate precautions. Failure to observe proper handling
V–
IN 2 7 V+ and installation procedures can cause damage.
INA155
V+
IN 3 6 VOUT ESD damage can range from subtle performance degradation
V– 4 5 Ref to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage, V+ to V– ................................................................... 7.5V
Signal Input Terminals, Voltage(2) .................. (V–) – 0.5V to (V+) + 0.5V
Current(2) .................................................... 10mA
Output Short-Circuit(3) .............................................................. Continuous
Operating Temperature .................................................. –65°C to +150°C
Storage Temperature ..................................................... –65°C to +150°C
Junction Temperature .................................................................... +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C

NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability. These are stress ratings only, and functional operation of the
device at these or any other conditions beyond those specified is not implied.
(2) Input terminals are diode-clamped to the power supply rails. Input signals
that can swing more that 0.5V beyond the supply rails should be current limited
to 10mA or less. (3) Short circuit to ground.

PACKAGE/ORDERING INFORMATION
PACKAGE SPECIFIED
DRAWING TEMPERATURE PACKAGE ORDERING TRANSPORT
PRODUCT PACKAGE NUMBER RANGE MARKING NUMBER(1) MEDIA
INA155U SO-8 182 –55°C to +125°C INA155U INA155U Rails
" " " " " INA155U/2K5 Tape and Reel
INA155UA SO-8 182 –55°C to +125°C INA155UA INA155UA Rails
" " " " " INA155UA/2K5 Tape and Reel
INA155E MSOP-8 337 –55°C to +125°C A55 INA155E/250 Tape and Reel
" " " " " INA155E/2K5 Tape and Reel
INA155EA MSOP-8 337 –55°C to +125°C A55 INA155EA/250 Tape and Reel
" " " " " INA155EA/2K5 Tape and Reel

NOTES: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces
of “INA155UA/2K5” will get a single 2500-piece Tape and Reel.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.

INA155 4
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = 5.5V, RL = 10kΩ connected to VS/2. RG pins open (G = 10), and Ref = VS /2, unless otherwise noted.

GAIN vs FREQUENCY COMMON-MODE REJECTION RATIO vs FREQUENCY

40 120
G = 10
35
100
30 G = 50
80
25 G = 50

CMRR (dB)
Gain (dB)

20 60

15 G =10
40
10
20
5

0 0
1 10 100 1k 10k 100k 1M 10M 0.1 1 10 100 1k 10k 100k
Frequency (Hz) Frequency (Hz)

POWER SUPPLY REJECTION RATIO vs FREQUENCY MAXIMUM OUTPUT VOLTAGE vs FREQUENCY

100 6
90
Maximum Output Voltage (Vp-p) 5
80
70
4
60
PSRR (dB)

50 3
40
2
30
20
1
10 VS = 5.5V
0 0
1 10 100 1k 10k 100k 1M 1 10 100 1k 10k 100k 1M
Frequency (Hz) Frequency (Hz)

SHORT-CIRCUIT CURRENT AND QUIESCENT CURRENT QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT
vs POWER SUPPLY vs TEMPERATURE
55 1.8 2.5 100
–ISC
–ISC
50 1.75 2.0 80
+ISC +ISC Short-Circuit Current (mA)
45 1.7
1.5 60
ISC (mA)

IQ (mA)
IQ (mA)

40 1.65 IQ
IQ
1.0 40
35 1.6

0.5 20
30 1.55

25 1.5 0 0
2.5 3 3.5 4.0 4.5 5 5.5 6 75 –50 –25 0 25 50 75 100 125 150
Supply Voltage (V) Temperature (°C)

5 INA155
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = 5.5V, RL = 10kΩ connected to VS/2. RG pins open (G = 10), and Ref = VS /2, unless otherwise noted.

INPUT VOLTAGE AND CURRENT NOISE DENSITY TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY vs FREQUENCY
10k 100 1

RL = 600Ω
Voltage Noise (nV/√Hz)

Current Noise (fA/√Hz)

en RL = 2kΩ
1k 10 0.1

THD+N (%)
G = 50
RL = 600Ω
in RL = 10kΩ
100 1 0.01
G = 10

RL =10kΩ
RL = 2kΩ
10 0.1 0.001
0.1 1 10 100 1k 10k 100k 10 100 1k 10k
Frequency (Hz) Frequency (Hz)

0.1Hz TO 10Hz VOLTAGE NOISE INPUT BIAS CURRENT vs TEMPERATURE

10k

1k
Input Bias Current (pA)

100
1µV/div

10

Input-Referred
0.1
500ms/div –75 –50 –25 0 25 50 75 100 125 150
Temperature (°C)

SLEW RATE vs POWER SUPPLY SLEW RATE vs TEMPERATURE

7 10
9
6.5
8
7
6
Slew Rate (V/µs)
Slew Rate (Vµs)

6
5.5 5
4
5
3
2
4.5
1
4 0
2.5 3 3.5 4 4.5 5 5.5 6 75 –50 –25 0 25 50 75 100 125 150
Supply Voltage (V) Temperature (°C)

INA155 6
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = 5.5V, RL = 10kΩ connected to VS/2. RG pins open (G = 10), and Ref = VS /2, unless otherwise noted.

OFFSET VOLTAGE OFFSET VOLTAGE DRIFT

PRODUCTION DISTRIBUTION PRODUCTION DISTRIBUTION
14 18
16
12
14

Percent of Amplifiers (%)

Percent of Amplifiers (%)

10
12
8 10

6 8

6
4
4
2
2

0 0

–20
–18
–16
–14
–12
–10
–8
–6
–4
–2
0
2
4
6
8
10
12
14
16
18
20
–1
–0.9
–0.8
–0.7
–0.6
–0.5
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Offset Voltage (mV) Offset Voltage Drift (µV/°C)

SETTLING TIME vs LOAD CAPACITANCE OVERSHOOT vs LOAD CAPACITANCE

20 60
18
0.01%, G = 50 50
16
14
Settling Time (µs)

40
Overshoot (%)

12 0.1%, G = 50 G = 10
10 30
0.01%, G = 10
8
20
6 0.1%, G = 10
4 G = 50
10
2
0 0
10 100 1k 10k 10 100 1k 10k
Load Capacitance (pF) Load Capacitance (pF)

SMALL-SIGNAL STEP RESPONSE SMALL-SIGNAL STEP RESPONSE

G = 10, CL = 100pF, RL = 10kΩ G = 50, CL = 100pF, RL = 10kΩ
100mV/div

100mV/div

5µs/div 5µs/div

7 INA155
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = 5.5V, RL = 10kΩ connected to VS/2. RG pins open (G = 10), and Ref = VS /2, unless otherwise noted.

LARGE-SIGNAL STEP RESPONSE

COMMON-MODE REJECTION AT 60Hz
G = 10, G = 50, CL = 100pF, RL = 10kΩ

1V/div
1V/div

2mV/div
1µs/div 5ms/div

INPUT COMMON-MODE RANGE INPUT COMMON-MODE RANGE

vs REFERENCE VOLTAGE, G = 10 vs OUTPUT VOLTAGE, G = 50
6 6
G = 10 G = 50

5 5

4 4
VCM (V)

VCM (V)

3 3
Ref = 0V Ref = 2.75V Ref = 5.5V
2 2
0.9V– + 0.1VREF < VCM < 0.9V+ + 0.1Ref 0.9V– + 0.04VOUT + 0.06Ref < VCM < 0.9V+ + 0.04VOUT + 0.06Ref
1 1

0 0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
VREF (V) VOUT (V)

OUTPUT VOLTAGE SWING vs OUTPUT CURRENT

5

4
+125°C +25°C –55°C
Output Voltage (V)

+125°C +25°C –55°C

1

0
0 10 20 30 40 50 60 70 80 90 100
Output Current (mA)

INA155 8
APPLICATIONS INFORMATION OPERATING VOLTAGE
The INA155 is fully specified and guaranteed over the supply
Figure 1 shows the basic connections required for operation
range +2.7V to +5.5V, with key parameters guaranteed over
of the INA155. Applications with noisy or high impedance
the temperature range of –55°C to +125°C. Parameters that
power supplies may require decoupling capacitors close to
vary significantly with operating voltages, load conditions or
the device pins as shown.
temperature are shown in the Typical Performance Curves.
The output is referred to the output reference terminal, Ref,
The INA155 can be operated from either single or dual
which is normally set to VS/2. This must be a low-imped-
power supplies. By adjusting the voltage applied to the
ance connection to ensure good common-mode rejection. A
reference terminal, the input common-mode voltage range
resistance of 200Ω in series with the Ref pin will cause a
and the output range can be adjusted within the bounds
typical device to degrade to approximately 80dB CMRR.
shown in the Typical Performance Curves. Figure 2 shows
In addition, for the G = 50 configuration, the connection a bridge amplifier circuit operated from a single +5V power
between pins 1 and 8 must be low-impedance. A connection supply. The bridge provides a relatively small differential
impedance of 20Ω can cause a 0.2% shift in gain error. voltage on top of an input common-mode voltage near 2.5V.

External Resistor RG:

10 < G < 50

V+ Gain Pins Connected:

G = 50 400kΩ
G = 10 +
10kΩ + RG

0.1µF Gain Pins Open:

1 8
7 G = 10 DESIRED GAIN RG
(V/V) (Ω)

5kΩ 5kΩ 10 Open

20 30k
5 200kΩ 22.2kΩ 22.2kΩ 200kΩ 30 10k
Ref 40 3.3k
50 Short

2 A1
–
VIN
6 + –
A2 VOUT = (VIN – VIN ) • G + VREF
3
V+IN
Also drawn in simplified form:
INA155 V+
4 + 3
VIN 7
1 6
INA155 VOUT
5
0.1µF – 8
VIN
Single Supply Dual Supply 2 4

V– V– Ref

FIGURE 1. Basic Connections.

+5V

+
VIN
Bridge 3
Sensor
(2) 7
1 6
INA155 VOUT = 0.01V to 4.99V
V–
IN 8 4
2 5 NOTES: (1) VREF should be adjusted for the desired output level,
VREF(1) keeping in mind that the value of VREF affects the common-mode
input range. See Typical Performance Curve. (2) For best
performance, the common-mode input voltage should be kept away
from the transition range of (V+) – 1.8V to (V+) –0.8V.

FIGURE 2. Single-Supply Bridge Amplifier.

®

9 INA155
SETTING THE GAIN an optional circuit for trimming the output offset voltage.
Gain of 10 is achieved simply by leaving the two gain pins The voltage applied to the Ref terminal is added to the
(1 and 8) open. Gain of 50 is achieved by connecting the output signal. An op amp buffer is used to provide low
gain pins together directly. In the G = 10 configuration, the impedance at the Ref terminal to preserve good common-
gain error is less than 0.1%. In the G = 50 configuration, the mode rejection.
gain error is less than 0.25%.
Gain can be set to any value between 10 and 50 by connect- INPUT BIAS CURRENT RETURN
ing a resistor RG between the gain pins according to the The input impedance of the INA155 is extremely high—
following equation: approximately 1013Ω, making it ideal for use with high-imped-
10 + 400kΩ/(10kΩ + RG) (1) ance sources. However, a path must be provided for the input
bias current of both inputs. This input bias current is less than
This is demonstrated in Figure 1 and is shown with the com- 10pA and is virtually independent of the input voltage.
monly used gains and resistor RG values. However, because the Input circuitry must provide a path for this input bias current
absolute value of internal resistors is not guaranteed, using the for proper operation. Figure 5 shows various provisions for
INA155 in this configuration will increase the gain error and an input bias current path. Without a bias current path, the
gain error drift with temperature, as shown in Figure 3. inputs will float to a potential that exceeds the common-
mode range and the input amplifier will saturate.
2.0 400 If the differential source resistance is low, the bias current
1.8 Gain Error Drift 360 return path can be connected to one input (see the thermo-
1.6 320 couple in Figure 5). With higher source impedance, using
Gain Error Drift (ppm/°C)

1.4 280 two equal resistors provides a balanced input with advan-
Gain Error (%)

1.2 250 tages of lower input offset voltage due to bias current and
1.0 200 better high-frequency common-mode rejection.
0.8 Gain Error 160
0.6 120
3
0.4 80
0.2 40 Microphone, 1 6
INA155
Hydrophone, etc.
0 0
8
10 15 20 25 30 35 40 45 50
2 5
Gain (V/V)
47kΩ
VREF
FIGURE 3. Typical Gain Error and Gain Error Drift with VB(1)

External Resistor. 3

1 6
OFFSET TRIMMING Thermocouple INA155
The INA155 is laser trimmed for low offset voltage. In most 8
Low-resistance
applications, no external offset adjustment is required. How- 2 5
thermocouple
ever, if necessary, the offset can be adjusted by applying a 10kΩ provides bias
VREF current return.
correction voltage to the reference terminal. Figure 4 shows
VB(1)
3

1 6
3 INA155
+(2)
VIN
8
1 6 Center-tap
INA155 VO 2 5
provides bias
8 VB(1) current return
–(2) VREF
VIN Ref(1)
2 5
VEX

OPA336 Bridge 3
Adjustable
Sensor
Voltage
1 6
INA155

NOTES: (1) VREF should be adjusted for the desired output 8

level. The value of VREF affects the common-mode input 2 5 Bridge resistance
provides bias
range. (2) For best performance, common-mode input voltage
VREF current return
should be less than (V+) – 1.8V or greater than (V+) – 0.8V. NOTE: (1) VB is bias voltage within
common-mode range, dependent
on VREF.

FIGURE 4. Optional Trimming of Output Offset Voltage. FIGURE 5. Providing an Input Common-Mode Current Path.
®

INA155 10
INPUT COMMON-MODE RANGE
1.00
Transistion
The input common-mode range of the INA155 for various 0.80 P-Channel Operation Region
operating conditions is shown the in Typical Performance 0.60

Input Offset Voltage (mV)

N-Channel
Curves. The common-mode input range is limited by the 0.40
Operation

output voltage swing of A1, an internal circuit node. For the G 0.20
= 10 configuration, output voltage of A1 can be expressed as: 0.00
VOUTA1 = – 1/9VREF + (1 + 1/9) VIN– (2) –0.20
–0.40
Using this equation given that the output of A1 can swing to –0.60 VS = –1.8V
within 10mV of either rail, the input common-mode voltage –0.80 VS = 5.5V
range can be calculated. When the input common-mode range VS = –0.8V
–0.100
is exceeded (A1’s output is saturated), A2 can still be in linear 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
operation and respond to changes in the non-inverting input Input Common-Mode Voltage (V)
voltage. However, the output voltage will be invalid.
The common-mode range for the G = 50 configuration is FIGURE 6. Input Offset Voltage Changes with Common-
included in the Typical Performance Curve, “Input Com- Mode Voltage.
mon-Mode Range vs Output Voltage.”
V+ NOTE: Output is referred to V+.
INPUT RANGE FOR BEST ACCURACY
The internal amplifiers have rail-to-rail input stages, achieved
2
by using complementary n- and p-channel input pairs. The 5
7
common-mode input voltage determines whether the 1 6
0.02Ω 50mV INA155
p-channel or the n-channel input stage is operating. The
8 4
transition between the input stages is gradual and occurs
between (V+) – 1.8V to (V+) – 0.8V. Due to these charac- 3
2.5A IL
teristics operating the INA155 with input voltages within the
transition region of (V+) – 1.8V to (V+) – 0.8V results in a Load
shift in input offset voltage and reduced common-mode and
power supply rejection performance. Typical patterns of the
offset voltage change throughout the input common-mode G = 10
Pins 1 and 8 Open
range are illustrated in Figure 6. The INA155 can be
operated below or above the transition region with excellent FIGURE 7. Single-Supply, High-Side Current Monitor.
results. Figure 7 demonstrates the use of the INA155 in a
single-supply, high-side current monitor. In this applica-
tion, the INA155 is operated above the transition region. RLIM
3

RAIL-TO-RAIL OUTPUT IOVERLOAD 1 6

VOUT
10mA max INA155
A class AB output stage with common-source transistors 8
5
is used to achieve rail-to-rail output. For resistive loads 2
RLIM
greater than 10kΩ, the output voltage can swing to within
VREF
a few millivolts of the supply rail while maintaining low
gain error. For heavier loads and over temperature, see the
typical performance curve “Output Voltage Swing vs Out- FIGURE 8. Input Current Protection for Voltages Exceed-
put Current.” The INA155’s low output impedance at high ing the Supply Voltage.
frequencies makes it suitable for directly driving Capaci-
tive Digital-to-Analog (CDAC) input A/D converters, as
+5V
shown in Figure 9.

INPUT PROTECTION 3
7
Device inputs are protected by ESD diodes that will conduct ADS7818 12-Bits
1 6
INA155 or
if the input voltages exceed the power supplies by more than ADS7834
8 5
500mV. Momentary voltages greater than 500mV beyond
2 4
the power supply can be tolerated if the current on the input fSAMPLE = 500kHz
pins is limited to 10mA. This is easily accomplished with
NOTE: G = 10 configuration
input resistors RLIM as shown in Figure 8. Many input
signals are inherently current-limited to less than 10mA, FIGURE 9. INA155 Directly Drives Capacitive-Input, High-
therefore, a limiting resistor is not required. Speed A/D Converter.
®

11 INA155
 PACKAGE OPTION ADDENDUM

www.ti.com 7-Nov-2014

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

INA155E/250 ACTIVE VSSOP DGK 8 250 Green (RoHS CU NIPDAUAG Level-2-260C-1 YEAR -40 to 85 A55
& no Sb/Br)
INA155E/250G4 ACTIVE VSSOP DGK 8 250 Green (RoHS CU NIPDAUAG Level-2-260C-1 YEAR -40 to 85 A55
& no Sb/Br)
INA155E/2K5 ACTIVE VSSOP DGK 8 2500 Green (RoHS CU NIPDAUAG Level-2-260C-1 YEAR A55
& no Sb/Br)
INA155EA/250 ACTIVE VSSOP DGK 8 250 Green (RoHS CU NIPDAUAG Level-2-260C-1 YEAR A55
& no Sb/Br)
INA155EA/250G4 ACTIVE VSSOP DGK 8 250 Green (RoHS CU NIPDAUAG Level-2-260C-1 YEAR A55
& no Sb/Br)
INA155EA/2K5 ACTIVE VSSOP DGK 8 2500 Green (RoHS CU NIPDAUAG Level-2-260C-1 YEAR A55
& no Sb/Br)
INA155EA/2K5G4 ACTIVE VSSOP DGK 8 2500 Green (RoHS CU NIPDAUAG Level-2-260C-1 YEAR A55
& no Sb/Br)
INA155U ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR INA
& no Sb/Br) 155U
INA155U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR INA
& no Sb/Br) 155U
INA155U/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR INA
& no Sb/Br) 155U
INA155UA ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR INA
& no Sb/Br) 155U
A
INA155UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR INA
& no Sb/Br) 155U
A
INA155UA/2K5G4 ACTIVE SOIC D 8 TBD Call TI Call TI

INA155UAG4 ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR INA

& no Sb/Br) 155U
A
INA155UG4 ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR INA
& no Sb/Br) 155U

(1)
The marketing status values are defined as follows:

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 7-Nov-2014

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 14-Aug-2013

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
INA155E/250 VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA155E/2K5 VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA155EA/250 VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA155EA/2K5 VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA155U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
INA155UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 14-Aug-2013

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
INA155E/250 VSSOP DGK 8 250 210.0 185.0 35.0
INA155E/2K5 VSSOP DGK 8 2500 367.0 367.0 35.0
INA155EA/250 VSSOP DGK 8 250 210.0 185.0 35.0
INA155EA/2K5 VSSOP DGK 8 2500 367.0 367.0 35.0
INA155U/2K5 SOIC D 8 2500 367.0 367.0 35.0
INA155UA/2K5 SOIC D 8 2500 367.0 367.0 35.0

Pack Materials-Page 2
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