Chapter 5
Chapter 5
Chapter 5
MEMORY
Memory, in the context of computing, refers to the electronic storage space used to store data,
instructions, and information that the computer system requires to perform its tasks. It is a
fundamental component of a computer and plays a crucial role in the functioning of both
hardware and software.
Memory allows the computer to store and retrieve data quickly, enabling efficient execution of
programs and tasks. It is responsible for holding instructions that the central processing unit
(CPU) needs to execute, as well as the data that is being processed or awaiting processing.
In a broader sense, memory can be thought of as the ability of a system to retain and recall
information. Computers have various types of memory, each serving a specific purpose and
having different characteristics such as storage capacity, access speed, and volatility.
Overall, memory is a critical component in computing systems as it allows for data storage,
retrieval, and manipulation, enabling the execution of programs and the efficient operation of a
computer.
Memory can be classified into different types based on its location in a computer system. The
main types of memory based on location are:
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operations to transfer data between secondary memory and primary memory. The main types of
secondary memory include:
a. Hard Disk Drives (HDD): HDDs are magnetic storage devices that use rotating platters to
store data. They provide high-capacity storage at relatively lower costs and are commonly used
in computers and servers.
b. Solid-State Drives (SSD): SSDs are storage devices that use flash memory to store data. They
provide faster data access and transfer speeds compared to HDDs but are typically more
expensive on a per-gigabyte basis.
c. Optical Drives: Optical drives, such as CD-ROMs, DVDs, and Blu-ray drives, use laser
technology to read and write data on optical discs. They are commonly used for distribution and
backup purposes.
d. USB Flash Drives: USB flash drives, also known as thumb drives or pen drives, are portable
storage devices that use flash memory. They connect to computers via USB ports and provide a
convenient means of transferring and storing data.
e. Memory Cards: Memory cards, such as Secure Digital (SD) cards and CompactFlash (CF)
cards, are small, removable storage devices commonly used in digital cameras, smartphones, and
other portable devices.
f. Cloud Storage: Cloud storage refers to remote storage services that allow users to store and
access their data over the internet. Examples include services like Dropbox, Google Drive, and
Microsoft OneDrive.
3. Registers: The CPU requires its own local memory in the form of registers and also control
unit requires local memories which are fast accessible.
Memory can be classified into different types based on the method of access. The main types of
memory based on access are:
1. Random Access Memory (RAM): RAM is a type of memory that allows for random access
to data. It is characterized by its ability to read from or write to any memory location in the
same amount of time, regardless of the location's proximity to the current location. RAM is
volatile, meaning its contents are lost when power is turned off. It is commonly used as the
primary memory in computers to store data and instructions that are actively being used by
the CPU.
2. Sequential Access Memory: Sequential access memory refers to a type of memory where
data is accessed in a sequential manner. To access a particular piece of data, the memory
must be accessed from the beginning and searched sequentially until the desired data is
found. Magnetic tape storage is an example of sequential access memory. It is relatively
slower compared to random access memory but offers high storage capacity.
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3. Virtual Memory: Virtual memory is a memory management technique that allows the
computer to use secondary storage as an extension of the main memory. It provides an
illusion of a larger memory space than physically available by temporarily transferring less
frequently used data from the main memory to the disk. Virtual memory enables efficient
utilization of the available memory resources and allows for running larger programs and
multitasking.
Based on performance characteristics such as access time and transfer rate, memory can be
classified into the following types:
1. Registers: Registers are the fastest type of memory in a computer system, offering access
times in picoseconds (ps) or nanoseconds. They are located within the CPU and are used for
temporary storage of data and instructions during program execution. Registers have a very
high transfer rate, allowing for quick data movement within the CPU.
2. Cache Memory: Cache memory is characterized by extremely fast access times. It is
designed to provide the CPU with quick access to frequently used instructions and data. The
access time of cache memory is typically measured in nanoseconds (ns), making it the fastest
type of memory in a computer system. The transfer rate within the cache memory is also very
high.
3. Random Access Memory (RAM): RAM is the primary memory of a computer system. It
offers faster access times compared to secondary memory, although it is slower than cache
memory. The access time of RAM is typically measured in nanoseconds or microseconds
(μs). RAM also has a relatively high transfer rate, allowing for efficient data retrieval and
storage.
4. Solid-State Drives (SSD): SSDs provide faster access times and higher transfer rates
compared to traditional hard disk drives (HDDs). The access time of an SSD is typically
measured in microseconds, while the transfer rate is measured in megabytes per second
(MB/s) or gigabytes per second (GB/s). SSDs use flash memory technology, which allows
for quicker data retrieval and storage than mechanical HDDs.
5. Graphics Memory: Graphics memory, also known as video memory or VRAM, is
specialized memory used by the GPU for rendering graphics and images. It has fast access
times and high transfer rates to handle the demanding requirements of real-time graphics
processing.
Based on physical characteristics
Memory can be classified into different types based on its physical characteristics, such as
volatility and eras ability. The main types of memory based on these characteristics are:
1. Volatile Memory: Volatile memory is a type of memory that requires a continuous power
supply to retain its stored data. When power is removed or interrupted, the contents of
volatile memory are lost. The two main types of volatile memory are:
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a. Random Access Memory (RAM): RAM is a volatile memory type commonly used as the
primary memory in computers. It allows for fast read and write operations but does not retain
data when the power is turned off.
b. Cache Memory: Cache memory is a specialized form of volatile memory that is located closer
to the CPU than the main memory. It provides faster access to frequently used data but is smaller
in capacity compared to RAM.
2. Nonvolatile Memory: Nonvolatile memory is a type of memory that retains its stored data
even when the power is turned off. The two main types of nonvolatile memory are:
a. Read-Only Memory (ROM): ROM is a nonvolatile memory type that contains permanent
instructions or data. It is typically programmed during the manufacturing process and cannot be
modified or erased by normal computer operations.
b. Flash Memory: Flash memory is a nonvolatile memory technology that allows for both
reading and writing of data. It is commonly used in USB flash drives, memory cards, solid-state
drives (SSDs), and other storage devices. Flash memory can be electrically erased and
reprogrammed, making it a popular choice for portable storage and firmware storage.
3. Erasable Memory: Erasable memory refers to memory types that can be selectively erased
and reprogrammed. The main type of erasable memory is:
a. Electrically Erasable Programmable Read-Only Memory (EEPROM): EEPROM is a
nonvolatile memory that can be electrically erased and reprogrammed. It allows for selective
erasure and modification of data, making it useful for applications where data needs to be
updated or changed.
b. Phase Change Memory (PCM): PCM is a type of nonvolatile memory that uses the properties
of certain materials to change their phase between amorphous and crystalline states. These
phase changes represent the binary values of data storage. PCM offers fast read and write
operations, high endurance, and good scalability. It is still under development and has the
potential to become a viable alternative to traditional nonvolatile memories.
c. Magnetic Random Access Memory (MRAM): MRAM is a type of nonvolatile memory that
uses magnetic elements to store data. It combines the advantages of both volatile and
nonvolatile memories, providing fast read and write operations, high endurance, and data
retention even in the absence of power. MRAM is resistant to radiation and has excellent
performance characteristics, although it currently has limitations in terms of density and cost.
4. Non-erasable memory: Non-erasable memory refers to memory types that cannot be easily
or selectively erased or modified. The main types of non-erasable memory are:
a. Read-Only Memory (ROM): ROM is a nonvolatile memory that contains permanent
instructions or data. It is typically programmed during the manufacturing process and cannot
be modified or erased by normal computer operations. The data stored in ROM is "read-
only," meaning it can only be read and accessed but not altered.
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b. Masked ROM: Masked ROM is a type of ROM where the data is programmed during the
manufacturing process using a physical mask. The programming is done at the integrated
circuit (IC) level, and the data stored in the memory cells is permanently fixed. Once the
mask is applied, the data cannot be changed or erased.
c. Programmable Read-Only Memory (PROM): PROM is a type of memory that is initially
blank but can be programmed by the user or manufacturer using special programming
equipment. Once programmed, the data becomes permanent and cannot be erased or
modified. PROM can only be programmed once and is non-erasable.
d. One-Time Programmable (OTP) Memory: OTP memory is a type of non-erasable memory
that can be programmed by the user or manufacturer using special programming equipment.
Like PROM, OTP memory becomes permanently programmed and cannot be erased or
modified after programming.
Non-erasable memory, such as ROM, is commonly used for storing firmware, system-level
instructions, and other critical data that should not be altered during normal operation. These
memory types provide a stable and unchangeable storage solution for essential data in various
electronic devices and systems.
Coding, data compression, and data integrity are important considerations when it
comes to working with computer memory. Here's a brief explanation of each:
Data Compression: Data compression is the process of reducing the size of data to
save storage space or improve transmission efficiency. Various compression
algorithms are used to eliminate redundancy and encode the data in a more
compact form. In computer memory, data compression techniques can be
employed to optimize memory usage, especially when dealing with large datasets
or memory-constrained environments. Compression algorithms such as Lempel-
Ziv-Welch (LZW), Deflate, and Huffman coding are commonly used for data
compression.
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Data Integrity: Data integrity refers to the accuracy, consistency, and reliability of
data stored in computer memory. It ensures that data remains intact and
uncorrupted throughout storage, retrieval, and processing operations. To maintain
data integrity, mechanisms such as checksums, hashing, and error detection codes
are used. These techniques allow for the detection of any data corruption or loss
during storage or transmission. Additionally, redundancy and error correction
techniques, like ECC mentioned earlier, can be employed to ensure data integrity
by detecting and correcting errors.
Overall, coding, data compression, and data integrity play crucial roles in computer
memory systems. Coding techniques protect against errors, data compression
optimizes storage and transmission efficiency, while data integrity measures
maintain the accuracy and reliability of data. These considerations are important
for ensuring the efficient and reliable operation of computer memory in various
applications.
Memory Hierarchy
1. Registers: Registers are the fastest and smallest type of memory located within
the CPU. They provide immediate access to data and instructions required for
the current execution of a program. Registers have extremely fast access times,
typically measured in picoseconds (ps) or nanoseconds (ns). However, their
storage capacity is very limited, usually in the range of a few kilobytes.
2. Cache Memory: Cache memory is a small but faster memory located between
the CPU and main memory. It serves as a buffer for frequently accessed data
and instructions, reducing the average access time. Cache memory has access
times in the range of a few nanoseconds (ns) and storage capacities measured in
megabytes (MB). It is more expensive than main memory but faster.
3. Main Memory (RAM): Main memory, often referred to as RAM (Random
Access Memory), is the primary memory of a computer system. It provides
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relatively fast access times compared to lower levels of the memory hierarchy.
Access times for main memory are typically in the range of tens to hundreds of
nanoseconds (ns). Main memory has larger storage capacities, ranging from
gigabytes (GB) to terabytes (TB), depending on the system configuration.
4. Solid-State Drives (SSD): Solid-state drives are non-volatile storage devices
that provide faster access times compared to traditional hard disk drives
(HDDs). SSDs use flash memory technology and have access times in the range
of microseconds (μs). They offer higher storage capacities, typically ranging
from hundreds of gigabytes (GB) to multiple terabytes (TB). However, SSDs
are more expensive than traditional HDDs.
5. Hard Disk Drives (HDD): Hard disk drives are magnetic storage devices that
provide slower access times compared to SSDs. HDDs have access times in the
range of milliseconds (ms) and offer larger storage capacities, ranging from
terabytes (TB) to multiple terabytes (TB). They are relatively cheaper per unit
of storage compared to SSDs.
6. Tape Drives: Tape drives are slower and less frequently used compared to
other levels in the memory hierarchy. They provide the largest storage
capacities, often measured in petabytes (PB) or more. Tape drives have access
times in the range of seconds or even minutes. They are commonly used for
long-term archival storage due to their cost-effectiveness for storing large
volumes of data.
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Registers |
| (Fastest, Smallest) |
|_____________________________________________________|
| |
| Cache Memory |
| (Fast, Small) |
|_____________________________________________________|
| |
| Main Memory |
| (Faster, Larger) |
|_____________________________________________________|
| |
| Solid-State Drives |
| (Fast, Large) |
|_____________________________________________________|
| |
| Hard Disk Drives |
| (Slower, Larger, Cheaper) |
|_____________________________________________________|
| |
| Tape Drives |
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Fig 2: Memory hierarchy
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Fig 3: how CPU access data in cache memory
Cache and Main Memory Interaction:
When the CPU encounters a cache miss and needs to access data that is
not present in the cache, it sends a memory request to the main memory
(RAM).
The memory request includes the memory address of the data the CPU
needs. The memory controller mediates the communication between the
CPU and main memory.
The main memory is larger in size but slower in terms of access time
compared to the cache memory. It stores a more comprehensive set of
data and instructions.
The memory controller locates the requested data in main memory and
retrieves it. The data is then transferred back to the cache memory and
delivered to the CPU.
Main Memory and CPU Interaction:
Once the requested data is transferred from main memory to the cache
memory, the CPU can access it directly from the cache on subsequent
accesses, reducing the latency.
The cache memory utilizes various caching algorithms and replacement
policies to determine which data to keep in the cache and which data to
evict when space is limited.
The cache memory operates on the principle of locality, storing
frequently accessed data and instructions to improve the chances of cache
hits and minimize the need to access main memory.
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The integration of the CPU, main memory, and cache memory in the memory
hierarchy is optimized to exploit the principle of locality and minimize data
access latency. The cache memory acts as a buffer between the CPU and main
memory, storing frequently accessed data to reduce the time spent waiting for
data retrieval from slower levels of the memory hierarchy. By keeping the most
frequently used data closer to the CPU, the memory hierarchy enhances the
overall performance of the system.
In computer systems, memory mapping refers to the process of assigning logical addresses to
physical addresses in a memory system. The memory mapping function is responsible for
translating logical addresses, also known as virtual addresses, into physical addresses that
correspond to specific locations in the physical memory.
The memory mapping function is typically implemented by the memory management unit
(MMU), a hardware component in the CPU responsible for managing memory operations. The
MMU performs address translation by using various techniques, such as page tables or
segmentation, depending on the memory management scheme employed by the operating
system.
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Let's take a look at two common memory mapping techniques:
Paging:
Paging divides the logical address space into fixed-size blocks called pages. Similarly, the
physical memory is divided into frames, which are also of the same size as the pages.
The memory mapping function, in the case of paging, uses a page table that keeps track of the
mapping between logical pages and physical frames.
When a process generates a logical address, the memory mapping function extracts the page
number from the address. It then looks up the corresponding entry in the page table to retrieve
the frame number associated with that page.
Finally, the memory mapping function combines the frame number with the offset within the
page to generate the physical address, which represents the actual location in the physical
memory.
Segmentation:
Segmentation divides the logical address space into variable-sized segments, such as code
segment, data segment, stack segment, etc. Each segment represents a different region of the
process's address space.
The memory mapping function, in the case of segmentation, uses a segment table that stores the
base address and length of each segment.
When a process generates a logical address, the memory mapping function extracts the segment
number from the address. It then looks up the corresponding entry in the segment table to
retrieve the base address of the segment.
The memory mapping function combines the base address with the offset within the segment to
generate the physical address.
In both paging and segmentation, the memory mapping function translates logical addresses into
physical addresses, allowing the CPU to access the correct location in the physical memory. This
mapping is transparent to the running processes, as they operate using logical addresses without
being aware of the physical memory layout.
It's important to note that the specific implementation and details of the memory mapping
function can vary depending on the architecture, operating system, and memory management
scheme used in a particular computer system.
• Direct mapping
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• Associative mapping
Direct mapping: Direct mapping is a memory mapping technique used in cache memory
systems. In this technique, each block of main memory is mapped to exactly one specific cache
line or cache block. It is the simplest form of memory mapping and is based on the concept of
associating a unique cache location for each main memory block.
Cache Organization: The cache is divided into a fixed number of cache lines or cache blocks,
and each cache line has a specific size. Each cache line has a tag field, a data field to store the
actual data from main memory, and additional control bits for cache management.
Address Format: The memory address is divided into three parts: the tag field, the index field,
and the offset field. The tag field represents the upper bits of the memory address and is used to
identify the block of main memory. The index field represents the middle bits of the memory
address and is used to select the cache line. The offset field represents the lower bits of the
memory address and is used to locate the specific data within the cache line.
Mapping Process: To map a block from main memory to the cache, the index field of the
memory address is used to determine the cache line. The tag field is then compared with the tag
stored in the selected cache line.
If the tags match, it indicates a cache hit, and the data is retrieved from the cache line.
If the tags do not match, it indicates a cache miss, and the data needs to be fetched from main
memory and stored in the cache line. The existing data in the cache line is replaced with the new
data.
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Fig 5: Direct mapping technique
It guarantees a unique cache location for each block of main memory, eliminating the need for
complex replacement policies.
However, direct mapping has limitations. As each main memory block can only be mapped to a
specific cache line, it can lead to conflicts when multiple blocks are mapped to the same cache
line. This is known as a collision. Collisions can result in frequent cache misses and degrade
cache performance.
To mitigate the impact of collisions, advanced cache memory designs incorporate additional
mapping techniques, such as set-associative or fully associative mapping. These techniques
provide greater flexibility and reduce the likelihood of collisions compared to direct mapping.
However, they come at the cost of increased hardware complexity and higher cache access time.
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In an associative mapping scheme, each block of main memory is mapped to any cache location,
rather than being restricted to a specific location. This flexibility allows for efficient memory
access since a given memory block can be stored in any cache location, depending on its
availability.
The mapping is accomplished by using tags associated with each cache line. A tag is a unique
identifier that corresponds to a specific memory block. When a memory address needs to be
accessed, the cache controller compares the address with the tags of the cache lines in parallel. If
a match is found, it indicates a cache hit, and the data can be retrieved from the cache. If no
match is found, it results in a cache miss, and the data must be fetched from the main memory.
Associative mapping offers several advantages. Firstly, it provides flexibility in storing data
blocks in the cache, reducing the chances of cache conflicts. Secondly, it allows for a higher
cache utilization since any memory block can be stored in any available cache location. Lastly, it
simplifies the cache replacement policy since any cache line can be replaced when necessary
without considering its specific location.
However, associative mapping also has some drawbacks. One significant disadvantage is the
increased hardware complexity and cost associated with implementing the associative mapping
scheme compared to other mapping techniques, such as direct mapping or set-associative
mapping. Additionally, associative mapping may require additional time for tag comparison,
which can impact cache access time.
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Fig 6: associate mapping Technique
Block set associative: Block set associative mapping is a memory mapping technique used in
cache memory systems that combines the benefits of direct mapping and fully associative
mapping. It aims to strike a balance between the simplicity of direct mapping and the flexibility
of fully associative mapping.
In block set associative mapping, the cache is divided into a set of cache lines or blocks, and
each block can hold multiple memory blocks or addresses. The cache is organized into a number
of sets, and each set contains a fixed number of cache lines. The number of cache lines per set is
referred to as the associativity of the cache.
1. The memory address is divided into three fields: the block offset, the index, and the tag.
The block offset determines the specific word within a cache block, the index identifies
the set within the cache, and the tag represents the remaining bits that uniquely identify
the memory block.
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2. The index field is used to select the set in which the memory block may reside. The cache
controller compares the index value with the index values of the cache sets.
3. Within the selected set, the tags of the cache lines are compared in parallel with the tag
field of the memory address. If a tag match is found, indicating a cache hit, the
corresponding cache line is accessed, and the requested data is retrieved. If no match is
found, it results in a cache miss, and the data must be fetched from the main memory.
4. In the case of a cache miss, the replacement policy determines which cache line within
the selected set will be replaced with the new data block. Common replacement policies
include least recently used (LRU) and random replacement.
Block set associative mapping offers advantages over direct mapping and fully associative
mapping. It reduces the chances of cache conflicts compared to direct mapping by allowing
multiple memory blocks to be stored within a set. It also provides greater flexibility than direct
mapping as it allows a memory block to be placed in any cache line within a set. Additionally,
the hardware complexity and cost associated with block set associative mapping are lower
compared to fully associative mapping.
However, block set associative mapping does have some limitations. The associativity of the
cache affects the number of sets and cache lines, which impacts the overall capacity of the cache.
A higher associativity leads to better cache utilization and reduced cache conflicts but increases
hardware complexity and access time. Finding an optimal balance between associativity,
performance, and cost is crucial when designing cache memory systems.
Overall, block set associative mapping provides a compromise between the simplicity of direct
mapping and the flexibility of fully associative mapping, making it a widely used memory
mapping technique in modern cache architectures.
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Fig 7: Block set associate mapping technique
In cache memory systems, hit and miss ratios are used to evaluate the effectiveness of the cache
in improving memory access performance. These ratios provide insights into how often cache
accesses result in cache hits (successful cache lookups) or cache misses (failed cache lookups).
Hit Ratio: The hit ratio, also known as the cache hit rate or cache hit percentage, measures the
percentage of cache accesses that result in cache hits. It is calculated as: Hit Ratio = (Number of
Cache Hits / Total Number of Cache Accesses) * 100 A high hit ratio indicates that a significant
portion of memory accesses can be satisfied from the cache, resulting in improved performance.
A low hit ratio suggests that cache misses are frequent, and more memory accesses have to be
serviced from the slower main memory.
Miss Ratio: The miss ratio, also known as the cache miss rate or cache miss percentage,
measures the percentage of cache accesses that result in cache misses. It is calculated as: Miss
Ratio = (Number of Cache Misses / Total Number of Cache Accesses) * 100 The miss ratio is
essentially the complement of the hit ratio. It represents the proportion of cache accesses that
cannot be fulfilled from the cache and require data to be fetched from the main memory.
The hit ratio and miss ratio are complementary and sum up to 100%. If the hit ratio increases, the
miss ratio decreases, and vice versa.
These ratios provide valuable information about cache performance and efficiency:
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A high hit ratio and a low miss ratio indicate that the cache is effectively storing frequently
accessed data, resulting in reduced memory access time and improved overall system
performance.
A low hit ratio and a high miss ratio suggest that the cache is not adequately capturing the
frequently accessed data, leading to more cache misses and increased memory access latency.
Cache performance can be influenced by factors such as cache size, cache organization (e.g.,
direct-mapped, set-associative, fully associative), cache replacement policies, and the program's
memory access patterns. Optimizing these factors can help improve hit ratios and reduce miss
ratios.
It's important to note that hit and miss ratios are typically calculated over a specific period or
during the execution of a particular workload. Different workloads or memory access patterns
may result in different hit and miss ratios.
By monitoring and analyzing hit and miss ratios, system designers and performance analysts can
gain insights into cache behavior and make informed decisions about cache configurations and
optimizations.
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