Rugby MSF Controlled Alarm Clock: Generalinterest
Rugby MSF Controlled Alarm Clock: Generalinterest
Rugby MSF Controlled Alarm Clock: Generalinterest
A digital alarm clock which decodes and synchronises itself to the time
signal picked up from the Rugby ‘MSF’ transmitter on 60 kHz.
+5V
RAW DC RAW DC
U5 = CD4016
P2 U1 4 C11 20 C6 16 C7 16 C10 U6 = CD4016
1 LM317 +5V U7 U3 U5 U6 U7 = 324N
100n 100n 100n 100n
RB1 11 10 8 8
2
240Ω
R3
1%
DF025M
680Ω
R5
C1 1% C2
6
27Ω
100µ R4 1µ 7
1% U7b
5
U6a
RAW DC +5V RAW DC J1 +5V
9 1 2
8
U7c +5V
PS1 R1 R2 10 13
U6b
10k
47Ω
TR2 4 3 S2
R6
0W33 1% 16
47k P1
2 5 15
TR1 1% 1
R7 1 U6c 14
2N3906 2 U7a
10k 3 8 9 13
R8 3
1% 12
39k
2N3904
U4 SI P3.7(RD) P2.7(A15) 11
3 6 16 27 3 17
WP SCK P3.6(WR) P2.6(A14) 10
7 2 15 26 4 16
HLD SO P3.5(T1) P2.5(A13) 9
CS 1 14
P3.4(T0) P2.4(A12)
25 5 15
8
X25320P
13 P3.3(INT1) 24 6 14
P2.3(A11) 7
12 P3.2(INT0) 23 7 13
4 P2.2(A10) 6
11 22 8 12
+5V P3.1(TXD) P2.1(A9) 5
10 21 9 11
P3.0(RXD) P2.0(A8) 4
C5 X1 X2 +5V 3
2 3 4 5 6 7 8 9 1
20 19 18 3EN1 2
100n X1
3EN2 1
19
SW2 SW3 SW4 SW1 G3
C4 C3 74HCT245
RN1 1 8x 100k
1k8
1k8
1k8
1k8
1k8
1k8
1k8
1k8
150Ω
150Ω
150Ω
150Ω
150Ω
150Ω
150Ω
50Ω
10k
2N 2N 2N 2N 2N 2N 2N 2N
P1 3904 R22 3904 R23 3904 R19 3904 R16 3904 R13 3904 R10 3904 R7 3904 R3
1k5
1k5
1k5
1k5
1k5
1k5
1k5
1k5
1
2
3 1% 1% 1% 1% 1% 1% 1% 1%
4
5
Vertical Card Connector
6
7
8
9
10
11
12
13
14
15
16
b c d e f b c d e f b c d e f b c d e f b c d e f b c d e f
a g a g a g a g a g a g
P2
1
2 dp dp dp dp dp dp
3
10
4
1 +VS 18
I1 O1 CC CC CC CC CC CC
5
Vertical Card Connector
2 17
6 I2 O2 DISP1 HDSP-5503 DISP2 HDSP-5503 DISP3 HDSP-5503 DISP4 HDSP-5503 DISP5 HDSP-5503 DISP6 HDSP-5503
3 16
7 I3 O3
4 15
8 I4 O4
5 U1 14
9 I5 O5
6 2803 13
10 I6 O6
7 12
11 I7 O7
8 11
12 I8 O8
VEE
13
9
14
15
16
020204 - 11
this product. response of the voltage divider, to Capacitor C8 limits the rate of
Very little RAM is available on board the make certain it cannot react to fluo- change of voltage across R24, and
microcontroller. There is enough for the vari- rescent lights etc. Back on the therefore the rate of change of cur-
ables and stack required by the software, but processor board, the output of the rent in the display segment as it
not for the alarm facilities I decided to imple- voltage divider is buffered by U7 and switches on and off, reducing RFI
ment. In any case, a non volatile memory was selectively switched to the display emissions.
required, hence the choice of the X25320P segment drivers by U5 and U6,
serial EEPROM for U4. under the control of the microcon-
The 5 volt power supply is provided by lin- troller. Each of the segment drivers Software Description
ear voltage regulator U1. Demand is low, as it is a voltage controlled current Note: This section should be read in
only supplies the microcontroller, op-amp, the source. Taking the first driver, when conjunction with the National Phys-
CMOS parts and the ambient light level sen- switched on, the voltage across R22 ical Laboratory MSF 60kHz Time and
sor, so no heat sink is required. The current is the output voltage of the ambient Date Code specification, and the
required by the displays is taken from the light level sensor minus the 0.7 volts software listing (which is available
input side of the regulator. This unregulated Vbe dropped by TR13. For example, if as a free download from the Elektor
supply is referred to as Raw DC. we present 2.2 V at the base of Electronics website under number
TR13, 1.5 V will appear across R22, 020204-11.zip). An extract of the
resulting in a current of 1 mA. This generously commented source code
Display Board same current also flows through R24, is shown in Listing 1.
Figure 2 shows the circuit diagram. On the producing a voltage at the base of The software operates by contin-
display board, the ambient light level is TR14 of the Raw DC voltage minus ually executing a main program loop,
sensed by the voltage divider formed by R2 1.8 V. Again dropping 0.7 V, this which updates the display data
and R5. R1 prevents the minimum voltage of time across the base-emitter junction according to data and flags which
the divider from falling below approximately of TR14, 1.1 V appears across R26, are set up by the interrupt routines.
1.3 volts, which keeps the display dimly lit in resulting in a display segment cur- The hardware timer 2 is set up in
a completely dark room. C1 slows down the rent flow of 7.3 mA. free running mode to run the T2
Resistors:
R1 = 47Ω fusible resistor
R2,R7 = 10kΩ
R3 = 240Ω
R4 = 27Ω
R5 = 680Ω
R6 = 47kΩ
R8 = 39kΩ
R9 = 120Ω
RN1,RN2 = 100kΩ
Capacitors:
C1 = 100µF 50V radial
C2,C8 = 1µF 63V radial
C3,C4 = 33pF ceramic
C5,C6,C10,C11 = 100nF
Semiconductors:
Tr1 = 2N3904
Tr2 = 2N3906
U1 = LM317 (TO220, vertical
mounting)
U2 = AT89S53-24PC
(programmed)
U3 = 74HCT245
U4 = X25320P (Xicor)
U5,U6 = CD4016
U7 = LM324N
RB1 = bridge rectifier
DF005M (IR) (20V, 1A)
Miscellaneous:
S1,S2 = connector, Berg
76342-308
P3 = 10-way IDC header
J1 = 3-way SIL pinheader with
jumper, 0.1 in. pitch
P2 = connector, Molex 22-27-
2021
P1 = connector, Molex 22-27-
2031
SW1 = pushbutton, Omron
B3F-3100
SW2,SW3,SW4 = pushbutton,
Omron B3F-3150
PS1 = piezo sounder
X1 = 12MHz quartz crystal
Lock/eject socket for
microcontroller, Aries 40-
C182-10 (Farnell # 177821)
Enclosure, type BM22W,
Farnell #531870
Display filter, Farnell # 177145
Mains adaptor to suit (see text)
Processor PCB (available from
author)
Figure 5. PCB artwork for display board (double-sided, through-plated).
0 = alarm off;
1 = alarm on.
Figure 7. Control bard, ready for fitting into the enclosure. Note that the final version of the
Hints & Conclusion
board supplied by the author may have slight improvements over the one shown here. The MSF receiver is constructed, like
an AM radio, using a ferrite rod
antenna. This is directional, and the
receiver will need to be rotated to
achieve best reception.
This clock may be regarded as
imperfect, due to the fact that in the
circumstances of a power failure dur-
ing an MSF signal break, the clock
and its alarm settings will not oper-
ate until the signal returns. The
design goal, however, was to pro-
duce a unit without any battery, and
in the two years since it was con-
structed it has never once missed an
alarm. So in all fairness it can be con-
cluded that the design is a success.
If the mains supply in the UK was
not as reliable as it is, the design
might have had to include a battery
operated real time clock module as a
backup.
Figure 8. Finished display board mounted on top of the control board. (020204-1)
Note:
alarm will operate, hold down the right but- day 3 = Tuesday; The author can supply a set of factory
ton. With the right button held down, the left etc. made printed circuit boards. Price is
button advances the fifth display digit expected to be £35.00 including VAT
through the days of the week, with At the required day, still holding and postage. Please enquire by email
down the right button, the middle only to [email protected]. The
day 1 = Sunday; button toggles the alarm on and off author’s website is at
day 2 = Monday; for that day. www.bigfoot.com/~dave_fletcher.