Ee222 Lab 4

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Part 1
Question 1: Implementation
Truth Table of inputs A, B, C and output F
A B C F SOP and POS
0 0 0 0 A+B+C
0 0 1 0 A+B+C’
0 1 0 0 A+B’+C
0 1 1 1 A’BC
1 0 0 0 A’+B+C
1 0 1 1 AB’C
1 1 0 1 ABC’
1 1 1 1 ABC

Question 2: Expressions
 The sum-of-minterms expression is:
F=Σ m(3 ,5 , 6 , 7)

 The product-of-maxterms expression is:


F=Π M (0 ,1 , 2 , 4)
Algebraic expression for both SOP and POS:
F = A’BC + AB’C + ABC’+ ABC (SOP)
F = (A+B+C) (A+B+C’) (A+B’+C) (A’+B+C) (POS)

Question 3: Karnaugh Map from Truth Table for SOP simplified expression
C AB
0 0 1 0
0 1 1 1

Simplified SOP expression for F:


F = B.C + A.C + A.B
Question 4: Logic Diagrams
a) 2-Level AND-OR circuit
b) 2-Level NAND circuit

Question 5: Wiring Plan diagram


Question 6: Circuit on Breadboard
Question 7: NAND Gates in 3-bit Minority logic circuit
Question 8: Logic diagram of the circuit above.

Part 2: Proof of a Boolean Theorem


'
x + x y=x + y
Question 1:
Proving the theorem above with truth table
x y x’ x’y LHS RHS
0 0 1 0 0 0
0 1 1 1 1 1
1 0 0 0 1 1
1 1 0 0 1 1

Question 2:
Proof using Boolean Algebra
'
x + x y=x + y

( x + x ' ) .(x + y )=x + y


1+( x+ y )=x + y
x + y=x + y
LHS=RHS
 By utilizing distributive and identity theorems the equation was proven.
Question 3: Software implementation

(When X = 1 and Y = 0) (When X = 0 and Y = 1)

(When X=1 and Y=1) (When X=0 and Y=0)


 It is displayed that the circuit simulation matches with the truth table inputs with their
outputs.

Question 4: Hardware implementation

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