Foxconn H61mxe-V h61m06 Rev. A

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5 4 3 2 1

H61MXE-V(H61M06)Fab A Micro ATX 8.9X6.8


CPU:
Intel Sandy Bridge processors in LGA1155 Package
System Chipset:
Cover Sheet 1 PCH
Block Diagram 2
D Clock Distribution 3
Main Memory: On Board Device: D

Power Delivery Map 4


Dual Channel / DDR-III * 2 (Max 8GB)
SIO: IT8772
Power On Sequence 5 Expansion Slots: LAN: RelTek RTL8111F/8105E
Reset/power good 6
STRAP 7
PCI EXPRESS 16X SLOT *1 HDA Codec: ALC662
CPU 1-6 8-13 PCI EXPRESS 1X SLOT * 2 BIOS:SPI Flash ROM 4Mbyte
DDR3-1:CHA 14
DDR3-2:CHB 15
PCIE X16 16
Clock Gen 17
PCH 1-8 18-25
VGA 26
DVI 27
C C

PCIE 1X 28
AUDIO_ALC662/VT1705CE 29
AUDIO CONN/SPDIF/CD-IN 30
LAN_AR8161/AR8162 31
LAN/USB2.0 CONN 32
Front USB2.0 Header 33
SIO-NCT5573D 34
PS2/FAN 35
TPM/LPT/COM 36
ATX CONN/FP PANEL/RSMRST 37
1D05/1D8V/VCCSA 38
5V_DUAL/3.3V_SB/3.3V_DUAL 39
B 1D5V_STR 40 B

CPU_VCCIO 41
VCORE/AXG PWM 42
VCORE/AXG DRIVER 43
XDP 44
THROUGH HOLE 45
Changelist 46

H61MXE-S USB3+RTL8111F+POWER MOS+Solid CAP


H61MXE RTL8111F

A
H61MXE-V RTL8105E A

FOXCONN PC
PCEEG
Title
Cover Sheet
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 1 of 45


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BLOCK DIAGRAM

D D
POWER CHANNEL A DDR3 SDRAM (800/1066/1333) DDR3 SDRAM CONN x1
SUPPLY VREG
CONNECTOR VRD12 INTEL PROCESSOR
Sandy Bridge
LGA1155 CHANNEL B DDR3 SDRAM (800/1066/1333)
DDR3 SDRAM CONN x1

PCIE GEN2 x16


PCIE (GEN 2)

DMI
FDI

XDP

PCI EXPRESS (lane 2) LAN


AR8161/AR8162
C C
10/100/1000

PCI EXPRESS (lane 4)


INTEL
PCIE X1 USB USB
PCH REAR*6 / FRONT*4

HDA Link
AUDIOCODEC
VGA ALC662/VT1705CE
VGA

SATA
SPI I/F
LPC I/F

SATA 2.0 (4 PORTS) SPI


B B
TPM

KB&MS
SIO
IT8728F/CX
COM

A A

FOXCONN PCEG
www.schematic-x.blogspot.com Title
Block Diagram
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 2 of 45


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D D

CPU

PCH_CLK_DMI

CLKIN_SATA

(FOR USB)
CLKIN_DOT_96

CLKIN_BCLK

REFCLK14IN
CLKOUT_DMI_P/N BCLK_P/N

CLKOUT_ITPXDP_P/N

GLAN
CLKOUT_PCIE0_P/N PCIE 100M REFCLK_P/N

CLKOUT_PCIE3_P/N
C C

CLKOUT_PCIE4_P/N

PCIE X1
CLKOUT_PCIE5_P/N PCIE 100M CLK_P/N
PCICLKIN
PCIE X16
CLKOUT_PEG_A_P/N PCIE 100M CLK_P/N
PCICLK2 PCH 48M
CLKOUTFLEX3

Buffer Through Mode SIO_48M


FCI Mode
B B
25MHZ SIO
X'TAL CLKOUT_PCI0 33M PCICLK

33M TPM
CLKOUT_PCI4 PCICLK

REFCLK14IN GND

CLKIN_DMI_P/N GND
CLKIN_DOT_96P/N GND
A A

CLKIN_SATA_P/N GND

FOXCONN PCEG
Title

32.768KHZ Clock Distribution


Size Document Number Rev
X'TAL C H61M06 A

Date: Thursday, January 05, 2012 Sheet 3 of 45


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POWER DELIVERY MAP +12V_VIN(4PIN)


Sandy-Bridge(95W)
+VCORE (CPU Vcore) 5VSB +3V 12V
SWITCHING Voltage=1.1V
Icc=85A Icc(Max)=85A Max=112A 5V_SYS
D
DDR3(2 DIMM) Max=112A 4-Phases Swithing
PCI Express X16 D

+12V=5.5A
SWITCHING +V_1.1_AXG(Havendale only)
+V_1.5_SM=1.5V Icc=20A SWITCHING
Voltage=1.1V 5V_Dual to +3VDUAL
Max=25A Icc=25A
Max=35A
Icc=25A Max=35A +3VDUAL Icc(Max)=0.375A(wake)
Icc=1.25A Icc(Max)=0.02A(no wake)
+V_1.5_SM(DDR III)
+V_1.5_SM(1.5V) to Voltage=1.5V Icc=4.5A
+V_SM_VTT=0.75V 1A +V_SM_VTT (0.75V) +3V=3A
+VCCSA(0.925/0.85V)
Icc=0.75A Max=1A IccMax=8.8A

SWITCHING +V_1.1_VTT(1.1/1.05V)
IccMax=17A IccMax=8.5A

VCCPLL(1.8V) 1A
AR8161 GbE Lan
Colay AR8162 100M Cougar_Point(5.5W)
+3VDUAL +V_1.5_SM to VCCCORE(+V_1.05_PCH)
70mA +V_1.05_PCH Voltage=1.05V
Icc=6.5A Icc(Max)=6.2A
C
Max=8A C
DVDD12/EVDD12 VCCME(+V_1.05_ME)
300mA Voltage=1.05V
Icc(Max)=1.8A
+12V
VccADPLL 0.2A
HDA Codec
+5VA
12V TO +5VA +3V VCCDMI 0.0655A
Voltage=5V
Icc=200mA
Icc=200mA
VccDFTERM=1.8V 0.2A
VCC
Voltage=3.3V +3V +3V TO
Icc=40mA +V_1.8_SFR VCCVRM=1.8V 0.159A
Icc=1.5A +3VDUAL 0.123A
Max=1.6A
3.3V 0.409A
VccADAC=3.3V 0.068A PCI Express X1
SIO NCT5573D VccSusHDA=3.3V 0.01A +12V_SYS
3D3V_SYS Icc=0.5A
Icc=50mA 5VSB_SYS VccDSW3_3=3.3V 0.003A
B B
+3V_PCIAUX(3.3vAUX)
3D3V_SB VccSPI=3.3V 0.02A Icc(Max)=0.375A(S0)
Icc=50mA(S0) Icc(Max)=0.02A(S3~S5)
5VSB_SYS to
3D3V_SB 3D3V_SB RTC 3D3V_SYS
Icc=38mA(S3) Battery VCCRTC 0.0022A Icc=3A

PS2
+5V_DUAL=500mA(S0, S1) ACPI +5V
+5V_DUAL=2mA(S3) Controller
+5V_DUAL

USB2.0 10 Ports
+5V_DUAL_USB=5A(S0, S1) ACPI
+5V_DUAL_USB=0.1A(S3) Controller +5VSB
+5V_DUAL_USB

A A

FOXCONN PCEG
Title
Power Delivery Map
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 4 of 45


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POWER ON SEQUENCE

D D

C C

B B

A A

FOXCONN PCEG
Title
Power On Sequence
Size Document Number Rev
Custom H61M06 A

Date: Thursday, January 05, 2012 Sheet 5 of 45


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CPU-Sandy Bridge

UNCOREPWRGOOD
RESET / Power Good MAP

SM_DRAMPWROK

SM_DRAMRST*
Sequence Signal Name:

RESET*
(1) O_PWRBTN#IN
(2) S_SLP_S4# S_SLP_S3# S_SLP_M#
(3) O_PSON#
D (4) B_ATX_PWROK D

(5) PCH_MEPWRGD
(9)
(6) S_PCH_SYSPWROK P_VR_READY
(7) PWRGD_3V DDRIII Slots
(8)
(8) H_DRAMPWRGD D3_RESET# D3_RESET#
Front Panel Buffer (UH2)
(9) H_PWRGD
(10) S_PLTRST# H_RESET#_R S_PLTRST#_R
FR_RST
(11) X_PLTRST_PCIE_SLOT# K_PCIRST#_SLOT
PWRBTN#
(12) A_Z_RST#
3D3V_SB 5V_SB
(8)
(A1)

TPM
3VSB PERST#

PROCPWRGD
SYS_RESET#
(1)
PANSWH# LAN
(7) (11)
DRAMPWROK PCIRST0# PERST#
HD Audio (12)
RESET#
(3) PCI-E 16x Slot
C
SLP_S4# SLP_S4_S5# (11) C
PCIRST1# PWRGD
(3)
SLP_S3# SLP_S3#

(10)
PCH PLTRST# LRESET# SIO-NCT5573D
(A2)
RSMRST# RSMRST# PCI-E 1x Slot1
(11)
PCIRST3# PWRGD
(6)
PWROK PWR_GOOD_3V
VRD 12 (9)
VR_RDY SYS_PWROK ATX Power
PCIRST#

APWROK (4)
PS_ON# PSON
(2) (5)
HDA_RST# PWRBTN# PWRON ATXPWRGD PWROK

PROCPWRGD
PWR_GOOD_3V
PWROK
B > 1ms PWRGD_PS B

100~120ms

A A

FOXCONN PCEG
Title
Reset/power good
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 6 of 45


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IRQ Routing Table

INTA# INTB# INTC# INTD# IDSEL REQn# GNTn#


Slot1 A B C D 16 0 0
D D

INTA# INTB# INTC# INTD# IDSEL REQn# GNTn#


Slot2 B C D A 17 2 2

STRAPPING Table
CPU side
CFG[17:0] Description

PCI Express static x16 1: normal Default


[2] lane numbering reversal 0: lane numbers reversed

00: 1x8, 2x4 PCI Express


01: reserved
[6:5] PCI Express Bifurcation
10: 2x8 PCI Express
11: 1x16 PCI Express Default

C C

B B

A A

FOXCONN PCEG
Title
STRAP
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 7 of 45


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D D

V_1D05V_CPU ?
SKT_H2
Place R216 & R213 near CPU U1E

*R216 R213
110Ohm *75
REV = 4
BALLMAP_REV = 1.6
+/-1% +/-1% W2 P33 VCCIO_SELECT TP40
22 C_CPU_CLK_DP BCLK[0] VCCIO_SELECT
W1 P34 VCCSA_VIO_0 TP41
22 C_CPU_CLK_DN BCLK#[0] VCCSA_VID_0 T2 VCCSA_SENSE
VCCSA_SENSE H_VCCSA_SENSE 37
C37
41 H_VIDSCK_VR B37 VIDSCLK A36 VCC_SENSE
41 H_VIDSOUT_VR VIDALERT_N A37 VIDSOUT VCC_SENSE B36 VSS_SENSE H_VCC_SENSE 41
41 H_VIDALERT_N_VR VIDALERT# VSS_SENSE H_VSS_SENSE 41
AB4 VCCP_SENSE
H_PWRGD J40 VCCIO_SENSE AB3 VSSP_SENSE H_VCCIO_SENSE 40
20 H_PWRGD

*
MINIMIZE STUB BETWEEN THESE AND RESISTORS AT SINAI PAGE R666 124 AJ19 UNCOREPWRGOOD VSSIO_SENSE H_VSSIO_SENSE 40
20 H_DRAMPWRGD F36 SM_DRAMPWROK L32
PLACE IN CRB AREA CPU_RST_N VCCAXG_SENSE
RESET# VSSAXG_SENSE M32 VSSAXG_SENSE H_VCCAGX_SENSE 41
H_PM_SYNC_0 E38 VSSAXG_SENSE H_VSSAGX_SENSE 41
19 H_PM_SYNC_0 PM_SYNC
J35 L39 H_TDO
19,33 PCH_PECI PECI TDO
H_CATERR_N E37 L40 H_TDI
H_PROCHOT_N H34 CATERR# TDI M40 H_TCK
41 H_PROCHOT_N PROCHOT# TCK
PCH_THERMTRIP_N G35 L38 H_TMS
19 PCH_THERMTRIP_N THERMTRIP# TMS J39 H_TRST_N
AJ33 TRST# K38 H_PRDY_N
TP37 SKTOCC# PRDY#
PROC_SEL K32 K40
DMI/FDI TERMINATION VOLTAGE FC_K32 PREQ# E39 H_DBR_N TP42
DC COUPLED: TX/RX TO VCC ISF SAMPLED HIGH PRO_DDR_VREF AJ22 DBR# C40
DC COUPLED: TX/RX TO VSS IF SAMPLED LOW SM_VREF BCLK_ITP D40
AC COUPLED: TX SET TO VCC/2, RX SET TO VSS REGARDLESS OF THIS STRAP BCLK_ITP#

V_NAND_IO CFG0 H36 H40


TP1 CFG[0] BPM#[0]
C CFG1 J36 H38 C
TP2 J37 CFG[1] BPM#[1] G38
CFG2
TP3 CFG[2] BPM#[2]
CFG3 K36 G40
TP4 CFG[3] BPM#[3]
CFG4 L36 G39
*R559
2.2KOhm
TP5
SWITCH_SEL_CPU N35 CFG[4]
CFG[5]
BPM#[4]
BPM#[5]
F38
+/-1% CFG6 L37 E40
TP6 M36 CFG[6] BPM#[6] F40
CFG7
TP7 CFG[7] BPM#[7]
CFG8 J38
TP8
*

PROC_SEL R560 4.7KOhm +/-1% CFG9 L35 CFG[8] B39


NVR_CLE 21 TP9 M38 CFG[9] RSVD34 J33
CFG10
TP10 CFG[10] RSVD35
CFG11 N36 L34
TP11 N38 CFG[11] RSVD36 L33
CFG12
TP12 CFG[12] RSVD37
CFG13 N39 K34
TP13 CFG[13] RSVD38
CFG14 N37
TP14 N40 CFG[14]
CFG15
TP15 CFG[15]
TPEV_SNB_PCUSTB_0 G37 N33
TP25 G36 CFG[16] RSVD39 M34
TPEV_SNB_PCUSTB_1
For future processor compatibility TP26 CFG[17] RSVD40

AT14 AV1
RSVD30 RSVD41 AW2
AY3 RSVD42
RSVD31 L9
H7 RSVD43 J9
H8 RSVD32 RSVD44 K9
RSVD33 RSVD45

PLACE R381, R382,C437 IN SOCKET CAVITY L31


RSVD46
J31
V_SM VCC_VALIDATION_SENSE K31
VSSU_VALIDATION_SENSE
AD34 V_1D05V_CPU 3D3V_DUAL 3D3V_SYS
VCCAXG_VALIDATION_SENSE AD35
V_1D8V_SFR V_NAND_IO VSSGT_VALIDATION_SENSE
*R381
100 Ohm
MISC
+/-1%
B B
PRO_DDR_VREF 5 OF 11 RN59

2
4
6
8
10K Ohm
CPU_SKT_H2 +/-5%

* 13
5
7
*R382
100 Ohm
*
C437
0.1uF
?
V_1D05V_CPU
+/-1% 16V, X7R, +/-10%
R300 4.7KOhm

*
VCCIO_SELECT
+/-1%
RN39 CPU_RST_N

V_1D05V_CPU PLACE TDO TERMINATION


H_TDI
H_TDO
*1 2

D
NEAR XDP CONNECTOR H_TMS 3 4 Q42
H_TCK 5 6
TERMINATION IDEALLY TO BE 7 8
PLACED PLACE CLOSE TO EACH OTHER TO REDUCE STUB 51 G
NEXT TO IT OR WITHIN 1.5 OF CPU. +/-5%

D
*R234 R215
51 *1K *R211 *R212 Q40 2N7002

S
1K 1K
+/-1% +/-1% +/-1% +/-1% PLACE TRST* TERMINATION RN40
Dummy Dummy Dummy Dummy
PCH_THERMTRIP_N
ANYWHERE ON ROUTE.
H_TRST_N
*1 2 20,33 PLTRST_N
G

DEFENSIVE SITE H_CATERR_N H_PROCHOT_N 3 4 2N7002

S
H_PRDY_N 5 6
PCH_PECI 7 8
H_PWRGD 51
+/-5%

Need to be double checked.

A A

V_1D05V_CPU

*R296
10K
Dummy
Need check the power and the value of R221
FOXCONN PCEG
according to the latest CPU datasheet Title

SWITCH_SEL_CPU CPU1-MSIC
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 8 of 45


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D D

?
SKT_H2
U1C

REV = 4
X_1X16_RXP0 B11 BALLMAP_REV = 1.6 C13 X_1X16_TXP0
16 X_1X16_RXP0 B12 PEG_RX[0] PEG_TX[0] C14 X_1X16_TXN0 X_1X16_TXP0 16
X_1X16_RXN0
16 X_1X16_RXN0 PEG_RX#[0] PEG_TX#[0] X_1X16_TXN0 16
X_1X16_RXP1 D12 E14 X_1X16_TXP1
16 X_1X16_RXP1 D11 PEG_RX[1] PEG_TX[1] E13 X_1X16_TXN1 X_1X16_TXP1 16
X_1X16_RXN1
16 X_1X16_RXN1 PEG_RX#[1] PEG_TX#[1] X_1X16_TXN1 16
X_1X16_RXP2 C10 G14 X_1X16_TXP2
16 X_1X16_RXP2 PEG_RX[2] PEG_TX[2] X_1X16_TXP2 16
X_1X16_RXN2 C9 G13 X_1X16_TXN2
16 X_1X16_RXN2 E10 PEG_RX#[2] PEG_TX#[2] F12 X_1X16_TXP3 X_1X16_TXN2 16
X_1X16_RXP3
16 X_1X16_RXP3 PEG_RX[3] PEG_TX[3] X_1X16_TXP3 16
X_1X16_RXN3 E9 F11 X_1X16_TXN3
16 X_1X16_RXN3 B8 PEG_RX#[3] PEG_TX#[3] J14 X_1X16_TXP4 X_1X16_TXN3 16
X_1X16_RXP4
16 X_1X16_RXP4 PEG_RX[4] PEG_TX[4] X_1X16_TXP4 16
X_1X16_RXN4 B7 J13 X_1X16_TXN4 ?
16 X_1X16_RXN4 PEG_RX#[4] PEG_TX#[4] X_1X16_TXN4 16 SKT_H2
X_1X16_RXP5 C6 D8 X_1X16_TXP5 U1D
16 X_1X16_RXP5 C5 PEG_RX[5] PEG_TX[5] D7 X_1X16_TXN5 X_1X16_TXP5 16
X_1X16_RXN5
16 X_1X16_RXN5 PEG_RX#[5] PEG_TX#[5] X_1X16_TXN5 16
X_1X16_RXP6 A5 D3 X_1X16_TXP6 REV = 4
16 X_1X16_RXP6 A6 PEG_RX[6] PEG_TX[6] C3 X_1X16_TXN6 X_1X16_TXP6 16 AC8
X_1X16_RXN6 BALLMAP_REV = 1.6

PEG
16 X_1X16_RXN6 PEG_RX#[6] PEG_TX#[6] X_1X16_TXN6 16 FDI_TX[0] H_FDI_TX_DP0 21
X_1X16_RXP7 E2 E6 X_1X16_TXP7 AC7
16 X_1X16_RXP7 PEG_RX[7] PEG_TX[7] X_1X16_TXP7 16 FDI_TX#[0] H_FDI_TX_DN0 21
X_1X16_RXN7 E1 E5 X_1X16_TXN7 AC5 AC2
16 X_1X16_RXN7 F4 PEG_RX#[7] PEG_TX#[7] F8 X_1X16_TXP8 X_1X16_TXN7 16 21 H_FDI_FSYNC0_1 AC4 FDI_FSYNC_0 FDI_TX[1] AC3 H_FDI_TX_DP1 21
X_1X16_RXP8
16 X_1X16_RXP8 PEG_RX[8] PEG_TX[8] X_1X16_TXP8 16 21 H_FDI_LSYNC0_1 FDI_LSYNC_0 FDI_TX[0] FDI_TX#[1] H_FDI_TX_DN1 21
X_1X16_RXN8 F3 F7 X_1X16_TXN8 AD2
16 X_1X16_RXN8 G2 PEG_RX#[8] PEG_TX#[8] G10 X_1X16_TXP9 X_1X16_TXN8 16 FDI_TX[2] AD1 H_FDI_TX_DP2 21
X_1X16_RXP9
16 X_1X16_RXP9 PEG_RX[9] PEG_TX[9] X_1X16_TXP9 16 FDI_TX#[2] H_FDI_TX_DN2 21
X_1X16_RXN9 G1 G9 X_1X16_TXN9 AD4
16 X_1X16_RXN9 PEG_RX#[9] PEG_TX#[9] X_1X16_TXN9 16 FDI_TX[3] H_FDI_TX_DP3 21
X_1X16_RXP10 H3 G5 X_1X16_TXP10 AD3
16 X_1X16_RXP10 H4 PEG_RX[10] PEG_TX[10] G6 X_1X16_TXN10 X_1X16_TXP10 16 FDI_TX#[3] H_FDI_TX_DN3 21
X_1X16_RXN10
16 X_1X16_RXN10 PEG_RX#[10] PEG_TX#[10] X_1X16_TXN10 16
C X_1X16_RXP11 J1 K7 X_1X16_TXP11 AD7 C
16 X_1X16_RXP11 J2 PEG_RX[11] PEG_TX[11] K8 X_1X16_TXN11 X_1X16_TXP11 16 FDI_TX[4] AD6 H_FDI_TX_DP4 21
X_1X16_RXN11
16 X_1X16_RXN11 PEG_RX#[11] PEG_TX#[11] X_1X16_TXN11 16 FDI_TX#[4] H_FDI_TX_DN4 21
X_1X16_RXP12 K3 J5 X_1X16_TXP12 AE5 AE7
16 X_1X16_RXP12 PEG_RX[12] PEG_TX[12] X_1X16_TXP12 16 21 H_FDI_FSYNC1_1 FDI_LSYNC_1 FDI_TX[5] H_FDI_TX_DP5 21
X_1X16_RXN12 K4 J6 X_1X16_TXN12 AE4 AE8
16 X_1X16_RXN12 L1 PEG_RX#[12] PEG_TX#[12] M8 X_1X16_TXP13 X_1X16_TXN12 16 21 H_FDI_LSYNC1_1 FDI_FSYNC_1 FDI_TX#[5] AF3 H_FDI_TX_DN5 21
X_1X16_RXP13
16 X_1X16_RXP13 PEG_RX[13] PEG_TX[13] X_1X16_TXP13 16 FDI_TX[6] H_FDI_TX_DP6 21
X_1X16_RXN13 L2 M7 X_1X16_TXN13 AF2
16 X_1X16_RXN13 M3 PEG_RX#[13] PEG_TX#[13] L6 X_1X16_TXP14 X_1X16_TXN13 16 FDI_TX#[6] AG2 H_FDI_TX_DN6 21
X_1X16_RXP14
16 X_1X16_RXP14 PEG_RX[14] PEG_TX[14] X_1X16_TXP14 16 FDI_TX[7] H_FDI_TX_DP7 21
X_1X16_RXN14 M4 L5 X_1X16_TXN14 AG1
16 X_1X16_RXN14 PEG_RX#[14] PEG_TX#[14] X_1X16_TXN14 16 FDI_TX#[7] H_FDI_TX_DN7 21
X_1X16_RXP15 N1 N5 X_1X16_TXP15
16 X_1X16_RXP15 N2 PEG_RX[15] PEG_TX[15] N6 X_1X16_TXN15 X_1X16_TXP15 16 AG3
X_1X16_RXN15
16 X_1X16_RXN15 PEG_RX#[15] PEG_TX#[15] X_1X16_TXN15 16 21 H_FDI_INT_1 FDI_INT FDI

*
W5 V7 V_CPU_VCCIO R374+/-1% 24.9 AE2 LINK
18 H_DMI_RX_DP0 DMI_RX[0] DMI_TX[0] H_DMI_TX_DP0 18 V_1D05V_CPU FDI_COMPIO
W4 V6 AE1
18 H_DMI_RX_DN0 DMI_RX#[0] DMI_TX#[0] H_DMI_TX_DN0 18 FDI_ICOMPO
V3 W7
18 H_DMI_RX_DP1 V4 DMI_RX[1] DMI_TX[1] W8 H_DMI_TX_DP1 18 4 OF 11
18 H_DMI_RX_DN1 DMI_RX#[1] DMI_TX#[1] H_DMI_TX_DN1 18
Y3 Y6
18 H_DMI_RX_DP2 Y4 DMI_RX[2] DMI_TX[2] Y7 H_DMI_TX_DP2 18 CPU_SKT_H2
?
DMI

18 H_DMI_RX_DN2 DMI_RX#[2] DMI_TX#[2] H_DMI_TX_DN2 18


AA4 AA7
18 H_DMI_RX_DP3 DMI_RX_3 DMI_TX[3] H_DMI_TX_DP3 18
AA5 AA8
18 H_DMI_RX_DN3 DMI_RX#[3] DMI_TX#[3] H_DMI_TX_DN3 18
P3 P8
P4 PE_RX[0] PE_TX[0] P7
V_1D05V_CPU R2 PE_RX#[0] PE_TX#[0] T7
R1 PE_RX[1] PE_TX[1] T8
T4 PE_RX#[1] PE_TX#[1] R6
DESIGN NOTE:
PE_RX[2] PE_TX[2]
N/T: PCIE X4 LANES ARE NOT SUPPORTED ON DESKTOP CPU SKUS
GEN

T3 R5
U2 PE_RX#[2] PE_TX#[2] U5
U1 PE_RX[3] PE_TX[3] U6
PE_RX#[3] PE_TX#[3]
*

V_CPU_VCCIO R194+/-1% 24.9 GRCOM B5


C4 PEG_ICOMPO
B4 PEG_RCOMPO
PEG_ICOMPI

CPU_SKT_H2
?
B Short B4 & C4 together, route as a single 4 mil trace 3 OF
to11 R2 B

Route B5 to R2 as a aeperate 10 mil trace

A A

Foxconn Confidential Document,please keep it secret.C6

FOXCONN PCEG
Title
CPU2-PEG/DMI/FDI
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 9 of 45


5 4 3 2 1
5 4 3 2 1

D D

14 D3_DATA_A[63..0]

?
SKT_H2 U1A
REV = 4
D3_DATA_A0 AJ3 BALLMAP_REV = 1.6 AV27 D3_MAA_A0 D3_MAA_A[15..0] 14
D3_DATA_A1 AJ4 SA_DQ[0] SA_MA[0] AY24 D3_MAA_A1
D3_DATA_A2 AL3 SA_DQ[1] SA_MA[1] AW24 D3_MAA_A2
D3_DATA_A3 AL4 SA_DQ[2] SA_MA[2] AW23 D3_MAA_A3
D3_DATA_A4 AJ2 SA_DQ[3] SA_MA[3] AV23 D3_MAA_A4
D3_DATA_A5 AJ1 SA_DQ[4] SA_MA[4] AT24 D3_MAA_A5
D3_DATA_A6 AL2 SA_DQ[5] SA_MA[5] AT23 D3_MAA_A6
D3_DATA_A7 AL1 SA_DQ[6] SA_MA[6] AU22 D3_MAA_A7
D3_DATA_A8 AN1 SA_DQ[7] SA_MA[7] AV22 D3_MAA_A8
D3_DATA_A9 AN4 SA_DQ[8] SA_MA[8] AT22 D3_MAA_A9
D3_DATA_A10 AR3 SA_DQ[9] SA_MA[9] AV28 D3_MAA_A10
D3_DATA_A11 AR4 SA_DQ[10] SA_MA[10] AU21 D3_MAA_A11
D3_DATA_A12 AN2 SA_DQ[11] SA_MA[11] AT21 D3_MAA_A12
D3_DATA_A13 AN3 SA_DQ[12] SA_MA[12] AW32 D3_MAA_A13
D3_DATA_A14 AR2 SA_DQ[13] SA_MA[13] AU20 D3_MAA_A14
D3_DATA_A15 AR1 SA_DQ[14] SA_MA[14] AT20 D3_MAA_A15
D3_DATA_A16 AV2 SA_DQ[15] SA_MA[15]
D3_DATA_A17 AW3 SA_DQ[16] AW29
D3_DATA_A18 AV5 SA_DQ[17] SA_WE# AV30 D3_WE_A# 14
D3_DATA_A19 AW5 SA_DQ[18] SA_CAS# AU28 D3_CAS_A# 14
D3_DATA_A20 AU2 SA_DQ[19] SA_RAS# D3_RAS_A# 14
D3_DATA_A21 AU3 SA_DQ[20]
D3_DATA_A22 AU5 SA_DQ[21] AY29 D3_SBS_A0 D3_SBS_A[2..0] 14
D3_DATA_A23 AY5 SA_DQ[22] SA_BS_0 AW28 D3_SBS_A1
D3_DATA_A24 AY7 SA_DQ[23] SA_BS[1] AV20 D3_SBS_A2
D3_DATA_A25 AU7 SA_DQ[24] SA_BS[2]
D3_DATA_A26 AV9 SA_DQ[25]
D3_DATA_A27 AU9 SA_DQ[26] AU29 D3_SCS_A_#0
D3_DATA_A28 AV7 SA_DQ[27] SA_CS#[0] AV32 D3_SCS_A_#1 D3_SCS_A_#0 14
D3_DATA_A29 AW7 SA_DQ[28] SA_CS#[1] AW30 D3_SCS_A_#1 14
C C
D3_DATA_A30 AW9 SA_DQ[29] SA_CS#[2] AU33
D3_DATA_A31 AY9 SA_DQ[30] SA_CS#[3]
D3_DATA_A32 AU35 SA_DQ[31] AV19 D3_SCKE_A0
D3_DATA_A33 AW37 SA_DQ[32] SA_CKE[0] AT19 D3_SCKE_A1 D3_SCKE_A0 14
D3_DATA_A34 AU39 SA_DQ[33] SA_CKE[1] AU18 D3_SCKE_A1 14
D3_DATA_A35 AU36 SA_DQ[34] SA_CKE[3] AV18
D3_DATA_A36 AW35 SA_DQ[35] SA_CKE[2]
D3_DATA_A37 AY36 SA_DQ[36] AV31 D3_ODT_A0
D3_DATA_A38 AU38 SA_DQ[37] SA_ODT[0] AU32 D3_ODT_A1 D3_ODT_A0 14
D3_DATA_A39 AU37 SA_DQ[38] SA_ODT[1] AU30 D3_ODT_A1 14
D3_DATA_A40 AR40 SA_DQ[39] SA_ODT[2] AW33
D3_DATA_A41 AR37 SA_DQ[40] SA_ODT[3]
D3_DATA_A42 AN38 SA_DQ[41]
D3_DATA_A43 AN37 SA_DQ[42]
D3_DATA_A44 AR39 SA_DQ[43]
D3_DATA_A45 AR38 SA_DQ[44] AY25
D3_DATA_A46 AN39 SA_DQ[45] SA_CK[0] AW25 D3_CK_DDR_A_DP0 14
D3_DATA_A47 AN40 SA_DQ[46] SA_CK#[0] AU24 D3_CK_DDR_A_DN0 14
D3_DATA_A48 AL40 SA_DQ[47] SA_CK[1] AU25 D3_CK_DDR_A_DP1 14
D3_DATA_A49 AL37 SA_DQ[48] SA_CK#[1] AW27 D3_CK_DDR_A_DN1 14
D3_DATA_A50 AJ38 SA_DQ[49] SA_CK[2] AY27
D3_DATA_A51 AJ37 SA_DQ[50] SA_CK#[2] AV26
D3_DATA_A52 AL39 SA_DQ[51] SA_CK[3] AW26
D3_DATA_A53 AL38 SA_DQ[52] SA_CK#[3]
D3_DATA_A54 AJ39 SA_DQ[53]
D3_DATA_A55 AJ40 SA_DQ[54] AW18
D3_DATA_A56 AG40 SA_DQ[55] SM_DRAMRST# D3_DRAMRST# 14,15
D3_DATA_A57 AG37 SA_DQ[56]
D3_DATA_A58 AE38 SA_DQ[57]
D3_DATA_A59 AE37 SA_DQ[58]
D3_DATA_A60 AG39 SA_DQ[59]
D3_DATA_A61 AG38 SA_DQ[60]
D3_DATA_A62 AE39 SA_DQ[61]
D3_DATA_A63 AE40 SA_DQ[62]
SA_DQ[63]

AK3 AV13
B 14 D3_DQS_A_DP0 SA_DQS[0] SA_DQS[8] B
AP3 AV12
14 D3_DQS_A_DP1 AW4 SA_DQS[1] SA_DQS#[8]
14 D3_DQS_A_DP2 SA_DQS[2]
AV8 AU12
14 D3_DQS_A_DP3 AV37 SA_DQS[3] SA_ECC_CB[0] AU14
14 D3_DQS_A_DP4 SA_DQS[4] SA_ECC_CB[1]
AP38 AW13
14 D3_DQS_A_DP5 SA_DQS[5] SA_ECC_CB[2]
AK38 AY13
14 D3_DQS_A_DP6 AF38 SA_DQS[6] SA_ECC_CB[3] AU13 DDR ECC IS NOT SUPPORTED ON DESKTOP SKUS
14 D3_DQS_A_DP7 SA_DQS[7] SA_ECC_CB[4] AU11 ECC TRACES ARE FOR ENGINEERING FUNCTION ONLY
AK2 SA_ECC_CB[5] AY12 DESIGN NOTE:
14 D3_DQS_A_DN0 SA_DQS#[0] SA_ECC_CB[6]
AP2 AW12
14 D3_DQS_A_DN1 SA_DQS#[1] SA_ECC_CB[7]
AV4
14 D3_DQS_A_DN2 AW8 SA_DQS#[2]
14 D3_DQS_A_DN3 SA_DQS#[3]
AV36
14 D3_DQS_A_DN4 AP39 SA_DQS#[4] DDR_A
14 D3_DQS_A_DN5 SA_DQS#[5]
AK39
14 D3_DQS_A_DN6 SA_DQS#[6]
AF39
14 D3_DQS_A_DN7 SA_DQS#[7]
1 OF 11
CPU_SKT_H2
?

A A

Foxconn Confidential Document,please keep it secret.C6

FOXCONN PCEG
Title
CPU3-DDR3_CHA
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 10 of 45


5 4 3 2 1
5 4 3 2 1

D D
15 D3_DATA_B[63..0]
?
SKT_H2
U1B

REV = 4
D3_DATA_B0 AG7 BALLMAP_REV = 1.6 AK24 D3_MAA_B0 D3_MAA_B[15..0] 15
D3_DATA_B1 AG8 SB_DQ[0] SB_MA[0] AM20 D3_MAA_B1
D3_DATA_B2 AJ9 SB_DQ[1] SB_MA[1] AM19 D3_MAA_B2
D3_DATA_B3 AJ8 SB_DQ[2] SB_MA[2] AK18 D3_MAA_B3
D3_DATA_B4 AG5 SB_DQ[3] SB_MA[3] AP19 D3_MAA_B4
D3_DATA_B5 AG6 SB_DQ[4] SB_MA[4] AP18 D3_MAA_B5
D3_DATA_B6 AJ6 SB_DQ[5] SB_MA[5] AM18 D3_MAA_B6
D3_DATA_B7 AJ7 SB_DQ[6] SB_MA[6] AL18 D3_MAA_B7
D3_DATA_B8 AL7 SB_DQ[7] SB_MA[7] AN18 D3_MAA_B8
D3_DATA_B9 AM7 SB_DQ[8] SB_MA[8] AY17 D3_MAA_B9
D3_DATA_B10 AM10 SB_DQ[9] SB_MA[9] AN23 D3_MAA_B10
D3_DATA_B11 AL10 SB_DQ[10] SB_MA[10] AU17 D3_MAA_B11
D3_DATA_B12 AL6 SB_DQ[11] SB_MA[11] AT18 D3_MAA_B12
D3_DATA_B13 AM6 SB_DQ[12] SB_MA[12] AR26 D3_MAA_B13
D3_DATA_B14 AL9 SB_DQ[13] SB_MA[13] AY16 D3_MAA_B14
D3_DATA_B15 AM9 SB_DQ[14] SB_MA[14] AV16 D3_MAA_B15
D3_DATA_B16 AP7 SB_DQ[15] SB_MA[15]
D3_DATA_B17 AR7 SB_DQ[16] AR25
D3_DATA_B18 AP10 SB_DQ[17] SB_WE# AK25 D3_WE_B# 15
D3_DATA_B19 AR10 SB_DQ[18] SB_CAS# AP24 D3_CAS_B# 15
D3_DATA_B20 AP6 SB_DQ[19] SB_RAS# D3_RAS_B# 15
D3_DATA_B21 AR6 SB_DQ[20] AP23 D3_SBS_B0 D3_SBS_B[2..0] 15
D3_DATA_B22 AP9 SB_DQ[21] SB_BS[0] AM24 D3_SBS_B1
D3_DATA_B23 AR9 SB_DQ[22] SB_BS[1] AW17 D3_SBS_B2
D3_DATA_B24 AM12 SB_DQ[23] SB_BS[2]
D3_DATA_B25 AM13 SB_DQ[24]
D3_DATA_B26 AR13 SB_DQ[25] AN25 D3_SCS_B_#0
D3_DATA_B27 AP13 SB_DQ[26] SB_CS#[0] AN26 D3_SCS_B_#1 D3_SCS_B_#0 15
D3_DATA_B28 AL12 SB_DQ[27] SB_CS#[1] AL25 D3_SCS_B_#1 15
D3_DATA_B29 AL13 SB_DQ[28] SB_CS#[2] AT26
D3_DATA_B30 AR12 SB_DQ[29] SB_CS#[3]
D3_DATA_B31 AP12 SB_DQ[30] AU16 D3_SCKE_B0
C C
D3_DATA_B32 AR28 SB_DQ[31] SB_CKE[0] AY15 D3_SCKE_B1 D3_SCKE_B0 15
D3_DATA_B33 AR29 SB_DQ[32] SB_CKE[1] AW15 D3_SCKE_B1 15
D3_DATA_B34 AL28 SB_DQ[33] SB_CKE[2] AV15
D3_DATA_B35 AL29 SB_DQ[34] SB_CKE[3]
D3_DATA_B36 AP28 SB_DQ[35] AL26 D3_ODT_B0
D3_DATA_B37 AP29 SB_DQ[36] SB_ODT[0] AP26 D3_ODT_B1 D3_ODT_B0 15
D3_DATA_B38 AM28 SB_DQ[37] SB_ODT[1] AM26 D3_ODT_B1 15
D3_DATA_B39 AM29 SB_DQ[38] SB_ODT[2] AK26
D3_DATA_B40 AP32 SB_DQ[39] SB_ODT[3]
D3_DATA_B41 AP31 SB_DQ[40]
D3_DATA_B42 AP35 SB_DQ[41] SB_CK[0]
D3_DATA_B43 AP34 SB_DQ[42]
D3_DATA_B44 AR32 SB_DQ[43] AL21
D3_DATA_B45 AR31 SB_DQ[44] SB_CK[0] AL22 D3_CK_DDR_B_DP0 15
D3_DATA_B46 AR35 SB_DQ[45] SB_CK#[0] AL20 D3_CK_DDR_B_DN0 15
D3_DATA_B47 AR34 SB_DQ[46] SB_CK[1] AK20 D3_CK_DDR_B_DP1 15
D3_DATA_B48 AM32 SB_DQ[47] SB_CK#[1] AL23 D3_CK_DDR_B_DN1 15
D3_DATA_B49 AM31 SB_DQ[48] SB_CK[2] AM22
D3_DATA_B50 AL35 SB_DQ[49] SB_CK#[2] AP21
D3_DATA_B51 AL32 SB_DQ[50] SB_CK[3] AN21
D3_DATA_B52 AM34 SB_DQ[51] SB_CK#[3]
D3_DATA_B53 AL31 SB_DQ[52]
D3_DATA_B54 AM35 SB_DQ[53] AH1
D3_DATA_B55 AL34 SB_DQ[54] SB_DIMM_DQVREF AH4 DIMM_DQ_CPU_VREF_B 15
D3_DATA_B56 AH35 SB_DQ[55] SA_DIMM_DQVREF C540 DIMM_DQ_CPU_VREF_A 14
AH34 SB_DQ[56]
D3_DATA_B57
D3_DATA_B58 AE34 SB_DQ[57]
SB_DQ[58]
C541
* *
0.1uF
0.1uF
16V, Y5V, +80%/-20%
D3_DATA_B59 AE35
D3_DATA_B60 AJ35 SB_DQ[59]
D3_DATA_B61 AJ34 SB_DQ[60] width 10mil spacing 12mil,near CPU
D3_DATA_B62 AF33 SB_DQ[61]
D3_DATA_B63 AF35 SB_DQ[62] 16V, Y5V, +80%/-20%
SB_DQ[63]
AH7 AN16
15 D3_DQS_B_DP0 SB_DQS[0] SB_DQS[8]
AM8 AN15
15 D3_DQS_B_DP1 AR8 SB_DQS[1] SB_DQS#[8]
15 D3_DQS_B_DP2 SB_DQS[2]
AN13 AL16
B 15 D3_DQS_B_DP3 SB_DQS[3] SB_ECC_CB[0] B
AN29 AM16
15 D3_DQS_B_DP4 AP33 SB_DQS[4] SB_ECC_CB[1] AP16
15 D3_DQS_B_DP5 SB_DQS[5] SB_ECC_CB[2]
AL33 AR16
15 D3_DQS_B_DP6 AG35 SB_DQS[6] SB_ECC_CB[3] AL15
15 D3_DQS_B_DP7 SB_DQS[7] SB_ECC_CB[4] AM15
AH6 SB_ECC_CB[5] AR15 DDR ECC IS NOT SUPPORTED ON DESKTOP SKUS
15 D3_DQS_B_DN0 AL8 SB_DQS#[0] SB_ECC_CB[6] AP15 ECC TRACES ARE FOR ENGINEERING FUNCTION ONLY
15 D3_DQS_B_DN1 SB_DQS#[1] SB_ECC_CB[7]
AP8 DESIGN NOTE:
15 D3_DQS_B_DN2 AN12 SB_DQS#[2]
15 D3_DQS_B_DN3 SB_DQS#[3]
AN28
15 D3_DQS_B_DN4 SB_DQS#[4]
AR33
15 D3_DQS_B_DN5 AM33 SB_DQS#[5] DDR_B
15 D3_DQS_B_DN6 SB_DQS#[6]
AG34 2 OF 11
15 D3_DQS_B_DN7 SB_DQS#7]

CPU_SKT_H2
?

A A

Foxconn Confidential Document,please keep it secret.C6

FOXCONN PCEG
Title
CPU4-DDR3_CHB
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 11 of 45


5 4 3 2 1
5 4 3 2 1

V_CPU_CORE

SKT_H2 ?
U1F

REV = 1.6
A12 F32
A13 VCC VCC F33 V_1D05V_CPU V_SM
D
A14 VCC VCC F34 D
A15 VCC VCC G15 ?
A16 VCC VCC G16 U1H SKT_H2
A18 VCC VCC G18 REV = 4
A24 VCC VCC G19 BALLMAP_REV = 1.6
A25 VCC VCC G21 M13
A27 VCC VCC G22 V_1D1V_AXG VCCIO
A28 VCC VCC G24 A11 AJ13
B15 VCC VCC G25 A7 VCCIO VDDQ AJ14
B16 VCC VCC G27 AA3 VCCIO VDDQ AJ23
B18 VCC VCC G28 AB8 VCCIO VDDQ AJ24
B24 VCC VCC G30 AF8 VCCIO VDDQ AR20
VCC VCC SKT_H2 ? VCCIO VDDQ
B25 G31 U1G AG33 AR21
B27 VCC VCC G32 REV = 4 AJ16 VCCIO VDDQ AR22
B28 VCC VCC G33 BALLMAP_REV = 1.6 AJ17 VCCIO VDDQ AR23
B30 VCC VCC H13 AB33 AJ26 VCCIO VDDQ AR24
B31 VCC VCC H14 AB34 VCCAXG AJ28 VCCIO VDDQ AU19
B33 VCC VCC H15 AB35 VCCAXG AJ32 VCCIO VDDQ AU23
B34 VCC VCC H16 AB36 VCCAXG AK15 VCCIO VDDQ AU27
C15 VCC VCC H18 AB37 VCCAXG AK17 VCCIO VDDQ AU31
C16 VCC VCC H19 AB38 VCCAXG AK19 VCCIO VDDQ AV21
C18 VCC VCC H21 AB39 VCCAXG AK21 VCCIO VDDQ AV24
C19 VCC VCC H22 AB40 VCCAXG AK23 VCCIO VDDQ AV25
C21 VCC VCC H24 AC33 VCCAXG AK27 VCCIO VDDQ AV29
C22 VCC VCC H25 AC34 VCCAXG AK29 VCCIO VDDQ AV33
C24 VCC VCC H27 AC35 VCCAXG AK30 VCCIO VDDQ AW31
C25 VCC VCC H28 AC36 VCCAXG B9 VCCIO VDDQ AY23
C27 VCC VCC H30 AC37 VCCAXG D10 VCCIO VDDQ AY26
C28 VCC VCC H31 AC38 VCCAXG D6 VCCIO VDDQ AY28
C30 VCC VCC H32 AC39 VCCAXG E3 VCCIO VDDQ
C31 VCC VCC J12 AC40 VCCAXG E4 VCCIO
C33 VCC VCC J15 T33 VCCAXG G3 VCCIO
C34 VCC VCC J16 T34 VCCAXG G4 VCCIO AJ20
C36 VCC VCC J18 T35 VCCAXG J3 VCCIO VDDQ
D13 VCC VCC J19 T36 VCCAXG J4 VCCIO
D14 VCC VCC J21 T37 VCCAXG J7 VCCIO
D15 VCC VCC J22 T38 VCCAXG J8 VCCIO
D16 VCC VCC J24 T39 VCCAXG L3 VCCIO
C C
D18 VCC VCC J25 T40 VCCAXG L4 VCCIO
D19 VCC VCC J27 U33 VCCAXG L7 VCCIO
D21 VCC VCC J28 U34 VCCAXG N3 VCCIO
D22 VCC VCC J30 U35 VCCAXG N4 VCCIO
D24 VCC VCC K15 U36 VCCAXG N7 VCCIO
D25 VCC VCC K16 U37 VCCAXG R3 VCCIO
D27 VCC VCC K18 U38 VCCAXG R4 VCCIO
D28 VCC VCC K19 U39 VCCAXG R7 VCCIO
D30 VCC VCC K21 U40 VCCAXG U3 VCCIO
D31 VCC VCC K22 W33 VCCAXG U4 VCCIO
D33 VCC VCC K24 W34 VCCAXG U7 VCCIO
D34 VCC VCC K25 W35 VCCAXG V8 VCCIO
D35 VCC VCC K27 W36 VCCAXG W3 VCCIO
D36 VCC VCC K28 W37 VCCAXG VCCIO
E15 VCC VCC K30 W38 VCCAXG
E16 VCC VCC L13 Y33 VCCAXG H10
E18 VCC VCC L14 Y34 VCCAXG H11 VCCSA
E19 VCC VCC L15 Y35 VCCAXG H12 VCCSA
VCC VCC VCCAXG V_VCCSA VCCSA
E21 L16 Y36 J10
E22 VCC VCC L18 Y37 VCCAXG K10 VCCSA
E24 VCC VCC L19 Y38 VCCAXG K11 VCCSA
E25 VCC VCC L21 VCCAXG L11 VCCSA
E27 VCC VCC L22 GFX POWER L12 VCCSA
E28 VCC VCC L24 M10 VCCSA
E30 VCC VCC L25 7 OF 11 M11 VCCSA
E31 VCC VCC L27 M12 VCCSA
VCC VCC CPU_SKT_H2 VCCSA
E33 L28 ?
E34 VCC VCC L30 AK11
VCC VCC V_1D8V_SFR VCCPLL
E35 M14 AK12
F15 VCC VCC M15 VCCPLL
F16 VCC VCC M16 IO/SA/PLL
F18 VCC VCC M18 POWER
F19 VCC VCC M19
F21 VCC VCC M21
F22 VCC VCC M22 8 OF 11
F24 VCC VCC M24
VCC VCC CPU_SKT_H2
F25 M25 ?
B
F27 VCC VCC M27 B
F28 VCC VCC M28
F30 VCC VCC M30
F31 VCC VCC
VCC

CPU POWER
6 OF 11
CPU_SKT_H2
?

A A

Foxconn Confidential Document,please keep it secret.C6

FOXCONN PCEG
Title
CPU5-POWER
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 12 of 45


5 4 3 2 1
5 4 3 2 1

CPU_SKT_H2
Fab 1.0
? U1K
SKT_H2
U1I AV11 G8
A17 BALLMAP_REV = 1.6
AM27 AV14 VSS VSS H1
A23 VSS REV = 4 VSS AM3 AV17 VSS VSS H17
A26 VSS VSS AM30 AV3 VSS VSS H2
A29 VSS VSS AM36 AV35 VSS VSS H20
A35 VSS VSS AM37 AV38 VSS VSS H23
AA33 VSS VSS AM38 AV6 VSS VSS H26
AA34 VSS VSS AM39 AW10 VSS VSS H29
AA35 VSS VSS AM4 AW11 VSS VSS H33
AA36 VSS VSS AM40 AW14 VSS VSS H35
D
AA37 VSS VSS AM5 AW16 VSS VSS H37 D
AA38 VSS VSS AN10 AW36 VSS VSS H39
AA6 VSS VSS AN11 AW6 VSS VSS H5
AB5 VSS VSS AN14 AY11 VSS VSS H6
AC1 VSS VSS AN17 AY14 VSS VSS H9
AC6 VSS VSS AN19 AY18 VSS VSS J11
AD33 VSS VSS AN22 AY35 VSS VSS J17
AD36 VSS VSS AN24 AY4 VSS VSS J20
AD38 VSS VSS AN27 AY6 VSS VSS J23
AD39 VSS VSS AN30 AY8 VSS VSS J26
AD40 VSS VSS AN31 B10 VSS VSS J29
AD5 VSS VSS AN32 B13 VSS VSS J32
AD8 VSS VSS AN33 B14 VSS VSS K1
AE3 VSS VSS AN34 B17 VSS VSS K12
AE33 VSS VSS AN35 B23 VSS VSS K13
AE36 VSS VSS AN36 B26 VSS VSS K14
AF1 VSS VSS AN5 B29 VSS VSS K17 U1_1
AF34 VSS VSS AN6 B32 VSS VSS K2
AF36 VSS VSS AN7 B35 VSS VSS K20
AF37 VSS VSS AN8 B38 VSS VSS K23
AF40 VSS VSS AN9 B6 VSS VSS K26
AF5 VSS VSS AP1 C11 VSS VSS K29
AF6 VSS VSS AP11 C12 VSS VSS K33
VSS VSS VSS VSS SKT_H2 ?
AF7 AP14 C17 K35 U1J
AG36 VSS VSS AP17 C20 VSS VSS K37 REV = 4
AH2 VSS VSS AP22 C23 VSS VSS K39 BALLMAP_REV = 1.6
AH3 VSS VSS AP25 C26 VSS VSS K5
AH33 VSS VSS AP27 C29 VSS VSS K6 AB7
AH36 VSS VSS AP30 C32 VSS VSS L10 AD37 RSVD1
AH37 VSS VSS AP36 C35 VSS VSS L17 AG4 RSVD2
AH38 VSS VSS AP37 C7 VSS VSS L20 AJ29 RSVD3 AT11
AH39 VSS VSS AP4 C8 VSS VSS L23 AJ30 RSVD4 RSVD16 AP20
AH40 VSS VSS AP40 D17 VSS VSS L26 AJ31 RSVD5 RSVD17 AN20
AH5 VSS VSS AP5 D2 VSS VSS L29 AV34 RSVD6 RSVD18 AU10
AH8 VSS VSS AR11 D20 VSS VSS L8 AW34 RSVD7 RSVD19 AY10
AJ12 VSS VSS AR14 D23 VSS VSS M1 RSVD8 RSVD20
AJ15 VSS VSS AR17 D26 VSS VSS M17 P35
AJ18 VSS VSS AR18 D29 VSS VSS M2 P37 RSVD9
C C
AJ21 VSS VSS AR19 D32 VSS VSS M20 P39 RSVD10
AJ25 VSS VSS AR27 D37 VSS VSS M23 R34 RSVD11
AJ27 VSS VSS AR30 D39 VSS VSS M26 R36 RSVD12
AJ36 VSS VSS AR36 D4 VSS VSS M29 R38 RSVD13 AF4
AJ5 VSS VSS AR5 D5 VSS VSS M33 R40 RSVD14 RSVD21 AB6
AK1 VSS VSS AT1 D9 VSS VSS M35 RSVD15 RSVD22 AE6
AK10 VSS VSS AT10 E11 VSS VSS M37 RSVD23 AJ11
AK13 VSS_AK10 VSS AT12 E12 VSS VSS M39 RSVD24
AK14 VSS VSS AT13 E17 VSS VSS M5
AK16 VSS VSS AT15 E20 VSS VSS M6 A38 D38
AK22 VSS VSS AT16 E23 VSS VSS M9 AU40 NCTF1 RSVD25 C39
AK28 VSS VSS AT17 E26 VSS VSS N8 AW38 NCTF2 RSVD26 C38
AK31 VSS VSS AT2 E29 VSS VSS P1 C2 NCTF3 RSVD27 J34
AK32 VSS VSS AT25 E32 VSS VSS P2 D1 NCTF4 RSVD28 N34
AK33 VSS VSS AT27 E36 VSS VSS P36 NCTF5 RSVD29
AK34 VSS VSS AT28 E7 VSS VSS P38 SPARES
AK35 VSS VSS AT29 E8 VSS VSS P40
AK36 VSS VSS AT3 F1 VSS VSS P5 10 OF 11
AK37 VSS VSS AT30 F10 VSS VSS P6
VSS VSS VSS VSS CPU_SKT_H2
AK4 AT31 F13 R33 ?
AK40 VSS VSS AT32 F14 VSS VSS R35
AK5 VSS VSS AT33 F17 VSS VSS R37
AK6 VSS VSS AT34 F2 VSS VSS R39
AK7 VSS VSS AT35 F20 VSS VSS R8
AK8 VSS VSS AT36 F23 VSS VSS T1
AK9 VSS VSS AT37 F26 VSS VSS T5
AL11 VSS VSS AT38 F29 VSS VSS T6
AL14 VSS VSS AT39 F35 VSS VSS U8
AL17 VSS VSS AT4 F37 VSS VSS V1
AL19 VSS VSS AT40 F39 VSS VSS V2
AL24 VSS VSS AT5 F5 VSS VSS V33
AL27 VSS VSS AT6 F6 VSS VSS V34
AL30 VSS VSS AT7 F9 VSS VSS V35
AL36 VSS VSS AT8 G11 VSS VSS V36
AL5 VSS VSS AT9 G12 VSS VSS V37
AM1 VSS VSS AU1 G17 VSS VSS V38
AM11 VSS VSS AU15 G20 VSS VSS V39
B
AM14 VSS VSS AU26 G23 VSS VSS V40 B
AM17 VSS VSS AU34 G26 VSS VSS V5
AM2 VSS VSS AU4 G29 VSS VSS W6
AM21 VSS VSS AU6 G34 VSS VSS Y5
AM23 VSS VSS AU8 G7 VSS VSS Y8
AM25 VSS VSS AV10 AY37 VSS VSS
A4 VSS VSS B3 VSS_NCTF
AV39 VSS_NCTF VSS_NCTF
VSS_NCTF

9 OF 11
CPU_SKT_H2
?

A A

Foxconn Confidential Document,please keep it secret.C6

FOXCONN PCEG
Title
CPU6-GND
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 13 of 45


5 4 3 2 1
A
B
C
D

*
V_SM

C534
0.1uF

Dummy
R512

16V, X7R, +/-10%


*

1K

5
5

+/-1%

1K
* R501
+/-1%
198 79
187 FREE1 RSVD 77

*
49 FREE2 ODT1 195

V_SM
6.3V,X5R 48 FREE3 ODT0

V_SM_VTT

1uF
FREE4

C535
240

*C606
0.1uF
V_SM_VTT
120 VTT 68

*
VTT NC/PAR_IN 53
6.3V,X5R NC/ERR_OUT 167

1uF
239 NC/TEST4

C536
VSS

D3_CA_VREF_A
235
232 VSS
VSS
D3_ODT_A0
D3_ODT_A1

229

*
*
SMB ADDRESS:000

226 VSS
CHANNEL A DIMM 1

6.3V,X5R 223 VSS 39


10
10

1uF
220 VSS CB<0> 40

C545
C538

0.1uF
VSS CB<1>

CLOSE TO DIMM POWER PIN


217 45
214 VSS CB<2> 46
211 VSS CB<3> 158

*
208 VSS CB<4> 159
VSS CB<5>

16V, X7R, +/-10%


205 164

C539
0.1uF
202 VSS CB<6> 165
199 VSS CB<7>

*
166 VSS
163 VSS 7 D3_DQS_A_DP0

C550
0.1uF
160 VSS DQS<0> 6 D3_DQS_A_DN0

CPU
157 VSS DQS*<0>
154 VSS 16 D3_DQS_A_DP1
151 VSS DQS<1> 15 D3_DQS_A_DN1

*
148 VSS DQS*<1>

V_SM
145 VSS 25 D3_DQS_A_DP2
142 VSS DQS<2> 24 D3_DQS_A_DN2

EC47
820uF
VSS DQS*<2>

+/-20%
139

4
4

136 VSS 34 D3_DQS_A_DP3


133 VSS DQS<3> 33 D3_DQS_A_DN3
130 VSS DQS*<3>
127 VSS 85 D3_DQS_A_DP4
124 VSS DQS<4> 84 D3_DQS_A_DN4
121 VSS DQS*<4>
119 VSS 94 D3_DQS_A_DP5
116 VSS DQS<5> 93 D3_DQS_A_DN5
VSS DQS*<5>

PLACE BETWEEN DIMM1 AND


113
110 VSS 103 D3_DQS_A_DP6
107 VSS DQS<6> 102 D3_DQS_A_DN6
104 VSS DQS*<6>
101 VSS 112 D3_DQS_A_DP7
98 VSS DQS<7> 111 D3_DQS_A_DN7

*
95 VSS DQS*<7>

V_SM
VSS

11
92 43
89 VSS DQS<8> 42

C563
0.1uF
86 VSS DQS*<8>

Dummy
83 VSS 125 D3_DM_A0
80 VSS DM0/DQS9 126

R499
VSS DQS9*

ON DIMM_VREF_A
47
VSS

16V, X7R, +/-10%


* 44 134 D3_DM_A1
41 VSS DM1/DQS10 135
38 VSS DQS10*

1K
35 VSS 143 D3_DM_A2
32 VSS DM2/DQS11 144
VSS DQS11*

DIMM_DQ_CPU_VREF_A
29

+/-1%
26 VSS 152 D3_DM_A3
23 VSS DM3/DQS12 153
20 VSS DQS12*
VSS

1K
17 203 D3_DM_A4

PLACE RESISTORS CLOSE TO CH_A DIMMS


VSS DM4/DQS13

* R509
+/-1%
14 204
11 VSS DQS13*
8 VSS 212 D3_DM_A5
V_SM

5 VSS DM5/DQS14 213


2 VSS DQS14*
VSS
D3_DQS_A_DP[7..0]

D3_DQS_A_DN[7..0]

221 D3_DM_A6
10

197 DM6/DQS15 222


10
10
10
10

194 VDDQ DQS15*


10

VDDQ
10

191 230 D3_DM_A7

3
3

189 VDDQ DM7/DQS16 231


10
10
10
10

186 VDDQ NC/DQS16*


183 VDDQ 161
182 VDDQ DM8/DQS17 162
10 D3_SBS_A[2..0]

179 VDDQ DQS17*


D3_MAA_A[15..0]

*
15,20,35 SMB_CLK_MAIN

176 VDDQ 3 D3_DATA_A0


15,20,35 SMB_DATA_MAIN
DDRIII

173 VDDQ DQ<0> 4 D3_DATA_A1


D3_CK_DDR_A_DP0
D3_CK_DDR_A_DP1

VDDQ DQ<1>
D3_CK_DDR_A_DN0
D3_CK_DDR_A_DN1
D3_SCKE_A0
D3_SCKE_A1

170 9 D3_DATA_A2

C543
D3_SCS_A_#0
D3_SCS_A_#1

0.1uF
78 VDDQ DQ<2> 10 D3_DATA_A3
75 VDD DQ<3> 122 D3_DATA_A4
72 VDD DQ<4> 123 D3_DATA_A5
69 VDD DQ<5> 128 D3_DATA_A6
VDD DQ<6>

16V, X7R, +/-10%


66 129 D3_DATA_A7
VDD DQ<7>

D3_DQ_VREF_A
65 12 D3_DATA_A8
62 VDD DQ<8> 13 D3_DATA_A9
VDD DQ<9>
D3_SBS_A0
D3_SBS_A1
D3_SBS_A2

60 18 D3_DATA_A10
D3_MAA_A9
D3_MAA_A8
D3_MAA_A7
D3_MAA_A6
D3_MAA_A5
D3_MAA_A4
D3_MAA_A3
D3_MAA_A2
D3_MAA_A1
D3_MAA_A0

D3_MAA_A15
D3_MAA_A14
D3_MAA_A13
D3_MAA_A12
D3_MAA_A11
D3_MAA_A10

57 VDD DQ<10> 19 D3_DATA_A11


VDD DQ<11>
D3_CA_VREF_A
D3_DQ_VREF_A

54 131 D3_DATA_A12
51 VDD DQ<12> 132 D3_DATA_A13
3D3V_SYS

236 VDD DQ<13> 137 D3_DATA_A14


VDDSPD DQ<14> 138 D3_DATA_A15
DQ<15> 21 D3_DATA_A16
67 DQ<16> 22 D3_DATA_A17
1 VREFCA DQ<17> 27 D3_DATA_A18
118 VREFDQ DQ<18> 28 D3_DATA_A19
238 SCL DQ<19> 140 D3_DATA_A20
237 SDA DQ<20> 141 D3_DATA_A21
117 SA1 DQ<21> 146 D3_DATA_A22
SA0 DQ<22> 147 D3_DATA_A23
DQ<23> 30 D3_DATA_A24
DQ<24> 31 D3_DATA_A25
52 DQ<25> 36 D3_DATA_A26
190 BA2 DQ<26> 37 D3_DATA_A27
71 BA1 DQ<27> 149 D3_DATA_A28
BA0 DQ<28> 150 D3_DATA_A29
Foxconn Confidential Document,please keep it secret.C6 DQ<29>
DQ<30>
155 D3_DATA_A30
169 156 D3_DATA_A31
50 CKE1 DQ<31> 81 D3_DATA_A32
CKE0 DQ<32> 82 D3_DATA_A33
76 DQ<33> 87 D3_DATA_A34

2
2

193 S1* DQ<34> 88 D3_DATA_A35


S0* DQ<35> 200 D3_DATA_A36
DQ<36> 201 D3_DATA_A37
64 DQ<37> 206 D3_DATA_A38
63 CK1/NU* DQ<38> 207 D3_DATA_A39
185 CK1/NU DQ<39> 90 D3_DATA_A40
184 CK0* DQ<40> 91 D3_DATA_A41
CK0 DQ<41> 96 D3_DATA_A42
188 DQ<42> 97 D3_DATA_A43
181 A0 DQ<43> 209 D3_DATA_A44
61 A1 DQ<44> 210 D3_DATA_A45
180 A2 DQ<45> 215 D3_DATA_A46
59 A3 DQ<46> 216 D3_DATA_A47
58 A4 DQ<47> 99 D3_DATA_A48
178 A5 DQ<48> 100 D3_DATA_A49
56 A6 DQ<49> 105 D3_DATA_A50
177 A7 DQ<50> 106 D3_DATA_A51
175 A8 DQ<51> 218 D3_DATA_A52
70 A9 DQ<52> 219 D3_DATA_A53
55 A10/AP DQ<53> 224 D3_DATA_A54
174 A11 DQ<54> 225 D3_DATA_A55
196 A12 DQ<55> 108 D3_DATA_A56
172 A13 DQ<56> 109 D3_DATA_A57
171 A14 DQ<57> 114 D3_DATA_A58
A15 DQ<58> 115 D3_DATA_A59
C

DQ<59>
Title

Size

168 227 D3_DATA_A60


Date:

74 RESET* DQ<60> 228 D3_DATA_A61


192 CAS* DQ<61> 233 D3_DATA_A62
73 RAS* DQ<62> 234 D3_DATA_A63
WE* DQ<63>
DIMM1
DDR III

BLUE
DDR3-1:CHA
Document Number
D3_WE_A#

D3_CAS_A#
D3_RAS_A#

Thursday, January 05, 2012


D3_DRAMRST#

1
1

10

10
10
D3_DATA_A[63..0]

10,15
10

H61M06
Sheet
14
of
FOXCONN PCEG

45
Rev
A
A
B
C
D
A
B
C
D

5
5

*
V_SM

C607
0.1uF

Dummy
198 79
187 FREE1 RSVD 77

R646
*
*
49 FREE2 ODT1 195

V_SM
FREE3 ODT0

16V, X7R, +/-10%


* 6.3V,X5R 48

V_SM_VTT
V_SM_VTT

1uF
FREE4

C589

C546
4.7uF
240

1K
+/-10%
120 VTT 68

*
VTT NC/PAR_IN 53
NC/ERR_OUT 167

C592
0.1uF

+/-1%
239 NC/TEST4
235 VSS

*
232 VSS
SMB ADDRESS:010

VSS

1K
D3_ODT_B0
D3_ODT_B1

6.3V,X5R 229
CHANNEL B DIMM 3

1uF
VSS

* R645
+/-1%
CLOSE TO DIMM POWER PIN
226

C593
223 VSS 39
11
11

*
220 VSS CB<0> 40
6.3V,X5R 217 VSS CB<1> 45

1uF
214 VSS CB<2> 46

C603
211 VSS CB<3> 158

*
208 VSS CB<4> 159
6.3V,X5R 205 VSS CB<5> 164

1uF
202 VSS CB<6> 165

C595
199 VSS CB<7>
166 VSS
163 VSS 7 D3_DQS_B_DP0
160 VSS DQS<0> 6 D3_DQS_B_DN0

*
VSS DQS*<0>

D3_CA_VREF_B
157
154 VSS 16 D3_DQS_B_DP1
151 VSS DQS<1> 15 D3_DQS_B_DN1

C588
0.1uF
148 VSS DQS*<1>

*
145 VSS 25 D3_DQS_B_DP2
142 VSS DQS<2> 24 D3_DQS_B_DN2

C596
0.1uF
139 VSS DQS*<2>
VSS

16V, X7R, +/-10%


136 34 D3_DQS_B_DP3
133 VSS DQS<3> 33 D3_DQS_B_DN3

4
4

130 VSS DQS*<3>


127 VSS 85 D3_DQS_B_DP4
124 VSS DQS<4> 84 D3_DQS_B_DN4
121 VSS DQS*<4>
119 VSS 94 D3_DQS_B_DP5
116 VSS DQS<5> 93 D3_DQS_B_DN5
113 VSS DQS*<5>
110 VSS 103 D3_DQS_B_DP6
107 VSS DQS<6> 102 D3_DQS_B_DN6
104 VSS DQS*<6>
101 VSS 112 D3_DQS_B_DP7
98 VSS DQS<7> 111 D3_DQS_B_DN7
95 VSS DQS*<7>
92 VSS 43
89 VSS DQS<8> 42
86 VSS DQS*<8>
83 VSS 125 D3_DM_B0
80 VSS DM0/DQS9 126

*
VSS DQS9*

11
47

V_SM
44 VSS 134 D3_DM_B1
41 VSS DM1/DQS10 135

C562
0.1uF
38 VSS DQS10*

Dummy
35 VSS 143 D3_DM_B2
VSS DM2/DQS11

ON DIMM_VREF_B
32 144

R506
29 VSS DQS11*
VSS

16V, X7R, +/-10%


* 26 152 D3_DM_B3
23 VSS DM3/DQS12 153
20 VSS DQS12*

1K
17 VSS 203 D3_DM_B4
VSS DM4/DQS13

DIMM_DQ_CPU_VREF_B
14 204
11 VSS DQS13*

+/-1%
8 VSS 212 D3_DM_B5
V_SM

5 VSS DM5/DQS14 213


2 VSS DQS14*

PLACE RESISTORS CLOSE TO CH_B DIMMS


VSS

1K
D3_DQS_B_DP[7..0]

D3_DQS_B_DN[7..0]

221 D3_DM_B6
11

DM6/DQS15

* R496
+/-1%
197 222
11
11
11
11

194 VDDQ DQS15*


11

VDDQ
11

191 230 D3_DM_B7


189 VDDQ DM7/DQS16 231
11
11
11
11

186 VDDQ NC/DQS16*

3
3

183 VDDQ 161


182 VDDQ DM8/DQS17 162
11 D3_SBS_B[2..0]

179 VDDQ DQS17*


D3_MAA_B[15..0]
14,20,35 SMB_CLK_MAIN

176 VDDQ 3 D3_DATA_B0


14,20,35 SMB_DATA_MAIN
DDRIII

173 VDDQ DQ<0> 4 D3_DATA_B1


D3_CK_DDR_B_DP0
D3_CK_DDR_B_DP1

VDDQ DQ<1>
D3_CK_DDR_B_DN0
D3_CK_DDR_B_DN1
D3_SCKE_B0
D3_SCKE_B1

170 9 D3_DATA_B2
D3_SCS_B_#0
D3_SCS_B_#1

78 VDDQ DQ<2> 10 D3_DATA_B3


75 VDD DQ<3> 122 D3_DATA_B4
72 VDD DQ<4> 123 D3_DATA_B5
69 VDD DQ<5> 128 D3_DATA_B6
66 VDD DQ<6> 129 D3_DATA_B7
65 VDD DQ<7> 12 D3_DATA_B8
62 VDD DQ<8> 13 D3_DATA_B9
VDD DQ<9>
D3_SBS_B0
D3_SBS_B1
D3_SBS_B2

60 18 D3_DATA_B10
D3_MAA_B9
D3_MAA_B8
D3_MAA_B7
D3_MAA_B6
D3_MAA_B5
D3_MAA_B4
D3_MAA_B3
D3_MAA_B2
D3_MAA_B1
D3_MAA_B0

D3_MAA_B15
D3_MAA_B14
D3_MAA_B13
D3_MAA_B12
D3_MAA_B11
D3_MAA_B10

57 VDD DQ<10> 19 D3_DATA_B11


VDD DQ<11>
D3_CA_VREF_B
D3_DQ_VREF_B

54 131 D3_DATA_B12
51 VDD DQ<12> 132 D3_DATA_B13
3D3V_SYS

236 VDD DQ<13> 137 D3_DATA_B14


VDDSPD DQ<14>

D3_DQ_VREF_B
138 D3_DATA_B15

*
DQ<15> 21 D3_DATA_B16
67 DQ<16> 22 D3_DATA_B17
1 VREFCA DQ<17> 27 D3_DATA_B18

C542
0.1uF
118 VREFDQ DQ<18> 28 D3_DATA_B19
238 SCL DQ<19> 140 D3_DATA_B20
237 SDA DQ<20> 141 D3_DATA_B21
117 SA1 DQ<21> 146 D3_DATA_B22
SA0 DQ<22>

16V, X7R, +/-10%


147 D3_DATA_B23
DQ<23> 30 D3_DATA_B24
DQ<24> 31 D3_DATA_B25
52 DQ<25> 36 D3_DATA_B26
190 BA2 DQ<26> 37 D3_DATA_B27
3D3V_SYS

71 BA1 DQ<27> 149 D3_DATA_B28


BA0 DQ<28> 150 D3_DATA_B29
DQ<29> 155 D3_DATA_B30
169 DQ<30> 156 D3_DATA_B31
Foxconn Confidential Document,please keep it secret.C6 50 CKE1
CKE0
DQ<31>
DQ<32>
81 D3_DATA_B32
82 D3_DATA_B33
76 DQ<33> 87 D3_DATA_B34
193 S1* DQ<34> 88 D3_DATA_B35
S0* DQ<35> 200 D3_DATA_B36

2
2

DQ<36> 201 D3_DATA_B37


64 DQ<37> 206 D3_DATA_B38
63 CK1/NU* DQ<38> 207 D3_DATA_B39
185 CK1/NU DQ<39> 90 D3_DATA_B40
184 CK0* DQ<40> 91 D3_DATA_B41
CK0 DQ<41> 96 D3_DATA_B42
188 DQ<42> 97 D3_DATA_B43
181 A0 DQ<43> 209 D3_DATA_B44
61 A1 DQ<44> 210 D3_DATA_B45
180 A2 DQ<45> 215 D3_DATA_B46
59 A3 DQ<46> 216 D3_DATA_B47
58 A4 DQ<47> 99 D3_DATA_B48
178 A5 DQ<48> 100 D3_DATA_B49
56 A6 DQ<49> 105 D3_DATA_B50
177 A7 DQ<50> 106 D3_DATA_B51
175 A8 DQ<51> 218 D3_DATA_B52
70 A9 DQ<52> 219 D3_DATA_B53
55 A10/AP DQ<53> 224 D3_DATA_B54
174 A11 DQ<54> 225 D3_DATA_B55
196 A12 DQ<55> 108 D3_DATA_B56
172 A13 DQ<56> 109 D3_DATA_B57
171 A14 DQ<57> 114 D3_DATA_B58
A15 DQ<58> 115 D3_DATA_B59
168 DQ<59> 227 D3_DATA_B60
74 RESET* DQ<60> 228 D3_DATA_B61
C

CAS* DQ<61>
Title

Size

192 233 D3_DATA_B62


Date:

73 RAS* DQ<62> 234 D3_DATA_B63


WE* DQ<63>
DIMM2
DDR III

DDR3-2:CHB
Document Number
BLUE

D3_WE_B#

D3_CAS_B#
D3_RAS_B#

D3_DRAMRST#
11

11
11

Thursday, January 05, 2012


D3_DATA_B[63..0]

1
1

10,14
11

H61M06
Sheet
15
of
FOXCONN PCEG

45
Rev
A
A
B
C
D
CM
5 4 3 2 1

3D3V_DUAL 3D3V_SYS 12V_SYS 12V_SYS 3D3V_SYS

PCI-E1_16X

B1 A1
B2 12V PRSNT1# A2
B3 12V 12V A3
B4 RSVD1 12V A4
B5 GND GND A5
D 20,27 SMB_CLK_RESUME SMCLK JTAG2 D
B6 A6

SV
20,27 SMB_DATA_RESUME B7 SMDAT JTAG3 A7
B8 GND JTAG4 A8
B9 3.3V JTAG5 A9
B10 JTAG1 3.3V A10
B11 3.3VAUX 3.3V A11
20,27,44 S_WAKE# WAKE# PWRGD PCIE_SLOT_RST# 27,33
C26

All AC Coupling caps. should be placed within 250 mils of the connector B12
RSVD2
KEY
GND
A12 * 100pF
50V, NPO, +/-5%
B13 A13
GND REFCLK+ C_PCH_100M_X16_DP 22
C248 1 2 220nF +/-10% X_1X16_TXP0_C B14 A14
9 X_1X16_TXP0 C_PCH_100M_X16_DN 22

**
C247 1 2 220nF +/-10% X_1X16_TXN0_C B15 HSOP0 REFCLK- A15
9 X_1X16_TXN0 B16 HSON0 GND A16 X_1X16_RXP0
B17 GND HSIP0 A17 X_1X16_RXN0 X_1X16_RXP0 9
B18 PRSNT2_B17# HSIN0 A18 X_1X16_RXN0 9
GND GND

C252 1 2 220nF +/-10% X_1X16_TXP1_C B19 A19


9 X_1X16_TXP1

** ** **
C253 1 2 220nF +/-10% X_1X16_TXN1_C B20 HSOP1 RSVD5 A20
9 X_1X16_TXN1 HSON1 GND
B21 A21 X_1X16_RXP1
B22 GND HSIP1 A22 X_1X16_RXN1 X_1X16_RXP1 9
C262 1 2 220nF +/-10% X_1X16_TXP2_C B23 GND HSIN1 A23 X_1X16_RXN1 9
9 X_1X16_TXP2 HSOP2 GND
C265 1 2 220nF +/-10% X_1X16_TXN2_C B24 A24
9 X_1X16_TXN2 HSON2 GND
B25 A25 X_1X16_RXP2
B26 GND HSIP2 A26 X_1X16_RXN2 X_1X16_RXP2 9
C273 1 2 220nF +/-10% X_1X16_TXP3_C B27 GND HSIN2 A27 X_1X16_RXN2 9
9 X_1X16_TXP3 HSOP3 GND
C274 1 2 220nF +/-10% X_1X16_TXN3_C B28 A28
9 X_1X16_TXN3 B29 HSON3 GND A29 X_1X16_RXP3
B30 GND HSIP3 A30 X_1X16_RXN3 X_1X16_RXP3 9
RSVD3 HSIN3 X_1X16_RXN3 9

N
B31 A31
B32 PRSNT2_B31# GND A32
GND RSVD6
C288 1 2 220nF +/-10% X_1X16_TXP4_C B33 A33
9 X_1X16_TXP4

** ** ** **
C289 1 2 220nF +/-10% X_1X16_TXN4_C B34 HSOP4 RSVD7 A34
9 X_1X16_TXN4 HSON4 GND
B35 A35 X_1X16_RXP4
B36 GND HSIP4 A36 X_1X16_RXN4 X_1X16_RXP4 9
C294 1 2 220nF +/-10% X_1X16_TXP5_C B37 GND HSIN4 A37 X_1X16_RXN4 9
C C
9 X_1X16_TXP5 HSOP5 GND
C297 1 2 220nF +/-10% X_1X16_TXN5_C B38 A38
9 X_1X16_TXN5 HSON5 GND
B39 A39 X_1X16_RXP5
B40 GND HSIP5 A40 X_1X16_RXN5 X_1X16_RXP5 9
C314 1 2 220nF +/-10% X_1X16_TXP6_C B41 GND HSIN5 A41 X_1X16_RXN5 9
9 X_1X16_TXP6 HSOP6 GND
C308 1 2 220nF +/-10% X_1X16_TXN6_C B42 A42
9 X_1X16_TXN6 B43 HSON6 GND A43 X_1X16_RXP6
B44 GND HSIP6 A44 X_1X16_RXN6 X_1X16_RXP6 9
C328 1 2 220nF +/-10% X_1X16_TXP7_C B45 GND HSIN6 A45 X_1X16_RXN6 9
9 X_1X16_TXP7 HSOP7 GND
C331 1 2 220nF +/-10% X_1X16_TXN7_C B46 A46
9 X_1X16_TXN7 HSON7 GND
B47 A47 X_1X16_RXP7
B48 GND HSIP7 A48 X_1X16_RXN7 X_1X16_RXP7 9

Re
B49 PRSNT2_B48# HSIN7 A49 X_1X16_RXN7 9
GND GND

C348 1 2 220nF +/-10% X_1X16_TXP8_C B50 A50


9 X_1X16_TXP8
** ** ** ** ** ** ** **

C352 1 2 220nF +/-10% X_1X16_TXN8_C B51 HSOP8 RSVD8 A51


9 X_1X16_TXN8 HSON8 GND
B52 A52 X_1X16_RXP8
B53 GND HSIP8 A53 X_1X16_RXN8 X_1X16_RXP8 9
C365 1 2 220nF +/-10% X_1X16_TXP9_C B54 GND HSIN8 A54 X_1X16_RXN8 9
9 X_1X16_TXP9 HSOP9 GND
C372 1 2 220nF +/-10% X_1X16_TXN9_C B55 A55
9 X_1X16_TXN9 B56 HSON9 GND A56 X_1X16_RXP9
B57 GND HSIP9 A57 X_1X16_RXN9 X_1X16_RXP9 9
C396 1 2 220nF +/-10% X_1X16_TXP10_C B58 GND HSIN9 A58 X_1X16_RXN9 9
9 X_1X16_TXP10 HSOP10 GND
C409 1 2 220nF +/-10% X_1X16_TXN10_C B59 A59
9 X_1X16_TXN10 HSON10 GND
B60 A60 X_1X16_RXP10
B61 GND HSIP10 A61 X_1X16_RXN10 X_1X16_RXP10 9
C432 1 2 220nF +/-10% X_1X16_TXP11_C B62 GND HSIN10 A62 X_1X16_RXN10 9
9 X_1X16_TXP11 HSOP11 GND
C430 1 2 220nF +/-10% X_1X16_TXN11_C B63 A63
9 X_1X16_TXN11 B64 HSON11 GND A64 X_1X16_RXP11
B65 GND HSIP11 A65 X_1X16_RXN11 X_1X16_RXP11 9
C444 1 2 220nF +/-10% X_1X16_TXP12_C B66 GND HSIN11 A66 X_1X16_RXN11 9
9 X_1X16_TXP12 HSOP12 GND
C446 1 2 220nF +/-10% X_1X16_TXN12_C B67 A67
9 X_1X16_TXN12 HSON12 GND

pa
B68 A68 X_1X16_RXP12
B69 GND HSIP12 A69 X_1X16_RXN12 X_1X16_RXP12 9
C450 1 2 220nF +/-10% X_1X16_TXP13_C B70 GND HSIN12 A70 X_1X16_RXN12 9
9 X_1X16_TXP13 HSOP13 GND
C452 1 2 220nF +/-10% X_1X16_TXN13_C B71 A71
9 X_1X16_TXN13 HSON13 GND
B72 A72 X_1X16_RXP13
B
B73 GND HSIP13 A73 X_1X16_RXN13 X_1X16_RXP13 9 B

C456 1 2 220nF +/-10% X_1X16_TXP14_C B74 GND HSIN13 A74 X_1X16_RXN13 9


9 X_1X16_TXP14 HSOP14 GND
C454 1 2 220nF +/-10% X_1X16_TXN14_C B75 A75
9 X_1X16_TXN14 B76 HSON14 GND A76 X_1X16_RXP14
B77 GND HSIP14 A77 X_1X16_RXN14 X_1X16_RXP14 9
C462 1 2 220nF +/-10% X_1X16_TXP15_C B78 GND HSIN14 A78 X_1X16_RXN14 9
9 X_1X16_TXP15 HSOP15 GND
C460 1 2 220nF +/-10% X_1X16_TXN15_C B79 A79
9 X_1X16_TXN15 HSON15 GND
B80 A80 X_1X16_RXP15
B81 GND HSIP15 A81 X_1X16_RXN15 X_1X16_RXP15 9
B82 PRSNT2_B81# HSIN15 A82 X_1X16_RXN15 9
RSVD4 GND
Slot-PCIE-16X

5 4
12V_SYS

* C23
4.7uF

Foxconn Confidential Document,please keep it secret.C6


+/-10%

near slot

3
3D3V_SYS

* C237
0.1uF

2
Title

Size
C

Date:
PCIE X16/X1
Document Number
FOXCONN PCEG

H61M06
Thursday, January 05, 2012
1
i
Sheet 16 of 45
Rev
A
A
CM
5 4 3 2 1

D D

SV *
3D3V_DUAL R437 8.2K +/-1% Dummy PCI_PME_N

?
U3A CPT_CRB 3D3V_SYS
RN17

PCI_DEVSEL#
BH8
BH9 PAR REV 1.0 AD0
BF15
BF17
PCI_INT_G#
PCI_INT_C#
*1 2
BD15 DEVSEL# AD1 BT7 PCI_INT_E# 3 4
22 C_PCH_PCI_FB AV14 CLKIN_PCILOOPBACK AD2 BT13 5 6
PCI_INT_A#
PCI_IRDY# BF11 PCIRST# AD3 BG12 7 8
PCI_PME_N AV15 IRDY# AD4 BN11 8.2KOhm +/-5%
PCI_SERR# BR6 PME# AD5 BJ12 RN16
SERR# AD6
PCI_STOP#
PCI_PLOCK#
BC12
BA17 STOP# AD7
BU9
BR12
PCI_TRDY#
PCI_DEVSEL#
*1 2
PCI_TRDY# BC8 PLOCK# AD8 BJ3 PCI_INT_F# 3 4
PCI_PERR# BM3 TRDY# AD9 BR9 PCI_REQ#3 5 6
PCI_FRAME# BC11 PERR# AD10 BJ10 7 8
FRAME# AD11 BM8 8.2KOhm +/-5%
AD12 BF3
AD13 BN2
AD14

N
PCI_GNT#0 BA15 BE4
PCI_GNT#1 AV8 GNT0# AD15 BE6 RN19
GNT1#_GPIO51 AD16
PCI_GNT#2
PCI_GNT#3
BU12
BE2 GNT2#_GPIO53 AD17
BG15
BC6
PCI_REQ#2
PCI_SERR#
*1 2
GNT3#_GPIO55 AD18 BT11 PCI_REQ#1 3 4
AD19 BA14 PCI_INT_D# 5 6
AD20 BL2 7 8
PCI_REQ#0 BG5 AD21 BC4 8.2KOhm +/-5%
C C
PCI_REQ#1 BT5 REQ0# AD22 BL4
PCI_REQ#2 BK8 REQ1#_GPIO50 AD23 BC2
PCI_REQ#3 AV11 REQ2#_GPIO52 AD24 BM13
REQ3#_GPIO54 AD25 BA9 RN15
AD26
AD27
BF9
BA8
PCI_IRDY#
PCI_FRAME#
*1 2
PCI_INT_A# BK10 AD28 BF8 PCI_STOP# 3 4
PCI_INT_B# BJ5 PIRQA# AD29 AV17 PCI_PLOCK# 5 6
PCI_INT_C# BM15 PIRQB# AD30 BK12 7 8
PCI_INT_D# BP5 PIRQC# AD31 8.2KOhm +/-5%
PCI_INT_E# BN9 PIRQD# RN18

Re
PIRQE#_GPIO2
PCI_INT_F#
PCI_INT_G#
AV9
BT15 PIRQF#_GPIO3 BN4
PCI_INT_H#
PCI_PERR#
*1 2
PCI_INT_H# BR4 PIRQG#_GPIO4 C_BE0# BP7 PCI_INT_B# 3 4
PIRQH#_GPIO5 C_BE1# BG2 PCI_REQ#0 5 6
C_BE2# BP13 7 8
C_BE3# 8.2KOhm +/-5%
PCI

1 OF 10
CPT_CRB/BGA
?

pa
PCH_HS
B B

STRAP: Boot BIOSselect check whether GNT1 or SATA1GP(GPIO19) 1


1

* *
BOOT DEVICE GNT1 SATA1GP PCI_GNT#3 R446 1K Dummy
**

LPC 0 0 PCI_GNT#0 R445 1K Dummy


PCI_GNT#2 R454 1K Dummy
NAND 0 1 PCI_GNT#1 R438 1K Dummy
PCI 1 0
Internal pull-up DG 0.7

i
SPI 1 1 2
GNT3 is top block swap mode: 2
Heatsink
connect to ground with 4.7k ohm weak
pull down resistor for top block swap mode

GNT2#/GPIO53:ESI strap for server platform


ONLY,Do not pull low.

A A

Foxconn Confidential Document,please keep it secret.C6

FOXCONN PCEG
Title
PCH1-PCI
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 17 of 45


5 4 3 2 1
CM
5 4 3 2 1

D D

9
9

9
H_DMI_RX_DN0
H_DMI_RX_DP0

H_DMI_RX_DN1

SV 9
9

9
9
H_DMI_TX_DN0
H_DMI_TX_DP0

H_DMI_TX_DN1
H_DMI_TX_DP1
D33
B33
J36
H36
A36
B35
P38
U3B

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
?
CPT_CRB

REV 1.0
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
BF36
BD36
BC33
BA33
BM33
BM35
BT33
U_USB_DN0
U_USB_DP0
U_USB_DN1
U_USB_DP1
U_USB_DN2
U_USB_DP2
U_USB_DN3
31
31
31
31
32
32
32

DMI
R38 BU32
9 H_DMI_RX_DP1 DMI1TXP USBP3P U_USB_DP3 32
B37 BR32
9 H_DMI_TX_DN2 DMI2RXN USBP4N U_USB_DN4 32

N
C36 BT31
9 H_DMI_TX_DP2 H38 DMI2RXP USBP4P BN29 U_USB_DP4 32
V_1D05V_PCH
9 H_DMI_RX_DN2 DMI2TXN USBP5N U_USB_DN5 32
J38 BM30
9 H_DMI_RX_DP2 E37 DMI2TXP USBP5P BK33 U_USB_DP5 32
9 H_DMI_TX_DN3 DMI3RXN USBP6N
F38 BJ33
9 H_DMI_TX_DP3 DMI3RXP USBP6P
M41 BF31
*R486
49.9 9
9
H_DMI_RX_DN3
H_DMI_RX_DP3
P41 DMI3TXN
DMI3TXP
USBP7N
USBP7P
BD31
C +/-1% B31 BN27 C
E31 DMI_IRCOMP USBP8N BR29 U_USB_DN8 31
DMICOMP
DMI_ZCOMP USBP8P U_USB_DP8 31
BR26
U_USB_DN9 31

USB
C_100M_DMI_PCH_DN P33 USBP9N BT27
R33 CLKIN_DMI_N USBP9P BK25 U_USB_DP9 31
C_100M_DMI_PCH_DP
CLKIN_DMI_P USBP10N BJ25
J20 USBP10P BJ31
L20 PERN1 USBP11N BK31
F25 PERP1 USBP11P BD27
F23 PETN1 USBP12P BF27
P20 PETP1 USBP12N BK27
30 X_PE_RX_DN2 R20 PERN2 USBP13P BJ27

Re
30 X_PE_RX_DP2 PERP2 USBP13N
2: LAN C509 0.1uF 16V, X7R, +/-10% X_PE_TX_DN2_C C22
** ** **

30 X_PE_TX_DN2 C511 0.1uF 16V, X7R, +/-10% X_PE_TX_DP2_C A22 PETN2 BM43
30 X_PE_TX_DP2 PETP2 OC0#_GPIO59 U_USB_OC#01 31

PCI-E
H17 BD41
44 USB3_N_RX PERN3 OC1#_GPIO40
44 USB3_P_RX J17 BG41
E21 PERP3 OC2#_GPIO41 BK43 U_USB_OC#2345 32
44 USB3_N_TX C752 0.1uF USB3_N_TXC
C753 0.1uF USB3_P_TXC B21 PETN3 OC3#_GPIO42 BP43
44 USB3_P_TX PETP3 OC4#_GPIO43
P17 BJ41
27 X_PE_RX_DN4 M17 PERN4 OC5#_GPIO9 BT45
27 X_PE_RX_DP4 PERP4 OC6#_GPIO10
C514 0.1uF 16V, X7R, +/-10% X_PE_TX_DN4_C F18 BM45 OC67#
27 X_PE_TX_DN4 E17 PETN4 OC7#_GPIO14 OC67# 20
4: SLOT1 C512 0.1uF 16V, X7R, +/-10% X_PE_TX_DP4_C USBRBIAS (R631): TIE TRACES TOGETHER CLOSE TO PINS,

*
27 X_PE_TX_DP4 N15 PETP4 BP25 USBRBIAS R483 22.6 +/-1% WITH LENGTH NO LONGER THAN 450 MILS TO RESISTOR
M15 PERN5 USBRBIAS# BM25
B17 PERP5 USBRBIAS
C16 PETN5 BD38 C_96M_DREF_DN
J15 PETP5 CLKIN_DOT_96N BF38 C_96M_DREF_DP
L15 PERN6 CLKIN_DOT_96P

*
A16 PERP6 A32 DMIRBIAS R488 750 +/-1%
B15 PETN6 DMI2RBIAS DMIRBIAS(R108): TIE TRACES TOGETHER CLOSE TO PINS,
J12 PETP6 WITH LENGTH NO LONGER THAN 450 MILS TO RESISTOR
H12 PERN7
F15 PERP7
PETN7

pa
F13
H10 PETP7
J10 PERN8
B13 PERP8
D13 PETN8
B PETP8 B

2 OF 10
CPT_CRB/BGA
?

i
* * * *

C_100M_DMI_PCH_DN R238 +/-1%


10K

C_100M_DMI_PCH_DP R240 +/-1%


10K

C_96M_DREF_DN R243 +/-1%


10K

C_96M_DREF_DP R244 +/-1%


10K

Stub is as short as possible

A A

Foxconn Confidential Document,please keep it secret.C6

FOXCONN PCEG
Title
PCH2-DMI/PCIE/USB
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 18 of 45


5 4 3 2 1
CM
5 4 3 2 1

U3C CPT_CRB?

AC56 T_SATA_RX_DN0
REV 1.0 SATA0RXN AB55 T_SATA_RX_DP0

CLINK
SATA0RXP AE46 T_SATA_TX_DN0
SATA0TXN AE44 T_SATA_TX_DP0
SATA0TXP

SATA3
BA50 AA53 T_SATA_RX_DN1
TP34 CL_CLK1 SATA1RXN
BF50 AA56 T_SATA_RX_DP1 SATA_1
D TP35 CL_DATA1 SATA1RXP D
BF49 AG49 T_SATA_TX_DN1 1

SV
TP36 CL_RST1# SATA1TXN AG47 2
T_SATA_TX_DP1 T_SATA_TX_DP0 C676 10nF 25V, X7R, +/-10% T_SATA_TX_C_DP0

** **
PWRGD_3V BC46 SATA1TXP T_SATA_TX_DN0 C677 10nF 25V, X7R, +/-10% T_SATA_TX_C_DN0 3 8
20,33 PWRGD_3V APWROK AL50 4
BN21 SATA2RXN AL49 T_SATA_RX_DN0 C674 10nF 25V, X7R, +/-10% T_SATA_RX_C_DN0 5 9
Non AMT PWM0 SATA2RXP
BT21 AL56 T_SATA_RX_DP0 C675 10nF 25V, X7R, +/-10% T_SATA_RX_C_DP0 6
BM20 PWM1 SATA2TXN AL53 7
BN19 PWM2 SATA2TXP AN46

FAN
PWM3 SATA3RXN

SATA2
AN44 CONN-SATA
SATA3RXP AN56
BOARD_ID2 BT17 SATA3TXN AM55
BOARD_ID0 BR19 TACH0_GPIO17 SATA3TXP AN49 T_SATA_RX_DN4
BOARD_ID1 BA22 TACH1_GPIO1 SATA4RXN AN50 T_SATA_RX_DP4
BR16 TACH2_GPIO6 SATA4RXP AT50 T_SATA_TX_DN4 SATA_2
BU16 TACH3_GPIO7 SATA4TXN AT49 T_SATA_TX_DP4 1
BM18 TACH4_GPIO68 SATA4TXP AT46 T_SATA_RX_DN5 T_SATA_TX_DP1 C651 10nF 25V, X7R, +/-10% T_SATA_TX_C_DP1 2

** **
BN17 TACH5_GPIO69 SATA5RXN AT44 T_SATA_RX_DP5 T_SATA_TX_DN1 C652 10nF 25V, X7R, +/-10% T_SATA_TX_C_DN1 3 8
BP15 TACH6_GPIO70 SATA5RXP AV50 T_SATA_TX_DN5 4
TACH7_GPIO71 SATA5TXN AV49 T_SATA_TX_DP5 T_SATA_RX_DN1 C649 10nF 25V, X7R, +/-10% T_SATA_RX_C_DN1 5 9
BC43 SATA5TXP T_SATA_RX_DP1 C650 10nF 25V, X7R, +/-10% T_SATA_RX_C_DP1 6
SST AF55 C_SATA_PCH_DN 7
SCLOCK BA53 CLKIN_SATA_N AG56 C_SATA_PCH_DP
GPIO38 BE54 SCLOCK_GPIO22 CLKIN_SATA_P CONN-SATA
GPIO39 BF55 SLOAD_GPIO38 BF57 SATA_LED#
GPIO48 AW53 SDATAOUT0_GPIO39 SATALED# AJ55 SATA_LED# 36
SDATAOUT1_GPIO48 SATAICOMPI AJ53 SATARBAS
SATAICOMPO

GPIO
BC54 SATA0GP
SATA0GP_GPIO21 AY52 SATA1GP
SATA1GP_GPIO19 BB55 SATA2GP
SATA2GP_GPIO36

N
AY20 BG53 SATA3GP SATA_3
NC SATA3GP_GPIO37 AU56 SATA4GP 1
SATA4GP_GPIO16 BA56 SATA5GP T_SATA_TX_DP4 C641 10nF 25V, X7R, +/-10% T_SATA_TX_C_DP4 2

** **
SATA5GP_GPIO49 T_SATA_TX_DN4 C642 10nF 25V, X7R, +/-10% T_SATA_TX_C_DN4 3 8
AE54 4
SATA3COMPI AE52 SATA3_COMP T_SATA_RX_DN4 C647 10nF 25V, X7R, +/-10% T_SATA_RX_C_DN4 5 9
SATA3RCOMPO T_SATA_RX_DP4 C648 10nF 25V, X7R, +/-10% T_SATA_RX_C_DP4 6
C AE50 7 C
TP16
AC52 SATA3_RBIAS CONN-SATA
SATA3RBIAS SATA_4
1
T_SATA_TX_DP5 C670 10nF 25V, X7R, +/-10% T_SATA_TX_C_DP5 2

** **
BB57 A20GATE T_SATA_TX_DN5 C671 10nF 25V, X7R, +/-10% T_SATA_TX_C_DN5 3 8
A20GATE A20GATE 33
BN56 INT3V3 4
INIT3_3V#
HOST

BG56 KBRST_N T_SATA_RX_DN5 C672 10nF 25V, X7R, +/-10% T_SATA_RX_C_DN5 5 9


RCIN# AV52 KBRST_N 33 6
SERIRQ T_SATA_RX_DP5 C673 10nF 25V, X7R, +/-10% T_SATA_RX_C_DP5
SERIRQ SERIRQ 33,35
E56 PCH_THERMTRIP_N 7

*
THRMTRIP# H48 PCH_THERMTRIP_N 8
R539 0 +/-5%

Re
PECI PCH_PECI 8,33
F55 Dummy CONN-SATA
PMSYNCH H_PM_SYNC_0 8

3 OF 10
CPT_CRB/BGA
?

INT3V3
**

C_SATA_PCH_DN R542 10K +/-1%


C_SATA_PCH_DP R541 10K +/-1% *R528
1K
+/-1% Need double check
Dummy

Stub is as short as possible

pa
Resistor can change RN

3D3V_SYS

B B
V_1D05V_PCH

SATARRBIAS (R121): TIE TRACES TOGETHER CLOSE TO PINS,


WITH LENGTH NO LONGER THAN 450 MILS TO RESISTOR RN41
R595
37.4 Ohm * *R543
49.9
GPIO38
SATA_LED#
*1 2
SATA3_COMP (R122): TIE TRACES TOGETHER CLOSE TO PINS, +/-1% +/-1% 3 4
WITH LENGTH NO LONGER THAN 450 MILS TO RESISTOR KBRST_N 5 6
7 8
10K Ohm +/-5%
SATARBAS RN42
SATA3_COMP SATA4GP *1 2

i
SATA3_RBIAS SERIRQ
GPIO48 3 4
3D3V_SYS SATA5GP 5 6
R544 7 8
SATA3_RBIAS (R76): TIE TRACES TOGETHER CLOSE TO PINS, * 750 10K Ohm +/-5%
WITH LENGTH NO LONGER THAN 450 MILS TO RESISTOR +/-1%

*
SCLOCK
*R471
10K *R470
10K *R460
10K
R605 1K
+/-1%
+/-1% +/-1% +/-1%
BOARD_ID0 Reserved Dummy RN44

BOARD_ID1
A20GATE
SATA0GP
*1 2
3 4
BOARD_ID2 GPIO39 5 6
7 8
10K Ohm +/-5%

*R472 *R478 *R461

* **
10K 10K 10K SATA2GP R550 10K +/-1% Dummy
+/-1% +/-1% +/-1%
Dummy Dummy Reserved SATA3GP R552 10K +/-1% Dummy

A
BOARD_ID2 BOARD_ID1 BOARD_ID0 SATA1GP R572 10K +/-1%Dummy
A

H61MXE-S 0 0 1 Foxconn Confidential Document,please keep it secret.C6


BOARD ID
H61MXE 0 1 0
FOXCONN PCEG
Title
H61MXE-V 0 1 1 Size
PCH3-SATA/HOST
Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 19 of 45


5 4 3 2 1
CM
5 4 3 2 1

3D3V_DUAL 3D3V_SYS

2.2K FAB 1.0

**

**
SMB_CLK_RESUME R32 +/-5% SMB_CLK_MAIN R609 8.2K +/-1% 3D3V_SB 3D3V_DUAL
SMB_DATA_RESUME R35 2.2K
+/-5% SMB_DATA_MAIN R565 8.2K +/-1%

*
SIO_THERMAL# R495 10K +/-1%
?
U3D
RN45 AW55 RN47
BMBUSY#_GPIO0 A_FP_AUDIO_PRESENCE# 29
SMLINK0_DATA
SMLINK1_DATA
*1 2 L_AD0
BA20
BK15 LDRQ1#_GPIO23
REV 1.0
CLKRUN#_GPIO32
BC56
BC25
BOARD_ID4
S_ME_ENABLE
SPI_WP_GPIO57
*1 2
3 4 33,35 L_AD0 FWH0_LAD0 HDA_DOCK_EN#_GPIO33 TP38 3 4
SMLINK0_CLK L_AD1 BJ17 BL56 PCH_GPIO34 PCH_RI
SMLINK1_CLK 5 6 33,35 L_AD1 L_AD2 BJ20 FWH1_LAD1 STP_PCI#_GPIO34 BJ57 BOARD_ID5 5 6
7 8 33,35 L_AD2 L_AD3 BG20 FWH2_LAD2 GPIO35 7 8
10K Ohm +/-5% 33,35 L_AD3 L_DRQ0 BK17 FWH3_LAD3 BP51 U3_SMI# 10K Ohm +/-5%
35 L_DRQ0 U3_SMI# 44

*
3D3V_DUAL L_FRAME_N BG17 LDRQ0# GPIO8 BK50 GPIO12 U3_SMI# R485 10K +/-1%
D
RN61 33,35 L_FRAME_N FWH4_LFRAME# LAN_PHY_PWR_CTRL_GPIO12 BA25 D

SV
HDA_DOCK_RST#_GPIO13 PCH_GPIO13 39
SML0_ALERT_N
SMBALERT
*1 2
A_HDA_BCLK_R
A_HDA_RST#_R
BU22
BC22 HDA_BCLK GPIO15
BM55
BP53
PCH_GPIO15
RN48
3 4 HDA_RST# GPIO24_MEM_LED PCH_GPIO24 39
SML1_ALERT_N
OC67# 5 6 28 A_HDA_SDI0_R
BD22
BF22 HDA_SDIN0 GPIO28
BJ55
BH49
PCH_GPIO28
PCH_GPIO29
GPIO12
S_GP72_PU
*1 2
18 OC67# 7 8 BK22 HDA_SDIN1 SLP_LAN#_GPIO29 AV43 BOARD_ID3 PCH_GPIO29 39 PCH_GPIO45 3 4
10K Ohm +/-5% BJ22 HDA_SDIN2 PCIECLKRQ2#_GPIO20 BL54 PCH_GPIO44 PCH_GPIO44 5 6
A_HDA_SDO_R BT23 HDA_SDIN3 PCIECLKRQ5#_GPIO44 AV44 PCH_GPIO45 7 8
HDA_SDO PCIECLKRQ6#_GPIO45 FAB 1.0
A_HDA_SYNC_R BP23 BP55 PCH_GPIO46 10K Ohm +/-5%
HDA_SYNC PCIECLKRQ7#_GPIO46 BT53 SPI_WP_GPIO57

*
F_SPI_MOSI AU53 GPIO57 BJ53 PCH_GPIO46 R481 10K +/-1%
AT55 SPI_MOSI SYS_PWROK BJ48 P_VR_READY 41
F_SPI_MISO PCH_RI
SPI_MISO RI# PCH_RI 33
F_SPI_CS0# AT57 BK48 PLTRST_N
F_SPI_CLK AR54 SPI_CS0# PLTRST# BC44 S_WAKE# PLTRST_N 8,33
SPI_CLK WAKE# S_WAKE# 16,27,44
AR56 BC41
TP31

*
SPI_CS1# SLP_A# BM53 PCH_GPIO15 R482 10K +/-1% Dummy
12V_SYS RN46 SLP_S3# BN52 S_SLP_S3# 33,35,37,38,41
SLP_S4# S_SLP_S4# 33,35,38,39
A_HDA_SDO *1 A_HDA_SDO_R

*
28 A_HDA_SDO 2 A_HDA_RST#_R BH50 SLP_S5# R614 10K +/-1% Dummy

*
3D3V_DUAL 28 A_HDA_RST# 3 4 A_HDA_BCLK_R SLP_S5#_GPIO63 BN54 LPCPD# PCH_GPIO28 R551 10K +/-1%
28 A_HDA_BCLK 5 6 SUS_STAT#_GPIO61 LPCPD# 35 Dummy
A_HDA_SYNC_R BA47
* R534 28 A_HDA_SYNC 7 8 SUSCLK_GPIO62
BATLOW#_GPIO72
AV46 S_GP72_PU
TP32
22 Ohm +/-5% BP45 SUSACK# FAB 1.0
* R636 10K

***
BR39 SUSACK# BU46 PCH_SUSACK# 33
+/-1% S_PCH_RTCX1 SUSWARN# PCH_SUSWARN# 33,38 SUSWARN# R515 10K +/-1% Dummy
SMB_SW S_PCH_RTCX2 BN39 RTCX1 SUSWARN#-SUS_PWR_DN_ACK-GPIO30 BG46 H_DRAMPWRGD
10K RTCX2 DRAMPWROK H_DRAMPWRGD 8
S_RTCRST# BT41 S_WAKE# R582 1K +/-1%
+/-1%
D

S_SRTRST# BN37 RTCRST#

PM_GPIO(DSW)
Q69 S_INTRUDER# BM38 SRTCRST# BJ43 LAN_WAKE# A_HDA_SYNC_R R473 1K +/-1% Dummy
BJ38 INTRUDER# GPIO27 LAN_WAKE# 30
2N7002 PWRGD_3V
19,33 PWRGD_3V PWROK
G PCH_RSMRST# BK38 BG43 SIO_THERMAL# OD PLL VR SUPPLY SEL(internal pull down)
33 PCH_RSMRST# RSMRST# GPIO31 SIO_THERMAL# 19,33

N
S_INTVRMEN BN41 BD43 1.8V SUPPLY WHEN SAMPLED LOW
D

PCH_DPWROK BT37 INTVRMEN SLP_SUS# BT43 SLP_SUS_N 38


33 PCH_DPWROK S_PWRBTN# 33 1.5V SUPPLY WHEB SAMPLED HIGH
S

Q68 DSWVRMEN BR42 DPWROK PWRBTN#

*
2N7002 DSWVRMEN BE52 A_HDA_SDO_R R480 1K +/-1% Dummy
SYS_RESET# FP_RST# 36
G BE56 S_SPKR_OUT
33,36 ATX_PWRGD SPKR S_SPKR_OUT 36
SMBALERT BN49 3D3V_SB
SMB_CLK_RESUME BT47 SMBALERT#_GPIO11
16,27 SMB_CLK_RESUME

*
S

SMB_DATA_RESUME BR49 SMBCLK LAN_WAKE# R606 10K +/-1%


C C
16,27 SMB_DATA_RESUME BU49 SMBDATA D53
SML0_ALERT_N H_PWRGD
SMLINK0_CLK BT51 SML0ALERT#_GPIO60 PROCPWRGD H_PWRGD 8
SML0CLK FAB 1.0 Dummy
SMLINK0_DATA BM50
SML1_ALERT_N BR46 SML0DATA 3D3V_SYS
SMLINK1_CLK BJ46 SML1ALERT#_PCHHOT#_GPIO74
33 SMLINK1_CLK BK46 SML1CLK_GPIO58
SMLINK1_DATA
33 SMLINK1_DATA SML1DATA_GPIO75

JTAG(SUS)
BC49 PCH_JTAG_RST#
TP12 BA43 PCH_TCK

****
JTAG_TCK BC52 PCH_JTAG_TDI PCH_GPIO34 R530 10K +/-1%
JTAG_TDI BF47 PCH_JTAG_TDO

Re
***
SMB_SW JTAG_TDO BC50 PCH_JTAG_TMS
JTAG_TMS
Dummy R626 10K +/-1% BOARD_ID3 R633 10K +/-1%
Q66 4 OF 10
2N7002 Dummy R644 10K +/-1% BOARD_ID4 R632 10K +/-1%
G

CPT_CRB/BGA
?
Dummy R649 10K +/-1% BOARD_ID5 R652 10K +/-1%
14,15,35 SMB_DATA_MAIN S D SMB_DATA_RESUME

ME HEADER 3D3V_DUAL JTAG CLK FILTER BYPASS WHEN LOW


ME function
for Clock Generator/DIMMs/TPM/Clock Buffer for PCI-E x16/ICH7/LAN/PCI/PCI-E x1/Riser Card/New Card

*
SMB_SW ME function ME PCH_GPIO46 R527 1K +/-1% Dummy
Q67 * R5
G

2N7002 4.7K
Enable (1-2) Header_1X3
S D SMB_CLK_RESUME 3
14,15,35 SMB_CLK_MAIN 3
Disable (2-3) A_HDA_SDO 2
3D3V_SYS 1 2
3D3V_SYS 3D3V_SYS JUMPER_ME(1-2) 1
PCH_ME_ENABLE
* R432

pa
If high disable ME
1K
*R673 *R675 * C623 * R670 Jumper_2P_Blu
V_SM

1K 1K 1uF 1K

*
B B
6.3V,X5R,+/-10% H_DRAMPWRGD R630 200Ohm +/-5%
Dummy
U38
3D3V_SYS U38_1 F_SPI_CS0# 1 8
F_SPI_MISO 2 CS VCC 7 F_SPI_HOLD
Integrated TPM DO HOLD
3 6 F_SPI_CLK
High to Enable 4 WP CLK 5 F_SPI_MOSI VCCRTC
*R592
8.2K Low to Disable GND DIO
+/-5% Internal Chassis Intruder Header
Dummy pull-down Socket
MX25L3205DPI-12G
F_SPI_MOSI *R586
1M VCCRTC
FAB 1.0

i
*****

VCCRTC R7 0 Dummy F_SPI_HOLD INTR Need double check


27 E_SPI_HOLD
R8 0 Dummy F_SPI_CLK S_INTRUDER# 1
27 E_SPI_CLK 2
DSWVRMEN R494 390K r0603h6 R9 0 Dummy F_SPI_MOSI
27 E_SPI_MOSI
R10 0 Dummy F_SPI_CS0#
27 E_SPI_CS0#
S_INTVRMEN R493 390K r0603h6 R11 0 Dummy F_SPI_MISO Header_1X2
27 E_SPI_MISO
* R489
20K
+/-1%
S_SRTRST#
3D3V_DUAL
S_PCH_RTCX2 width 20 mils
VBAT
X4 3D3V_SUS
* C522
* ***

***
XTAL-32.768kHz R385 100 Ohm +/-1% PCH_JTAG_TDO R2 200 +/-1% 1uF
1 2 S_PCH_RTCX1 R387 100 Ohm +/-1% PCH_JTAG_TDI R4 200 +/-1%
VBAT_SIO 3D3V_SB R389 100 Ohm +/-1% PCH_JTAG_TMS R6 200 +/-1% 6.3V,X5R,+/-10%

*R611
3

Q57 VCCRTC R634 PCH_TCK 20K


X4_1 BAT54C +/-1%
*R400 Q74
1 51 Ohm
CLOSE TO PCH
1K 3
A R492 10M 2 2 A
3
r0603h6
Crystal Retainer 1 * C457 *R411
20K
PCH_JTAG_RST#

Foxconn Confidential Document,please keep it secret.C6


FOOTPRINT:0603 ONLY
1uF +/-1%
* C525
18pF * C524
18pF BAT54C *R388 6.3V,X5R
S_RTCRST# 1
CLR_CMOS
C581
+/-5% +/-5% 1K 2
* 1uF * R623
BAT1_1
* L465
1uF Header_1X2
6.3V,X5R,+/-10%
Dummy
10K

6.3V,X5R Reserved
FOXCONN PCEG
+

LITHIUM BATT
CR2032
BAT1 * R416
Battery Holder 1K Title
Battery
PCH4-LPC/SPI/SMB
-

Size Document Number Rev


C H61M06 A

Date: Thursday, January 05, 2012 Sheet 20 of 45


5 4 3 2 1
CM
5 4 3 2 1

V_VGA_RED

? V_VGA_GREEN
CPT_CRB
U3F
V_VGA_BLUE
REV 1.0
D *R452
150 *R451
150 *R450
150
D

SV
+/ -1% +/ -1% +/ -1%
26 HDMI_DET T1 AR4 V_VGA_HSYNC
TP_DDSP_C_HPD N2 DDPB_HPD CRT_HSYNC AR2 V_VGA_VSYNC
M1 DDPC_HPD CRT_VSYNC
DDPD_HPD AN6 V_VGA_RED CLOSE TO PCH: L<250 MILS
*R453 *R444 TP24 R8
DDPB_AUXP
CRT_RED
CRT_GREEN
AN2 V_VGA_GREEN V_VGA_RED
V_VGA_GREEN
25
25
1K 1KR443 TP27 R9 AM1 V_VGA_BLUE NON-Graphic sku : Change to O ohm
Reserved * TP28 U14 DDPB_AUXN
DDPC_AUXP
CRT_BLUE V_VGA_BLUE 25
1K TP30 U12 AM6
TP21 N6 DDPC_AUXN CRT_IRTN

**
TP19 R6 DDPD_AUXP V_VGA_HSYNC R448 33
DDPD_AUXN V_VGA_HSYNC_3V 25
R14 AW1 V_VGA_DDCSDA V_VGA_VSYNC R449 33
26 TMDS1_TX2P DDPB_0P CRT_DDC_DATA V_VGA_DDCSDA 25 V_VGA_VSYNC_3V 25
R12 AW3 V_VGA_DDCSCL
26 TMDS1_TX2N DDPB_0N CRT_DDC_CLK V_VGA_DDCSCL 25
M11 L<750 MILS

*
26 TMDS1_TX1P M12 DDPB_1P AT3
PORT B : HDMI R447 1K +/-1%
26 TMDS1_TX1N DDPB_1N DAC_IREF
H8
26 TMDS1_TX0P K8 DDPB_2P
26 TMDS1_TX0N DDPB_2N
L5
26 TMDS1_CLKP DDPB_3P
M3
26 TMDS1_CLKN L2 DDPB_3N
J3 DDPC_0P Y18
G2 DDPC_0N TP6 Y17
G4 DDPC_1P TP7 AB18
F3 DDPC_1N TP8 AB17
F5 DDPC_2P TP9
E4 DDPC_2N
E2 DDPC_3P
D5 DDPC_3N
DDPD_0P

N
B5
C6 DDPD_0N
D7 DDPD_1P
B7 DDPD_1N
C9 DDPD_2P
E11 DDPD_2N
B11 DDPD_3P
DDPD_3N
C C
U2 AL12
T3 SDVO_INTP DDPC_CTRLCLK AL14
SDVO_INTN DDPC_CTRLDATA
W3 AL9
U5 SDVO_STALLP DDPD_CTRLCLK AL8
SDVO_STALLN DDPD_CTRLDATA
U8 AL15
SDVO_TVCLKINP SDVO_CTRLCLK HDMI_DDCCLK 26
U9 AL17
SDVO_TVCLKINN SDVO_CTRLDATA HDMI_DDCDATA 26

6 OF 10

Re
CPT_CRB/BGA
?

?
CPT_CRB
U3G

REV 1.0
?
U3E CPT_CRB
FDILINK
M48 REV 1.0 AB50
R47 RESERVED_29 RESERVED_22 Y50 H31 C42
8 NVR_CLE Y41 DF_TVS RESERVED_21 AB49 J31 TP21 FDI_RXN0 B43 H_FDI_TX_DN0 9
M50 RESERVED_6 RESERVED_14 AB44 C29 TP25 FDI_RXP0 F45 H_FDI_TX_DP0 9
RESERVED_4 RESERVED_13 TP29 FDI_RXN1 H_FDI_TX_DN1 9

pa
M49 U49 E29 F43
U43 RESERVED_3 RESERVED_12 R44 TP33 FDI_RXP1 H41 H_FDI_TX_DP1 9
J57 RESERVED_2 RESERVED_11 U50 J27 FDI_RXN2 J41 H_FDI_TX_DN2 9
RESERVED_1 RESERVED_10 U46 L27 TP22 FDI_RXP2 C46 H_FDI_TX_DP2 9
RESERVED_9 U44 F28 TP26 FDI_RXN3 D47 H_FDI_TX_DN3 9
B RESERVED_8 H50 E27 TP30 FDI_RXP3 B45 H_FDI_TX_DP3 9 B
RESERVED_7 K46 TP34 FDI_RXN4 A46 H_FDI_TX_DN4 9
RESERVED_20 L56 J25 FDI_RXP4 B47 H_FDI_TX_DP4 9
RESERVED_19 J55 L25 TP23 FDI_RXN5 C49 H_FDI_TX_DN5 9
RESERVED_18 F53 C26 TP27 FDI_RXP5 J43 H_FDI_TX_DP5 9
RESERVED_17 H52 B27 TP31 FDI_RXN6 H43 H_FDI_TX_DN6 9
RESERVED_16 E52 TP35 FDI_RXP6 M43 H_FDI_TX_DP6 9
RESERVED_15 L22 FDI_RXN7 P43 H_FDI_TX_DN7 9
K50 J22 TP24 FDI_RXP7 H_FDI_TX_DP7 9
RESERVED_28 K49 B25 TP28 B51
RESERVED_27 TP32 FDI_FSYNC0 H_FDI_FSYNC0_1 9
AB46 D25 E49
RESERVED_26 G56 TP36 FDI_LSYNC0 C52 H_FDI_LSYNC0_1 9
RESERVED_25 FDI_FSYNC1 H_FDI_FSYNC1_1 9
D51
FDI_LSYNC1 H_FDI_LSYNC1_1 9

i
Y44
RESERVED_24 L53 H46
RESERVED_23 R762 FDI_INT H_FDI_INT_1 9
*

R50
RESERVED_5
NVRAM
32.4
5 OF 10 +/-1%
CPT_CRB/BGA
?
7 OF 10
CPT_CRB/BGA
?

A A

Foxconn Confidential Document,please keep it secret.C6

FOXCONN PCEG
Title
PCH5-NVAND/FDI/DISPLAY
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 21 of 45


5 4 3 2 1
CM
5 4 3 2 1

** **
C_133M_CSI_PCH_IN_DN R525 10K +/-1%
C_133M_CSI_PCH_IN_DP R532 10K +/-1%

CLKIN_GND0_N R523 10K +/-1%


CLKIN_GND0_P R524 10K +/-1%

Stub is as short as possible

D D

SV
RN106
33 48M_SIO *1 2
48M_SIO_R
3 4 C_PCICLK_TPM_R ?
35 C_PCICLK_TPM 5 6 CK_33M_SIO_R
33 CK_33M_SIO 7 8 CPT_CRB
U3H
33
+/-5% R27 C_133M_CSI_PCH_IN_DN
REV 1.0 CLKIN_GND1_N P27 C_133M_CSI_PCH_IN_DP
CLKIN_GND1_P
W53 CLKIN_GND0_N
CK_33M_SIO_R AT11 CLKIN_GND0_N V52 CLKIN_GND0_P
CLKOUT_PCI0 CLKIN_GND0_P
AN14 R52 TP18
TP43 CLKOUT_PCI1 CLKOUT_ITPXDP_N N52 TP33

*
R415 22 Ohm +/-1% AT12 CLKOUT_ITPXDP_P
17 C_PCH_PCI_FB CLKOUT_PCI2 AE2
AT17 CLKOUT_PCIE7N AF1
TP29 CLKOUT_PCI3 CLKOUT_PCIE7P
C_PCICLK_TPM_R AT14 P31
CLKOUT_PCI4 CLKOUT_DMI_N R31 C_CPU_CLK_DN 8
CLKOUT_DMI_P C_CPU_CLK_DP 8
N56
AT9 CLKOUT_DP_N M55
TP23 BA5 CLKOUTFLEX0_GPIO64 CLKOUT_DP_P
TP44

*
R888 22 Ohm 25M_CLK_GEN_R AW5 CLKOUTFLEX1_GPIO65 AE6
30 25M_CLK_GEN +/-1% 48M_SIO_R BA2 CLKOUTFLEX2_GPIO66 CLKOUT_PCIE0N AC6 C_PCH_100M_GLAN_DN 30
CLKOUTFLEX3_GPIO67 CLKOUT_PCIE0P C_PCH_100M_GLAN_DP 30

N
V_1D05V_PCH AA5

*
R422 90.9 Ohm +/-1% XCLK_RCOMP AL2 CLKOUT_PCIE1N W5 USB3_CLKN_FCH 44
XCLK_RCOMP CLKOUT_PCIE1P USB3_CLKP_FCH 44
C_14M_PCH AN8 AB12
REFCLK14IN CLKOUT_PCIE2N AB14
CLKOUT_PCIE2P
AB9
C * R428 CLKOUT_PCIE3N
CLKOUT_PCIE3P
AB8 C
10K
+/-1% Y9
CLKOUT_PCIE4N Y8
CLKOUT_PCIE4P
AF3
CLKOUT_PCIE5N AG2 C_PCH_100M_1X1_DN 27
3D3V_SYS 3D3V_SYS CLKOUT_PCIE5P C_PCH_100M_1X1_DP 27
AB3 TP16
CLKOUT_PCIE6N AA2 TP17
CLKOUT_PCIE6P
AG8

Re
C_XTAL_25M_OUT CLKOUT_PEG_A_N AG9 C_PCH_100M_X16_DN 16
CLKOUT_PEG_A_P C_PCH_100M_X16_DP 16
* C496 * C495 C_XTAL_25M_IN
AJ5
XTAL25_OUT
CLKOUT_PEG_B_N
AE12
0.1uF 0.1uF R434 1M AJ3 AE11
r0603h6 XTAL25_IN CLKOUT_PEG_B_P
16V, X7R, +/-10%
16V, X7R, +/-10% DON'T CHANGE TO 0402
X3
1 2 Reserved always both
XTAL-25MHz in integrated mode and
in buffer through mode
* C483
27pF * C482
27pF
+/-5% +/-5%

Ce=2*CL-(Ci+Cs)
CL=Crystal capacitive(datasheet:20PF)
Ci=PCHpin capacitive=7pF

pa
Cs=Board trace capacitive=6pF

B B

i
8 OF 10
CPT_CRB/BGA
?

A A

Foxconn Confidential Document,please keep it secret.C6

FOXCONN PCEG
Title
PCH8-CLOCK
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 22 of 45


5 4 3 2 1
CM
5 4 3 2 1

V_1D05V_PCH
V_1D05V_PCH
?
CPT_CRB
U3I Near AC24
F20 REV 1.0 AC24 3D3V_SUS U3K
F30 VCCIO_24 VCCCORE_1 AC26
V25 VCCIO_25 VCCCORE_2 AC28 REF5V BF1
V27 VCCIO_26 VCCCORE_3 AC30 C722 V5REF
VCCIO_27 VCCCORE_4
* C723 * C569
0.1uF
16V, X7R, +/-10%
* C491
0.1uF
V31
V33 VCCIO_28
VCCIO_29
VCCCORE_5
VCCCORE_6
AC32
AE24 * C475 * 10uF REF5V_SUS BT25
V5REF_SUS VCCVRM_1
VCCVRM_4
AJ1
R2
V_1D8V_SFR

16V, X7R, +/-10%


1uF Y24 AE28 1uF 6.3V,X5R AV28 R54
Y26 VCCIO_30 VCCCORE_7 AE30 VCCSUSHDA VCCVRM_3 R56
6.3V,X5R VCCIO_31 VCCCORE_8 6.3V,X5R,+/-10% 3D3V_SYS VCCVRM_2
Y30 AE32 AU20
VCCIO_32 VCCCORE_9 VCC3_3_9 V_NAND_IO

*
Y32 AE34 Near AU22 C494 1uF 6.3V,X5R,+/-10% AV20
Y34 VCCIO_33 VCCCORE_10 AE36 AU22 VCC3_3_10
D VCCIO_34 VCCCORE_11 AG32 VCC3_3_7 T55 C576 0.1uF16V, X7R, +/-10%
D

SV

*
VCCCORE_12 AG34 AN52 VCCPNAND_01 T57
VCCCORE_13 AJ32 VCCSPI VCCPNAND_02
VCCCORE_14 AJ34 3D3V_SYS
VCCCORE_15 AJ36
VCCCORE_16 AL32 AL38 C577 0.1uF 16V, X7R, +/-10% Near AL38

*
VCCCORE_17 AL34 VCC3_3_5 AN38
VCCCORE_18 AN32 VCC3_3_6
VCCCORE_19 AN34
VCCCORE_20 AR32
VCCCORE_21 AR34 BC17
AA34 VCCCORE_22 VCC3_3_2 BD17
AA36 VCCIO_22 VCC3_3_3 BD20
VCCIO_23 VCC3_3_4

V22
Y20 VCCIO_35
Y22 VCCIO_36 A12 C489 0.1uF 16V, X7R, +/-10%

**
VCCIO_37 VCC3_3_8 AF57
VCC3_3_1 Near A12 and AF57
C575 0.1uF 16V, X7R, +/-10%

V_1D05V_PCH

N
3D3V_DUAL 3D3V_SUS

V_1D05V_CPU
0.1uF
* *

*
Near B41 C518 1uF 6.3V,X5R,+/-10% AG24 BT35 C727 16V, X7R, +/-10% Near BT35/BOT
B41 VCCASW_4 AG26 VCCSUS3_3_11
0.1uF VCCDMI_2 VCCASW_5 AG28 AV30 C521 0.1uF 16V, X7R, +/-10%
C Near AV30 C

*
C570 16V, X7R, +/-10% E41 VCCASW_6 AJ24 VCCSUS3_3_2 AV32
Near E41 VCCDMI_1 VCCASW_7 VCCSUS3_3_3
AJ26 AY31
VCCASW_8 AJ28 VCCSUS3_3_4 AY33 0.1uF
VCCASW_9 VCCSUS3_3_5

*
AL40 AL24 BJ36 C726 16V, X7R, +/-10% Near U31/BOT
AN40 VCCIO_8 VCCASW_10 AL28 VCCSUS3_3_6 BK36
V_1D05V_PCH VCCIO_9 VCCASW_11 VCCSUS3_3_7
AN41 AN22 BM36

* *
VCCIO_10 VCCASW_12 AN24 VCCSUS3_3_8 R777 0
VCCASW_13 3D3V_SYS 3D3V_SB
0.1uF AG38 AN26 AT40
VCCIO_20 VCCASW_14 VCCSUS3_3_9
**

Near AG38/BOT C517 16V, X7R, +/-10% AG40 AN28 AU38 C528 0.1uF 16V, X7R, +/-10%
VCCIO_21 VCCASW_15 AR24 VCCSUS3_3_10
C516 0.1uF16V, X7R, +/-10% AG41 VCCASW_16 AR26 U31 Charle
Near AG40

Re
VCCIO_7 VCCASW_17 AR28 VCCSUS3_3_1
VCCASW_18 AR30 R404 1 S_VCCADAC AV40
VCCASW_19 AR36 C466 VCCDSW3_3 C519 0.1uF 16V, X7R, +/-10% Near D55

*
VCCASW_20 AR38
VCCASW_21
VCCASW_22
AU30 * C464 * 10uF
* C487
0.1uF * C486
10nF V_PROC_IO
V_PROC_IO_NCTF
D55
B56
V_1D05V_CPU

16V, X7R, +/-10%


AU36 1uF 6.3V,X5R 25V, X7R, +/-10%
VCCASW_23 A39 C520 1uF 6.3V,X5R,+/-10%
6.3V,X5R

*
DCPSUS_3 AA32
AU34 DCPSUS_1
VCCASW_3 V_1D05V_PCH
AV36 V_1D05V_PCH BU42
VCCASW_2 VCCRTC VCCRTC
AU32
VCCASW_1 BR54
AE15 10uH DCPRTC BT56 C572 0.1uF 16V, X7R, +/-10%
V_1D05V_PCH

*
VCCDIFFCLKN_1 AE17 L39 S_VCCADPLLA DCPRTC_NCTF AT41
VCCDIFFCLKN_2 AG15 0805h14 C472 DCPSUS_2
VCCDIFFCLKN_3 AJ20
VCCCLKDMI
VCCIO_18
AE40 * 10uF
* C471 DCPSUSBYP
AV41

AC20 AT1 BA46


* C573
1uF VCCSSC_1
VCCSSC_2
AE20
6.3V,X5R 1uF
6.3V,X5R
VCCADAC DCPSST
6.3V,X5R U56 AB1
VCCAPLLSATA AV24 VCCADPLLA
Dummy 10uH
*

*
VCCIO_1

pa
BA38 AV26 V_1D05V_PCH L40 S_VCCADPLLB AC2 C728
V_1D05V_PCH VCCIO_19 VCCIO_2 VCCADPLLB
AY25 0805h14 C469 0.1uF
B53 VCCIO_3 AY27
VCCAPLLEXP
VCCAPLLEXP VCCIO_4 * 10uF
* C470
16V, X7R, +/-10%
*

V_1D05V_PCH R518 0 Dummy C54 V36 6.3V,X5R 1uF


B VCCAFDIPLL VCCIO_13 B
6.3V,X5R CPT_CRB/BGA
Y36
VCCIO_12
*

R414 0 Dummy AL5 AJ38


VCCACLK VCCIO_11 C490
A19 Y28
Near AL5 VCCAPLLDMI2
VCCAPLLDMI2 VCCIO_14 * C725 * C515
0.1uF * 10uF
16V, X7R, +/-10%

1uF 6.3V,X5R
9 OF 10
6.3V,X5R
CPT_CRB/BGA
?

Near AC20 Near AE40

i
VCCAPLLEXP

5V_DUAL 5VSB_SYS 3D3V_SUS

* C548
1uF
6.3V,X5R

A
Dummy 5V_SYS 3D3V_SYS
D15
R484 SD103AW
A

R491 10
D12 10

C
VCCAPLLDMI2 R424 SD103AW Dummy
10
Reserved REF5V_SUS
C

* C504
1uF
REF5V
FAB 1.0 *
6.3V,X5R
Dummy * C480
C510
1uF
1uF 6.3V,X5R
A 6.3V,X5R A

Foxconn Confidential Document,please keep it secret.C6

FOXCONN PCEG
Title
PCH6-POWER
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 23 of 45


5 4 3 2 1
CM
5 4 3 2 1

?
CPT_CRB
U3J
BC15 A26
BC20 VSS_125 REV 1.0 VSS_5 A29 U3L
BC27 VSS_126 VSS_6 A42
BC31 VSS_127 VSS_7 A49 L12 L33
BC36 VSS_128 VSS_8 A9 L17 VSS_231 TP3 AE49
BC38 VSS_129 VSS_9 AA20 L38 VSS_232 TP13 BA36
BC47 VSS_130 VSS_10 AA22 L41 VSS_233 TP17 AY36
BC9 VSS_131 VSS_11 AA24 L43 VSS_234 TP18 Y14
BD25 VSS_132 VSS_12 AA26 M20 VSS_235 TP19 Y12
D
BD33 VSS_133 VSS_13 AA28 M22 VSS_236 TP20 P22 D

SV
BF12 VSS_134 VSS_14 AA30 M25 VSS_237 TP1 M38
BF20 VSS_135 VSS_15 AA38 M27 VSS_238 TP4 P25
BF25 VSS_136 VSS_16 AB11 M31 VSS_239 VSS_296 R25
BF33 VSS_137 VSS_17 AB15 T52 VSS_240 VSS_295 P36
BF41 VSS_138 VSS_18 AB40 T6 VSS_260 VSS_294 R36
BF43 VSS_139 VSS_19 AB41 U11 VSS_261 VSS_293 L31
BF46 VSS_140 VSS_20 AB43 U15 VSS_262 TP2 L36
BF52 VSS_141 VSS_21 AB47 U17 VSS_263 TP5 AL44
BF6 VSS_142 VSS_22 AB52 U20 VSS_264 VSS_292 AL43
BG22 VSS_143 VSS_23 AB57 U22 VSS_265 VSS_291
BG25 VSS_144 VSS_24 AB6 U25 VSS_266 AE41
BG27 VSS_145 VSS_25 AC22 U27 VSS_267 TP14 AE43
BG31 VSS_146 VSS_26 AC34 U33 VSS_268 TP15
BG33 VSS_147 VSS_27 AC36 U36 VSS_269 BA27
BG36 VSS_148 VSS_28 AC38 U38 VSS_270 TP11
BG38 VSS_149 VSS_29 AC4 U41 VSS_271
BH52 VSS_150 VSS_30 AC54 U47 VSS_272
BH6 VSS_151 VSS_31 AE14 U53 VSS_273
BJ1 VSS_152 VSS_32 AE18 V20 VSS_274
BJ15 VSS_153 VSS_33 AE22 V38 VSS_275
BK20 VSS_154 VSS_34 AE26 V6 VSS_276
BK41 VSS_155 VSS_35 AE38 W1 VSS_277
BK52 VSS_156 VSS_36 AE4 W55 VSS_278 BM46
BK6 VSS_157 VSS_37 AE47 W57 VSS_279 TP10
BM10 VSS_158 VSS_38 AE8 Y11 VSS_280
BM12 VSS_159 VSS_39 AE9 Y15 VSS_281 AG12
BM16 VSS_160 VSS_40 AF52 Y38 VSS_282 L_BKLTCTL AG18
BM22 VSS_161 VSS_41 AF6 Y40 VSS_283 L_BKLTEN AG17
BM23 VSS_162 VSS_42 AG11 Y43 VSS_284 L_VDD_EN
VSS_163 VSS_43 VSS_285

N
BM26 AG14 Y46
BM28 VSS_164 VSS_44 AG20 Y47 VSS_286
BM32 VSS_165 VSS_45 AG22 Y49 VSS_287
BM40 VSS_166 VSS_46 AG30 Y52 VSS_288
BM42 VSS_167 VSS_47 AG36 Y6 VSS_289
BM48 VSS_168 VSS_48 AG43 VSS_290
BM5 VSS_169 VSS_49 AG44
BN31 VSS_170 VSS_50 AG46
C C
BN47 VSS_171 VSS_51 AG5
BN6 VSS_172 VSS_52 AG50 A4
BP3 VSS_173 VSS_53 AG53 A6 VSS_NCTF_1
BP33 VSS_174 VSS_54 AH52 B2 VSS_NCTF_2
BP35 VSS_175 VSS_55 AH6 BM1 VSS_NCTF_3
BR22 VSS_176 VSS_56 AJ22 BM57 VSS_NCTF_4
VSS_177 VSS_57 TP39 VSS_NCTF_5
BR52 AJ30 BP1
VSS_178 VSS_58 TP22 VSS_NCTF_6
BU19 AJ57 BP57
BU26 VSS_179 VSS_59 AK52 BT2 VSS_NCTF_7
BU29 VSS_180 VSS_60 AK6 BU4 VSS_NCTF_8
BU36 VSS_181 VSS_61 AL11 BU52 VSS_NCTF_9

Re
BU39 VSS_182 VSS_62 AL18 BU54 VSS_NCTF_10
C19 VSS_183 VSS_63 AL20 BU6 VSS_NCTF_11
C32 VSS_184 VSS_64 AL22 D1 VSS_NCTF_12
C39 VSS_185 VSS_65 AL26 F1 VSS_NCTF_13
C4 VSS_186 VSS_66 AL30 VSS_NCTF_14
D15 VSS_187 VSS_67 AL36
D23 VSS_188 VSS_68 AL41
D3 VSS_189 VSS_69 AL46
D35 VSS_190 VSS_70 AL47
D43 VSS_191 VSS_71 AM52
D45 VSS_192 VSS_73 AM3
E19 VSS_193 VSS_72 AM57
E39 VSS_194 VSS_74 AN11
E54 VSS_195 VSS_75 AN12
E6 VSS_196 VSS_76 AN15
E9 VSS_197 VSS_77 AN17
F10 VSS_198 VSS_78 AN18
F12 VSS_199 VSS_79 AN20
F16 VSS_200 VSS_80 AN30
F22 VSS_201 VSS_81 AN36
F26 VSS_202 VSS_82 AN4
VSS_203 VSS_83

pa
F32 AN43
F33 VSS_204 VSS_84 AN47
F35 VSS_205 VSS_85 AN54
F36 VSS_206 VSS_86 AN9
F40 VSS_207 VSS_87 AR20 AY22
B
F42 VSS_208 VSS_88 AR22 C12 VSS_4 B
F46 VSS_209 VSS_89 AR52 AE56 VSS_3
F48 VSS_210 VSS_90 AR6 BR36 VSS_1
F50 VSS_211 VSS_91 AT15 AU2 VSS_2
F8 VSS_212 VSS_92 AT18 VSSADAC
AV18 VSS_213 VSS_93 AT43 A54

*
AV22 VSS_104 VSS_94 AT47 R540 0 +/-5% A52 TS_VSS1
AV34 VSS_105 VSS_95 AT52 F57 TS_VSS2
AV38 VSS_106 VSS_96 AT6 D57 TS_VSS3
VSS_107 VSS_97
Dummy TS_VSS4
AV47 AT8
AV6 VSS_108 VSS_98 AU24 CONNECT TO GND ON CRB
AW57 VSS_109 VSS_99 AU26 PINS A54,A52,F57,D57
AY38 VSS_110 VSS_100 AU28
VSS_111 VSS_101

i
AY6 AU5
B23 VSS_112 VSS_102 AV12
BA11 VSS_113 VSS_103 BA49
BA12 VSS_114 VSS_119 BB1
BA31 VSS_115 VSS_120 BB3
BA41 VSS_116 VSS_121 BB52
BA44 VSS_117 VSS_122 BB6
VSS_118 VSS_123 CPT_CRB/BGA
G54 BC14
H15 VSS_214 VSS_124 M33
H20 VSS_215 VSS_241 M36
H22 VSS_216 VSS_242 M46
H25 VSS_217 VSS_243 M52
H27 VSS_218 VSS_244 M57
H33 VSS_219 VSS_245 M6
H6 VSS_220 VSS_246 M8
J1 VSS_221 VSS_247 M9
J33 VSS_222 VSS_248 N4
J46 VSS_223 VSS_249 N54
J48 VSS_224 VSS_250 R11
J5 VSS_225 VSS_251 R15
J53 VSS_226 VSS_252 R17
K52 VSS_227 VSS_253 R22
K6 VSS_228 VSS_254 R4
K9 VSS_229 VSS_255 R41
VSS_230 VSS_256 R43
A A
VSS_257 R46
VSS_258 R49
10 OF 10 VSS_259
Foxconn Confidential Document,please keep it secret.C6
CPT_CRB/BGA
?

FOXCONN PCEG
Title
PCH7-GND
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 24 of 45


5 4 3 2 1
CM
5 4 3 2 1

D D

SV
3D3V_SYS

2
3 Q4
BAV99

1
L23

*
Dummy V_VGA_RED_R
21 V_VGA_RED

82nH@100MHz C120

*R108 C154
* 4.7pF

2
150
+/ -1% * 4.7pF
50V, NPO, +/-0.25pF
50V, NPO, +/-0.25pF

3 Q5
BAV99

1
L24

N
3D3V_SYS
*
Dummy V_VGA_GREEN_R
21 V_VGA_GREEN
3D3V_SYS
82nH@100MHz
C155 C121

2
*R109 * 4.7pF
* 4.7pF

2
C 150 50V, NPO, +/-0.25pF 50V, NPO, +/-0.25pF C
+/ -1% 3 Q3 V_VGA_VSYNC_3V 3 Q7
21 V_VGA_VSYNC_3V
BAV99 BAV99 V_VGA_HSYNC_3V 3 Q8
21 V_VGA_HSYNC_3V
BAV99

1
* C149

1
L25
12pF
* C150
*

Dummy V_VGA_BLUE_R Dummy


50V, NPO, +/-5% 12pF
21 V_VGA_BLUE
Dummy 50V, NPO,Dummy
+/-5%
82nH@100MHz
Dummy
C156 C122

Re
*R110
150 * 4.7pF
50V, NPO, +/-0.25pF * 4.7pF
50V, NPO, +/-0.25pF
+/ -1%

5V_SYS_VGA
5V_SYS F1
D24
Fuse 1.5A
A C
C49 *
* 4.7uF
+/-10% SD103AW * C90
0.1uF
16V, Y5V, +80%/-20%
3D3V_SYS
5V_SYS_VGA

pa
VGA

VGA
VGA_DDCSCL_R 15 SCL GND 5
10 GND
B B
V_VGA_VSYNC_3V 14 VSYNC ID0 4
RN5 9 NC
8
6
4
2

2.2K Ohm V_VGA_HSYNC_3V 13 HSYNC B 3 V_VGA_BLUE_R


8 GND
+/-5%
7
5
3
1

VGA_DDCSDA_R 12 SDA G 2 V_VGA_GREEN_R


*

7 GND
11 ID1 R 1 V_VGA_RED_R
6 GND

CONN-VGA

16
17
3D3V_SYS

i
G

S D VGA_DDCSCL R113 100 VGA_DDCSCL_R


21 V_VGA_DDCSCL
Q10 C194 C175
2N7002
* 470pF
50V, X7R, +/-10%
Dummy * 100pF

Dummy
3D3V_SYS
G

R114
*

S D VGA_DDCSDA 100 VGA_DDCSDA_R U16


21 V_VGA_DDCSDA 1 6 VGA_DDCSDA_R
Q11 C195
2N7002
* 470pF
50V, X7R, +/-10%
Dummy C176
2 5
5V_SYS
* 100pF
Dummy
3 4 VGA_DDCSCL_R

IP4220CZ6

A A
Dummy

Foxconn Confidential Document,please keep it secret.C6

FOXCONN PCEG
Title
VGA
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 25 of 45


5 4 3 2 1
CM
5 4 3 2 1

U50
U49
TX_DP_DATA2 1 6 TX_DN_DATA2
TX_DP_DATA0 1 6 TX_DN_DATA0
2 5
+V5S_HDMI
2 5 +V5S_HDMI
TX_DP_DATA1 3 4 TX_DN_DATA1
TX_DP_CLK 3 4 TX_DN_CLK

HDMI Connector IP4220CZ6


IP4220CZ6

Dummy
Dummy

D D
TX_DP_CLK TX_DP_DATA0 TX_DP_DATA1 TX_DP_DATA2

SV
TX_DN_CLK TX_DN_DATA0 TX_DN_DATA1 TX_DN_DATA2

* R1125 * R1126 * R1127 * R1128 * R1129 * R1130 * R1131 * R1132


619 Ohm 619 Ohm 619 Ohm 619 Ohm 619 Ohm 619 Ohm 619 Ohm 619 Ohm
+/-1% +/-1% +/-1% +/-1% +/-1% +/-1% +/-1% +/-1%

D
Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy
Q100 Q101
2N7002 2N7002
G G
3D3V_SYS 3D3V_SYS

S
Dummy Dummy

+V5S_HDMI
3D3V_SYS 3D3V_SYS

HDMI
20
C754 0.1uF 16V, X7R TX_DP_CLK TX_DP_DATA2 1 GND 21
*R1133 21 TMDS1_CLKP

** ** ** **
D2+ GND

N
C755 0.1uF 16V, X7R TX_DN_CLK 2

*R1134 *R1135 *R1136 2.2K


21 TMDS1_CLKN
Dummy TX_DN_DATA2 3 D2 Shield
D2-
2.2K C756 0.1uF
Dummy 16V, X7R TX_DP_DATA0 TX_DP_DATA1 4
21 TMDS1_TX0P 5 D1+
2.2K 2.2K C757 0.1uF 16V, X7R TX_DN_DATA0
G

21 TMDS1_TX0N D1 Shield
Dummy TX_DN_DATA1 6
Dummy C758 0.1uF 16V, X7R TX_DP_DATA1 TX_DP_DATA0 7 D1-
21 TMDS1_TX1P Dummy D0+
S D Dummy HDMI_DDCDATA_R C759 0.1uF 16V, X7R TX_DN_DATA1 8
21 HDMI_DDCDATA 21 TMDS1_TX1N D0 Shield
C Dummy Dummy Dummy TX_DN_DATA0 9 C
C760 0.1uF 16V, X7R TX_DP_DATA2 TX_DP_CLK 10 D0-
Dummy
G

21 TMDS1_TX2P CK+
C761 0.1uF 16V, X7R TX_DN_DATA2 11
Q2 21 TMDS1_TX2N CK Shield
Dummy TX_DN_CLK 12
2N7002 S D HDMI_DDCCLK_R 13 CK-
21 HDMI_DDCCLK Dummy CE Remote
5V_SYS 14
C2 C3 +V5S_HDMI HDMI_DDCCLK_R 15 NC
Dummy DDC CLK
Q9
10pF
50V, NPO, +/-5% * * 50V,
10pF
NPO, +/-5%
D20 F7
HDMI_DDCDATA_R 16
17 DDC DATA
GND
2N7002 Dummy Dummy C762 A C 5V_HDMI_CON 18
* 4.7uF * C763 HDMI_HPD_R 19 +5V
HP DETGND
22
+/-10%
* 0.1uF 23

Re
Dummy SD103AW FUSE GND
16V, X7R CONN-HDMI
Dummy Dummy
HDMI_HPD_R Dummy Dummy
Dummy
3

+V5S_HDMI
1 2

D21
BAV99
HDMI_DDCDATA_R 3D3V_SYS 3D3V_SYS

Dummy
3

+V5S_HDMI
1 2 * R1141

G
10K
D22 S D
21 HDMI_DET

pa
BAV99
HDMI_DDCCLK_R Dummy
Dummy Q102
* R1142
1M
3

+V5S_HDMI 2N7002
B B
1 2 Dummy
FAB 1.0
Dummy
D23
BAV99

Dummy

5 4
Foxconn Confidential Document,please keep it secret.C6

3 2
Title

Size
C

Date:
DVI
Document Number
FOXCONN PCEG

H61M06
Thursday, January 05, 2012
1
i
Sheet 26 of 45
Rev
A
A
CM
5 4 3 2 1

3D3V_DUAL 3D3V_SYS 12V_SYS 12V_SYS 3D3V_SYS

PCI-E1_1X1
B1 A1
B2 12V PRSNT1# A2
B3 12V 12V A3
B4 RSVD 12V A4
B5 GND GND A5
16,20 SMB_CLK_RESUME SMCLK JTAG2 E_SPI_CLK 20
B6 A6
16,20 SMB_DATA_RESUME SMDAT JTAG3 E_SPI_MOSI 20
B7 A7
B8 GND JTAG4 A8 E_SPI_CS0# 20
3.3V JTAG5 E_SPI_MISO 20
B9 A9
20 E_SPI_HOLD B10 JTAG1 3.3V A10
B11 3.3VAUX 3.3V A11
D 16,20,44 S_WAKE# WAKE# PWRGD PCIE_SLOT_RST# 16,33 D

SV
KEY

B12 A12
B13 RSVD_B12 GND A13
GND REFCLK+ C_PCH_100M_1X1_DP 22
B14 A14
18 X_PE_TX_DP4 B15 HSOP0 REFCLK- A15 C_PCH_100M_1X1_DN 22
18 X_PE_TX_DN4 HSON0 GND
B16 A16
B17 GND HSIP0 A17 X_PE_RX_DP4 18
B18 PRSNT2# HSIN0 A18 X_PE_RX_DN4 18
GND GND

Slot-PCIE-1X

N
C C

Re
pa
B B

5 4
Foxconn Confidential Document,please keep it secret.C6

3 2
Title

Size
C

Date:
PCIE 1X
Document Number
FOXCONN PCEG

H61M06
Thursday, January 05, 2012
1
i
Sheet 27 of 45
Rev
A
A
CM
5 4 3 2 1

3D3V_SYS +5VA

**
ALDOIN 5V_DUAL A_LINE1_RC A1C7 4.7uF A1R7 1K A_LINE1_RL A1FB12 FB 600 Ohm
* A_LINE1_R 29

**
10V,X5R
AFB1 2 1 A_LINE1_LC A1C8 4.7uF A1R8 1K A_LINE1_LL A1FB11 FB 600 Ohm
A1C48 A1C5 A1C11 10V,X5R * A1C29 A1C30
A_LINE1_L 29
10uF 10uF 10uF FB 60 Ohm 100pF 100pF
* * * * *

C
A1D3
6.3V,X5R 6.3V,X5R 6.3V,X5R AZ2015-01H.R7F

Dummy

38
25

A
A1U1

1
9

LDO-OUT2
LDO-OUT1
DVDD-IO
DVDD
*
D A1C55 10uF D

SV
6.3V,X5R 29

**
3 LDO-IN A_LOUT_RC A1EC4 100uF A1R16 75 A_LOUT_RL A1FB10 FB 600 Ohm
REGREF * A_LOUT_R 29

**
2 A1C9 A1C6 16V, +/-20%
GPOI0/DMIC-CLK/SPDIFOUT2 * 0.1uF * 10uF A_LOUT_LC A1EC1 100uF A1R17 75 A_LOUT_LL A1FB9 FB 600 Ohm
20 A_HDA_RST#
11 35 A_LOUT_LC 6.3V,X5R 16V, +/-20% 1 1
* A1C27 A1C28
A_LOUT_L 29

*
A1R42 22 6 RESET# FRONT-L 36 A_LOUT_RC A1R15 A1R18 100pF 100pF
20 A_HDA_BCLK
20 A_HDA_SYNC
10 BITCLK FRONT-R 37 22K 22K * *
*
A1R36 33 A_HDA_SDI0 8 SYNC PIN37-VREFO 33
20 A_HDA_SDI0_R 5 SDATA-IN Sense C 34 A_SENSEB
20 A_HDA_SDO SDATA-OUT Sense B A_SENSEB 29 2 2
39
SURR-L 40 A_JD_REF
12
ALC662-VD0-GR JDREF 41
13 BEEP SURR-R 43
29 A_SENSEA
A_LINE2_LC 14 SENSE A
LINE2-L
CENTER
LFE
44 *A1R23
20K A_MIC1_BAIS_L
A_LINE2_RC 15 45 +/-1%
A_MIC2_LC 16 LINE2-R SIDE-L 46 A_MIC1_BAIS_R
A_MIC2_RC 17 MIC2-L SIDE-R
MIC2-R Near the codec
18 28 A_MIC1_BAIS_L
19 CD-L VREFO-B 27 A_CODEC_VREF * A1R9 * A1R19

GPIO1/DMIC-DATA
20 CD-GND VREF
CD-R 2.2K 2.2K
A_MIC1_LC 21 30 A_MIC2_BAIS A1C4

**
A_MIC1_RC 22 MIC1-L VREFO-F 31 A_LINE2_BAIS 10uF A_MIC1_RC A1C15 4.7uF A1R14 1K A_MIC1_RL A1FB4 FB 600 Ohm
* * A_MIC1_R 29

**
A_LINE1_LC 23 MIC1-R VREFO-E 32 A_MIC1_BAIS_R 10V,X5R

N
A_LINE1_RC 24 LINE1-L VREFO-B(2) 6.3V,X5R A_MIC1_LC A1C20 4.7uF A1R21 1K A_MIC1_LL A1FB3 FB 600 Ohm
*
AVSS1
AVSS2
LINE1-R A_MIC1_L 29

DVSS
47 10V,X5R A1C12 A1C19
48 SPDIFI-IN/EAPD 100pF 100pF
SPDIF-OUT * *
ALC662-VD0-GR
4
7
26
42
C C
A_HDA_BCLK

A1C36
* 10pF
ACP5
2 1

X_COPPER

Re
GND_AUDIO

3D3V_SYS +5VA

A1C37 0.1uF A1C16 0.1uF A1C38 0.1uF


**

***

***
16V, Y5V, +80%/-20% 16V, Y5V, +80%/-20%
A1C35 0.1uF A1C10 0.1uF A1C40 0.1uF
16V, Y5V, +80%/-20% 16V, Y5V, +80%/-20%
A1C2 4.7uF A1C31 0.1uF
+/-10% 16V, Y5V, +80%/-20%

pa
FRONT PANEL
B B
A1D1
**

1 A1R2 4.7K A_LINE2_RL


A_LINE2_BAIS 3
2 A1R1 4.7K A_LINE2_LL

BAT54A
**

A_LINE2_RC A1EC6 100uF A1R32 75 A_LINE2_RL


A_LINE2_R 29
**

LINE II 16V, +/-20%

i
A_LINE2_LC A1EC5 100uF A1R27 75 A_LINE2_LL
A_LINE2_L 29
16V, +/-20% 1 1
A1R30 A1R29
22K 22K

2 2

A1D2
**

1 A1R4 4.7K A_MIC2_RL ACP2


A_MIC2_BAIS 3 2 1
2 A1R3 4.7K A_MIC2_LL
X_COPPER
ACP4
BAT54A 2 1
A A
X_COPPER
ACP3
Foxconn Confidential Document,please keep it secret.C6
**

A_MIC2_RC A1C49 4.7uF A1R25 75 A_MIC2_RL 2 1


A_MIC2_R 29
**

MIC II 10V,X5R
A_MIC2_LC A1C50 4.7uF A1R24 75 A_MIC2_LL X_COPPER
10V,X5R 1
A1R22
1
A1R20
A_MIC2_L 29
2
ACP1
1
FOXCONN PCEG
22K 22K Title
X_COPPER
AUDIO-1:ALC889
2 2 GND_AUDIO Size Document Number Rev
A3 H61M06 A

Date: Thursday, January 05, 2012 Sheet 28 of 45


5 4 3 2 1
CM
5 4 3 2 1

Front_Audio 3D3V_SYS
JACK SENSE FAB:1.0
A1R33 5.1KOhm +/-1% A_LOUT_JD
28 A_SENSEA
MIC II *A1R40

**
A1R37 10K +/-1% A_LINE1_JD F_AUDIO 10K
A_MIC2_L 1 2
28 A_MIC2_L
A1R38 20K +/-1% A_MIC1_JD A_MIC2_R 3 4
28 A_MIC2_R A_FP_AUDIO_PRESENCE# 20
A_LINE2_R 5 6 A_MIC2_JD
28 A_LINE2_R
FRONT-IO-SENSE 7
X
A_LINE2_L 9 10 A_LINE2_JD
28 A_LINE2_L
D LINE II Header_2X5_8 D

SV
A1C41 A1C43 A1C45 A1C44 A1C46 A1C42
100pF 100pF 100pF 100pF 100pF 100pF
* * * * * *

**
A1R13 39.2K +/-1% A_LINE2_JD 50V, NPO, +/-5%
50V, NPO, +/-5% 50V, NPO, +/-5% 50V, NPO, +/-5% 50V, NPO, +/-5%
28 A_SENSEB 50V, NPO, +/-5%
A1R12 20K +/-1% A_MIC2_JD
Dummy Dummy Dummy Dummy Dummy
Dummy

+5VA for AUDIO

N
C C

Audio Jack

Re
pa
B AUDIO B
32 INSULATOR
28 A_LINE1_L A_LINE1_JD 33
34
35
28 A_LINE1_R

36
22 37
28 A_LOUT_L
A_LOUT_JD 23 38
24 39

i
25
28 A_LOUT_R

2
28 A_MIC1_L A_MIC1_JD 3
4
5
28 A_MIC1_R 1

CONN - Audio jack

Audio Jack
A LINE IN A
C (UAJ)

LINE OUT
Foxconn Confidential Document,please keep it secret.C6
B (UAJ) FOXCONN PCEG
MIC IN Title
A (UAJ) AUDIO-2:CONNECTOR
Size Document Number Rev
A3 H61M06 A

Date: Thursday, January 05, 2012 Sheet 29 of 45


5 4 3 2 1
CM
5 4 3 2 1

1.05V / 1.0V
source L1L1 L1C21 L1C20 L1R9/ reserve L1R11 / reserve

8111E Series/8111F Series/8105E Series SWR O O O O X


8105E Series (except for VL) LDO X X X X O
8111E Series/8111F Series/8105E-VB External X X X X O
8105E Series (except for VB) External X X X O X
L1L1
*

*
D L1_REGOUT 1 2 L1R19 0 +/-5% L1_VDD10 D
L1C20

SV
4.7uH * L1C21 * 0.1uF Dummy
*
L1C16
0.1uF
*
L1C19
0.1uF
*
L1C8
0.1uF
*
L1C5
0.1uF
*
L1C7
0.1uF
*
L1C11
0.1uF
*
L1C13
0.1uF C63-C69 Close To L1U2

16V, X7R, +/-10%

16V, X7R, +/-10%

16V, X7R, +/-10%

16V, X7R, +/-10%

16V, X7R, +/-10%

16V, X7R, +/-10%

16V, X7R, +/-10%


4.7uF 16V, X7R
Dummy Dummy
pins-- 3, 6, 9, 13, 29, 41, 45.
Dummy +/-10%

Dummy
Dummy

*
Remove For Disable Switch Regulator L1R20 0 +/-5% L1_EVDD10
L1C22
(Accept External 1.05V Power Supply )
* L1C2
1uF
0.1uF
*
16V, X7R
6.3V,X5R L1C2,L1C22 Close To L1U2
pins-- 21.
L1R18 value should be
C12 to C18 are for VDD33 Close To L1U2 2.49K (1%) LED define change after remove EEPROM
pins-- 12, 27, 39, 42, 47, 48. for all application.
L1_VDD33
+/-1%
*

* *
3D3V_SB L1R4 0 +/-5% L1R24 249 Ohm
L1_ACTIVE_LED 31
L1R18 2.49K

*
L1C9 L1C12 L1C6 L1C15 L1C14 L1C23 +/-1% +/-1%
* *
0.1uF
*
0.1uF 0.1uF
* 0.1uF
* 0.1uF
* 0.1uF L1R16 249 Ohm
L1_100_LED 31
16V, X7R, +/-10%

16V, X7R, +/-10%


C461 C463 16V, X7R 16V, X7R 16V, X7R 16V, X7R Dummy Dummy
Controller

L1_LED1/EESK
* 10uF
* 10uF

L1_VDD33
L1_VDD33

L1_VDD10

L1_VDD33
L1_VDD10

L1_VDD33
L1_XTAL2
L1_XTAL1
L1_RSET
6.3V,X5R 6.3V,X5R

L1_LED0
FAB Dummy
1.0 Dummy
*

L1R15 0 +/-5% L1_AVDD33_REG More Detail Layout


L1C44 L1U2

48
47
46
45
44
43
42
41
40
39
38
37
N
Pls. Refer to Layout Guide
Dummy
8105E REMOVE
* L1C10 * 0.1uF
Remove For Disable 49

LED1/EESK
RSET

GPO/SMBALERT
AVDD33_4
AVDD33_3

AVDD10_4
CKXTAL2
CKXTAL1
AVDD33_2

LED0
DVDD10(NC)

DVDD3_2
16V, X7R GND0
4.7uF Switch Regulator L1R9 For Enable Switch Regulator.
+/-10% (Accept External 1.05V L1R11 For Disable Switch
Power Supply ) Regulator.
Dummy L1_MDI0+ 1 36 L1_REGOUT
Dummy 31 L1_MDIP0 MDIP0 REGOUT
31 L1_MDIN0 L1_MDI0- 2 35 L1_AVDD33_REG Dummy

**
C L1_VDD10 3 MDIN0 VDDREG_2 34 L1_AVDD33_REG L1R9 0 L1_VDD33 C

31 L1_MDIP1 L1_MDI1+ 4 AVDD10_1


MDIP1
VDDREG_1
ENSWREG
33 L1_ENSWREG L1R11 0 XTAL
31 L1_MDIN1 L1_MDI1- 5 32 L1_EEDI
L1_VDD10 6 MDIN1 EEDI 31 L1_LED3/EEDO249 Ohm L1R12
AVDD10_2(NC) LED3/EEDO L1_1G_LED 31
31 L1_MDIP2 L1_MDI2+ 7 30 L1_EECS +/-1%

** *
L1_MDI2- 8 MDIP2(NC) EECS 29 L1_VDD10 L1_XTAL1
31 L1_MDIN2 MDIN2(NC) DVDD10_2
L1_VDD10 9 28 L1_LANWAKEB 3D3V_SYS
AVDD10_3(NC) LANWAKEB X7
31 L1_MDIP3 L1_MDI3+ 10 27 L1_VDD33
L1_MDI3- 11 MDIP3(NC) DVDD33_1 26 L1_ISOLATEB L1R6 1K +/-5% 1 2 L1_XTAL2
31 L1_MDIN3 MDIN3(NC) ISOLATEB
L1_VDD33 12 25 L1_PERSTB L1R8 15K +/-5%
AVDD33_1(NC) PERSTB

SMBDATA(NC)
SMBCLK(NC)
XTAL-25MHz
L1C17 L1C18

REFCLK_N
REFCLK_P
DVDD10_1

CLKREQB
* 27pF
* 27pF

EVDD10
+/-5% +/-5%

HSON
HSOP

GND1
HSIN
HSIP

Re
L1_VDD10 13
14
15
L1_CLKREQB 16
17
18
L1_REFCLK+ 19
L1_REFCLK-20
L1_EVDD10 21
L1_HSOP_ 22
L1_HSON_ 23
24
L1_HSIN
L1_HSIP
L1R26

*
L1_XTAL2 0 Dummy
25M_CLK_GEN 22

L1C4 0.1uF 16V, X7R, +/-10% L1_HSOP_


18 X_PE_RX_DP2
**

L1C3 0.1uF 16V, X7R, +/-10% L1_HSON_


18 X_PE_RX_DN2

18 X_PE_TX_DP2 L1_HSIP L1_VDD33


18 X_PE_TX_DN2 L1_HSIN

**
L1_CLKREQB L1R3 10K
22 C_PCH_100M_GLAN_DP L1_REFCLK+ L1_LANWAKEB L1R7 10K

22 C_PCH_100M_GLAN_DN L1_REFCLK- 10K ohm close to Host side


L1_PERSTB

pa
33,35,44 PCIE_DOWN_RST#

B B
*

L1R10 0 L1_LANWAKEB
20 LAN_WAKE#

5 4 3
Foxconn Confidential Document,please keep it secret.C6

2
Title

Size
Custom

Date:
LAN
Document Number
FOXCONN PCEG

H61M06
Thursday, January 05, 2012
1
Sheet 30 of 45
Rev
A
A

i
CM
5 4 3 2 1

SPEED LED
BACK PANEL ( LAN 1+ 2 USB Connector )
LINK 10M OFF
ACTIVE LED 5V_DUAL

LINK 100M GREEN


GREEN = LINK UP
BLINKING = TX/RX ACTIVITY EC2
LINK 1000M YELLOW
*

*
470uF
+/-20% F2
Fuse 2.6A
5V_DUAL_USB0

D D

SV
30 L1_1G_LED
30 L1_100_LED
FAB 1.0
R1183
* C547
* 0.1uF
340401N00-VPN-G 4.7uF 16V, Y5V, +80%/-20% U_USBP1P_R 0 2 1 RN3A
U_USB_DP1 18
+/-10% U_USBP1N_R 0 4 3 RN3B
NIC_USB U_USB_DN1 18
U_USBP0P_R 0 6 5 RN3C
U_USB_DP0 18
U_USBP0N_R 0 8 7 RN3D
U_USB_DN0 18

*
L1R1 0 +/-5% 27
L1_VDD33 22 28

*
Dummy Filter 100MHz

GRN_LED

YLW_LED
21 29 R1184 10K +/-1% U_USB_OC#01 18
L1C24 L1C25 30 8 4
* *

USB-2

USB-1
0.1uF 470pF 1
50V, X7R, +/-10% R1185 R1186 7 3
9 1 15K 0.1uF
30 L1_MDIP0 10 5 *
+/-1% 6 2
30 L1_MDIN0 11 Dummy
2

RJ45-MJ2
30 L1_MDIP1 12 2 U_USBP0N_R 5 1
30 L1_MDIN1 13 6 U_USBP1N_R
14 L30
30 L1_MDIP2
15 3 U_USBP0P_R

N
30 L1_MDIN2
30 L1_MDIP3 16 7 U_USBP1P_R
30 L1_MDIN3 17
18 4
8
U14

GRN_LED
C U_USBP1N_R 6 1 U_USBP1P_R C

3D3V_SB 20 23
19 24 5 2 GND
30 L1_ACTIVE_LED 5V_DUAL_USB0
25
26 U_USBP0N_R 4 3 U_USBP0P_R

IP4220CZ6
CONN-USBX2_RJ45

Re
Dummy

U1U13 U1U14
L1_MDIP0 1 8 L1_MDIP0 L1_MDIP2 1 8 L1_MDIP2
1 8 1 8
L1_MDIN0 2 7 L1_MDIN0 L1_MDIN2 2 7 L1_MDIN2
2 7 2 7
L1_MDIP1 3 6 L1_MDIP1 L1_MDIP3 3 6 L1_MDIP3
3 6 3 6
L1_MDIN1 4 5 L1_MDIN1 L1_MDIN3 4 5 L1_MDIN3
4 5 4 5
SLVU2.8-4.TBT SLVU2.8-4.TBT
Dummy Dummy USB2

10

11
FAB 1.0 CONN - USBX2

pa
8

RN21A 1 2 0 U_USBP8P_R U_USBP9P_R 7


B 18 U_USB_DP8 B
RN21B 3 4 0 U_USBP8N_R
18 U_USB_DN8
U_USBP9N_R 6
RN21C 5 6 0 U_USBP9P_R
18 U_USB_DP9

TOP
RN21D 7 8 0 U_USBP9N_R 5V_DUAL_USB0 5
18 U_USB_DN9

Filter 100MHz Dummy


4 8 4

3 7 U_USBP8P_R 3

BOTTOM
i
2 6 U_USBP8N_R 2

1 5 1

L45

12
U32
U_USBP9N_R 1 6 U_USBP9P_R

GND 2 5 5V_DUAL_USB0
U_USBP8N_R 3 4 U_USBP8P_R

IP4220CZ6

A Dummy A

Foxconn Confidential Document,please keep it secret.C6


FOXCONN PCEG
Title

Size
LAN1 / USB Connectors
Document Number Rev
A3 H61M06 A

Date: Thursday, January 05, 2012 Sheet 31 of 45


5 4 3 2 1
CM
5 4 3 2 1

Front_USB1
5V_DUAL

D D

SV
F6
Fuse 2.6A

5V_DUAL_USB_FP2-3-4-5 Front_USB2

*
18 U_USB_OC#2345 +/-1% 10K R79

1 EC45
C61 R78 * 470uF
0.1uF
Dummy * 15K
+/-1%
+/-20%

2
5V_DUAL_USB_FP2-3-4-5

F_USB2
1 2
USBP4N_R 3 4 USBP5N_R
USBP4P_R 5 6 USBP5P_R
F_USB1 7 8
1 2 10
X
U_USBP2N_R 3 4 U_USBP3N_R
U_USBP2P_R 5 6 U_USBP3P_R Header_2X5_K9
7 8
10

N
X

Header_2X5_K9

RN14A 1 2 0 USBP4P_R
18 U_USB_DP4
RN14B 3 4 0 USBP4N_R
18 U_USB_DN4
C C
RN14C 5 6 0 USBP5P_R
18 U_USB_DP5
RN20A 1 2 0 U_USBP2P_R 18 U_USB_DN5 RN14D 7 8 0 USBP5N_R
18 U_USB_DP2
RN20B 3 4 0 U_USBP2N_R
18 U_USB_DN2
RN20C 5 6 0 U_USBP3P_R Filter 100MHz Dummy
18 U_USB_DP3 7 8 0 4 8
RN20D U_USBP3N_R
18 U_USB_DN3
3 7
Filter 100MHz Dummy
4 8 2 6

Re
3 7 1 5

2 6 L41

1 5

L42 U30
USBP4N_R 1 6 USBP4P_R

2 5
5V_DUAL_USB_FP2-3-4-5
USBP5N_R 3 4 USBP5P_R
U31
U_USBP2N_R 1 6 U_USBP2P_R
IP4220CZ6
GND 2 5 5V_DUAL_USB_FP2-3-4-5

3 4 Dummy
U_USBP3N_R U_USBP3P_R

IP4220CZ6

pa
Dummy

B B

5 4
Foxconn Confidential Document,please keep it secret.C6

3 2
Title

Size
C

Date:
Front USB2.0 Header
Document Number
FOXCONN PCEG

H61M06
Thursday, January 05, 2012
1
i
Sheet 32 of 45
Rev
A
A
CM
5 4 3 2 1

Power-On Strapping If without use these pins, Please pull-up. Don't let it floating
Symbol Value Description
1.Pin 6:ATXPG
JP1 DSW_EUP_SEL 1 EUP(default) 2.Pin 30:SUSB#
Pin-23 0 DSW 3.Pin Pin 23 / Pin 57/ Pin 59/ Pin61
JP2 WDT_EN 1 Disable WDT to reset PWROK(default) 4.Pin38-41 KCLK/KDAT/MCLK/MDAT
Pin-57 0 Enable WDT to reset PWROK
JP3 FAN_CTL_SEL 1 EC Index 6Bh/73h default = 80h 5.Pin 63 pull high to 3VSB
Pin-59 0 EC Index 6Bh/73h default = 00h
D
JP4 K8PWR_EN 1 Disable K8 Power Sequence(default) D
Pin-61 0 Enable K8 Power Sequence

SV
3D3V_SYS
AVCC3

AVCC3 FB1 1 2 FB 60 Ohm

* C764
* C765

**
R101 0 PCH_D 1uF 4.7uF
20 SMLINK1_DATA
R102 0 PCH_C 6.3V,X5R +/-10%
20 SMLINK1_CLK

RTS1# Note:
DSR1# Place C1,C2 close
SOUT1 to SIO
SIN1
3D3V_SYS DTR1#
DCD1# VIN0
RI1# VIN1
CTS1# VIN2
*****

R1148 1K RTS1# VIN3


+/-5%
R1149 1K SOUT1

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
+/-5%
R1150 1K DTR1#

CTS1#/GP31
RI1#/GP32
DCD1#/GP33
DTR1#/JP4
SIN1/GP41
SOUT1/JP3
DSR1#/GP45
RTS1#/JP2
SUSWARN#/SST/AMDTSI_D VCORE_EN/PCH_C/FAN_CTRL4
VLDT_EN/PCH_D/GP65

AVCC3
GNDD

VIN0/VCORE(1.1V)
VIN1/VDIMM_STR(1.5V)
VIN2(+12V_SEN)
VIN3(+5V_SEN)
+/-5%

N
R1151 1K KBRST_N
+/-5%
R1152 1K A20GATE 5VSB_SYS

* *
+/-5% 1 48 VIN4 PWRBTN# R1153 4.7K
34 TACH_CPU FAN_TAC2/GP52 5VDUAL/VLDT_12/VIN4
2 47 SIOVREF
34 PWM_CPU 3 FAN_CTL2/GP51 VREF 46 SYSTIN C766 1uF
34 TACH_SYS 4 FAN_TAC3/GP37 TMPIN1 45 6.3V,X5R
34 PWM_SYS 5 FAN_CTL3/GP36 TMPIN2 44
C HMGND C
6 5VSB_CTL# GNDA/TSD_ 43 O_SIO_RSMRST#
20,36 ATX_PWRGD ATXPG/GP30 RSMRST#/CIRRX1/GP55
DPPWROK 7 42
DPWROK/CPU_PG/GP23 PCIRST3#/GP10 PCIE_SLOT_RST# 16,27
8 41 MCLK
3D3V_SB 36 SUS_LED 9 GP22 MCLK/GP56 40 MSCLK 34 3D3V_SB
SUSACK# IT8772E/EX MDAT
SUSACK#/PWRGD1 MDAT/GP57 MSDATA 34
FAB 1.0 10 39 KCLK

****
30,35,44 PCIE_DOWN_RST# 11 PCIRST1#/GP12 KCLK/GP60 38 KBCLK 34
KDAT S_PWRBTN# R403 10K
64-LQFP KBDATA 34

* **
12 3VSB KDAT/GP61 37 R1181 0 Dummy +/-5%
VCORE 3VSBSW#/GP40 SIO_THERMAL# 19,20

*
C465
10uF
* C771 * C767
0.1uF
* C769
13
14 LRESET#
PWRON#/GP44/JP8
PWRGD3
36 R457
35
33 PWRGD_3V
SIO_SUSC#
PWRGD_3V 19,20
SIO_PME# R408 10K
+/-5%
1uF 0.1uF 15 SERIRQ SUSC#/GP53 34 SIO_SUSC# R409 10K Dummy
Serial Port
PECI/AMDTSI_C

6.3V,X5R 6.3V,X5R 16 LFRAME# PSON#/GP42 33 R456 33 PWRBTN# O_PS_ON# 36 +/-5%

Re
LAD0 PANSWH#/GP43 PWRBTN# 36
KRST#/GP62

Dummy SUSB# R397 10K Dummy FAB 1.0


PME#/GP54
GPO50/JP1

SYS_3VSB

+/-5%
COPEN#

D18
PCICLK

U8
SUSB#
CLKIN

3D3V_SYS
VBAT

5V_SYS 20 1 C
12V_COM A
GA20
LAD1
LAD2
LAD3

VCC +12V 12V_SYS

**
PWRGD_3V R410 10K RTS1# 16 5 NRTSA LS4148-F
+/-5% DTR1# 15 DA1 DY1 6 NDTRA
8,20 PLTRST_N
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

PCIE_SLOT_RST# R412 10K SOUT1 13 DA2 DY2 8 NSOUTA


19,35 SERIRQ +/-5% RI1# 19 DA3 DY3 2 NRIA
20,35 L_FRAME_N 18 RY1 RA1 3
SIO_PME# SIO_THERMAL# CTS1# NCTSA
S_PWRBTN# DSR1# 17 RY2 RA2 4 NDSRA
20,35 L_AD0 S_PWRBTN# 20 VBAT_SIO RY3 RA3
FAB 1.0 SIN1 14 7 NSINA
CLKIN

20,35 L_AD1

*
SUSB# SIO_GPO50 R1154 1K DCD1# 12 RY4 RA4 9 NDCDA
20,35 L_AD2 RY5 RA9
20,35 L_AD3 +/-5% D19
11 10 -12V_COMA C
19 KBRST_N GND -12V -12V_SYS
19 A20GATE * C770
** *

R1164 1K 1uF GD75232 LS4148-F


22 CK_33M_SIO
SIO_GPO50 +/-5% 6.3V,X5R
placed near GD75232
The trace between SIO's CLKIN & oscillator R3 100 3D3V_DUAL (Spare for battery installation glitch)
Place C8 close to Layout Note:
(output) must Thicken and Shorten. In addition to

pa
R1157 0 PCH_PECI 8,19 SIO as possible *Recommended net "VBAT" minimum trace width 12mils.

*
that, the trace spacing must broaden. *Isolated the SIO's VBAT & ICH's VCCRTC pin NDCDA CN6
SUSWARN# COM1
22 48M_SIO 1 2
NSOUTA NDCDA NSINA
NSOUTA 3 4 NDTRA
B B
NSINA 5 6 NDSRA
NRTSA 7 8 NCTSA
NDTRA NRIA 9

Header_2X5_K10
180pF

*
NRTSA CN8
50V, NPO, +/-10%
NDSRA

NCTSA
* ****

VIN0 R1158 10K V_CPU_CORE


+/-1% NRIA 3D3V_DUAL
VIN1 R1159 10K 3D3V_DUAL
V_SM
RSMRST

i
+/-1% R370
VIN2 R1160 10K 180pF 8.2K
12V_SYS *
+/-1% 50V, NPO, +/-10% +/-5%
R1188 2KOhm HMGND
*R90
+/-1% 1K
C773 0.1uF PCH_RI 20

Ring
*

16V, X7R, +/-10% O_SIO_RSMRST# R94 0 PCH_RSMRST# 20


VIN3 R1189 1 2 15K R96
5V_SYS *

D
+/-1% 20K
*

R1161 10K HMGND +/-1% Q20 Q12


+/-1% Dummy NRIA 1
C774 0.1uF 3D3V_SB 3 R375 10K G
* * **

*
16V, X7R, +/-10% 2 +/-5% 2N7002
C57
*R91 Reserved

S
VIN4 R1190 4.99K
+/-1%
5V_DUAL
1K BAT54C * 0.1uF
16V, X7R, +/-10%
*
R378
10K
Reserved

+/-5%
*

R1162 10K HMGND DPPWROK R97 0 PCH_DPWROK PCH_DPWROK 20 Reserved


+/-1%
C775 0.1uF
16V, X7R, +/-10% 3D3V_DUAL

SIOVREF
A *R99 A

* C768
1uF
1K

*R1163 Foxconn Confidential Document,please keep it secret.C6


*

6.3V,X5R 10K SUSACK# R98 0 PCH_SUSACK# PCH_SUSACK# 20


+/-1%
HMGND
Place SODIMM
SYSTIN
*

SUSWARN# R100 0 PCH_SUSWARN#


PCH_SUSWARN# 20,38
C772 *
* 0.1uF
T
16V, X7R, +/-10%
RT6
10K FB2 1 2 FB 60 Ohm FOXCONN PCEG
+/-1%
**

R103 0 SUSB# Title


20,35,37,38,41 S_SLP_S3#
HMGND R104 0 SIO_SUSC# FAB 1.0 Super I/O IT8772
20,35,38,39 S_SLP_S4#
Size Document Number Rev
System Temperature Monitor
HMGND
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 33 of 45


5 4 3 2 1
CM
5 4 3 2 1

5V_DUAL

Add for EMI on 0929

*
F3
FUSE_1.1A
KB /USB connect
5V_DUAL
D D

SV
* C611
4.7uF

2
4
6
8
+/-5%
2.2K Ohm +/-10%
RN31

* 13
5
7

****
L15 0 +/-5% O_MSCLK_R
33 MSCLK
L18 0 +/-5% O_MSDATA_R
33 MSDATA
KB/MS
L20 0 +/-5% O_KBCLK_R 13
33 KBCLK 16
L16 0 +/-5% O_KBDATA_R
33 KBDATA 12 6
10 4
CN7 8 2
O_MSDATA_R 7 14
* 180pF
50V, NPO, +/-10% 9 1 O_KBDATA_R
O_MSCLK_R 11 3
5 O_KBCLK_R
17

15
UP DOWN
PS2X2

N
C C

Re
New FAN Header Definition

CPU FAN pin1. GND


pin2. +12V
SYS FAN
pin3. Sense
pin4. PWM

pa
B B

5V_SYS
5V_SYS

*R265
4.7K
*R273
+/-5% 4.7K
+/-5%
*

R270 100 Ohm

*
33 PWM_CPU

i
+/-1% R344 100 Ohm
33 PWM_SYS +/-1%
+12V_CPU
12V_SYS

+12V_CPU
12V_SYS
C

C
D11
LS4148-F *R282
4.7K D14
*R338
CPU_FAN +/-5% LS4148-F 4.7K
2 SYS_FAN +/-5%
A

+12V 4 2
R271
A
CMD 1 +12V 4
GND 3TACH_FAN1 CMD 1 R336
TACH TACH_CPU 33 GND 3TACH_FAN3
TACH TACH_SYS 33
Header_1X4 FAN4P
27K Ohm C242 Header_1X4 FAN4P
1 27K Ohm
+/-1% R268
22K * 47pF
50V, NPO, +/-5% +/-1% R339
1
*
C354
47pF
Dummy 22K 50V, NPO, +/-5%
Dummy
2
A 2 A

Foxconn Confidential Document,please keep it secret.C6

FOXCONN PCEG
Title

PS2/FAN
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 34 of 45


5 4 3 2 1
CM
5 4 3 2 1

TPM LPT PORT


3D3V_SYS

22,35 C_PCICLK_TPM

5V_SYS
CONN-FPC
TPM
D D
12

SV
20,33,37,38,41 S_SLP_S3# 12
1 2 11
LCLK GND 20,33,38,39 S_SLP_S4# 11
5V_DUAL 10

*
R679 33 3 9 10 14
20,33,35 L_FRAME_N LFRAMEn KEY 30,33,35,44 PCIE_DOWN_RST# 9 14
8
20,33,35 L_FRAME_N

*
5 6 R681 0 7 8
30,33,35,44 PCIE_DOWN_RST# Dummy LRESETn NC_3 20,33,35 L_AD0 7
Dummy 6
20,33,35 L_AD1 6
7 8 5
20,33,35 L_AD3 LAD3 LAD2 L_AD2 20,33,35 20,33,35 L_AD2 4 5
20,33,35 L_AD3 4
9 10 3D3V_SYS 3 13
VDD LAD1 L_AD1 20,33,35 3 13
2
11 12 22,35 C_PCICLK_TPM 1 2
20,33,35 L_AD0 LAD0 GND 1
**

*
R708 0TPM_NC_1 13 14 TPM_NC_4 R701 0 DEBUG_1
14,15,20 SMB_CLK_MAIN NC_1 NC_4 SMB_DATA_MAIN 14,15,20
Dummy Dummy
R711 0 15 16
3D3V_DUAL NC_2 SERIRQ SERIRQ 19,33

**
17 18 R715 0 Dummy
Dummy GND CLKRUNin
Dummy Debug Connector
*

R726 33 19 20 R722 0
20 LPCPD# LPCPDn NC_5 L_DRQ0 20
Dummy
Dummy
* R34 Header_2X10_4 (TPM)
10K
Dummy Dummy

3D3V_DUAL
PCIE_DOWN_RST#

N
C39
3D3V_SYS R707 10K TPM_NC_1
* 100pF
* *

Dummy 50V, NPO, +/-5%

R716 10K TPM_NC_4


Dummy
C C
Dummy

Re
COM HEADER COM PORT

pa
B B

5 4
Foxconn Confidential Document,please keep it secret.C6

3 2
Title

Size
C

Date:
TPM/LPT/COM
Document Number
FOXCONN PCEG

H61M06
Thursday, January 05, 2012
1
i
Sheet 35 of 45
Rev
A
A
CM
5 4 3 2 1

5VSB_SYS -12V_SYS 5V_SYS


12V_SYS

5V_SYS 3D3V_SYS 3D3V_SYS 5VSB_SYS 5V_SYS

ATX POWER CONNECTOR *R291


4.7K
+/-5%
13
PWR1
1
14 +3.3V3 +3.3V1 2
15 -12V +3.3V2 3
33 O_PS_ON#
16 GND4
PSON
GND1
+5V1
4 *R700
17 5 1K
GND5 GND2
*C659 18
19 GND6
GND7
+5V2
GND3
6
7
0.1uF 20 8
21 RSVD PWR0K 9 ATX_PWRGD 20,33
16V, X7R, +/-10%
22 +5V3 +5V_AUX 10
23 +5V4
+5V5
+12V_1
+12V_2
11 * C661
0.1uF
24 12 16V, X7R, +/-10%
D GND8 +3.3V4 D

SV
White Header_2x12

12V_SYS

5V_SYS 3D3V_SYS 5VSB_SYS

* C664
0.1uF
* C660
* C656
* C663

16V, X7R, +/-10%


0.1uF 0.1uF 0.1uF

16V, X7R, +/-10%

16V, X7R, +/-10%

16V, X7R, +/-10%


N
C C

Re
BUZZER/Speaker Header
SPEAKER
1
1
5V_SYS
Fab 1.0
3
5V_SYS 4 3
RN24 100 Ohm 4
3D3V_SYS 3D3V_SYS R718
330
*1 2
Header_1X4_K2
Reserved
+-5% 3 4
5 6
*R713 *R725 7 8
Q85 BAT54A 10K
1 330 FP
19 SATA_LED#
3 1 2 O_PLED+
2 3 4
5 6 PWRBTN#
PWRBTN# 33

pa
7 8 C178

C
20 FP_RST# 9
C667 X * 0.1uF

*
* 470pF
50V, X7R, +/-10% Header_2X5_K10 *C679470pF 3D3V_SB 20 S_SPKR_OUT
R181 2.2K B Q23
MMBT3904-7-F
16V, X7R, +/-10%

+/-5%

E
B B
Dummy

*R717
R709 10K
C

Q86 B 1K SUS_LED 33
MMBT3904-7-F
E

i
Front Panel Switch/LED
S0 : Power LED is on; HD_LED+ 1 2 Power
S1 : Power LED is blinking; HD_LED- 3 4 Power LED(Green)
S3~S5: Power LED is off. GND
Reset button
Detect pin
5
7
9
6
8
10
Power button
Detect pin
Key
Front I/O Header

A A

Foxconn Confidential Document,please keep it secret.C6

FOXCONN PCEG
Title
ATX CONN/FP PANEL/RSMRST
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 36 of 45


5 4 3 2 1
CM
5 4 3 2 1

Pull lo for 0.9V vref out and address 54h

12V_SYS

3D3V_DUAL

1D05V_PCH
* C544
0.1uF V_SM
V_SM
3D3V_DUAL * R759
1K
1D05V_PCH_EN +/-1%

D
* R654

8
Q50

D
10K Q6 1D05V_PCH_EN 3
D + 1 G D
PCH_1.05V_OUT EC58

SV
+/-1%
G
2
-
U37A * 470uF
*
C501 LM358 AOD472AL +/-20%

S
R772 0.1uF
*

4
2N7002 470 Ohm Dummy

S
+/-1%
* R743

C
*

V_SM R237 1K +/-1% B Q45 1K


MMBT3904-7-F
+/-1% V_1D05V_PCH
C748
1.05V/6.2A

E
* 1uF
6.3V,X5R,+/-10%
Dummy

50V, X7R, +/-10%


C415

1nF * *
EC42
470uF
Dummy +/-20%
D

Q92
*

R239 7.5KOhm +/-5% G


0,33,35,37,38,41 S_SLP_S3#
C749 2N7002
S

* 1uF
6.3V,X5R,+/-10%

3D3V_DUAL

N
12V_SYS V_1D05V_CPU

*R746
12KOhm
+/-1%

VCCSA

D
*

8
C 3D3V_DUAL Q41 C338 C
EN4 VCCSA_SEN_R 5 4.7uF
+
EN4 7 CPU_VCCSA_OUT G +/-10%
6 U37B
* R657 -
LM358 AOD472AL
D

S
10K Q18
* C502

4
+/-1% 0.1uF

V_1D05V_CPU
G *R773
4.7KOhm Reserved * R745
+/-1% V_VCCSA
2N7002
1K 0.925V/8.8A
+/-1%
S

Re
C

*
R330 Dummy0 +/-5% H_VCCSA_SENSE 8
*

R247 1K +/-1% B Q60


MMBT3904-7-F C319 EC31
C751
* 0.1uF C436 C438 * 820uF
E

* 1uF
* 10uF
* 10uF

+/-20%
6.3V,X5R,+/-10%
Dummy 6.3V,X5R 6.3V,X5R
D

Q99
*

R248 0 +/-5% G
0,33,35,37,38,41 S_SLP_S3#
C750 2N7002
S

* 1uF
6.3V,X5R,+/-10%
Dummy

pa
B B

5V_SYS V_1D8V_SFR
3D3V_SYS

U39
NCT3101S
1 8
VIN NC_3
NC_2
7 * C639

i
R748 6
C492 * 100K VCNTL
NC_1
5
1uF
6.3V,X5R,+/-10%
* 10uF +/-1%
VOUT
4
1D8V_PLL
6.3V,X5R
3
REFEN 9 C657 EC43
GND_2
C655
GND_1
2
* 0.1uF * 470uF

16V, X7R, +/-10%


120KOhm *
*R774 0.1uF +/-20%
16V, X7R, +/-10%

+/-1% NCT3101S
1.806V/1.5A

A A

Foxconn Confidential Document,please keep it secret.C6

FOXCONN PCEG
Title
FOX2/1D05/1D8V/VCCSA
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 37 of 45


5 4 3 2 1
CM
5 4 3 2 1

5V_DUAL
12V_SYS

5V_DUAL *R469
2KOhm
+/-1% *
C439
10uF
*
C440
10uF

D
6.3V,X5R
Q59 Q78 6.3V,X5R
D D

SV
R490 10+/-5% 1 8 5V_SW_Q1 G
5V_SYS 5VCC 5VCC_DRV
2 7 * C485
AOD472AL

S
5VSB 5VSB_DRV 5V_SYS
0.1uF
* C529
1uF 3
GND S5#
6
Dummy
6.3V,X5R
Dummy 4 5 C507 10nF

*
MODE S3#
25V, X7R, +/-10%
UP7501M8 FDN340P
5VSB_SYS Q58
5VSB_SYS R487 10+/-5%

* C500
0.1uF
S D

3D3V_SB
C5

G
Fab 1.0
R398 5V_SW_SB Dummy
*

*
10K 0.22uF S5 S3 NODE 5VDUAL
+/-5% 16V, X7R, +/-10%

* *
Dummy R13 0 S_SLP_S3#
S_SLP_S3# 20,33,35,37,41
*

R12 0 H H X 5VCC
20,33 PCH_SUSWARN#
R14 0 S_SLP_S4#
S_SLP_S4# 20,33,35,39
H L X 5VSB 5V_SYS
3D3V_SYS

N
HI= S4/S5 5VDUAL FORM 5VSB 5V_DUAL
5V_DUAL
Low= S4/S5 5VDUAL TURN OFF L X H 5VSB
C241

L X L Shutdown * 0.1uF
16V, X7R, +/-10%
*
C578
0.1uF C580 C579
C
C499 16V, Y5V, +80%/-20% * 0.1uF
* 0.1uF C

* 0.1uF 16V, Y5V, +80%/-20%


16V, Y5V, +80%/-20%

16V, Y5V, +80%/-20%

Re 3D3V_SB

pa
B
3D3V_DUAL B
5VSB_SYS
3D3V_SB
FAB 1.0
C453

5VSB_SYS
* * 10uF

C597 6.3V,X5R
1uF
6.3V,X5R,+/-10%
* R757 FAB 1.0
U40 Dummy
3 3D3V_SB Max. output current = 3A
*R349 10K R758
S

Vin
+/-5%
*

i
2.2K 3D3V_P 10K G Q98 2
3D3V_SB Dummy Vout
FDN340P
D

1 R655
Q97
+/-5%
C398 ADJ *
301
* 0.1uF +/-1%
D

5VSB_EN G AZ1084D-ADJTRE1 EC54 C628 C442 C443 C447


* R760 2N7002 16V, Y5V, +80%/-20%
* C610* 470uF
* 0.1uF
* 10uF
* 10uF
* 10uF
D

16V, X7R, +/-10%


10K 1uF +/-20%
S

+/-5% Q73
* C734
3D3V_DUAL
FAB 1.0
R651
*
499
6.3V,X5R
Dummy
6.3V,X5R 6.3V,X5R 6.3V,X5R

G Dummy 1uF +/-1%


20 SLP_SUS_N
2N7002 6.3V,X5R
Dummy Dummy Dummy Dummy
S

C385 C468
Deep S4/S5 * 0.1uF
* 10uF FAB 1.0
16V, Y5V, +80%/-20% 6.3V,X5R
*

R775 0
Vout=Vref(1+R2/R1)+IadjR2
Dummy R1 is Up Resistor.
Iadj=50uA
A Vref=1.25V A

Foxconn Confidential Document,please keep it secret.C6

FOXCONN PCEG
Title
5V_DUAL/3.3V_SB/3.3V_DUAL
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 38 of 45


5 4 3 2 1
CM
5 4 3 2 1

Q80
1 D13
12V_SYS
3 VCC_R A C
2
5V_DUAL 5V_DUAL
SD103AW L47 Choke 1.2uH

*
BAT54C * R689
10 C633
+/-5%
*
EC56
470uF * 10uF

C631 6.3V,+/-20% 6.3V,X5R

D
* 1uF
16V,X5R
D
UP1514QSA8

SV
VCC
R640 change to 2.2 ohm for 6103
V_SM 20A MAX
OCP 40A

D
5
U48 0.1uF R640

*
1 BOOT 25V, X7R, +/-10% C599 0 +/-5% Q83

VCC

*
R561 BOOT

*
V_SM PHASE DDR_REF 7 2 UGATE R269 +/-5% G
16KOhm COMP/OCSET UGATE 0 AOD452AL V_SM
L48
+/-1%

*
*

S
R671 210Ohm +/-1% FB_VSM 6 8 PHASE
FB PHASE R714

GND
Dummy 4 LGATE 2.2 EC51 C630
LGATE Choke 800nH
* Dummy +/-5% * 820uF C435
* 10uF

*
R665 30KOhm +/-5% C617 33pF +/-5% +/-20%
* 10uF

D
3
APW7120KE-TRL 6.3V,X5R
Q81 C669 6.3V,X5R

G * 1nF
50V, X7R, +/-10%
AOD472AL
0.8V FB

S
*R678
39KOhm

*R405
1.5KOhm *R406
1.8KOhm
*R407 *R674
+/-5%
Dummy
+/-1% +/-1% 750 220 Ohm

N
+/-1% +/-1%

DDR_OV1_R

DDR_OV2_R

C DDR_OV3_R C

3D3V_DUAL 3D3V_DUAL
DDR_OV3_R
3D3V_DUAL
*R588 3D3V_DUAL
D

1K 3D3V_DUAL DDR_OV2_R
+/-1% Q77 R590 DDR_OV1_R
*

D
*R587 Dummy 2N7002 1K
*R591

D
1K G
*R589 +/-1% Q79 1K

Re
+/-1% 1K Dummy 2N7002 +/-1% Q82
D

Reserved +/-1% G Dummy 2N7002


S

Q84 G
2N7002
Reserved D
*R593
1K

D
S
G Q87 +/-1%
20 PCH_GPIO24

S
2N7002 Reserved Q88
Dummy G 2N7002
S

20 PCH_GPIO13 G
* R548 * R549 Dummy
20 PCH_GPIO29
S

10K Dummy

S
+/-1% 10K
+/-1%
* R594
*

R890 0 10K
Dummy +/-5% +/-1%
*

Dummy R891 0

*
+/-5% R892 0
Dummy +/-5%

pa
B
DDR POWER B

DDR Voltage GPIO24 GPIO13 GPIO29 Voltage


0 0 0 1.563636364
Max=40A 0 0 1 1.675636364
27A in design guide 0 1 0 1.656969697
0 1 1 1.768969697
1 0 0 1.787636364
1 0 1 1.899636364

i
1 1 0 1.880969697
5VSB_SYS
1 1 1 1.992969697
uP0125
*R664 DDR_REF
10K 3D3V_DUAL V_SM_VTT
V_SM
D

Q70 U36
2N7002 NCT3101S
G 1 8
VIN NC_3 7 * C636
D

R690 NC_2 6
* 1uF
S

Q76 100KOhm VCNTL 5


NC_1 6.3V,X5R,+/-10%
2N7002 +/-1%
G C609 C622 4
20,33,35,38 S_SLP_S4# VOUT
* 0.1uF
16V, X7R, +/-10% * 10uF
3
S

6.3V,X5R REFEN 9 C654 C626 C624


Dummy GND_2 2
A C653
GND_1 * 0.1uF
* 10uF
* 10uF A
16V, X7R, +/-10%

* R695
* 0.1uF
16V, X7R, +/-10%

100KOhm 6.3V,X5R 6.3V,X5R


+/-1%
Foxconn Confidential Document,please keep it secret.C6
NCT3101S

FOXCONN PCEG
Title
1D5V_STR
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 39 of 45


5 4 3 2 1
CM
5 4 3 2 1

+12V_CPU
D16
12V_SYS VCC_R A C

SD103AW

* R691
10 C637 C635
+/-5% * 10uF
+/-10%* 10uF
+/-10%
C638 c1206h18 c1206h18
* 1uF
16V,X5R

UP1514QSA8
D D
1.05V or 1.0V/17A MAX

SV
V_1D05V_CPU

D
5
U53 R641 0.1uF
OCP 40A

*
1 0 +/-5% 25V, X7R, +/-10% C602 Q93
*R1176

VCC

*
R562 BOOT V_1D05V_CPU

*
51 Ohm PHASE_VCCIO OCSET 7 2 R272 +/-5% G
16KOhm COMP/OCSET UGATE 0 AOD452AL
L50
+/-1% Ceramic / 0805/X5R

*
*

S
8 H_VCCIO_SENSE R672 210Ohm +/-1% 6 8 PHASE_VCCIO
FB PHASE R719 C418 C421 C422 C423 C424

GND
4
Dummy 2.2 EC60 EC61
* 10uF
* 10uF
* *
10uF
*
10uF 10uF
*

R1178 0 LGATE Choke 800nH 820uF 820uF


8 H_VSSIO_SENSE Dummy +/-5%
* * *

*
R667 30KOhm +/-5% C618 33pF +/-5% 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R

+/-20%
D
3
APW7120KE-TRL

+/-20%
*R1187
649 Ohm
Q94
*
C678
1nF
+/-1% G 50V, X7R, +/-10%
AOD472AL C427 C428 C431 C433 C434
* 10uF
* 10uF
* *
10uF
*
10uF 10uF

S
V_1D05V_PCH 5VSB_SYS 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R

*R680
39KOhm
+/-5%
R135 Dummy
* *
D

R127 10K
1K +/-5% Q43
+/-5% 2N7002
G

N
C221
* 0.1uF
C

Q46 Dummy
B 16V, X7R, +/-10%
E

MMBT3904-7-F
C C

Re
pa
B B

5 4
Foxconn Confidential Document,please keep it secret.C6

3 2
Title

Size
C

Date:
CPU_VCCIO
Document Number
H61M06
Thursday, January 05, 2012
1
i
FOXCONN PCEG

Sheet 40 of 45
Rev
A
A
CM
5 4 3 2 1

V_1D05V_CPU
Sugar Bay VR12 POWER 4+1 PHASE
3D3V_SYS
R372 5V_SYS +12V_CPU V_1D05V_CPU
* 1K
+/-5%
R364
* 1.1KOhm R359 *R354
+/-1% 2.2 1K

P_CORE_EN
+/-5%

*
+/-1%
C394
10nF *R355 *R362
110Ohm *R350
54.9 *R363
91 Ohm * C4
1uF
VCC_CORE
*
C387
0.1uF
* * C390
1K
+/-1%
+/-1% +/-1% +/-1%
Dummy
6.3V,X5R

Dummy C389 4.7uF

16V, X7R, +/-10%


0.1uF

10

12
D +/-10% D
16V, X7R, +/-10% U26 NCP81005MNTWG

SV
4 P_PWM2 P_PWMA

VCC

VRMP
SDIO H_VIDSOUT_VR 8
9 5
ENABLE SCLK 6 H_VIDSCK_VR 8
ALERT# H_VIDALERT_N_VR 8
P_VR_READY VR_RDY 7 33 VCORE
20 P_VR_READY VR_RDY DRON 32 P_DRVON 42
DIFFOUT 52 PWM1/ADDR 35 C312 P_CSN1
P_PWM1 42 VBOOT *R278
10K
V_GT
IMAX SET
*R279
27.4K

* * * * * *
DIFFOUT CSN1 P_CSN1 42
34 SET AT
C366 R328 R275 +/-1%
* 0.1uF P_CSP1
P_CSP1 42
+/-1% +/-1%

*
R346 50V, X7R, +/-10% 4.02KOhm C362 COMP 48 CSP1 Dummy 16V, X7R, +/-10% AT 35A
0V

*
*

*
47 680pF +/-1% 2.2nF COMP P_CSP1 R252 0.1uF100KOhm Dummy
+/-5% 50V, X7R,+/-10% 5.6K +/-1%C327 16V, X7R, +/-10%

*
R337 C363 30
P_PWM2 42

*
1K 22pF FB 49 PWM2/VBOOT 39 P_CSN2
FB CSN2 P_CSN2 42
38
V_CPU_CORE +/-1% 50V, NPO, +/-5%
CSP2
R266
100KOhm * C310
0.1uF
P_CSP2
P_CSP2 42
* R327

*
Fab 1.0 50 P_CSP2 R250 0.1uF+/-1% 16V, X7R, +/-10%
TRBST
*R351
100
1K
+/-1% PWM3/IMAX
31
5.6K +/-1%C324 16V, X7R,
Dummy+/-10% Dummy
P_PWM3 42
+/-5% 37 P_CSN3
Dummy CSN3 P_CSN3 42
36
8 H_VCC_SENSE
VSP 1 CSP3
R274
100KOhm Dummy * C311
0.1uF
P_CSP3
P_CSP3 42

*
VSP
* C393
1nF
P_CSP3
5.6K
R251
+/-1%C326
0.1uF+/-1%
16V, X7R, +/-10%
16V, X7R, +/-10%
Dummy
50V, X7R, +/-10% 51 29 5V_SYS
8 H_VSS_SENSE VSN PWM4 40 P_PWM1 P_PWM3
*R342
100
Dummy
CSN4
CSP4
41
+/-5%

VCORE

N
CSSUM
44 CSSUM R231 27K Ohm P_CSP1
PWM
ADDRESS
*R277
10K IMAX SET *R253
93.1K
43 +/-1% +/-1% AT 120A +/-1%

*
IOUT 45 CSCOMP R320 39.2K R316 80.6KOhm R227 27K Ohm P_CSP2
7X7 SINGLE CSCOMP
1 ROW QFN +/-1% R204 +/-1% +/-1%
R312
* +/-1% C349 1nF R229 27K Ohm P_CSP3

* **
*
15K C344 R331 100K 50V, X7R, +/-10% +/-1%

T
C +/-1% 0.1uF 47 ILIM 64.9KOhm C350 4.7nF C
ILIM
16V, X7R, +/-10%

+/-1% R324 +/-10% Fab 1.0


2 510 Ohm C334

***
R311 +/-1% R294 10 Ohm 1nF R230 10 Ohm P_CSN1
3D3V_SYS 4.53K Ohm +/-1% +/-1%
VCORE PORTION +/-1% C355 50V, X7R, +/-10% R226 10 Ohm P_CSN2
*1nF
50V, X7R, +/-10% R228
+/-1%
10 Ohm P_CSN3
46 DROOP
*R365
1K DROOP R292 5.1KOhm
+/-1%

+/-5% 42 CSREF C336 +/-1%


CSREF
* 1nF

Re
VR_RDYA 8 50V, X7R, +/-10%
VR_RDYA
DIFFOUTA 17
DIFFOUTA
BOOT VOLTAGE
C361 R318 28
*

19 PWMA/IMAXA 26 P_PWMA 42
R326 50V, X7R, +/-10% 3.01K C347 4.7nF COMPA
P_CSNA 41,42

*
*

47 680pF +/-1% +/-10% COMPA CSNA 25 R242 100KOhm RESISTOR BOOT


VCC_AXG +/-5% C342 CSPA +/-1% Dummy
VALUE VOLTAGE
*

22pF
*

*
R332 50V, NPO, +/-5% FBA 16 P_CSPA R245 0.1uF

*
1K +/-1% FBA 5.6K +/-1% C307 16V, X7R, +/-10%
* R319 10K 0V

*
V_1D1V_AXG 24 CSSUMA R257 20K P_CSPA
CSSUMA P_CSPA 42
1K 18 +/-1% 25K 0.9V

* *

*
TRBSTA 22 CSCOMPA R288 39.2K R267 80.6KOhm
+/-1% CSCOMPA
*R341
100 Dummy R390
+/-1%
100K
+/-1% 45K 1.0V
+/-5% +/-1% C317 1nF 70K 1.1V

* **
T
VSPA 15 R304 50V, X7R, +/-10%

*
8 H_VCCAGX_SENSE VSPA 20
C368
* 1nF
50V, X7R, +/-10% ILIMA
ILIMA 30K
+/-1% R298
C318 4.7nF
+/-10%
95K 1.2V
Dummy 14 1K R236 125K 1.35V
8 H_VSSAGX_SENSE VSNA *
R343 R303 +/-1% 10 Ohm
*

*
pa
100 4.53K Ohm R264 10 Ohm C309 +/-1% P_CSNA 165K 1.5V
P_CSNA 41,42

*
+/-5% +/-1% C325 +/-1% 2.2nF
V_GT PORTION * 560pF
+/-10%
50V, X7R,+/-10%

21

*
B
23 DROOPA DROOPA R263
B
IOUTA 41.2K C304
27
VBOOTA
VBOOTA R373
+/-1%
* 1nF
50V, X7R, +/-10%

*
3
*R219 VR_HOT#
VRHOT#
ROSC

EPAD

10K 2 TSENSE
13 TSENSE PWM ADDRESS
R280
20K ** C329
+/-1%
TSENSEA
*R379 *R361 0 +/-5%
3.3KOhm Dummy
H_PROCHOT_N 8
+/-1% 0.1uF
*R380 6.98K +/-1%
11

53

16V, X7R, +/-10% 6.98K +/-1% Dummy SVID SVID


+/-1% Fab 1.0 RESISTOR
C386 ADDRESS FOR ADDRESS FOR
VALUE
*0.1uF * VCORE RAIL V_GT RAIL

i
R353 R360 RT1
* * T
16V, X7R

Fab 1.0 8.2K Dummy 7.5K 10K 10K 0000 0001


Work F= +/-1% +/-1% +/-1%
BOTTOM PAD Dummy Dummy 25K 0010 0011
300Khz
Fab 1.0 CONNECT TO PUT COLSE 45K 0100 0101
GND Through TO VCORE
1. C363 change to 22pF/NPO. 4 VIAs 70K 0110 0111
2. C349 change to 1000pF/X7R. HOT SPOT
Set 110deg OTP 95K 1000 1001
3. C334 change to 1000pF/X7R.
4. R328 change to 4.02K/1%. 125K 1010 1011
165K 1100 1101
P_CORE_EN
3D3V_DUAL
D

Q55
2N7002
*R376 G
10K C441
* 0.1uF
S

Dummy
A 16V, X7R, +/-10% A
*

R367 100 Ohm +/-1% P_VR_READY


Foxconn Confidential Document,please keep it secret.C6
D

Q53
D

Q54
G 2N7002
20,33,35,37,38 S_SLP_S3#
G
2N7002
S

C413
FOXCONN PCEG
S

* 0.1uF
Dummy
16V, X7R, +/-10% Title
VCORE/AXG PWM
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 41 of 45


5 4 3 2 1
CM
5 4 3 2 1

+12V_CPU

+12V_CPU

R217
2.2
+/-5% Q31 C264 C251
C291 10uF 0.1uF
* *

*
220nF NTMFS4927NT1G +/-10% 16V, X7R, +/-10% +12V_CPU

D
R246 +/-10% 5 Dummy
2.2 D Q32 +12V_CPU

VCC1_20
+/-5% BST1_25 R174
U25 2.2 4 G HG1_R_25 G R156

1
+/-5% S 1 2.2
4 8 HG1_25 HG1_R_25 2 AOD452AL +/-5%

BST

S
VCC DRVH 3 C232 Q15 C206 C209

*
D D
R180 Dummy Choke 400nH R147 220nF 10uF 0.1uF
* *

D
7 10K SW1_25 L36 2.2 +/-10% NTMFS4927NT1G +/-10% 16V, X7R, +/-10%
41 P_PWM1 SW V_CPU_CORE

VCC2_20
2

*
+/-5% C276 +/-5% 5 Q33 Dummy

GND
PAD
*

P_DRVON 3 PWM 5 D
EN DRVL *

SV
C301 1nF BST2_25 R133 HG2_R_25 G LL=1.7m ohms
R241 1uF NCP5901BMNTBG 50V, X7R, +/-10% 2.2 4 G
* U21
9

1
2.2Ohm +/-10% Q35 5 +/-5% S 1 AOD452AL 0.25V~1.55V/112A MAX

S
+/-1% D #REFDE22 #REFDE23 4 8 HG2_25 HG2_R_25 2

BST
D
R197COPPER COPPER VCC DRVH 3 TDC=85A

*
BOTTOM PAD LG1_25 4 Q38 2.2 Dummy Dummy R131 Dummy Choke 400nH OS-CON

1
CONNECT TO G S 1 +/-5%
41 P_PWM2
7 10K SW2_25 L32
V_CPU_CORE
2 G 2 SW

*
LG1_25 +/-5% C238

GND
PAD
GND Through

*
3 AOD472AL P_DRVON 3 PWM 5 LG2_25 EC24 EC25 EC27
4 VIAs NTMFS4925NT1G C244 EN DRVL Q25 5 1nF * * 820uF * 820uF * 820uF *R191
220 Ohm

S
Dummy R152 1uF NCP5901BMNTBG 50V, X7R, +/-10% +/-20% +/-20% +/-20% +/-1%
* D

2
2.2Ohm +/-10% Dummy

D
41 P_CSP1 +/-1% 4 R168#REFDE16 #REFDE19
1G S Q44 2.2 COPPER COPPER
41 P_CSN1 2 +/-5%Dummy Dummy
BOTTOM PAD

1
CONNECT TO 3 LG2_25 G
NTMFS4925NT1G AOD472AL
GND Through Dummy EC20 EC21

S
4 VIAs
* 820uF
+/-20%
* 820uF
+/-20%
41 P_CSP2
+12V_CPU
41 P_CSN2

+12V_CPU
Ceramic / 0805/X5R
R153 C278 C277 C376 C379 C401
2.2 10uF 10uF 10uF 10uF 10uF
+/-5% * * * * *

6.3V,X5R

6.3V,X5R

6.3V,X5R

6.3V,X5R

6.3V,X5R
C243 Q22 C213 C234
*

R167 220nF 10uF 0.1uF


* *

D
2.2 +/-10% NTMFS4927NT1G +/-10% 16V, X7R, +/-10%
+/-5% 5 Q34 Dummy
D
VCC3_20

C BST3_25 R132 HG3_R_25 G C


U22 2.2 4 G

N
1

+/-5% S 1 AOD452AL C382 C408 C380 C383 C407

S
4 8 HG3_25 HG3_R_25 2 10uF 10uF 10uF 10uF 10uF
* * * * *
BST

VCC DRVH 3 +12V_CPU


*

6.3V,X5R

6.3V,X5R

6.3V,X5R

6.3V,X5R

6.3V,X5R
R137 Dummy Choke 400nH
41 P_PWM3
7 10K SW3_25 L34
SW V_CPU_CORE
2

*
+/-5%
GND
PAD
*

P_DRVON 3 PWM 5 C256 C208 EC11 EC15 EC36 EC10


C236 EN DRVL
D
1nF * * 0.1uF * 270uF * 270uF * 270uF * 270uF
R160 1uF NCP5901BMNTBG Q29 5 50V, X7R, +/-10% 16V, X7R, +/-10% 16V, +/-20% 16V, +/-20% 16V, +/-20% 16V, +/-20%
*
9

2
2.2Ohm +/-10% D Q48
+/-1% R175 #REFDE17 #REFDE20 PWR2 C280 C279 C381 C404
LG3_25 4 LG3_25 G 2.2 COPPER COPPER 4 3 10uF 10uF 10uF 10uF
BOTTOM PAD G 1 S +/-5%
AOD472AL Dummy Dummy * * * *

6.3V,X5R

6.3V,X5R

6.3V,X5R

6.3V,X5R
CONNECT TO 2 2 1
S

3
GND Through NTMFS4925NT1G Header_2X2
4 VIAs Dummy White

41 P_CSP3

41 P_CSN3 C420 C405 C406 C419

Re
10uF 10uF 10uF 10uF
* * * *

6.3V,X5R

6.3V,X5R

6.3V,X5R

6.3V,X5R
B B

+12V_CPU
+12V_CPU

pa
R383
2.2
+/-5%
C445 Q37 C455 C448
*

220nF 10uF 0.1uF


R384 +/-10% NTMFS4927NT1G * +/-10% * 16V, X7R, +/-10%
LL=4.1m ohms
0.25V~1.55V/35AMax
D

2.2 5 Dummy TDC=25A


+/-5% Q36 D
VCCA_20

BSTA_25 R386 G 4 G V_1D1V_AXG


U28 2.2 S 1
1

+/-5% AOD452AL 2
S

4 8 HGA_25 HGA_R_25 3
BST

VCC DRVH Dummy C399 C370 C425 C426 C391 C411


EC35 EC33 10uF 10uF 10uF 10uF 10uF 10uF
41 P_PWMA * * * * * *
*

SW
7 R391 * 820uF * 820uF

6.3V,X5R

6.3V,X5R

6.3V,X5R

6.3V,X5R

6.3V,X5R

6.3V,X5R
2 10K Choke 400nH +/-20% +/-20%
GND
PAD
*

P_DRVON 3 PWM 5 +/-5% SWA_25 L37


41 P_DRVON EN DRVL
*

C429 C481
R377 1uF NCP5901BMNTBG 1nF
* *
9

i
2.2Ohm +/-10%
D

+/-1% 50V, X7R, +/-10%


2

Q72
D

BOTTOM PAD R441 #REFDE25 #REFDE24


CONNECT TO LGA_25 G Q71 2.2 COPPER COPPER
A AOD472AL +/-5% Dummy Dummy A
GND Through
1

LGA_25 G
S

4 VIAs AOD472AL
S

Dummy
41 P_CSPA

41 P_CSNA
Q39 5 Q47 5
D D

LGA_25 4 LGA_25 4
FOXCONN PCEG
G 1 S G 1 S Title
2 2
3 3 VCORE/AXG DRIVER
NTMFS4925NT1G NTMFS4925NT1G Size Document Number Rev
Dummy Dummy Custom H61M06 A

Date: Thursday, January 05, 2012 Sheet 42 of 45


5 4 3 2 1

Foxconn Confidential Document,please keep it secret.C6


CM
5 4 3 2 1

D D

SV
N
C C

Dummy Dummy Dummy Dummy


FD5 FD4 FD7 FD8
FMARK FMARK FMARK FMARK
FD40 FD40 FD40 FD40

1
Re
5V_DUAL 5V_DUAL
Dummy Dummy Dummy Dummy Dummy Dummy
IMPEDANCE_1 IMPEDANCE_2 FD1 FD3 FD6 FD2
1 1 FMARK FMARK FMARK FMARK
2 2 FD40 FD40 FD40 FD40

Header_1X2 Header_1X2

1
Dummy Dummy
IMPEDANCE_3 IMPEDANCE_4
1 1
2 2

Header_1X2 Header_1X2

pa
Dummy
MH2
Mounting Hole
6
5

B B
7 4
8 3
9 2
1

mh40x80_8

FAB 1.0
GND_AUDIO
Dummy
Dummy Dummy Dummy Dummy MH1
MH3 MH4 MH5 MH6 Mounting Hole

i
Mounting Hole Mounting Hole Mounting Hole Mounting Hole
6
5
6
5

6
5

6
5

6
5

7 4
7 4 7 4 7 4 7 4 8 3
8 3 8 3 8 3 8 3 9 2
9 2 9 2 9 2 9 2
1
1

mh40x80_8
mh40x80_8 MH40X80_5_3 MH40X80_5_3 MH40X80_5_3

A A

Foxconn Confidential Document,please keep it secret.C6

FOXCONN PCEG
Title
THROUGH HOLE
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 43 of 45


5 4 3 2 1
CM
5 4 3 2 1

3D3V_SYS
1D2V_U3DUAL U3C1 0.1uF 16V, X7R, +/-10% USB3_N_TX 18

**
18 USB3_P_RX U3C2 0.1uF
c0402h6
16V, X7R, +/-10%
18 USB3_N_RX USB3_P_TX 18
3D3V_U3VDD Dummyc0402h6 1D2V_U3VDD
* U3C29 * U3C27
PE_REXT
Dummy
1D2V_U3SYS
XTAL_1
XTAL_2

*
c0402h6
0.1uF c0402h6
0.1uF U3R5 4.7K USB3_CLKN_FCH
16V, X7R, +/-10% 16V, X7R, +/-10% +/-5% USB3_CLKP_FCH USB3_CLKN_FCH 22
1D2V_U3SYS USB3_CLKP_FCH 22
Dummy

GND

GND

GND
Dummy Dummy

3D3V_U3VDD 3D3V_U3DUAL

65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
U3U1
D D

SV
GND4
GPIO0
GND3
VCC12_3

GNDA3

VCC12_4
PE_TXN

PE_RXN

XI

PE_CLKN
PE_REXT

XO
VCC33P

PE_TXP

PE_RXP
VDD12P

PE_CLKP
* U3C31 * U3C33
c0402h6
0.1uF c0402h6
0.1uF
16V, X7R, +/-10% 16V, X7R, +/-10%
1 48 1D2V_U3VDD

*
U3R35 0 U3SMI# 2 GPIO1 VDD12U_3 47 SS_USBRN1
Dummy Dummy 20 U3_SMI# SMI# U3RXN_A U3RX1DN 45
+/-5% 3 46 SS_USBRP1
4 GPIO2 U3RXP_A 45 U3RX1DP 45
Dummy GND
PE_PWRDET 5 PE_SEL GNDA2 44 SS_USBTN1 U3C3 0.1uF 16V, X7R, +/-10% U3TX1DN 45

*
U3TP6 6 PE_PWRDET U3TXN_A 43 SS_USBTP1 U3C4 0.1uF 16V, X7R, c0402h6
+/-10% U3TX1DP 45

*
7 PE_CLKREQ# U3TXP_A 42 UREXT c0402h6 Dummy
3D3V_SYS VCC33_1 UREXT
1D2V_U3VDD Dummy SPISCK 8 41 3D3V_U3VDD Dummy
SPISO 9 SPI_CLK VCC33U_3 40 SS_USBTN2 U3C5 0.1uF 16V, X7R, +/-10% U3TX2DN 45

*
SPICSB 10 SPI_DO U3TXN_B 39 SS_USBTP2 U3C6 0.1uF 16V, X7R, c0402h6
+/-10% XTAL_1
U3TX2DP 45

*
SPI_CS# U3TXP_B
* U3C35 * U3C36
SPISI
GND
11
12 SPI_DI
GND1
GNDA1
U3RXN_B
38
37
GND
SS_USBRN2 Dummy
c0402h6 Dummy
U3RX2DN 45
c0402h6
0.1uF c0402h6
0.1uF PORST# 13 36 SS_USBRP2 U3C42 12pF XTAL_2
U3RX2DP 45

*
16V, X7R, +/-10%
16V, X7R, +/-10% U3TP1 UART_RX 14 PORST# U3RXP_B 35 1D2V_U3VDD 50V, NPO, +/-5%
U3TP2 UART_TX 15 UART_RX VDD12U_2 34 1D2V_U3DUAL
UART_TX VSUS12_2 Dummy
Dummy 1D2V_U3SYS 16 33 GND
Dummy Dummy VCC12_1 GND2
Dummy U3X1

PE_WAKE#
VSUS33_1
VSUS12_1

VSUS33_2
1 2

TEST_EN
PE_RST#

VCC33_2
VCC12_2
PORN_A
PORN_B
U2DM_B

U2DM_A
U2DP_B

U2DP_A
1D2V_U3SYS

OCI_A#
OCI_B#
XTAL 20MHz

* U3C38 * U3C39 ASM1042


Dummy

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
c0402h6
0.1uF c0402h6
0.1uF
16V, X7R, +/-10%
16V, X7R, +/-10%

N
Pin44-XTAL2 is External Clock Input Pin.
45 AS_USBN1 AS_USBN1 1D2V_U3SYS
Dummy Dummy AS_USBP1
45 AS_USBP1 3D3V_SYS
3D3V_U3DUAL TEST_EN
1D2V_U3DUAL Dummy
PCIE_DOWN_RST# 30,33,35
45 AS_USBN0 AS_USBN0 U3_OCI_B#
45 AS_USBP0 AS_USBP0 U3_OCI_A#
3D3V_SYS 3D3V_SYS U3_OCI_A# 45
C 3D3V_U3DUAL U3_PRON_B U3TP4 C

*
U3R3 0 U3_PRON_A U3TP3
16,20,27 S_WAKE#
Dummy
* U3R1 * U3R2 3D3V_SYS
Dummy Dummy
3D3V_DUAL
4.7K 4.7K

*
+/-5% +/-5% U3SMI# U3R26 4.7K
+/-5%
U3U2 Dummy
Dummy Dummy
SPICSB 1 8

**
SPISI 2 CS# VCC 7 R1124 0

Re
3D3V_DUAL
3 SO HOLD#

*
6 SPISCK +/-5%
4 WP# SCK 5 SPISO R1123 Dummy 0 U3R32 4.7K U3_OCI_B#
GND SI 3D3V_SYS 3D3V_SYS
+/-5% +/-5%
Dummy Dummy

*
AT25F512B-SSH-T
* U3C9
0.1uF
PE_PWRDET U3R30
+/-5%
4.7K

Dummy 16V, X7R, +/-10% Dummy

Dummy

***
TEST_EN U3R31 4.7K
+/-5%
UREXT U3R25 Dummy 12.1KOhm
+/-1%
PE_REXT R3R29 Dummy 12.1KOhm
+/-1%
Dummy

3D3V_SYS 3D3V_U3VDD 3D3V_DUAL 3D3V_U3DUAL 1D2V_U3SYS 1D2V_U3VDD

pa
U3FB1 1 2 FB 60 Ohm 1 2 1 2
U3FB2 FB 60 Ohm U3FB3 FB 60 Ohm

B Dummy
* U3C10
Dummy
* U3C12
Dummy * U3C13
1uF
B

1uF 1uF 6.3V,X5R


6.3V,X5R 6.3V,X5R

Dummy
Dummy Dummy

3D3V_SYS
FAB 1.0

C
i
U3D2
AZ2015-01H.R7F * U3R10
100KOhm
Dummy +/-1%

A
4

U3U3 Dummy
3D3V_DUAL PORST#
Vout 4

1D2V_U3DUAL
U3U4
ADJ

3D3V_SYS
Vin

AS1117L/TR-LF
3 4
VIN VOUT
U3R14
U3C17 * U3C18
1uF
1

* 10uF 6.3V,X5R
GND

1 5 100 Ohm
U3R12 SHDN SET
Dummy +/-1% 6.3V,X5R
U3R11
* U3C14
* U3C15 APL5315-BI-TRL
* U3R13 Dummy
2
*

0 1uF 1uF
1K
6.3V,X5R 6.3V,X5R 200 Dummy Dummy
+/-5% +/-5% +/-1%

Dummy Dummy Dummy Dummy


1D2V_U3SYS Dummy
Dummy
80mil
A A
U3C16
* 10uF

6.3V,X5R Foxconn Confidential Document,please keep it secret.C6


Dummy

FOXCONN PCEG
Title
USB3
Size Document Number Rev
C H61M06 A

Date: Thursday, January 05, 2012 Sheet 44 of 45


5 4 3 2 1
CM
5 4 3 2 1

common choke 120Ohm


4 3
5V_DUAL
1 2

1
* U1L4 Dummy
USBPWR_0-1

** **
U1F1 44 AS_USBP1 U1R7 0 USBP1_R
Fuse 2A 44 AS_USBN1 U1R8 0 USBN1_R
D D
Dummy
U1R3 Dummy0 USBN0_R

SV
44 AS_USBN0
2

44 AS_USBP0 U1R5 0 USBP0_R

*
U1R30 10K +/-1%

11
U3_OCI_A# 44 Dummy
Dummy 1 Dummy U1U2
Dummy U1L6 Dummy USBN1_R 1

VSS
1 2 D- 10 USBP1_R
* U1C2
*
U1C1
470pF
U1R31
15K USBPWR_0-1
2
VBUS
D+
4.7uF 50V, X7R 4 3 9
2 +/-1% 3 GND
+/-10% NC1
common choke 120Ohm 8
USBN0_R 4 NC2
Dummy TX+
Dummy 7 USBP0_R
Dummy U3RX2DP_R 5 TX-
common choke 120Ohm RX+ 6 U3RX2DN_R
4 3 Co-lay USB2.0 from chipset RX-
AZ1065-06F
1 2

U1L1 Dummy Dummy

**
U1R22 0 U3RX1DN_R
44 U3RX1DN
U1R23 0 U3RX1DP_R

N
44 U3RX1DP
C Dummy C
Dummy

**
44 U3TX1DN U1R24 0 U3TX1DN_R
U1R25 0 U3TX1DP_R

11
44 U3TX1DP
Dummy U1U4
Dummy
U1L5 Dummy U3TX2DP_R 1

VSS
1 2 D- 10 U3TX2DN_R
2 D+
USBPWR_0-1 VBUS
4 3 9
3 GND
common choke 120Ohm NC1 8
U3TX1DP_R 4 NC2

Re
TX+ 7 U3TX1DN_R
U3RX1DP_R 5 TX-
common choke 120Ohm RX+ 6 U3RX1DN_R
4 3 RX-
AZ1065-06F
1 2

U1L9 Dummy Dummy


USBPWR_0-1 USBPWR_0-1
20
22

**
USB4 U1R26 0 U3RX2DN_R
44 U3RX2DN
U1R27 0 U3RX2DP_R
SHIELD2
SHIELD3

1 10 44 U3RX2DP
B
VBUS_BOTTOM VBUS_TOP Dummy B
USBN1_R 2 11 USBN0_R Dummy
USBP1_R 3 DN_BOTTOM DN_TOP 12 USBP0_R

**
4 DP_BOTTOM DP_TOP 13 U1R28 0 U3TX2DN_R
GND_BOTTOM USB2.0 GND_TOP 44 U3TX2DN

pa
FAB 1.0
44 U3TX2DP U1R29 0 U3TX2DP_R
Dummy
Dummy
U1L10 Dummy
1 2
USB3.0
U3RX1DN_R 5 14 U3RX2DN_R 4 3
U3RX1DP_R 6 RX_N_BOTTOM RX_N_TOP 15 U3RX2DP_R
7 RX_P_BOTTOM RX_P_TOP 16 common choke 120Ohm
GND_DR_BOTTOM GND_DR_TOP
SHIELD1
SHIELD4

U3TX1DN_R 8 17 U3TX2DN_R
U3TX1DP_R 9 TX_N_BOTTOM TX_N_TOP 18 U3TX2DP_R
TX_P_BOTTOM TX_P_TOP

CONN-USB
19
21

i
Dummy
A A

FOXCONN PCEG
Title
USB PORT
Size Document Number Rev
B H61M06 A

Date: Thursday, January 05, 2012 Sheet 45 of 45


5 4 Foxconn Confidential Document,please
3 keep it secret.C6 2 1

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