LABORATORY EXERCISE 2 8086/8088 ADDRESSING MODES AND MACHINE CODE CONVERSION

I. OBJECTIVES To identify the addressing mode used in the different 8086/8088 assembly language instructions. To learn how to convert 8086/8088 assembly language instruction into its machine code. CONCEPTUAL FRAMEWORK

II.

A. 8086/8088 ADDRESSING MODES Instructions of the 8086/8088 microprocessors usually involve data. These data are referred to as operands and may be part of an instruction. These data may reside in one of the registers or stored in memory or held at in an input/output device. Access to these different types of operands is possible because instructions have various addressing modes. 8086/8088 addressing modes are classified into three: 1) DATA ADDRESSING MODES 2) PROGRAM MEMORY ADDRESSING MODES 3) STACK MEMORY ADDRESSING MODES 1) DATA ADDRESSING MODES 1.1. Register addressing - The data is in the register that is specified by the instruction. In this addressing mode, the operand is an internal register. e.g. MOV CX, DX {copies the 16-bit content of source register DX into destination register CX} 1.2. Immediate addressing - The 8-bit or 16-bit immediate data is part of the instruction. In this addressing mode, the source operand is constant data. e.g. MOV AL, 22H {copies a byte-sized data 22H to register AL} MOV CX, 1234H {copies a word-sized data 1234H to register CX} 1.3. Direct addressing The 16-bit direct effective or offset address of the data is part of the instruction.

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e.g. MOV CL, [1000H] {copies the 8-bit data from memory location [DS x 10H + 1000H] to register CX} MOV [3000H], AL {copies the byte-sized data from register AL to memory location [DS x 10H + 3000H]} 1.4. Register indirect addressing - Under this addressing mode, the data operand is found in the memory location pointed to by either base (BX/BP) or index registers (SI/DI). e.g. MOV AX, [BX] {copies the word-sized data from data segment memory location pointed by BX to register AX} ADD [DI], BX {adds the 16-bit contents of register BX and the data segment memory location indexed by DI.} 1.5.Base-plus-index addressing - Under this addressing mode, the effective or offset address of the data is calculated as the sum of contents of base register (BX or BP) and index register (SI or DI). e.g. MOV [BX + DI], CL {transfers byte-sized data from register CL to memory location [DS x 10H + BX + DI]} XCHG AX, [BX+SI] {swaps the 16-bit contents of memory location pointed by BX plus SI and register AX} 1.6. Register relative addressing - Under this addressing mode, the effective or offset address of the data is calculated as the sum of an 8-bit or 16-bit displacement and the contents of base register or an index register. e.g. MOV CL, [BX + 04H] {loads CL with 8-bit data from memory location [DS x 10H + BX + 04H]} MOV [SI + 1000H], AX {moves the 16-bit data from register AX to the data segment memory location addressed by SI plus a 16 bit displacement 1000H] 1.7. Base-relative plus index addressing - Under this addressing mode, the data operand is found in the memory location addressed by base register (BX or BP) and index register (SI or DI) plus an 8-bit or 16-bit displacement. e.g. MOV AX, [BX + DI + 04H] {loads AX with 16-bit data from a data segment memory location addressed by BX, DI plus an 8-bit displacement 04H.}

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1.8. String addressing - Addressing mode used for string instructions. Instructions involving strings usually uses the source and destination index registers (SI and DI) to specify the effective addresses of the source and destination operands respectively. e.g. MOVSB {Moves byte-sized data from data segment memory location pointed by SI to the memory location in the extra segment pointed by DI} 1.9 Port addressing - For reading and writing data to/from the I/O devices, this addressing mode is used. Under this addressing mode, the I/O port address of an I/O device is part of the instruction. e.g. IN AL, 3FH {the input port having address of 3FH will move data to register AL} OUT DX, AL {the contents of register AL is transferred to an output port whose address is specified by the DX register} 2. PROGRAM MEMORY ADDRESSING MODES Addressing modes used for program transfer instructions such as Jump and Call instructions are as follows: 2.1.Direct Program Memory Addressing - The purpose of this addressing mode is to provide a means of branching from one code segment to another for the next instruction. - It allows jumping to any memory location within the entire memory system for the next instruction. An intersegment jump is a jump to any memory location within the entire memory system. - Offset address and segment address are stored with the instruction. e.g. JMP 10000H {jump to physical memory address [10000H] for the next instruction} 2.2. Relative Program Memory Addressing This addressing mode allows a JMP or CALL instruction to branch forward or backward in the current code segment. An intrasegment jump is a jump anywhere within the current code segment. The term relative means relative to the instruction pointer. JMP 002FH {IP is set to 002FH; jump to memory location [CS x 10H + 002FH] for the next instruction}

e.g.

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JMP [0002H] {the contents of memory location [DS x 10H + 0002H] is copied to IP; jump to memory location addressed by the content of [DS x 10H + 0002H] for the next instruction} 2.3. Indirect Program Memory Addressing This addressing mode allows a JMP or CALL instruction to address another portion of the program or subroutine indirectly through a 16-bit register (AX, BX, CX, DX, SP, BP, SI or DI) or any relative register ([BP], [BX], [DI] or [SI]) with or without displacement. JMP AX {the address in AX is copied to IP; jump to memory location addressed by the content of AX for the next instruction} JMP NEAR PTR [BX] {the contents of memory location [DS x 10H + BX] is copied to IP; jump to the current code segment location addressed by the contents of data segment memory location pointed by BX} 2.4. Implied Addressing This addressing mode is used for program control instructions. In this addressing mode, the operand is specified implicitly in the definition of the opcode. No address field is specified in the instruction. NOP {No operation} CLC {Clear carry flag} 3. STACK MEMORY ADDRESSING MODES - Addressing mode used for stack operations. - data are placed in the stack with a PUSH instruction or a CALL instruction in the case of a subroutine return address. - data are removed from the stack via the POP instruction, or a RET instruction in the case of a subroutine return address. PUSH AX {Place the contents of AX in the stack memory} POP AX {Remove 16-bit data from the stack and place it to register AX}

e.g.

e.g.

e.g

B. MACHINE CODE CONVERSION The microprocessor can only understand the instruction in binary form, which actually represents levels of voltages measured at its pins. Assembly language in MNEMONICS must be first converted to its equivalent binary form or in machine code. Machine codes are often written in HEX to conveniently represent 4 bits, so that encoding could be easier.

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General Instruction Format

OPCODE FIELD (6 BITS) specifies the operation to be performed. REGISTER DIRECTION BIT (D) specifies whether the register operand specified in the REG field is a source or destination operand. If D = 1, the register operand is a destination operand. If D = 0, the register operand is a source operand. DATA SIZE BIT (W) tells whether the data size is a byte (8 bits) or 2 bytes (16 bits). If W = 0, the data size is 8-bits. If W = 1, the data size is 16-bits. REGISTER FIELD (REG) identifies the register used for the 1st operand. Table 1 given below is used for REG field encoding. Table 2 given below is used for SR field encoding. REG 000 001 010 011 100 101 110 111 W=0 AL CL DL BL AH CH DH BH Table 1. REG field encoding W=1 AX CX DX BX SP BP SI DI

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REG 00 01 10 11

SEGMENT REGISTER ES CS SS DS Table 2. SR Field Encoding

MOD FIELD (MOD) identifies if the 2nd operand comes from memory or register. MOD code 00,01,10 means that the data operand comes from memory with or without displacement. MOD code 11 specifies that the data operand come from register. Table 3 given below is used for MOD field encoding. EXPLANATION CODE 00 Memory Mode, no displacement follows (except when R/M = 110 then 16-bit direct offset address follows) 01 Memory Mode, 8-bit displacement follows 10 Memory Mode, 16-bit displacement follows 11 Register Mode (no displacement) Table 3. MOD field encoding R/M FIELD (R/M) indicates what register is used for the 2nd operand if the MOD is 11. For MOD 00, 01, 10, R/M field indicates how the effective address or offset address is calculated. Table 4 is used for R/M field encoding. R/M EFFECTIVE (OFFSET) ADDRESS CALCULATION MOD MOD MOD 00 01 10 [BX + SI] [BX + SI+ d8] [BX + SI+ d16] [BX + DI] [BX + DI+d8] [BX + DI+d16] [BP + SI] [BP + SI+d8] [BP + SI+d16] [BP + DI] [BP + DI+d8] [BP + DI+d16] [SI] [SI+d8] [SI+d16] [DI] [DI+d8] [DI+d16] DIRECT ADDR [BP+d8] [BP+d16] [BX] [BX+d8] [BX+d16] Table 4. R/M field encoding REGISTER MOD = 11 W=0 W=1 AL CL DL BL AH CH DH BH AX CX DX BX SP BP SI DI

000 001 010 011 100 101 110 111

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FIELD S V Z

VALUE 0 1 0 1 0 1

FUNCTIONS No sign extension Sign extension 8-bit immediate data to 16 bits if W = 1 Shift / Rotate count =1 Shift / Rotate count is specified in CL register Repeat/Loop while ZF = 0 Repeat/Loop while ZF = 1

TABLE 5. OTHER ONE-BIT FIELD AND THEIR FUNCTIONS

Example 1. Determine the machine code for ADD CL, [1234H]. OPERAND: CL destination operand (8-bit register) [1234H] source operand (direct address) BYTE1: Opcode of ADD : 000000 D-bit : 1 (register used for the 1st operand is a destination operand) W-bit: 0 (byte-sized data is being manipulated) BYTE2: MOD FIELD:00 (The 2nd operand comes from memory without disp.) REG FIELD: 001 (specifies CL) R/M FIELD: 110 (specifies direct address) BYTE3: 34 H (low-order byte address) BYTE4: 12 H (high-order byte address) MACHINE CODE: 02 0E 34 12 H

Example 2. Determine the machine code for MOV [BP+DI+8765H], 4321H OPERAND: [BP+DI+8765H] destination operand (memory location pointed by BP+DI+d16) 4321H source operand (immediate data) BYTE1: Opcode of MOV: 1100011 (immediate to memory) W-bit: 1 (word-sized data is being manipulated) BYTE2: mod 000 r/m MOD FIELD: 10 (The 2nd operand comes from memory with d16) R/M FIELD: 011 (specifies [BP+DI+d16]) BYTE3: 65 H (low-order byte disp.) BYTE4: 87 H (high-order byte disp.) BYTE5: 21 H (low-order byte data) BYTE6: 43 H (high-order byte data) MACHINE CODE: C7 83 65 87 21 43 H III. MATERIALS NEEDED 8086/8088 Instruction Set pen and paper

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IV.

PROCEDURE

1. Identify the addressing modes used by the following instructions: (a) MOV WORDPTR [DI], 1234H (b) XOR BX, AX (c) ADD [SI + 02H], DX (d) XCHG [BX+DI], CX (e) CALL [SI] (f) JGE F3H (g) IN AL, 40H (h) STD (i) LODSW (j) SUB AX, [BX+DI+02H] (k) POP DX 2. Determine the machine code of the following instructions: (a) ADD CX, 1234H (b) MOV AL, DL (c) XOR AX, [SI] (d) MOV [BX+DI+1234H], ABCD (e) SUB [DI + 09H], BX (f) ROL WORD PTR [3456H], CL (g) SHR [BP+SI], 01 V. 1. INSTRUCTION MOV WORDPTR [DI], 1234H XOR BX, AX ADD [SI + 02H], DX XCHG [BX+DI], CX CALL [SI] JGE F3H IN AL, 40H STD LODSW SUB AX, [BX+DI+02H] POP DX ADDRESSING MODE DESTINATION SOURCE DATA AND RESULTS

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2. MNEMONICS B1 ADD CX, 1234H MOV AL, DL XOR AX, [SI] MOV [BX+DI+1234H], ABCD SUB [DI + 09H], BX ROL WORD PTR [3456H], CL SHR [BP+SI], 01 MACHINE CODE IN HEX B2 B3 B4 B5 B6

VI.

ANALYSIS AND CONCLUSION

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