Test Object - Device Settings

Substation/Bay:
Substation: 3215SUB600 Substation address: Stockyard
Bay: 3215SWB600-P1 Bay address: Spare_P10

Device:
Name/description: Spare Feeder Manufacturer: Schweitzer
Device type: SEL751_P015 Feeder protection Device address: 11kV Stockyard Feeder
relay
Serial/model number: 3231885299
Additional info 1: 11kV Switchboard
Additional info 2: 3215SWB600-P10

Hardware Configuration

Test Equipment
Type Serial Number
CMC256plus PL273Q

Hardware Check
Performed At Result Details
21/03/2024 1:04:42 Passed
PM

Group:Relay Measurment

Relay Measurment

Phase CT & VT Measurment :

Test Module
Name: OMICRON QuickCMC Version: 4.31
Test Start: 21-Mar-2024 13:06:25 Test End: 21-Mar-2024 13:07:27
User Name: Manager:
Company:

Test Results

Title: Test 1

Fault Calculator:
Table Inputmode Parameters (All values are primary)
Direct V A-N 6.000 kV 0.00 ° 50.000 Hz
V B-N 6.350 kV -120.00 ° 50.000 Hz
V C-N 7.000 kV 120.00 ° 50.000 Hz
IA 75.00 A 0.00 ° 50.000 Hz
IB 150.0 A -120.00 ° 50.000 Hz
IC 225.0 A 120.00 ° 50.000 Hz

2 / 80
Generator Settings
V A-N 6000.000V 0.00° +90°
V B-N 6350.000V -120.00° V C-N
V C-N 7000.000V 120.00° IC
IA 75.000A 0.00°
I A V A-N
IB 150.000A -120.00° 180° 0°
IC 225.000A 120.00° IB
V B-N

80.0 V -90° 2.0 A

Summary
1 tests passed, 0 tests failed, 0 tests not assessed 100.00% passed
Test passed

3 / 80
Ground CT Measurment:

Test Module
Name: OMICRON QuickCMC Version: 4.31
Test Start: 21-Mar-2024 13:07:38 Test End: 21-Mar-2024 13:07:57
User Name: Manager:
Company:

Test Results

Title: Test 1

Fault Calculator:
Parameters (All values are
Table Inputmode
secondary)
Direct

Generator Settings
I(2)-1 1.000A 0.00° +90°

I(2)-1
180° 0°

1.0 A -90°

Summary
1 tests passed, 0 tests failed, 0 tests not assessed 100.00% passed
Test passed

Group end:Relay Measurment

Group:Phase Overcurrent Protection
Group:Element 1

4 / 80
Phase Overcurrent Protection
Element 1
OC Pickup RW:

Test Settings

General
No. of ramp states: 1
Total steps per test: 21
Total time per test: 16.800 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
I A, B / Magnitude

Ramp States
Ramp Ramp 1
IA 3.000 A
0.00 °
50.000 Hz
IB 3.000 A
-120.00 °
50.000 Hz
IC 0.00 A
120.00 °
50.000 Hz
Force abs. Phases No
Sig 1 From 3.000 A
Sig 1 To 4.000 A
Sig 1 Delta 50.00 mA
Sig 1 d/dt 62.50 mA/s
dt per Step 800.0 ms
Ramp Steps 21
Ramp Time 16.800s
Trigger Bin
Trigger Logic OR
Start 1
Step back No
Delay Time 0.00 s

Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 1 Start 0->1 I A, B 3.500 A 3.550 A 200.0 mA 200.0 mA 50.00 mA + 7.700
Assess: + .. Passed x .. Failed o .. Not assessed

5 / 80
 Ramp 1

Sig 1/A

3.50

3.40

3.30

3.20

3.10
t/s
1 2 3 4 5 6 7 8
3.00
I A, B

Start

1 2 3 4 5 6 7 8
t/s

Test State:
Test passed

6 / 80
OC Droup Off RW:
Test Settings

Ramp parameters
Outputs Quantity From To Δ TFault TReset Steps Duration
I A,I B Magnitude 4.000 A 3.000 A -10.00 mA 1.000 s 100.0 ms 101 111.2 s

States
State Reset Fault
State State
IA 4.000 A 4.000 A
0.00 ° 0.00 °
50.00 Hz 50.00 Hz
IB 4.000 A 4.000 A
-120.00 ° -120.00 °
50.00 Hz 50.00 Hz
IC 4.000 A 0.00 A
120.00 ° 120.00 °
50.00 Hz 50.00 Hz
+90° +90°
Diagrams
180° 0° 180° 0°

12.5-90°
A 12.5-90°
A

Test Results
Threshold Assess on Nom Tol+ Tol- Act Dev Assess
Magnitude I A,I B Start 1>0 3.500 A 50.00 mA 50.00 mA 3.500 A 0.00 A +
Assess: + .. Passed x .. Failed o .. Not assessed

Ramped output/A

3.90

3.80

3.70

3.60
t/s
10 20 30 40 50
3.50
IA IB

7 / 80
CMC256plus Current A/A
5
4
3
2
t/s
1 10 20 30 40 50
0
-1
-2
-3
-4
-5
-6
IA IB IC

Bin. out 1
Bin. out 2
Bin. out 3
Bin. out 4

10 20 30 40 50
t/s

Start

10 20 30 40 50
t/s

Test State:
Test passed

8 / 80
OC Pickup WB:

Test Settings

General
No. of ramp states: 1
Total steps per test: 21
Total time per test: 16.800 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
I B, C / Magnitude

Ramp States
Ramp Ramp 1
IA 0.00 A
0.00 °
50.000 Hz
IB 3.000 A
-120.00 °
50.000 Hz
IC 3.000 A
120.00 °
50.000 Hz
Force abs. Phases No
Sig 1 From 3.000 A
Sig 1 To 4.000 A
Sig 1 Delta 50.00 mA
Sig 1 d/dt 62.50 mA/s
dt per Step 800.0 ms
Ramp Steps 21
Ramp Time 16.800s
Trigger Bin
Trigger Logic OR
Start 1
VCB Trip X
Step back No
Delay Time 0.00 s

Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 1 Start 0->1 I B, C 3.500 A 3.550 A 55.00 mA 55.00 mA 50.00 mA + 8.500
Assess: + .. Passed x .. Failed o .. Not assessed

9 / 80
 Ramp 1

Sig 1/A

3.50

3.40

3.30

3.20

3.10
t/s
1 2 3 4 5 6 7 8
3.00
I B, C

Start
VCB Trip

1 2 3 4 5 6 7 8
t/s

Test State:
Test passed

10 / 80
OC Droup Off WB:
Test Settings

Ramp parameters
Outputs Quantity From To Δ TFault TReset Steps Duration
I B,I C Magnitude 4.000 A 3.000 A -10.00 mA 1.000 s 100.0 ms 101 111.2 s

States
State Reset Fault
State State
IA 4.000 A 0.00 A
0.00 ° 0.00 °
50.00 Hz 50.00 Hz
IB 4.000 A 4.000 A
-120.00 ° -120.00 °
50.00 Hz 50.00 Hz
IC 4.000 A 4.000 A
120.00 ° 120.00 °
50.00 Hz 50.00 Hz

Test Results
Threshold Assess on Nom Tol+ Tol- Act Dev Assess
Magnitude I B,I C Start 1>0 3.500 A 50.00 mA 50.00 mA 3.500 A 0.00 A +
Assess: + .. Passed x .. Failed o .. Not assessed

Ramped output/A

3.90

3.80

3.70

3.60

t/s
10 20 30 40 50
3.50

IB IC

CMC256plus Current A/A

5
4
3
2
1
0
-1 10 20 30 40 50
t/s
-2
-3
-4
-5
-6
IA IB IC

11 / 80
 Start

10 20 30 40 50
t/s

Test State:
Test passed

12 / 80
OC Pickup BR:

Test Settings

General
No. of ramp states: 1
Total steps per test: 101
Total time per test: 80.800 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
I C, A / Magnitude

Ramp States
Ramp Ramp 1
IA 3.000 A
0.00 °
50.000 Hz
IB 0.00 A
-120.00 °
50.000 Hz
IC 3.000 A
120.00 °
50.000 Hz
Force abs. Phases No
Sig 1 From 3.000 A
Sig 1 To 4.000 A
Sig 1 Delta 10.00 mA
Sig 1 d/dt 12.50 mA/s
dt per Step 800.0 ms
Ramp Steps 101
Ramp Time 80.800s
Trigger Bin
Trigger Logic OR
Start 1
Step back No
Delay Time 0.00 s

Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 1 Start 0->1 I C, A 3.500 A 3.510 A 55.00 mA 55.00 mA 10.00 mA + 20.70
Assess: + .. Passed x .. Failed o .. Not assessed

13 / 80
 Ramp 1

Sig 1/A
3.9
3.8
3.7
3.6
3.5
3.4
3.3
3.2
3.1 t/s
10 20 30 40 50 60 70
3.0
I C, A

Start

10 20 30 40 50 60 70
t/s

Test State:
Test passed

14 / 80
OC Droup Off BR:
Test Settings

Ramp parameters
Outputs Quantity From To Δ TFault TReset Steps Duration
I C,I A Magnitude 4.000 A 3.000 A -10.00 mA 1.000 s 100.0 ms 101 111.2 s

States
State Reset Fault
State State
IA 4.000 A 4.000 A
0.00 ° 0.00 °
50.00 Hz 50.00 Hz
IB 4.000 A 0.00 A
-120.00 ° -120.00 °
50.00 Hz 50.00 Hz
IC 4.000 A 4.000 A
120.00 ° 120.00 °
50.00 Hz 50.00 Hz

Test Results
Threshold Assess on Nom Tol+ Tol- Act Dev Assess
Magnitude I C,I A Start 1>0 3.500 A 50.00 mA 50.00 mA 3.500 A 0.00 A +
Assess: + .. Passed x .. Failed o .. Not assessed

Ramped output/A

3.90

3.80

3.70

3.60
t/s
10 20 30 40 50
3.50
IC IA

CMC256plus Current A/A

5
4
3
2
t/s
1 10 20 30 40 50
0
-1
-2
-3
-4
-5
-6
IA IB IC

15 / 80
 Bin. out 1
Bin. out 2
Bin. out 3
Bin. out 4

10 20 30 40 50
t/s

Start

10 20 30 40 50
t/s

Test State:
Test passed

16 / 80
OC Pickup RWB:

Test Settings

General
No. of ramp states: 1
Total steps per test: 101
Total time per test: 80.800 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
I A, B, C / Magnitude

Ramp States
Ramp Ramp 1
IA 3.000 A
0.00 °
50.000 Hz
IB 3.000 A
-120.00 °
50.000 Hz
IC 3.000 A
120.00 °
50.000 Hz
Force abs. Phases No
Sig 1 From 3.000 A
Sig 1 To 4.000 A
Sig 1 Delta 10.00 mA
Sig 1 d/dt 12.50 mA/s
dt per Step 800.0 ms
Ramp Steps 101
Ramp Time 80.800s
Trigger Bin
Trigger Logic OR
Start 1
Step back No
Delay Time 0.00 s

Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 1 Start 0->1 I A, B, 3.500 A 3.500 A 55.00 mA 55.00 mA 0.00 A + 32.30
C
Assess: + .. Passed x .. Failed o .. Not assessed

17 / 80
 Ramp 1

Sig 1/A

3.45
3.40
3.35
3.30
3.25
3.20
3.15
3.10
3.05 t/s
5 10 15 20 25 30 35
3.00
I A, B, C

Start

5 10 15 20 25 30 35
t/s

Test State:
Test passed

18 / 80
OC Droup Off RWB:
Test Settings

Ramp parameters
Outputs Quantity From To Δ TFault TReset Steps Duration
I A,I B,I C Magnitude 4.000 A 3.000 A -10.00 mA 1.000 s 100.0 ms 101 111.2 s

States
State Reset Fault
State State
IA 4.000 A 4.000 A
0.00 ° 0.00 °
50.00 Hz 50.00 Hz
IB 4.000 A 4.000 A
-120.00 ° -120.00 °
50.00 Hz 50.00 Hz
IC 4.000 A 4.000 A
120.00 ° 120.00 °
50.00 Hz 50.00 Hz

Test Results
Threshold Assess on Nom Tol+ Tol- Act Dev Assess
Magnitude I A,I Start 1>0 3.500 A 50.00 mA 50.00 mA 3.500 A 0.00 A +
B,I C
Assess: + .. Passed x .. Failed o .. Not assessed

Ramped output/A

3.90

3.80

3.70

3.60

t/s
10 20 30 40 50
3.50

IA IB IC

CMC256plus Current A/A

5
4
3
2
1
0
-1 10 20 30 40 50
t/s
-2
-3
-4
-5
-6
IA IB IC

19 / 80
 Start

10 20 30 40 50
t/s

Test State:
Test passed

20 / 80
Phase OC Trip Time:
Test Object - Overcurrent Parameters

General - Values:
TimeTolAbs: 0.04 s VT connection: n/a
TimeTolRel: 5.00 % CT starpoint connection: n/a
CurrentTolAbs: 0.05 Iref
CurrentTolRel: 5.00 %
Directional: No

Elements - Phase:
Active Name Tripping characteristic I Pick-up Time Reset Ratio Direction
Yes 50P1-Ph OC IEC Definite Time 3.50 Iref 0.28 s 0.95 Non Directional
Yes 50P2-Ph OC IEC Definite Time 13.00 Iref 0.00 s 0.95 Non Directional
Yes 51P -Ph TOC IEC Normal Inverse 0.84 Iref 1.00 0.95 Non Directional

Elements - Residual:
Active Name Tripping characteristic I Pick-up Time Reset Ratio Direction
Yes 50N1-R OC IEC Definite Time 0.50 Iref 0.00 s 0.95 Non Directional

Test Settings:
Shot Test:
Type Relative To Factor Magnitude Angle tnom tmin tmax
L1-L2 50P1-Ph OC 1.100 3.850 A -60.00 ° 280.0 ms 240.0 ms 320.0 ms
L2-L3 50P1-Ph OC 1.200 4.200 A -60.00 ° 280.0 ms 240.0 ms 320.0 ms
L3-L1 50P1-Ph OC 1.300 4.550 A -60.00 ° 280.0 ms 240.0 ms 320.0 ms
L1-L2 50P1-Ph OC 1.400 4.900 A -60.00 ° 280.0 ms 240.0 ms 320.0 ms
L2-L3 50P1-Ph OC 1.500 5.250 A -60.00 ° 280.0 ms 240.0 ms 320.0 ms
L3-L1 50P1-Ph OC 1.600 5.600 A -60.00 ° 280.0 ms 240.0 ms 320.0 ms
L1-L2 50P1-Ph OC 1.700 5.950 A -60.00 ° 280.0 ms 240.0 ms 320.0 ms
L2-L3 50P1-Ph OC 1.800 6.300 A -60.00 ° 280.0 ms 240.0 ms 320.0 ms
L3-L1 50P1-Ph OC 1.900 6.650 A -60.00 ° 280.0 ms 240.0 ms 320.0 ms
L1-L2-L3 50P1-Ph OC 2.000 7.000 A -60.00 ° 280.0 ms 240.0 ms 320.0 ms
L1-L2-L3 50P1-Ph OC 2.500 8.750 A -60.00 ° 280.0 ms 240.0 ms 320.0 ms
L1-L2-L3 50P1-Ph OC 3.000 10.50 A -60.00 ° 280.0 ms 240.0 ms 320.0 ms

Binary Inputs:
Trigger Logic: Or
Name Trigger State
VCB Trip 1

Shot Test Results:

Type Relative To Factor Magnitude Angle tnom tact Deviation Overload Result
L1-L2 50P1-Ph OC 1.100 3.850 A -60.00 ° 280.0 ms 314.1 ms 12.18 % No Passed
L2-L3 50P1-Ph OC 1.200 4.200 A -60.00 ° 280.0 ms 310.8 ms 11.00 % No Passed
L3-L1 50P1-Ph OC 1.300 4.550 A -60.00 ° 280.0 ms 311.1 ms 11.11 % No Passed
L1-L2 50P1-Ph OC 1.400 4.900 A -60.00 ° 280.0 ms 304.1 ms 8.607 % No Passed
L2-L3 50P1-Ph OC 1.500 5.250 A -60.00 ° 280.0 ms 304.2 ms 8.643 % No Passed
L3-L1 50P1-Ph OC 1.600 5.600 A -60.00 ° 280.0 ms 301.7 ms 7.750 % No Passed
L1-L2 50P1-Ph OC 1.700 5.950 A -60.00 ° 280.0 ms 302.3 ms 7.964 % No Passed
L2-L3 50P1-Ph OC 1.800 6.300 A -60.00 ° 280.0 ms 302.6 ms 8.071 % No Passed
L3-L1 50P1-Ph OC 1.900 6.650 A -60.00 ° 280.0 ms 302.1 ms 7.893 % No Passed
L1-L2-L3 50P1-Ph OC 2.000 7.000 A -60.00 ° 280.0 ms 300.7 ms 7.393 % No Passed
L1-L2-L3 50P1-Ph OC 2.500 8.750 A -60.00 ° 280.0 ms 300.8 ms 7.429 % No Passed
L1-L2-L3 50P1-Ph OC 3.000 10.50 A -60.00 ° 280.0 ms 297.9 ms 6.393 % No Passed

21 / 80
Charts for Fault Types:
Angle
Type

L1-L2 -60.00 °

10000.000
1000.000
100.000
10.000
t/s

1.000
0.100
0.010

1.0 2.0 3.0 5.0 7.0 10.0 20.0

I/A

Charts for Fault Types:

Angle
Type

L2-L3 -60.00 °

10000.000
1000.000
100.000
10.000
t/s

1.000
0.100
0.010

1.0 2.0 3.0 5.0 7.0 10.0 20.0

I/A

Charts for Fault Types:

Angle
Type

L3-L1 -60.00 °

10000.000
1000.000
100.000
10.000
t/s

1.000
0.100
0.010

1.0 2.0 3.0 5.0 7.0 10.0 20.0

I/A

Charts for Fault Types:

Angle
Type

L1-L2-L3 -60.00 °

22 / 80
 10000.000
1000.000
100.000
10.000
t/s

1.000
0.100
0.010

1.0 2.0 3.0 5.0 7.0 10.0 20.0

I/A

Test State:
12 out of 12 points tested.
12 points passed.
0 points failed.

Test passed

23 / 80
 Group end:Element 1

Group:Element 2

Phase Overcurrent Protection

Element 2
Hardware Configuration

Test Equipment
Type Serial Number
CMC256plus PL273Q

Hardware Check
Performed At Result Details
21/03/2024 1:41:48 Passed
PM

OC Pickup RW:

Test Settings
General
No. of ramp states: 1
Total steps per test: 11
Total time per test: 8.800 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
I A, B / Magnitude

Ramp States
Ramp Ramp 1
IA 12.50 A
0.00 °
50.000 Hz
IB 12.50 A
-120.00 °
50.000 Hz
IC 0.00 A
120.00 °
50.000 Hz
Force abs. Phases No
Sig 1 From 12.50 A
Sig 1 To 13.50 A
Sig 1 Delta 100.0 mA
Sig 1 d/dt 125.0 mA/s
dt per Step 800.0 ms
Ramp Steps 11
Ramp Time 8.800s
Trigger Bin
Trigger Logic OR
Start 1
Step back No
Delay Time 0.00 s

24 / 80
Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 1 Start 0->1 I A, B 13.00 A 13.00 A 500.0 mA 500.0 mA 0.00 A + 38.30
Assess: + .. Passed x .. Failed o .. Not assessed

Sig 1/A
13.4
13.3
13.2
13.1
13.0
12.9
12.8
12.7
12.6 t/s
5.0 5.2 5.4 5.6 5.8 6.0 6.2 6.4 6.6 6.8
12.5
I A, B

Start

5.0 5.2 5.4 5.6 5.8 6.0 6.2 6.4 6.6 6.8
t/s

Test State:
Test passed

OC Droup Off RW:

Test Settings

Ramp parameters
Outputs Quantity From To Δ TFault TReset Steps Duration
I A,I B Magnitude 13.50 A 12.50 A -10.00 mA 1.000 s 100.0 ms 101 111.2 s

States
State Reset Fault
State State
IA 14.00 A 13.50 A
0.00 ° 0.00 °
50.00 Hz 50.00 Hz
IB 14.00 A 13.50 A
-120.00 ° -120.00 °
50.00 Hz 50.00 Hz
IC 14.00 A 1.000 A
120.00 ° 120.00 °
50.00 Hz 50.00 Hz

Test Results
Threshold Assess on Nom Tol+ Tol- Act Dev Assess
Magnitude I A,I B Start 1>0 13.00 A 100.0 mA 100.0 mA 13.01 A 10.00 mA +
Assess: + .. Passed x .. Failed o .. Not assessed

25 / 80
 Ramped output/A

13.9
13.8
13.7
13.6
13.5
13.4
13.3
13.2
13.1 t/s
10 20 30 40 50
13.0
IA IB

CMC256plus Current/A

15

10

0
10 20 30 40 50
-5 t/s

-10

-15

-20
IA IB IC

Start

10 20 30 40 50
t/s

Test State:
Test passed

26 / 80
OC Pickup WB:

Test Settings

General
No. of ramp states: 1
Total steps per test: 11
Total time per test: 8.800 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
I B, C / Magnitude

Ramp States
Ramp Ramp 1
IA 0.00 A
0.00 °
50.000 Hz
IB 12.50 A
-120.00 °
50.000 Hz
IC 12.50 A
120.00 °
50.000 Hz
Force abs. Phases No
Sig 1 From 12.50 A
Sig 1 To 13.50 A
Sig 1 Delta 100.0 mA
Sig 1 d/dt 125.0 mA/s
dt per Step 800.0 ms
Ramp Steps 11
Ramp Time 8.800s
Trigger Bin
Trigger Logic OR
Start 1
VCB Trip X
Step back No
Delay Time 0.00 s

Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 1 Start 0->1 I B, C 13.00 A 13.00 A 500.0 mA 500.0 mA 0.00 A + 35.60
Assess: + .. Passed x .. Failed o .. Not assessed

27 / 80
 Ramp 1

Sig 1/A

12.95
12.90
12.85
12.80
12.75
12.70
12.65
12.60
12.55 t/s
0.5 1.0 1.5 2.0 2.5 3.0 3.5
12.50
I B, C

Start
VCB Trip

0.5 1.0 1.5 2.0 2.5 3.0 3.5

t/s

Test State:
Test passed

OC Droup Off WB:

Test Settings

Ramp parameters
Outputs Quantity From To Δ TFault TReset Steps Duration
I B,I C Magnitude 13.50 A 12.50 A -200.0 mA 1.000 s 100.0 ms 6 6.700 s

States
State Reset Fault
State State
IA 14.00 A 0.00 A
0.00 ° 0.00 °
50.00 Hz 50.00 Hz
IB 14.00 A 13.50 A
-120.00 ° -120.00 °
50.00 Hz 50.00 Hz
IC 14.00 A 13.50 A
120.00 ° 120.00 °
50.00 Hz 50.00 Hz

Test Results
Threshold Assess on Nom Tol+ Tol- Act Dev Assess
Magnitude I B,I C Start 1>0 13.00 A 100.0 mA 100.0 mA 12.90 A -100.0 mA +
Assess: + .. Passed x .. Failed o .. Not assessed

28 / 80
 Ramped output/A

13.9
13.8
13.7
13.6
13.5
13.4
13.3
13.2
13.1
13.0 t/s
0.5 1.0 1.5 2.0 2.5 3.0
12.9

IB IC

CMC256plus Current/A

15

10

0
0.5 1.0 1.5 2.0 2.5 3.0
-5 t/s

-10

-15

-20
IA IB IC

Start

0.5 1.0 1.5 2.0 2.5 3.0

t/s

Test State:
Test passed

29 / 80
OC Pickup BR:

Test Settings

General
No. of ramp states: 1
Total steps per test: 11
Total time per test: 8.800 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
I C, A / Magnitude

Ramp States
Ramp Ramp 1
IA 12.50 A
0.00 °
50.000 Hz
IB 0.00 A
-120.00 °
50.000 Hz
IC 12.50 A
120.00 °
50.000 Hz
Force abs. Phases No
Sig 1 From 12.50 A
Sig 1 To 13.50 A
Sig 1 Delta 100.0 mA
Sig 1 d/dt 125.0 mA/s
dt per Step 800.0 ms
Ramp Steps 11
Ramp Time 8.800s
Trigger Bin
Trigger Logic OR
Start 1
VCB Trip X
Step back No
Delay Time 0.00 s

Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 1 Start 0->1 I C, A 13.00 A 13.00 A 100.0 mA 100.0 mA 0.00 A + 32.80
Assess: + .. Passed x .. Failed o .. Not assessed

30 / 80
 Ramp 1

Sig 1/A

12.95
12.90
12.85
12.80
12.75
12.70
12.65
12.60
12.55 t/s
0.5 1.0 1.5 2.0 2.5 3.0 3.5
12.50
I C, A

Start
VCB Trip

0.5 1.0 1.5 2.0 2.5 3.0 3.5

t/s

Test State:
Test passed

OC Droup Off BR:

Test Settings

Ramp parameters
Outputs Quantity From To Δ TFault TReset Steps Duration
I C,I A Magnitude 13.50 A 12.50 A -10.00 mA 1.000 s 100.0 ms 101 111.2 s

States
State Reset Fault
State State
IA 14.00 A 13.50 A
0.00 ° 0.00 °
50.00 Hz 50.00 Hz
IB 14.00 A 0.00 A
-120.00 ° -120.00 °
50.00 Hz 50.00 Hz
IC 14.00 A 13.50 A
120.00 ° 120.00 °
50.00 Hz 50.00 Hz

Test Results
Threshold Assess on Nom Tol+ Tol- Act Dev Assess
Magnitude I C,I A Start 1>0 13.00 A 50.00 mA 50.00 mA 13.00 A 0.00 A +
Assess: + .. Passed x .. Failed o .. Not assessed

31 / 80
 Ramped output/A

13.9
13.8
13.7
13.6
13.5
13.4
13.3
13.2
13.1
t/s
10 20 30 40 50
13.0

IC IA

CMC256plus Current/A

15

10

0
10 20 30 40 50
-5 t/s

-10

-15

-20
IA IB IC

Start

10 20 30 40 50
t/s

Test State:
Test passed

32 / 80
OC Pickup RWB:

Test Settings

General
No. of ramp states: 1
Total steps per test: 11
Total time per test: 8.800 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
I A, B, C / Magnitude

Ramp States
Ramp Ramp 1
V A-N 63.50 V
0.00 °
50.000 Hz
V B-N 63.51 V
-120.00 °
50.000 Hz
V C-N 63.51 V
120.00 °
50.000 Hz
IA 12.50 A
0.00 °
50.000 Hz
IB 12.50 A
-120.00 °
50.000 Hz
IC 12.50 A
120.00 °
50.000 Hz
Force abs. Phases No
Sig 1 From 12.50 A
Sig 1 To 13.50 A
Sig 1 Delta 100.0 mA
Sig 1 d/dt 125.0 mA/s
dt per Step 800.0 ms
Ramp Steps 11
Ramp Time 8.800s
Trigger Bin
Trigger Logic OR
Start 1
VCB Trip X
Step back No
Delay Time 0.00 s

Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 1 Start 0->1 I A, B, 13.00 A 13.00 A 100.0 mA 100.0 mA 0.00 A + 31.10
C
Assess: + .. Passed x .. Failed o .. Not assessed

33 / 80
 Ramp 1

Sig 1/A

12.95
12.90
12.85
12.80
12.75
12.70
12.65
12.60
12.55 t/s
0.5 1.0 1.5 2.0 2.5 3.0 3.5
12.50
I A, B, C

Start
VCB Trip

0.5 1.0 1.5 2.0 2.5 3.0 3.5

t/s

Test State:
Test passed

OC Droup Off RWB:

Test Settings

Ramp parameters
Outputs Quantity From To Δ TFault TReset Steps Duration
I A,I B,I C Magnitude 13.50 A 12.50 A -200.0 mA 1.000 s 100.0 ms 6 6.700 s

States
State Reset Fault
State State
IA 14.00 A 13.50 A
0.00 ° 0.00 °
50.00 Hz 50.00 Hz
IB 14.00 A 13.50 A
-120.00 ° -120.00 °
50.00 Hz 50.00 Hz
IC 14.00 A 13.50 A
120.00 ° 120.00 °
50.00 Hz 50.00 Hz

Test Module
Name: OMICRON Pulse Ramping Version: 4.31
Test Start: 21-Mar-2024 13:46:36 Test End: 21-Mar-2024 13:46:43
User Name: Manager:
Company:

Test Results

34 / 80
Threshold Assess on Nom Tol+ Tol- Act Dev Assess
Magnitude I A,I Start 1>0 13.00 A 100.0 mA 100.0 mA 12.90 A -100.0 mA +
B,I C
Assess: + .. Passed x .. Failed o .. Not assessed

Ramped output/A

13.9
13.8
13.7
13.6
13.5
13.4
13.3
13.2
13.1
13.0 t/s
0.5 1.0 1.5 2.0 2.5 3.0
12.9

IA IB IC

CMC256plus Current/A

15

10

0
0.5 1.0 1.5 2.0 2.5 3.0
-5 t/s

-10

-15

-20
IA IB IC

Start

0.5 1.0 1.5 2.0 2.5 3.0

t/s

Test State:
Test passed

35 / 80
Phase OC Trip Time:
Test Object - Overcurrent Parameters

General - Values:
TimeTolAbs: 0.04 s VT connection: n/a
TimeTolRel: 5.00 % CT starpoint connection: n/a
CurrentTolAbs: 0.05 Iref
CurrentTolRel: 5.00 %
Directional: No

Elements - Phase:
Active Name Tripping characteristic I Pick-up Time Reset Ratio Direction
Yes 50P1-Ph OC IEC Definite Time 3.50 Iref 0.28 s 0.95 Non Directional
Yes 50P2-Ph OC IEC Definite Time 13.00 Iref 0.00 s 0.95 Non Directional
Yes 51P -Ph TOC IEC Normal Inverse 0.84 Iref 1.00 0.95 Non Directional

Elements - Residual:
Active Name Tripping characteristic I Pick-up Time Reset Ratio Direction
Yes 50N1-R OC IEC Definite Time 0.50 Iref 0.00 s 0.95 Non Directional

Test Settings:
Shot Test:
Type Relative To Factor Magnitude Angle tnom tmin tmax
L1-L2 50P2-Ph OC 1.100 14.30 A -60.00 ° 0.00 s 0.00 s 40.00 ms
L2-L3 50P2-Ph OC 1.200 15.60 A -60.00 ° 0.00 s 0.00 s 40.00 ms
L3-L1 50P2-Ph OC 1.300 16.90 A -60.00 ° 0.00 s 0.00 s 40.00 ms
L1-L2 50P2-Ph OC 1.400 18.20 A -60.00 ° 0.00 s 0.00 s 40.00 ms
L2-L3 50P2-Ph OC 1.500 19.50 A -60.00 ° 0.00 s 0.00 s 40.00 ms
L3-L1 50P2-Ph OC 1.600 20.80 A -60.00 ° 0.00 s 0.00 s 40.00 ms
L1-L2-L3 50P2-Ph OC 1.700 22.10 A -60.00 ° 0.00 s 0.00 s 40.00 ms
L1-L2-L3 50P2-Ph OC 1.800 23.40 A -60.00 ° 0.00 s 0.00 s 40.00 ms
L1-L2-L3 50P2-Ph OC 1.866 24.25 A -60.00 ° 0.00 s 0.00 s 40.00 ms

Binary Inputs:
Trigger Logic: Or
Name Trigger State
VCB Trip 1

Shot Test Results:

Type Relative To Factor Magnitude Angle tnom tact Deviation Overload Result
L1-L2 50P2-Ph OC 1.100 14.30 A -60.00 ° 0.00 s 30.70 ms n/a No Passed
L2-L3 50P2-Ph OC 1.200 15.60 A -60.00 ° 0.00 s 30.90 ms n/a No Passed
L3-L1 50P2-Ph OC 1.300 16.90 A -60.00 ° 0.00 s 28.70 ms n/a No Passed
L1-L2 50P2-Ph OC 1.400 18.20 A -60.00 ° 0.00 s 26.30 ms n/a No Passed
L2-L3 50P2-Ph OC 1.500 19.50 A -60.00 ° 0.00 s 22.50 ms n/a No Passed
L3-L1 50P2-Ph OC 1.600 20.80 A -60.00 ° 0.00 s 24.80 ms n/a No Passed
L1-L2-L3 50P2-Ph OC 1.700 22.10 A -60.00 ° 0.00 s 20.90 ms n/a No Passed
L1-L2-L3 50P2-Ph OC 1.800 23.40 A -60.00 ° 0.00 s 21.70 ms n/a No Passed
L1-L2-L3 50P2-Ph OC 1.866 24.25 A -60.00 ° 0.00 s 18.70 ms n/a No Passed

Charts for Fault Types:

Angle
Type

L1-L2 -60.00 °

36 / 80
 10000.000
1000.000
100.000
10.000
t/s

1.000
0.100
0.010

1.0 2.0 3.0 5.0 7.0 10.0 20.0

I/A

Charts for Fault Types:

Angle
Type

L2-L3 -60.00 °

10000.000
1000.000
100.000
10.000
t/s

1.000
0.100
0.010

1.0 2.0 3.0 5.0 7.0 10.0 20.0

I/A

Charts for Fault Types:

Angle
Type

L3-L1 -60.00 °

10000.000
1000.000
100.000
10.000
t/s

1.000
0.100
0.010

1.0 2.0 3.0 5.0 7.0 10.0 20.0

I/A

Charts for Fault Types:

Angle
Type

L1-L2-L3 -60.00 °

37 / 80
 10000.000
1000.000
100.000
10.000
t/s

1.000
0.100
0.010

1.0 2.0 3.0 5.0 7.0 10.0 20.0

I/A

Test State:
9 out of 9 points tested.
9 points passed.
0 points failed.

Test passed

Group end:Element 2

Group end:Phase Overcurrent Protection

Group:Phase Time Overcurrent Protection

38 / 80
Phase Time Overcurrent Protection
OC Pickup RW:

Test Settings

General
No. of ramp states: 1
Total steps per test: 31
Total time per test: 24.800 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
I A, B / Magnitude

Ramp States
Ramp Ramp 1
IA 800.0 mA
0.00 °
50.000 Hz
IB 800.0 mA
-120.00 °
50.000 Hz
IC 0.00 A
120.00 °
50.000 Hz
Force abs. Phases No
Sig 1 From 800.0 mA
Sig 1 To 1.100 A
Sig 1 Delta 10.00 mA
Sig 1 d/dt 12.50 mA/s
dt per Step 800.0 ms
Ramp Steps 31
Ramp Time 24.800s
Trigger Bin
Trigger Logic OR
Start 1
Step back No
Delay Time 0.00 s

Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 1 Start 0->1 I A, B 840.0 mA 850.0 mA 50.00 mA 55.00 mA 10.00 mA + 9.600
Assess: + .. Passed x .. Failed o .. Not assessed

39 / 80
 Ramp 1

Sig 1/mA

845
840
835
830
825
820
815
810
805 t/s
0.5 1.0 1.5 2.0 2.5 3.0 3.5
800
I A, B

Start

0.5 1.0 1.5 2.0 2.5 3.0 3.5

t/s

Test State:
Test passed

OC Droup Off RW:

Test Settings

Ramp parameters
Outputs Quantity From To Δ TFault TReset Steps Duration
I A,I B Magnitude 900.0 mA 800.0 mA -10.00 mA 1.000 s 100.0 ms 11 12.20 s

States
State Reset Fault
State State
V A-N 63.51 V 63.51 V
0.00 ° 0.00 °
50.00 Hz 50.00 Hz
V B-N 63.51 V 63.51 V
-120.00 ° -120.00 °
50.00 Hz 50.00 Hz
V C-N 63.51 V 63.51 V
120.00 ° 120.00 °
50.00 Hz 50.00 Hz
IA 900.0 mA 900.0 mA
0.00 ° 0.00 °
50.00 Hz 50.00 Hz
IB 900.0 mA 900.0 mA
-120.00 ° -120.00 °
50.00 Hz 50.00 Hz
IC 900.0 mA 0.00 A
120.00 ° 120.00 °
50.00 Hz 50.00 Hz

Test Results

40 / 80
Threshold Assess on Nom Tol+ Tol- Act Dev Assess
Magnitude I A,I B Start 1>0 840.0 mA 50.00 mA 50.00 mA 840.0 mA 0.00 A +
Assess: + .. Passed x .. Failed o .. Not assessed

Ramped output/mA

890

880

870

860

850
t/s
1.0 2.0 3.0 4.0 5.0 6.0
840
IA IB

CMC256plus Voltage A/V

80
60
40
20 t/s
1.0 2.0 3.0 4.0 5.0 6.0
0
-20
-40
-60
-80

V A-N V B-N V C-N

CMC256plus Current A/A

1.00
0.75
0.50
t/s
0.25 1.0 2.0 3.0 4.0 5.0 6.0
0.00
-0.25
-0.50
-0.75
-1.00
-1.25

IA IB IC

Start

1.0 2.0 3.0 4.0 5.0 6.0

t/s

41 / 80
Test State:
Test passed

42 / 80
OC Pickup WB:

Test Settings

General
No. of ramp states: 1
Total steps per test: 36
Total time per test: 28.800 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
I B, C / Magnitude

Ramp States
Ramp Ramp 1
V A-N 63.50 V
0.00 °
50.000 Hz
V B-N 63.51 V
-120.00 °
50.000 Hz
V C-N 63.51 V
120.00 °
50.000 Hz
IA 0.00 A
0.00 °
50.000 Hz
IB 750.0 mA
-120.00 °
50.000 Hz
IC 750.0 mA
120.00 °
50.000 Hz
Force abs. Phases No
Sig 1 From 750.0 mA
Sig 1 To 1.100 A
Sig 1 Delta 10.00 mA
Sig 1 d/dt 12.50 mA/s
dt per Step 800.0 ms
Ramp Steps 36
Ramp Time 28.800s
Trigger Bin
Trigger Logic OR
Start 1
Step back No
Delay Time 0.00 s

Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 1 Start 0->1 I B, C 840.0 mA 840.0 mA 50.00 mA 55.00 mA 0.00 A + 776.1
Assess: + .. Passed x .. Failed o .. Not assessed

43 / 80
 Ramp 1

Sig 1/mA

830
820
810
800
790
780
770
760 t/s
1.0 2.0 3.0 4.0 5.0 6.0 7.0
750
I B, C

Start

1.0 2.0 3.0 4.0 5.0 6.0 7.0

t/s

Test State:
Test passed

OC Droup Off WB:

Test Settings

Ramp parameters
Outputs Quantity From To Δ TFault TReset Steps Duration
I B,I C Magnitude 900.0 mA 800.0 mA -10.00 mA 1.000 s 100.0 ms 11 12.20 s

States
State Reset Fault
State State
IA 1.000 A 0.00 A
0.00 ° 0.00 °
50.00 Hz 50.00 Hz
IB 1.000 A 900.0 mA
-120.00 ° -120.00 °
50.00 Hz 50.00 Hz
IC 1.000 A 900.0 mA
120.00 ° 120.00 °
50.00 Hz 50.00 Hz

Test Results
Threshold Assess on Nom Tol+ Tol- Act Dev Assess
Magnitude I B,I C Start 1>0 840.0 mA 50.00 mA 50.00 mA 840.0 mA 0.00 A +
Assess: + .. Passed x .. Failed o .. Not assessed

44 / 80
 Ramped output/A

0.98

0.96

0.94

0.92

0.90

0.88

0.86
t/s
1.0 2.0 3.0 4.0 5.0 6.0
0.84
IB IC

CMC256plus Current A/A

1.25
1.00
0.75
0.50
t/s
0.25 1.0 2.0 3.0 4.0 5.0 6.0
0.00
-0.25
-0.50
-0.75
-1.00
-1.25
-1.50
IA IB IC

Bin. out 1
Bin. out 2
Bin. out 3
Bin. out 4

1.0 2.0 3.0 4.0 5.0 6.0

t/s

Start

1.0 2.0 3.0 4.0 5.0 6.0

t/s

Test State:
Test passed

OC Pickup BR:

Test Settings
General
No. of ramp states: 1
Total steps per test: 31
Total time per test: 24.800 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
I C, A / Magnitude

45 / 80
Ramp States
Ramp Ramp 1
V A-N 63.50 V
0.00 °
50.000 Hz
V B-N 63.51 V
-120.00 °
50.000 Hz
V C-N 63.51 V
120.00 °
50.000 Hz
IA 800.0 mA
0.00 °
50.000 Hz
IB 0.00 A
-120.00 °
50.000 Hz
IC 800.0 mA
120.00 °
50.000 Hz
Force abs. Phases No
Sig 1 From 800.0 mA
Sig 1 To 1.100 A
Sig 1 Delta 10.00 mA
Sig 1 d/dt 12.50 mA/s
dt per Step 800.0 ms
Ramp Steps 31
Ramp Time 24.800s
Trigger Bin
Trigger Logic OR
Start 1
VCB Trip X
Step back No
Delay Time 0.00 s

Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 1 Start 0->1 I C, A 840.0 mA 850.0 mA 50.00 mA 55.00 mA 10.00 mA + 14.50
Assess: + .. Passed x .. Failed o .. Not assessed

Ramp 1

Sig 1/mA

845
840
835
830
825
820
815
810
805 t/s
0.5 1.0 1.5 2.0 2.5 3.0 3.5
800
I C, A

46 / 80
 Ramp 1

Start
VCB Trip

0.5 1.0 1.5 2.0 2.5 3.0 3.5

t/s

Test State:
Test passed

47 / 80
OC Droup Off BR:
Test Settings

Ramp parameters
Outputs Quantity From To Δ TFault TReset Steps Duration
I C,I A Magnitude 900.0 mA 800.0 mA -10.00 mA 1.000 s 100.0 ms 11 12.20 s

States
State Reset Fault
State State
IA 1.000 A 900.0 mA
0.00 ° 0.00 °
50.00 Hz 50.00 Hz
IB 1.000 A 0.00 A
-120.00 ° -120.00 °
50.00 Hz 50.00 Hz
IC 1.000 A 900.0 mA
120.00 ° 120.00 °
50.00 Hz 50.00 Hz

Test Results
Threshold Assess on Nom Tol+ Tol- Act Dev Assess
Magnitude I C,I A Start 1>0 840.0 mA 50.00 mA 50.00 mA 840.0 mA 0.00 A +
Assess: + .. Passed x .. Failed o .. Not assessed

Ramped output/A

0.98

0.96

0.94

0.92

0.90

0.88

0.86
t/s
1.0 2.0 3.0 4.0 5.0 6.0
0.84
IC IA

CMC256plus Current A/A

1.25
1.00
0.75
0.50
t/s
0.25 1.0 2.0 3.0 4.0 5.0 6.0
0.00
-0.25
-0.50
-0.75
-1.00
-1.25
-1.50
IA IB IC

48 / 80
 Bin. out 1
Bin. out 2
Bin. out 3
Bin. out 4

1.0 2.0 3.0 4.0 5.0 6.0

t/s

Start

1.0 2.0 3.0 4.0 5.0 6.0

t/s

Test State:
Test passed

OC Pickup RWB:

Test Settings
General
No. of ramp states: 1
Total steps per test: 31
Total time per test: 24.800 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
I A, B, C / Magnitude

Ramp States
Ramp Ramp 1
V A-N 63.50 V
0.00 °
50.000 Hz
V B-N 63.51 V
-120.00 °
50.000 Hz
V C-N 63.51 V
120.00 °
50.000 Hz
IA 800.0 mA
0.00 °
50.000 Hz
IB 800.0 mA
-120.00 °
50.000 Hz
IC 800.0 mA
120.00 °
50.000 Hz
Force abs. Phases No
Sig 1 From 800.0 mA
Sig 1 To 1.100 A
Sig 1 Delta 10.00 mA
Sig 1 d/dt 12.50 mA/s
dt per Step 800.0 ms
Ramp Steps 31
Ramp Time 24.800s
Trigger Bin
Trigger Logic OR

49 / 80
Start 1
VCB Trip X
Step back No
Delay Time 0.00 s

Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 1 Start 0->1 I A, B, 840.0 mA 850.0 mA 50.00 mA 55.00 mA 10.00 mA + 17.20
C
Assess: + .. Passed x .. Failed o .. Not assessed

Ramp 1

Sig 1/mA

845
840
835
830
825
820
815
810
805 t/s
0.5 1.0 1.5 2.0 2.5 3.0 3.5
800
I A, B, C

Start
VCB Trip

0.5 1.0 1.5 2.0 2.5 3.0 3.5

t/s

Test State:
Test passed

OC Droup Off RWB:

Test Settings

Ramp parameters
Outputs Quantity From To Δ TFault TReset Steps Duration
I A,I B,I C Magnitude 900.0 mA 800.0 mA -10.00 mA 1.000 s 100.0 ms 11 12.20 s

States
State Reset Fault
State State
IA 1.000 A 900.0 mA
0.00 ° 0.00 °
50.00 Hz 50.00 Hz
IB 1.000 A 900.0 mA
-120.00 ° -120.00 °
50.00 Hz 50.00 Hz
IC 1.000 A 900.0 mA
120.00 ° 120.00 °
50.00 Hz 50.00 Hz

50 / 80
Test Results
Threshold Assess on Nom Tol+ Tol- Act Dev Assess
Magnitude I A,I Start 1>0 840.0 mA 50.00 mA 50.00 mA 840.0 mA 0.00 A +
B,I C
Assess: + .. Passed x .. Failed o .. Not assessed

Ramped output/A

0.98

0.96

0.94

0.92

0.90

0.88

0.86
t/s
1.0 2.0 3.0 4.0 5.0 6.0
0.84
IA IB IC

CMC256plus Current A/A

1.25
1.00
0.75
0.50
t/s
0.25 1.0 2.0 3.0 4.0 5.0 6.0
0.00
-0.25
-0.50
-0.75
-1.00
-1.25
-1.50
IA IB IC

Bin. out 1
Bin. out 2
Bin. out 3
Bin. out 4

1.0 2.0 3.0 4.0 5.0 6.0

t/s

Start

1.0 2.0 3.0 4.0 5.0 6.0

t/s

Test State:
Test passed

Phase Time OC Trip Time:

Test Object - Overcurrent Parameters
General - Values:
TimeTolAbs: 0.04 s VT connection: n/a
TimeTolRel: 5.00 % CT starpoint connection: n/a
CurrentTolAbs: 0.05 Iref
CurrentTolRel: 5.00 %
Directional: No

51 / 80
Elements - Phase:
Active Name Tripping characteristic I Pick-up Time Reset Ratio Direction
Yes 50P1-Ph OC IEC Definite Time 3.50 Iref 0.28 s 0.95 Non Directional
Yes 50P2-Ph OC IEC Definite Time 13.00 Iref 0.00 s 0.95 Non Directional
Yes 51P -Ph TOC IEC Normal Inverse 0.84 Iref 1.00 0.95 Non Directional

Elements - Residual:
Active Name Tripping characteristic I Pick-up Time Reset Ratio Direction
Yes 50N1-R OC IEC Definite Time 0.50 Iref 0.00 s 0.95 Non Directional

Test Settings:
Shot Test:
Type Relative To Factor Magnitude Angle tnom tmin tmax
L1-L2 51P -Ph TOC 1.100 924.0 mA -60.00 ° 73.37 s 44.86 s 185.2 s
L2-L3 51P -Ph TOC 1.200 1.008 A -60.00 ° 38.32 s 28.40 s 55.84 s
L3-L1 51P -Ph TOC 1.300 1.092 A -60.00 ° 26.61 s 21.14 s 34.34 s
L1-L2 51P -Ph TOC 1.500 1.260 A -60.00 ° 17.19 s 14.49 s 20.53 s
L2-L3 51P -Ph TOC 1.600 1.344 A -60.00 ° 14.82 s 12.69 s 17.38 s
L3-L1 51P -Ph TOC 1.700 1.428 A -60.00 ° 13.12 s 11.36 s 15.18 s
L1-L2-L3 51P -Ph TOC 2.000 1.680 A -60.00 ° 10.03 s 8.867 s 11.33 s
L1-L2-L3 51P -Ph TOC 2.400 2.016 A -60.00 ° 7.926 s 7.109 s 8.818 s
L1-L2-L3 51P -Ph TOC 2.700 2.268 A -60.00 ° 6.978 s 6.300 s 7.709 s
L1-L2-L3 51P -Ph TOC 3.000 2.520 A -60.00 ° 6.302 s 5.717 s 6.928 s

Binary Inputs:
Trigger Logic: Or
Name Trigger State
VCB Trip 1

Shot Test Results:

Type Relative To Factor Magnitude Angle tnom tact Deviation Overload Result
L1-L2 51P -Ph TOC 1.100 924.0 mA -60.00 ° 73.37 s 76.57 s 4.351 % No Passed
L2-L3 51P -Ph TOC 1.200 1.008 A -60.00 ° 38.32 s 39.17 s 2.215 % No Passed
L3-L1 51P -Ph TOC 1.300 1.092 A -60.00 ° 26.61 s 26.99 s 1.432 % No Passed
L1-L2 51P -Ph TOC 1.500 1.260 A -60.00 ° 17.19 s 17.31 s 0.6798 % No Passed
L2-L3 51P -Ph TOC 1.600 1.344 A -60.00 ° 14.82 s 14.93 s 0.6860 % No Passed
L3-L1 51P -Ph TOC 1.700 1.428 A -60.00 ° 13.12 s 13.21 s 0.6780 % No Passed
L1-L2-L3 51P -Ph TOC 2.000 1.680 A -60.00 ° 10.03 s 10.10 s 0.6708 % No Passed
L1-L2-L3 51P -Ph TOC 2.400 2.016 A -60.00 ° 7.926 s 7.978 s 0.6520 % No Passed
L1-L2-L3 51P -Ph TOC 2.700 2.268 A -60.00 ° 6.978 s 7.020 s 0.6092 % No Passed
L1-L2-L3 51P -Ph TOC 3.000 2.520 A -60.00 ° 6.302 s 6.338 s 0.5708 % No Passed

Charts for Fault Types:

Angle
Type

L1-L2 -60.00 °

52 / 80
 10000.000
1000.000
100.000
10.000
t/s

1.000
0.100
0.010

1.0 2.0 3.0 5.0 7.0 10.0 20.0

I/A

Charts for Fault Types:

Angle
Type

L2-L3 -60.00 °

10000.000
1000.000
100.000
10.000
t/s

1.000
0.100
0.010

1.0 2.0 3.0 5.0 7.0 10.0 20.0

I/A

Charts for Fault Types:

Angle
Type

L3-L1 -60.00 °

10000.000
1000.000
100.000
10.000
t/s

1.000
0.100
0.010

1.0 2.0 3.0 5.0 7.0 10.0 20.0

I/A

Charts for Fault Types:

Angle
Type

L1-L2-L3 -60.00 °

53 / 80
 10000.000
1000.000
100.000
10.000
t/s

1.000
0.100
0.010

1.0 2.0 3.0 5.0 7.0 10.0 20.0

I/A

Test State:
10 out of 10 points tested.
10 points passed.
0 points failed.

Test passed

Group end:Phase Time Overcurrent Protection

Group:Neutral Overcurrent Protection

54 / 80
Neutral Overcurrent Protection
Neutral OC Pickup / Droup Off:

Test Settings

General
No. of ramp states: 2
Total steps per test: 27
Total time per test: 21.600 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
I(2)-1 / Magnitude

Ramp States
Ramp Ramp 1 Ramp 2
I(2)-1 400.0 mA 600.0 mA
0.00 ° 0.00 °
50.000 Hz 50.000 Hz
Force abs. Phases Yes Yes
Sig 1 From 400.0 mA 600.0 mA
Sig 1 To 600.0 mA 300.0 mA
Sig 1 Delta 20.00 mA -20.00 mA
Sig 1 d/dt 25.00 mA/s -25.00 mA/s
dt per Step 800.0 ms 800.0 ms
Ramp Steps 11 16
Ramp Time 8.800s 12.800s
Trigger Bin Bin
Trigger Logic OR OR
Start 1 0
Step back No No
Delay Time 0.00 s 0.00 s

Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 1 Start 0->1 I(2)-1 500.0 mA 520.0 mA 50.00 mA 50.00 mA 20.00 mA + 12.00
Drop-off Ramp 2 Start 1->0 I(2)-1 475.0 mA 520.0 mA 50.00 mA 50.00 mA 45.00 mA + 1.500
Assess: + .. Passed x .. Failed o .. Not assessed

55 / 80
 Ramp 1 Ramp 2

Sig 1/mA

510
500
490
480
470
460
450
440
430
420
410 t/s
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
400
I(2)-1

Start

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

t/s

Test State:
Test passed

Neutral OC Trip Time:

Test Object - Overcurrent Parameters

General - Values:
TimeTolAbs: 0.04 s VT connection: n/a
TimeTolRel: 5.00 % CT starpoint connection: n/a
CurrentTolAbs: 0.05 Iref
CurrentTolRel: 5.00 %
Directional: No

Elements - Phase:
Active Name Tripping characteristic I Pick-up Time Reset Ratio Direction
Yes 50P1-Ph OC IEC Definite Time 3.50 Iref 0.28 s 0.95 Non Directional
Yes 50P2-Ph OC IEC Definite Time 13.00 Iref 0.00 s 0.95 Non Directional
Yes 51P -Ph TOC IEC Normal Inverse 0.84 Iref 1.00 0.95 Non Directional

Elements - Residual:
Active Name Tripping characteristic I Pick-up Time Reset Ratio Direction
Yes 50N1-R OC IEC Definite Time 0.50 Iref 0.00 s 0.95 Non Directional

Test Settings:

56 / 80
Shot Test:
Type Relative To Factor Magnitude Angle tnom tmin tmax
L1-E 50N1-R OC 1.100 550.0 mA n/a 0.00 s 0.00 s No trip
L1-E 50N1-R OC 1.200 600.0 mA n/a 0.00 s 0.00 s 40.00 ms
L1-E 50N1-R OC 1.300 650.0 mA n/a 0.00 s 0.00 s 40.00 ms
L1-E 50N1-R OC 2.000 1.000 A n/a 0.00 s 0.00 s 40.00 ms
L1-E 50N1-R OC 2.200 1.100 A n/a 0.00 s 0.00 s 40.00 ms
L1-E 50N1-R OC 2.500 1.250 A n/a 0.00 s 0.00 s 40.00 ms
L1-E 50N1-R OC 3.000 1.500 A n/a 0.00 s 0.00 s 40.00 ms
L1-E 50N1-R OC 3.300 1.650 A n/a 0.00 s 0.00 s 40.00 ms
L1-E 50N1-R OC 3.800 1.900 A n/a 0.00 s 0.00 s 40.00 ms

Binary Inputs:
Trigger Logic: And
Name Trigger State
VCB Trip 1

Shot Test Results:

Type Relative To Factor Magnitude Angle tnom tact Deviation Overload Result
L1-E 50N1-R OC 1.100 550.0 mA n/a 0.00 s 31.00 ms n/a No Passed
L1-E 50N1-R OC 1.200 600.0 mA n/a 0.00 s 29.40 ms n/a No Passed
L1-E 50N1-R OC 1.300 650.0 mA n/a 0.00 s 32.20 ms n/a No Passed
L1-E 50N1-R OC 2.000 1.000 A n/a 0.00 s 22.50 ms n/a No Passed
L1-E 50N1-R OC 2.200 1.100 A n/a 0.00 s 19.80 ms n/a No Passed
L1-E 50N1-R OC 2.500 1.250 A n/a 0.00 s 18.60 ms n/a No Passed
L1-E 50N1-R OC 3.000 1.500 A n/a 0.00 s 19.60 ms n/a No Passed
L1-E 50N1-R OC 3.300 1.650 A n/a 0.00 s 19.00 ms n/a No Passed
L1-E 50N1-R OC 3.800 1.900 A n/a 0.00 s 12.30 ms n/a No Passed

Charts for Fault Types:

Angle
Type

L1-E n/a

10000.000
1000.000
100.000
10.000
t/s

1.000
0.100
0.010

0.5 0.7 1.0 2.0 3.0 5.0 7.0 10.0 20.0

I/A

Test State:
9 out of 9 points tested.
9 points passed.
0 points failed.

Test passed

Group end:Neutral Overcurrent Protection

57 / 80
Group:Over Voltage Protection
Over Voltage Protection
Over Voltage Stage 1 Pickup / Droup-off:

Test Settings

General
No. of ramp states: 2
Total steps per test: 27
Total time per test: 2.700 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
V A-N, B-N, C-N / Magnitude

Ramp States
Ramp Ramp 1 Ramp 2
V A-N 63.50 V 70.00 V
0.00 ° 0.00 °
50.000 Hz 50.000 Hz
V B-N 63.50 V 70.00 V
-120.00 ° -120.00 °
50.000 Hz 50.000 Hz
V C-N 63.50 V 70.00 V
120.00 ° 120.00 °
50.000 Hz 50.000 Hz
Force abs. Phases No No
Sig 1 From 63.50 V 70.00 V
Sig 1 To 70.00 V 63.00 V
Sig 1 Delta 500.0 mV -635.0 mV
Sig 1 d/dt 5.000 V/s -6.350 V/s
dt per Step 100.0 ms 100.0 ms
Ramp Steps 14 13
Ramp Time 1.400s 1.300s
Trigger Bin Bin
Trigger Logic OR OR
Start 1 0
VCB Trip X X
Step back No No
Delay Time 0.00 s 0.00 s

Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 1 Start 0->1 V A-N, 67.32 V 67.50 V 2.000 V 2.000 V 180.0 mV + 21.10
B-N,
C-N
Drop-off Ramp 2 Start 1->0 V A-N, 66.00 V 66.83 V 2.000 V 2.000 V 825.0 mV + 20.30
B-N,
C-N
Assess: + .. Passed x .. Failed o .. Not assessed

58 / 80
 Ramp 1 Ramp 2

Sig 1/V

67.5
67.0
66.5
66.0
65.5
65.0
64.5
64.0 t/s
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
63.5
V A-N, B-N, C-N

Start
VCB Trip

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
t/s

Test State:
Test passed

Over Voltage Stage 1 Trip test:

Test Settings
State Over Post
Pre Fault
Voltage Fault
V A-N 63.50 V 69.00 V 0.00 V
0.00 ° 0.00 ° 0.00 °
50.000 Hz 50.000 Hz 50.000 Hz
V B-N 63.50 V 69.00 V 0.00 V
-120.00 ° -120.00 ° -120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
V C-N 63.50 V 69.00 V 0.00 V
120.00 ° 120.00 ° 120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IA 100.0 mA 100.0 mA 0.00 A
0.00 ° 0.00 ° 0.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IB 100.0 mA 100.0 mA 0.00 A
-120.00 ° -120.00 ° -120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IC 100.0 mA 100.0 mA 0.00 A
120.00 ° 120.00 ° 120.00 °
50.000 Hz 50.000 Hz 50.000 Hz

Test Results

Time Assessment
Ignore
Name Start Stop Tnom Tdev- Tdev+ Tact Tdev Assess
before
OV Stage Over Over VCB Trip 10.00 s 2.000 s 2.000 s 10.04 s 38.40 ms +
1 Voltage Voltage 0>1
Assess: + .. Passed x .. Failed o .. Not assessed

59 / 80
Test State:
Test passed

Over Voltage Stage 2 Pickup / Droup-off:

Test Settings
General
No. of ramp states: 2
Total steps per test: 34
Total time per test: 3.400 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
V A-N, B-N, C-N / Magnitude

Ramp States
Ramp Ramp 1 Ramp 2
V A-N 63.50 V 72.00 V
0.00 ° 0.00 °
50.000 Hz 50.000 Hz
V B-N 63.50 V 72.00 V
-120.00 ° -120.00 °
50.000 Hz 50.000 Hz
V C-N 63.50 V 72.00 V
120.00 ° 120.00 °
50.000 Hz 50.000 Hz
Force abs. Phases No No
Sig 1 From 63.50 V 72.00 V
Sig 1 To 72.00 V 63.00 V
Sig 1 Delta 500.0 mV -635.0 mV
Sig 1 d/dt 5.000 V/s -6.350 V/s
dt per Step 100.0 ms 100.0 ms
Ramp Steps 18 16
Ramp Time 1.800s 1.600s
Trigger Bin Bin
Trigger Logic OR OR
Start 1 0
VCB Trip X X
Step back No No
Delay Time 0.00 s 0.00 s

Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 1 Start 0->1 V A-N, 69.86 V 70.00 V 2.000 V 2.000 V 140.0 mV + 21.40
B-N,
C-N
Drop-off Ramp 2 Start 1->0 V A-N, 69.00 V 69.46 V 2.000 V 2.000 V 460.0 mV + 21.20
B-N,
C-N
Assess: + .. Passed x .. Failed o .. Not assessed

60 / 80
 Ramp 1 Ramp 2

Sig 1/V

69.0

68.0

67.0

66.0

65.0

64.0 t/s
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4

V A-N, B-N, C-N

Start
VCB Trip

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4
t/s

Test State:
Test passed

Over Voltage Stage 2 Trip test:

Test Settings
State Over Post
Pre Fault
Voltage Fault
V A-N 63.50 V 70.00 V 0.00 V
0.00 ° 0.00 ° 0.00 °
50.000 Hz 50.000 Hz 50.000 Hz
V B-N 63.50 V 70.00 V 0.00 V
-120.00 ° -120.00 ° -120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
V C-N 63.50 V 70.00 V 0.00 V
120.00 ° 120.00 ° 120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IA 100.0 mA 100.0 mA 0.00 A
0.00 ° 0.00 ° 0.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IB 100.0 mA 100.0 mA 0.00 A
-120.00 ° -120.00 ° -120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IC 100.0 mA 100.0 mA 0.00 A
120.00 ° 120.00 ° 120.00 °
50.000 Hz 50.000 Hz 50.000 Hz

Test Results

Time Assessment
Ignore
Name Start Stop Tnom Tdev- Tdev+ Tact Tdev Assess
before
OV Stage Over Over VCB Trip 2.000 s 100.0 ms 100.0 ms 2.034 s 34.20 ms +
1 Voltage Voltage 0>1
Assess: + .. Passed x .. Failed o .. Not assessed

61 / 80
Test State:
Test passed

Over Voltage Stage 1 Blocked:

Test Settings
State Over
Voltage
With VT Pause Over Post
Pre Fault
MCB Off Module Voltage Fault
(UV
Blocked)
V A-N 63.51 V 68.00 V 0.00 V 68.00 V 0.00 V
0.00 ° 0.00 ° 0.00 ° 0.00 ° 0.00 °
50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz
V B-N 63.51 V 68.00 V 0.00 V 68.00 V 0.00 V
-120.00 ° -120.00 ° -120.00 ° -120.00 ° -120.00 °
50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz
V C-N 63.51 V 68.00 V 0.00 V 68.00 V 0.00 V
120.00 ° 120.00 ° 120.00 ° 120.00 ° 120.00 °
50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz
IA 0.00 A 100.0 mA 0.00 A 100.0 mA 0.00 A
0.00 ° 0.00 ° 0.00 ° 0.00 ° 0.00 °
50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz
IB 0.00 A 100.0 mA 0.00 A 100.0 mA 0.00 A
-120.00 ° -120.00 ° -120.00 ° -120.00 ° -120.00 °
50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz
IC 0.00 A 100.0 mA 0.00 A 100.0 mA 0.00 A
120.00 ° 120.00 ° 120.00 ° 120.00 ° 120.00 °
50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz

Test Results

Time Assessment
Ignore
Name Start Stop Tnom Tdev- Tdev+ Tact Tdev Assess
before
OV Pre Fault Over Pause 12.00 s 1.000 s 1.000 s 12.00 s 0.00 s +
Stagge Voltage Module
1Blocked With VT
MCB Off
(UV
Blocked)
Over Pre Fault Over VCB Trip 10.00 s 1.000 s 1.000 s 10.04 s 43.60 ms +
Voltage Voltage 0>1
Assess: + .. Passed x .. Failed o .. Not assessed

Test State:
Test passed

Over Voltage Stage 2 Blocked:

62 / 80
Test Settings
State Over
Voltage
With VT Pause Over Post
Pre Fault
MCB Off Module Voltage Fault
(UV
Blocked)
V A-N 63.51 V 70.00 V 0.00 V 70.00 V 0.00 V
0.00 ° 0.00 ° 0.00 ° 0.00 ° 0.00 °
50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz
V B-N 63.51 V 70.00 V 0.00 V 70.00 V 0.00 V
-120.00 ° -120.00 ° -120.00 ° -120.00 ° -120.00 °
50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz
V C-N 63.51 V 70.00 V 0.00 V 70.00 V 0.00 V
120.00 ° 120.00 ° 120.00 ° 120.00 ° 120.00 °
50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz
IA 0.00 A 100.0 mA 0.00 A 100.0 mA 0.00 A
0.00 ° 0.00 ° 0.00 ° 0.00 ° 0.00 °
50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz
IB 0.00 A 100.0 mA 0.00 A 100.0 mA 0.00 A
-120.00 ° -120.00 ° -120.00 ° -120.00 ° -120.00 °
50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz
IC 0.00 A 100.0 mA 0.00 A 100.0 mA 0.00 A
120.00 ° 120.00 ° 120.00 ° 120.00 ° 120.00 °
50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz

Test Results

Time Assessment
Ignore
Name Start Stop Tnom Tdev- Tdev+ Tact Tdev Assess
before
OV Pre Fault Over Pause 5.000 s 1.000 s 1.000 s 5.000 s 0.00 s +
Stagge Voltage Module
1Blocked With VT
MCB Off
(UV
Blocked)
Over Pre Fault Over VCB Trip 2.000 s 1.000 s 1.000 s 2.031 s 31.00 ms +
Voltage Voltage 0>1
Assess: + .. Passed x .. Failed o .. Not assessed

Test State:
Test passed

Group end:Over Voltage Protection

Group:Arc Flash

63 / 80
Arc Flash Protection
Hardware Configuration

Test Equipment
Type Serial Number
CMC256plus PL273Q

Hardware Check
Performed At Result Details
21/03/2024 1:49:47 Passed
PM

Pause Module
Instruction Text:
TOL5 - Cable Compartment
TOL6 - CB Compartment
TOL7 - Bus Bar compartment - not Accessible

User Input:

Test State: Continue

Arc Flash Pickup / Drop-off - RE:

Test Settings
General
No. of ramp states: 3
Total steps per test: 8003
Total time per test: 45.010 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
I A / Magnitude

Ramp States
Ramp Ramp 1 Ramp 2 Ramp 3
IA 100.0 mA 100.0 mA 300.0 mA
0.00 ° 0.00 ° 0.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IB 0.00 A 0.00 A 0.00 A
-120.00 ° -120.00 ° -120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IC 0.00 A 0.00 A 0.00 A
120.00 ° 120.00 ° 120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
Force abs. Phases No No No
Sig 1 From 100.0 mA 100.0 mA 300.0 mA
Sig 1 To 100.0 mA 300.0 mA 100.0 mA
Sig 1 Delta 0.00 A 50.00 μA -50.00 μA
Sig 1 d/dt 0.00 A/s 10.00 mA/s -10.00 mA/s

64 / 80
Arc flash initiator 0 1 1
dt per Step 5.000 s 5.000 ms 5.000 ms
Ramp Steps 1 4001 4001
Ramp Time 5.000s 20.005s 20.005s
Trigger None Bin Bin
Trigger Logic OR OR
Start 1 0
Step back No No No
Delay Time 0.00 s 0.00 s 0.00 s

Test Results
Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 2 Start 0->1 IA 200.0 mA 195.6 mA 20.00 mA 20.00 mA -4.400 mA + 700.0
Droup off Ramp 3 Start 1->0 IA 200.0 mA 192.8 mA 20.00 mA 20.00 mA -7.200 mA + 4.300
Assess: + .. Passed x .. Failed o .. Not assessed

Ramp 1 Ramp 2 Ramp 3

Sig 1/mA
190
180
170
160
150
140
130
120
110 t/s
1 2 3 4 5 6 7 8 9 10 11 12 13 14
100
IA

Arc flash initiator

1 2 3 4 5 6 7 8 9 10 11 12 13 14
t/s

Start

1 2 3 4 5 6 7 8 9 10 11 12 13 14
t/s

Test State:
Test passed

Arc Flash Pickup / Drop-off - RW:

Test Settings

65 / 80
General
No. of ramp states: 3
Total steps per test: 8003
Total time per test: 45.010 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
I A, B / Magnitude

Ramp States
Ramp Ramp 1 Ramp 2 Ramp 3
IA 100.0 mA 100.0 mA 300.0 mA
0.00 ° 0.00 ° 0.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IB 100.0 mA 100.0 mA 300.0 mA
-120.00 ° -120.00 ° -120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IC 0.00 A 0.00 A 0.00 A
120.00 ° 120.00 ° 120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
Force abs. Phases No No No
Sig 1 From 100.0 mA 100.0 mA 300.0 mA
Sig 1 To 100.0 mA 300.0 mA 100.0 mA
Sig 1 Delta 0.00 A 50.00 μA -50.00 μA
Sig 1 d/dt 0.00 A/s 10.00 mA/s -10.00 mA/s
Arc flash initiator 0 1 1
dt per Step 5.000 s 5.000 ms 5.000 ms
Ramp Steps 1 4001 4001
Ramp Time 5.000s 20.005s 20.005s
Trigger None Bin Bin
Trigger Logic OR OR
Start 1 0
Step back No No No
Delay Time 0.00 s 0.00 s 0.00 s

Test Results
Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 2 Start 0->1 I A, B 200.0 mA 141.5 mA 60.00 mA 60.00 mA -58.50 mA + 2.600
Assess: + .. Passed x .. Failed o .. Not assessed

66 / 80
 Ramp 1 Ramp 2 Ramp 3

Sig 1/mA

135

130

125

120

115

110

105 t/s
1 2 3 4 5 6 7 8
100
I A, B

Arc flash initiator

1 2 3 4 5 6 7 8
t/s

Start

1 2 3 4 5 6 7 8
t/s

Test State:
Test passed

Arc Flash Pickup / Drop-off - RWB:

Test Settings

General
No. of ramp states: 3
Total steps per test: 8003
Total time per test: 45.010 s
No. of test executions: 1

Input Mode: Direct

Fault Type:

Ramped Quantities
I A, B, C / Magnitude

Ramp States
Ramp Ramp 1 Ramp 2 Ramp 3
IA 100.0 mA 100.0 mA 300.0 mA
0.00 ° 0.00 ° 0.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IB 100.0 mA 100.0 mA 300.0 mA
-120.00 ° -120.00 ° -120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IC 100.0 mA 100.0 mA 300.0 mA
120.00 ° 120.00 ° 120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
Force abs. Phases No No No
Sig 1 From 100.0 mA 100.0 mA 300.0 mA

67 / 80
Sig 1 To 100.0 mA 300.0 mA 100.0 mA
Sig 1 Delta 0.00 A 50.00 μA -50.00 μA
Sig 1 d/dt 0.00 A/s 10.00 mA/s -10.00 mA/s
Arc flash initiator 0 1 1
dt per Step 5.000 s 5.000 ms 5.000 ms
Ramp Steps 1 4001 4001
Ramp Time 5.000s 20.005s 20.005s
Trigger None Bin Bin
Trigger Logic OR OR
Start 1 0
Step back No No No
Delay Time 0.00 s 0.00 s 0.00 s

Test Results
Assessment Results
Name/ Exec. Ramp Condition Sig Nom. Act. Tol.- Tol.+ Dev. Assess Tact
Pick-up Ramp 2 Start 0->1 I A, B, 200.0 mA 198.1 mA 20.00 mA 20.00 mA -1.900 mA + 1.000
C
Assess: + .. Passed x .. Failed o .. Not assessed

Ramp 1 Ramp 2 Ramp 3

Sig 1/mA

190
180
170
160
150
140
130
120
110 t/s
1 2 3 4 5 6 7 8 9 10 11 12 13 14
100
I A, B, C

Arc flash initiator

1 2 3 4 5 6 7 8 9 10 11 12 13 14
t/s

Start

1 2 3 4 5 6 7 8 9 10 11 12 13 14
t/s

Test State:
Test passed

ArcFlash Trip Time Test-RE:

Test Settings
State Arc Flash Post
Pre Fault
Fault Fault
IA 100.0 mA 210.0 mA 0.00 A
0.00 ° 0.00 ° 0.00 °
50.000 Hz 50.000 Hz 50.000 Hz

68 / 80
IB 100.0 mA 0.00 A 0.00 A
-120.00 ° -120.00 ° -120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IC 100.0 mA 0.00 A 0.00 A
120.00 ° 120.00 ° 120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
Arc flash 1 1 0
initiator
Max. State Time 5.000 s 1.000 s 2.000 s
Trigger Logic AND
VCB Trip 1
User interaction no no no
CMGPS trigger no no no
IRIG-B/PTP no no no
trigger
Pulses / 1 1 1
seconds
Delay after Tr. 0.00 s 0.00 s 0.00 s
On trigger jump no no no
to test end

Test Results

Time Assessment
Ignore
Name Start Stop Tnom Tdev- Tdev+ Tact Tdev Assess
before
Arc Flash Arc Flash Arc Flash VCB Trip 20.00 ms 20.00 ms 20.00 ms 20.20 ms 200.0 μs +
Fault Trip Fault Fault 0>1
Assess: + .. Passed x .. Failed o .. Not assessed

Post Fault
Arc Flash Fault

CMC256plus I A/A

1.5

1.0

0.5 t/s
4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10
0.0
-0.5

-1.0

-1.5

-2.0

IA IB IC

Arc flash initiator

4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10
t/s

VCB Trip

4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10
t/s

69 / 80
Test State:
Test passed

ArcFlash Trip Time Test-RW:

Test Settings
State Arc Flash Post
Pre Fault
Fault Fault
IA 100.0 mA 210.0 mA 0.00 A
0.00 ° 0.00 ° 0.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IB 100.0 mA 210.0 mA 0.00 A
-120.00 ° -120.00 ° -120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IC 100.0 mA 0.00 A 0.00 A
120.00 ° 120.00 ° 120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
Arc flash 0 1 0
initiator
Max. State Time 5.000 s 1.000 s 2.000 s
Trigger Logic AND
VCB Trip 1
User interaction no no no
CMGPS trigger no no no
IRIG-B/PTP no no no
trigger
Pulses / 1 1 1
seconds
Delay after Tr. 0.00 s 0.00 s 0.00 s
On trigger jump no no no
to test end

Test Results
Time Assessment
Ignore
Name Start Stop Tnom Tdev- Tdev+ Tact Tdev Assess
before
Arc Flash Arc Flash Arc Flash VCB Trip 20.00 ms 20.00 ms 20.00 ms 7.300 ms -12.70 ms +
Fault Trip Fault Fault 0>1
Assess: + .. Passed x .. Failed o .. Not assessed

70 / 80
 Post Fault
Arc Flash Fault

CMC256plus I A/A

1.5

1.0

0.5 t/s
4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10
0.0

-0.5

-1.0

-1.5

-2.0

IA IB IC

Arc flash initiator

4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10
t/s

VCB Trip

4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10
t/s

Test State:
Test passed

71 / 80
ArcFlash Trip Time Test-RWB:

Test Settings
State Arc Flash Post
Pre Fault
Fault Fault
IA 100.0 mA 210.0 mA 0.00 A
0.00 ° 0.00 ° 0.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IB 100.0 mA 210.0 mA 0.00 A
-120.00 ° -120.00 ° -120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IC 100.0 mA 210.0 mA 0.00 A
120.00 ° 120.00 ° 120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
Arc flash 0 1 0
initiator
Max. State Time 5.000 s 1.000 s 2.000 s
Trigger Logic AND
VCB Trip 1
User interaction no no no
CMGPS trigger no no no
IRIG-B/PTP no no no
trigger
Pulses / 1 1 1
seconds
Delay after Tr. 0.00 s 0.00 s 0.00 s
On trigger jump no no no
to test end

Test Results

Time Assessment
Ignore
Name Start Stop Tnom Tdev- Tdev+ Tact Tdev Assess
before
Arc Flash Arc Flash Arc Flash VCB Trip 20.00 ms 20.00 ms 20.00 ms 10.80 ms -9.200 ms +
Fault Trip Fault Fault 0>1
Assess: + .. Passed x .. Failed o .. Not assessed

Post Fault
Arc Flash Fault

CMC256plus I A/A

1.5

1.0

0.5 t/s
4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10
0.0

-0.5

-1.0

-1.5

-2.0

IA IB IC

72 / 80
 Post Fault
Arc Flash Fault

Arc flash initiator

4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10
t/s

VCB Trip

4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10
t/s

Test State:
Test passed

ArcFlash Blocked by No Arc Flash Light:

Test Settings
State Arc Flash
Arc Flash
Blocked
Hold Operated Post
Pre Fault by No
state (with Fault
Arc Flash
light)
Light
IA 100.0 mA 210.0 mA 0.00 A 210.0 mA 0.00 A
0.00 ° 0.00 ° 0.00 ° 0.00 ° 0.00 °
50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz
IB 100.0 mA 210.0 mA 0.00 A 210.0 mA 0.00 A
-120.00 ° -120.00 ° -120.00 ° -120.00 ° -120.00 °
50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz
IC 100.0 mA 210.0 mA 0.00 A 210.0 mA 0.00 A
120.00 ° 120.00 ° 120.00 ° 120.00 ° 120.00 °
50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz 50.000 Hz
Arc flash 0 0 0 1 0
initiator
Max. State Time 5.000 s 5.000 s 1.000 s 1.000 s
Trigger Logic AND AND
VCB Trip 1 1
User interaction no no yes no no
CMGPS trigger no no no no no
IRIG-B/PTP no no no no no
trigger
Pulses / 1 1 1 1 1
seconds
Delay after Tr. 0.00 s 0.00 s 0.00 s 0.00 s 0.00 s
On trigger jump no no no no no
to test end

Test Results

Time Assessment
Ignore
Name Start Stop Tnom Tdev- Tdev+ Tact Tdev Assess
before
Arc Flash Arc Flash Arc Flash Hold state 5.000 s 20.00 ms 20.00 ms 5.000 s 0.00 s +
Blocked Blocked Blocked
by No Arc by No Arc
Flash Flash
Light Light
Arc Flash Hold state Arc Flash VCB Trip 20.00 ms 20.00 ms 20.00 ms 9.100 ms -10.90 ms +
Operated Operated 0>1
(with light)
Assess: + .. Passed x .. Failed o .. Not assessed

73 / 80
 Hold state

CMC256plus I A/A

1.5

1.0

0.5 t/s
7.75 8.00 8.25 8.50 8.75 9.00 9.25 9.50 9.75 10.00
0.0

-0.5

-1.0

-1.5

-2.0

IA IB IC

Arc flash initiator

7.75 8.00 8.25 8.50 8.75 9.00 9.25 9.50 9.75 10.00
t/s

VCB Trip

7.75 8.00 8.25 8.50 8.75 9.00 9.25 9.50 9.75 10.00
t/s

Test State:
Test passed

Group end:Arc Flash

Group:Circuit Breaker Failure

74 / 80
Circuit Breaker Failure
Hardware Configuration

Test Equipment
Type Serial Number
CMC256plus PL273Q

Hardware Check
Performed At Result Details
21/03/2024 1:38:42 Passed
PM

Circuit Breaker Failure

CBF Trip time test:

Test Settings
State CBF trip Post
Pre Fault
received Fault
IA 500.0 mA 4.000 A 0.00 A
0.00 ° 0.00 ° 0.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IB 500.0 mA 4.000 A 0.00 A
-120.00 ° -120.00 ° -120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
IC 500.0 mA 4.000 A 0.00 A
120.00 ° 120.00 ° 120.00 °
50.000 Hz 50.000 Hz 50.000 Hz
CBF Trip 0 1 0
Received
Max. State Time 5.000 s 3.000 s 1.000 s
Trigger Logic AND
Local CB Fail 1
User interaction no no no
CMGPS trigger no no no
IRIG-B/PTP no no no
trigger
Pulses / 1 1 1
seconds
Delay after Tr. 0.00 s 0.00 s 0.00 s
On trigger jump no no no
to test end

Test Results

Time Assessment
Ignore
Name Start Stop Tnom Tdev- Tdev+ Tact Tdev Assess
before
CBF Trip CBF trip CBF trip Local CB 430.0 ms 100.0 ms 100.0 ms 469.1 ms 39.10 ms +
time test received received Fail 0>1
Assess: + .. Passed x .. Failed o .. Not assessed

75 / 80
 Pre Fault Post Fault
CBF trip received

CMC256plus I A/A
5
4
3
2
t/s
1 1.0 2.0 3.0 4.0 5.0 6.0
0
-1
-2
-3
-4
-5
-6
IA IB IC

CBF Trip Received

1.0 2.0 3.0 4.0 5.0 6.0

t/s

Local CB Fail

1.0 2.0 3.0 4.0 5.0 6.0

t/s

Test State:
Test passed

Group end:Circuit Breaker Failure

Group:Trip Circuit Supervision

76 / 80
Trip Circuit Supervision
Hardware Configuration

Test Equipment
Type Serial Number
CMC256plus PL273Q

Hardware Check
Performed At Result Details
17/03/2024 4:49:36 Passed
PM

TCS Function with CB Open Position:

Test Settings
State TCS
Seq Start HEALTH TCS FAIL Seq Stop
Y
CB Open 1 1 0 0
Supervision
Max. State Time 5.000 s 5.000 s 5.000 s 2.000 s
Trigger Logic AND AND
Trip Circuit Fail 1 1
User interaction no no no no
CMGPS trigger no no no no
IRIG-B/PTP no no no no
trigger
Pulses / 1 1 1 1
seconds
Delay after Tr. 0.00 s 0.00 s 0.00 s 0.00 s
On trigger jump no no no no
to test end

Test Results

Time Assessment
Ignore
Name Start Stop Tnom Tdev- Tdev+ Tact Tdev Assess
before
TCS TCS FAIL TCS FAIL Trip 20.00 ms 20.00 ms 20.00 ms 17.10 ms -2.900 ms +
Function Circuit
Fail 0>1
Assess: + .. Passed x .. Failed o .. Not assessed

TCS FAIL
TCS HEALTHY Seq Stop

CB Open Supervision

6.0 7.0 8.0 9.0 10.0

t/s

Trip Circuit Fail

6.0 7.0 8.0 9.0 10.0

t/s

77 / 80
Test State:
Test passed

TCS Function with CB Close Position:

Test Settings
State TCS
Seq Start HEALTH TCS FAIL Seq Stop
Y
CB Close 1 1 0 0
Supervision
Max. State Time 5.000 s 5.000 s 5.000 s 2.000 s
Trigger Logic AND AND
Trip Circuit Fail 1 1
User interaction no no no no
CMGPS trigger no no no no
IRIG-B/PTP no no no no
trigger
Pulses / 1 1 1 1
seconds
Delay after Tr. 0.00 s 0.00 s 0.00 s 0.00 s
On trigger jump no no no no
to test end

Test Results
Time Assessment
Ignore
Name Start Stop Tnom Tdev- Tdev+ Tact Tdev Assess
before
TCS TCS FAIL TCS FAIL Trip 20.00 ms 20.00 ms 20.00 ms 19.70 ms -300.0 μs +
Function Circuit
Fail 0>1
Assess: + .. Passed x .. Failed o .. Not assessed

TCS FAIL
TCS HEALTHY Seq Stop

CB Close Supervision

6.0 7.0 8.0 9.0 10.0

t/s

Trip Circuit Fail

6.0 7.0 8.0 9.0 10.0

t/s

Test State:
Test passed

Group end:Trip Circuit Supervision

Group:External Intertrip

78 / 80
Triping From Transformer
Hardware Configuration

Test Equipment
Type Serial Number
CMC256plus PL273Q

Hardware Check
Performed At Result Details
17/03/2024 5:02:50 Passed
PM

Transformer Pressure and Oil Level Trip:

Test Settings
State TX
Pressure
Seq Start Seq Stop
and Oil
Level IT
TX PR & Oil 0 1 0
Level Trip
Max. State Time 5.000 s 5.000 s 2.000 s
Trigger Logic AND
User interaction no no no
CMGPS trigger no no no
IRIG-B/PTP no no no
trigger
Pulses / 1 1 1
seconds
Delay after Tr. 0.00 s 0.00 s 0.00 s
On trigger jump no no no
to test end

Test Results

Time Assessment
Ignore
Name Start Stop Tnom Tdev- Tdev+ Tact Tdev Assess
before
TX TX TX VCB Trip 20.00 ms 20.00 ms 20.00 ms 24.70 ms 4.700 ms +
Pressure Pressure Pressure 0>1
and Oil and Oil and Oil
Level Level IT Level IT
Inter trip
Assess: + .. Passed x .. Failed o .. Not assessed

Seq Stop
TX Pressure and Oil Level IT

TX PR & Oil Level Trip

6.0 7.0 8.0 9.0 10.0

t/s

VCB Trip

6.0 7.0 8.0 9.0 10.0

t/s

79 / 80
Test State:
Test passed

Downstrm Arc Flash Trip:

Test Settings
State Downstre
am Arc
Seq Start Seq Stop
Flash
Trip
Downstrm AF 0 1 0
Trip
Max. State Time 5.000 s 5.000 s 2.000 s
Trigger Logic AND
VCB Trip 1
User interaction no no no
CMGPS trigger no no no
IRIG-B/PTP no no no
trigger
Pulses / 1 1 1
seconds
Delay after Tr. 0.00 s 0.00 s 0.00 s
On trigger jump no no no
to test end

Test Results

Time Assessment
Ignore
Name Start Stop Tnom Tdev- Tdev+ Tact Tdev Assess
before
Downstre Downstre Downstre VCB Trip 20.00 ms 20.00 ms 20.00 ms 23.30 ms 3.300 ms +
am Arc am Arc am Arc 0>1
Flash trip Flash Trip Flash Trip
Assess: + .. Passed x .. Failed o .. Not assessed

Seq Stop
Downstream Arc Flash Trip

Downstrm AF Trip

6.0 7.0 8.0 9.0 10.0

t/s

VCB Trip

6.0 7.0 8.0 9.0 10.0

t/s

Test State:
Test passed

Group end:External Intertrip

80 / 80