Spi in Avr Atmega16/Atmega32: Sdi (Serial Data Input) Sdo (Serial Data Output) SCLK (Serial Clock) Cs (Chip Select)
Spi in Avr Atmega16/Atmega32: Sdi (Serial Data Input) Sdo (Serial Data Output) SCLK (Serial Clock) Cs (Chip Select)
Spi in Avr Atmega16/Atmega32: Sdi (Serial Data Input) Sdo (Serial Data Output) SCLK (Serial Clock) Cs (Chip Select)
com/avr-atmega/atmega1632-spi
Introduction
The Serial Peripheral Interface (SPI) is a bus interface connection protocol originally started
by Motorola Corp. It uses four pins for communication.
It has two pins for data transfer called SDI (Serial Data Input) and SDO (Serial Data Output).
SCLK (Serial Clock) pin is used to synchronize data transfer and Master provides this clock.
CS (Chip Select) pin is used by the master to select the slave device.
SPI devices have 8-bit shift registers to send and receive data. Whenever a master needs to
send data, it places data on the shift register and generates a required clock. Whenever a
master wants to read data, the slave places the data on the shift register and the master
generates a required clock. Note that SPI is a full-duplex communication protocol i.e. data on
master and slave shift registers get interchanged at the same time.
The Master receives data and the slave transmits data through this pin.
The Master transmits data and the slave receives data through this pin.
The Master generates this clock for the communication, which is used by the
slave.
The interconnection between master and slave using SPI is shown in the below figure.
SS 5 Output Input
AVR ATmega16 uses three registers to configure SPI communication that are SPI Control
Register, SPI Status Register and SPI Data Register.
1 = Enable SPI.
0 = Disable SPI.
1 = Master mode.
0 = Slave Mode.
The below table shows the SCK clock frequency select bit setting.
0 0 0 Fosc/4
0 0 1 Fosc/16
0 1 0 Fosc/64
0 1 1 Fosc/128
1 0 0 Fosc/2
1 0 1 Fosc/8
1 1 0 Fosc/32
1 1 1 Fosc/64
This bit gets set when SPI data register writes occurs during previous data transfer.
SPI Data register used to transfer data between the Register file and SPI Shift
Register.
Writing to the SPDR initiates data transmission.
Master writes data byte in SPDR. Writing to SPDR starts data transmission.
8-bit data starts shifting out towards slave and after the complete byte is shifted, SPI
clock generator stops, and SPIF bit gets set.
THE Slave SPI interface remains in sleep as long as the SS pin is held high by the
master.
It activates only when the SS pin is driven low. Data is shifted out with incoming
SCK clock from master during a write operation.
SPIF is set after the complete shifting of a byte.
Example
Let’s do SPI communication using AVR family-based ATmega16 (Master) and ATmega32
(Slave). Master will send continuous count to Slave. Display the sent and received data on
16x2 LCD.
SPI_Init function
SPI_Write function
char flush_buffer;
SPDR = data; /* Write data to SPI data register */
while(!(SPSR & (1<<SPIF))); /* Wait till transmission complete */
flush_buffer = SPDR; /* Flush received data */
/* Note: SPIF flag is cleared by first reading SPSR (with SPIF set) and then accessing SPDR
hence flush buffer used here to access SPDR after SPSR read */
}
Since writing to SPDR generates SCK for transmission, write dummy data in the
SPDR register.
Wait until the transmission is completed i.e. poll SPIF flag till it becomes High.
While the SPIF flag gets set, read requested received data in SPDR.
SPI_Read function
SPDR = 0xFF;
while(!(SPSR & (1<<SPIF))); /* Wait till reception complete */
return(SPDR); /* Return received data */
}
* ATmega16_Master.c
* http://www.electronicwings.com
*/
int main(void)
{
uint8_t count;
char buffer[5];
LCD_Init();
SPI_Init();
count = 0;
while (1) /* Send Continuous count */
{
SPI_Write(count);
_delay_ms(500);
SPI_Init function
It has the same function and steps as we do SPI Write in Master mode.
SPI_Receive function
* ATmega32_SPI_Slave.c
* http://www.electronicwings.com
*/
int main(void)
{
uint8_t count;
char buffer[5];
LCD_Init();
SPI_Init();
count = SPI_Receive();