Description: Nvidia Corporation

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A B C D E F G H

PG110-A00

GP108 64Bit GDDR5 X32


1
HDMI/DP + DVI-D/DP 1

TABLE OF CONTENTS
Page Description
1 Table of Contents
2 Block Diagram
3 PCI Express
4 GPU Frame Buffer
5 FBA bits 31..00
2 2

6 FBA bits 63..32


7 NVVVD Decoupling
8 FBVDDQ and 1V8 Decoupling
9 IFPAB DL-DVI
10 IFPA DP
11 IFPB DP/HDMI
12 JTAG,GPIO&XTAL
13 ROM & STRAPS
14 Power Sequence
15 POWER:1V8 & 5V
3 3

16 POWER: NV3V3, NV12V


17 POWER:PEX_VDD
18 POWER:FBVDDQ
19 POWER:NVVDD
20 POWER:NVVDD
21 Mechanical

4 4

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY

ASSEMBLY <ASSEMBLY_DESCRIPTION> SANTA CLARA, CA 95050, USA

PAGE DETAIL Table of Contents


ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 1 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

Block Diagram

1 1

NVVDD PH1/2

2 2

FBVDDQ
HDMI
DP

LINK B

FBA LO PEX_VDD PEX_12V

1V8
GP108
FBA HI FAN
3 3
DVI-I

LINK A
DP

PEX_3V3
DP POWER

4 4

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY

ASSEMBLY <ASSEMBLY_DESCRIPTION> SANTA CLARA, CA 95050, USA

PAGE DETAIL Block Diagram


ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 2 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

PCI Express CN1 12V_PEX 3V3_PEX


NONPHY-X16
12V_PEX 0.400
CON_X16 R136 0ohm R133 0ohm
PLACE DECOUPLING CAPS NEAR PCI-E CONN FINGERS JTAG_TRST* 12 0.400
@electro_mechanic.con_pci_express(sym_1):page3_i2 IN
0402 0.05 ohm COMMON 04020.05 ohm COMMON
COMMON R134 0ohm
5A JTAG_TCLK 12
C91 C93 C695 C83 IN C84 C86 C693 C694 C684 C681 C679 C683
0402 0.05 ohm COMMON
10uF 10uF 1uF 0.1uF PEX_TRST* 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
B1 +12V TRST* JTAG1 B9 R132 0ohm JTAG_TDI 12
16V 16V 16V 16V PEX_TCLK IN 16V 16V 16V 16V 6.3V 6.3V 16V 16V
B2 +12V TCLK JTAG2 A5 04020.05 ohm COMMON
10% 10% 10% 10% PEX_TDI 10% 10% 10% 10% 10% 10% 10% 10%
X6S X6S X7R X7R
A2 +12V TDI JTAG3 A6 R135 0ohm JTAG_TDO 12
X7R X7R X7R X7R X6S X6S X7R X7R
PEX_TDO OUT
0805 0805 0603 0402 A3 +12V TDO JTAG4 A7 04020.05 ohm COMMON 0603 0603 0603 0603 0402 0402 0603 0603
PEX_TMS
1 COMMON COMMON COMMON COMMON B3 +12V/RSVD TMS JTAG5 A8 R131 0ohm JTAG_TMS 12 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON 1
IN
3V3_PEX 04020.05 ohm COMMON
B8 +3V3 1V8 GND GND GND GND GND GND GND GND
1A
A9 +3V3
A10 C569 C567 C543
GND +3V3
R88 R89 22uF 22uF 22uF
SNN_3V3AUX* 100k 100k 4V 4V 4V
3V3_PEX B10 +3V3AUX 5% 5% C677 20% 20% 20%
0402 0402 0.1uF X6S X6S X6S
COMMON COMMON G1A 0603W 0603W 0603W
PEX_PRSNT* 16V
A1 PRSNT1 SMCLK B5 PEX_SMCLK 12
@digital.u_gpu_gb2c_64(sym_1):page3_i108
COMMON COMMON COMMON
C678 C96 C682 SNN_PEX_PRSNT2_B17 OUT 10%
B17 PRSNT2 SMDAT B6 PEX_SMDAT 12
X7R BGA595

5
10uF 1uF 0.1uF BI COMMON
0402 U502
16V 16V 16V COMMON 1 @logic.u_and_2in(sym_1):page3_i54 1/14 PCI_EXPRESS
10% 10% 10% PEX_B12
X6S X7R X7R
B12 RSVD GND 4 GND
0805 0603 0402 2 SC70-5 CO-LAYOUT 0805 AND 0603
SNN_PEX_WAKE* R541
COMMON COMMON COMMON B4 GND WAKE
B11 COMMON PEX_VDD
A4 100k
GND 135mA

3
5%
B7 GND 0402 PEX_DVDD AA22
PEX_RST* PEX_RST_BUF*
A12 GND PERST A11 COMMON AC7 PEX_RST PEX_DVDD AB23
B13 AC24 C549 C605 C148 C149 C542 C568 C570
GND GND SNN_GPU_PEX_CLKREQ* PEX_DVDD
A15 AC6 AD25 1uF 1uF 4.7uF 4.7uF 10uF 10uF 22uF
GND GND PEX_CLKREQ PEX_DVDD 6.3V 6.3V 6.3V 6.3V 16V 16V 6.3V
B16 GND NET DIFFPAIR NV_NETCLASS GND NV_NETCLASS NET PEX_DVDD AE26
PEX_REFCLK 10% 10% 20% 20% 10% 10% 20%
B18 GND REFCLK A13 PEX_REFCLK PEXGEN3_SIGNALS AE8 PEX_REFCLK PEX_DVDD AE27 X6S X6S X6S X6S X6S X6S X6S
PEX_REFCLK*
A18 GND REFCLK A14 PEX_REFCLK PEXGEN3_SIGNALS AD8 PEX_REFCLK 0402 0402 0603 0603 0805 0805 0805
COMMON COMMON COMMON COMMON COMMON COMMON COMMON
PEX_TXX0 C676 0.22uF PEX_TX0
PERP0
A16 PEX_TX0 PEXGEN3_SIGNALS PEXGEN3_SIGNALS AC9 PEX_TX0 PLACE UNDER GPU PLACE NEAR GPU MIDWAY BETWEEN GPU AND PS
PEX_TXX0* PEX_TX0*
POWER_BRAKE* A17 PEXGEN3_SIGNALS 0402 16V C675 0.22uF PEXGEN3_SIGNALS AB9
PERN0 PEX_TX0 PEX_TX0
12 R94 0ohm GND 0402 16V
OUT PEX_RX0 COMMON COMMON
0402 0.05 ohm COMMON
PETP0 B14 PEX_RX0 PEXGEN3_SIGNALS AG6 PEX_RX0 GND
PEX_RX0*
2 PETN0 B15 PEX_RX0 PEXGEN3_SIGNALS AG7 PEX_RX0 PEX_HVDD AA10 2
END OF X1 AA12
SNN_PEX_PRSNT2_B31 PEX_TXX1 PEX_TX1 PEX_HVDD
B31 A21 PEXGEN3_SIGNALS
C674 0.22uF PEXGEN3_SIGNALS AB10 AA13
SNN_PEX_A19 PRSNT2 PERP1 PEX_TXX1* PEX_TX1 PEX_TX1* PEX_TX1 PEX_HVDD
A19 A22 PEXGEN3_SIGNALS 0402 16V C673 0.22uF PEXGEN3_SIGNALS AC10 AA16 1V8
PEX_B30 RSVD PERN1 PEX_TX1 PEX_TX1 PEX_HVDD
R97 0ohm B30 RSVD 0402 16V PEX_HVDD AA18 188mA
SNN_PEX_A32 PEX_RX1 COMMON COMMON
0402 0.05 ohm COMMON A32 RSVD PETP1 B19 PEX_RX1 PEXGEN3_SIGNALS AF7 PEX_RX1 PEX_HVDD AA19
PEX_RX1*
PETN1
B20 PEX_RX1 PEXGEN3_SIGNALS AE7 PEX_RX1 PEX_HVDD
AA20
A20 AA21 C581 C577 C588 C583 C565 C612 C609 C629 C626
GND PEX_TXX2 PEX_TX2 PEX_HVDD 1uF 1uF 1uF 1uF 4.7uF 4.7uF 10uF 10uF 22uF
B21 A25 PEXGEN3_SIGNALS
C672 0.22uF PEXGEN3_SIGNALS AD11 AB22
GND PERP2 PEX_TXX2* PEX_TX2 PEX_TX2* PEX_TX2 PEX_HVDD 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 16V 16V 6.3V
B22 A26 PEXGEN3_SIGNALS 0402 16V C671 0.22uF PEXGEN3_SIGNALS AC11 AC23
GND PERN2 PEX_TX2 PEX_TX2 PEX_HVDD 10% 10% 10% 10% 20% 20% 10% 10% 20%
12V_PEX A23 GND COMMON
0402 16V
COMMON PEX_HVDD AD24 X6S X6S X6S X6S X6S X6S X6S X6S X6S
PEX_RX2
A24 GND PETP2 B23 PEX_RX2 PEXGEN3_SIGNALS AE9 PEX_RX2 PEX_HVDD AE25 0402 0402 0402 0402 0603 0603 0805 0805 0805
PEX_RX2*
nv_cap nv_cap
B25 GND PETN2 B24 PEX_RX2 PEXGEN3_SIGNALS AF9 PEX_RX2 PEX_HVDD AF26 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
B26 GND PEX_HVDD AF27 PLACE UNDER GPU PLACE NEAR GPU MIDWAY BETWEEN GPU AND PS
C94 C90 PEX_TXX3 PEX_TX3
A27 A29 PEXGEN3_SIGNALS
C663 0.22uF PEXGEN3_SIGNALS AC12
4.7uF 4.7uF GND PERP3 PEX_TXX3* PEX_TX3 PEX_TX3* PEX_TX3
A28 A30 PEXGEN3_SIGNALS 0402 16V C662 0.22uF PEXGEN3_SIGNALS AB12
16V 16V
GND PERN3 PEX_TX3 PEX_TX3
B29 GND 0402 16V CO-LAYOUT 0805 AND 0603 GND
20% 20% PEX_RX3 COMMON COMMON
X6S X6S
A31 GND PETP3 B27 PEX_RX3 PEXGEN3_SIGNALS AG9 PEX_RX3
PEX_RX3*
0603W 0603W B32 GND PETN3 B28 PEX_RX3 PEXGEN3_SIGNALS AG10 PEX_RX3
COMMON COMMON END OF X4
SNN_PEX_TXX4 SNN_PEX_TX4 C610 C627 C628
PERP4 A35 AB13 PEX_TX4
SNN_PEX_TXX4* SNN_PEX_TX4* 22uF 22uF 22uF
GND PERN4 A36 AC13 PEX_TX4
SNN_PEX_PRSNT2_B48 4V 4V 4V
GND GND B48 PRSNT2
SNN_PEX_RSVD_A33 SNN_PEX_RXX4 SNN_PEX_RX4 20% 20% 20%
A33 RSVD PETP4 B33 AF10 PEX_RX4 1V8 X6S X6S X6S
SNN_PEX_RXX4* SNN_PEX_RX4*
CO-LAY WITH 0805 CAP PETN4 B34 AE10 PEX_RX4 0603W 0603W 0603W
A34 GND COMMON COMMON COMMON
SNN_PEX_TXX5 SNN_PEX_TX5
B35 GND PERP5
A39 AD14 PEX_TX5 35mA
SNN_PEX_TXX5* SNN_PEX_TX5*
B36 GND PERN5 A40 AC14 PEX_TX5 PEX_PLL_HVDD AA8
A37 GND PEX_PLL_HVDD AA9
SNN_PEX_RXX5 SNN_PEX_RX5
A38 GND PETP5 B37 AE12 PEX_RX5 GND
SNN_PEX_RXX5* SNN_PEX_RX5* C600
3 B39 GND PETN5 B38 AF12 PEX_RX5 3
B40 0.1uF
GND SNN_PEX_TXX6 SNN_PEX_TX6 16V
A41 GND PERP6 A43 AC15 PEX_TX6
SNN_PEX_TXX6* SNN_PEX_TX6* 10%
A42 GND PERN6 A44 AB15 PEX_TX6 X7R
B43 GND 0402
SNN_PEX_RXX6 SNN_PEX_RX6
B44 GND PETP6 B41 AG12 PEX_RX6 COMMON
SNN_PEX_RXX6* SNN_PEX_RX6*
A45 GND PETN6
B42 AG13 PEX_RX6
A46 GND SNN_PEX_TXX7 SNN_PEX_TX7
B47 GND PERP7 A47 AB16 PEX_TX7 GND
SNN_PEX_TXX7* SNN_PEX_TX7*
B49 GND PERN7 A48 AC16 PEX_TX7 PLACE UNDER GPU
A49 GND SNN_PEX_RXX7 SNN_PEX_RX7
PETP7 B45 AF13 PEX_RX7
SNN_PEX_RXX7* SNN_PEX_RX7*
PETN7 B46 AE13 PEX_RX7
END OF X8
SNN_PEX_TXX8 SNN_PEX_TX8
GND PERP8 A52 AD17 PEX_TX8
SNN_PEX_TXX8* SNN_PEX_TX8*
PERN8 A53 AC17 PEX_TX8
B81 PRSNT2
SNN_PEX_RSVD_A50 SNN_PEX_RXX8 SNN_PEX_RX8
A50 RSVD PETP8 B50 AE15 PEX_RX8
SNN_PEX_RSVD_A82 SNN_PEX_RXX8* SNN_PEX_RX8*
B82 RSVD PETN8 B51 AF15 PEX_RX8
SNN_PEX_TXX9 SNN_PEX_TX9
PERP9 A56 AC18 PEX_TX9
SNN_PEX_TXX9* SNN_PEX_TX9*
A57 AB18

PEX LANES 15 - 4 ARE DEFEATURED


PERN9 PEX_TX9
A51 GND SNN_PEX_RXX9 SNN_PEX_RX9
B52 GND PETP9 B54 AG15 PEX_RX9
SNN_PEX_RXX9* SNN_PEX_RX9*
B53 GND PETN9 B55 AG16 PEX_RX9
A54 GND SNN_PEX_TXX10 SNN_PEX_TX10
A55 GND PERP10
A60 AB19 PEX_TX10
SNN_PEX_TXX10* SNN_PEX_TX10*
B56 GND PERN10 A61 AC19 PEX_TX10
B57 GND SNN_PEX_RXX10 SNN_PEX_RX10
A58 GND PETP10 B58 AF16 PEX_RX10
SNN_PEX_RXX10* SNN_PEX_RX10*
4 A59 GND PETN10 B59 AE16 PEX_RX10 4
B60 GND SNN_PEX_TXX11 SNN_PEX_TX11
B61 GND PERP11 A64 AD20 PEX_TX11
SNN_PEX_TXX11* SNN_PEX_TX11*
A62 GND PERN11 A65 AC20 PEX_TX11
A63 GND SNN_PEX_RXX11 SNN_PEX_RX11
B64 GND PETP11 B62 AE18 PEX_RX11
SNN_PEX_RXX11* SNN_PEX_RX11*
B65 GND PETN11
B63 AF18 PEX_RX11
A66 GND SNN_PEX_TXX12 SNN_PEX_TX12
A67 GND PERP12 A68 AC21 PEX_TX12
SNN_PEX_TXX12* SNN_PEX_TX12*
B68 GND PERN12 A69 AB21 PEX_TX12
B69 GND SNN_PEX_RXX12 SNN_PEX_RX12
A70 GND PETP12 B66 AG18 PEX_RX12
SNN_PEX_RXX12* SNN_PEX_RX12*
A71 GND PETN12 B67 AG19 PEX_RX12
B72 GND SNN_PEX_TXX13 SNN_PEX_TX13
B73 GND PERP13 A72 AD23 PEX_TX13
SNN_PEX_TXX13* SNN_PEX_TX13*
A74 GND PERN13 A73 AE23 PEX_TX13
A75 GND SNN_PEX_RXX13 SNN_PEX_RX13
B76 GND PETP13 B70 AF19 PEX_RX13
SNN_PEX_RXX13* SNN_PEX_RX13*
B77 GND PETN13 B71 AE19 PEX_RX13
A78 GND SNN_PEX_TXX14 SNN_PEX_TX14
A79 GND PERP14 A76 AF24 PEX_TX14
SNN_PEX_TXX14* SNN_PEX_TX14*
B80 GND PERN14 A77 AE24 PEX_TX14
A82 GND SNN_PEX_RXX14 SNN_PEX_RX14
PETP14 B74 AE21 PEX_RX14
SNN_PEX_RXX14* SNN_PEX_RX14*
PETN14 B75 AF21 PEX_RX14
SNN_PEX_TXX15 SNN_PEX_TX15
GND PERP15
A80 AG24 PEX_TX15
SNN_PEX_TXX15* SNN_PEX_TX15*
PERN15 A81 AG25 PEX_TX15
SNN_PEX_RXX15 SNN_PEX_RX15
PETP15 B78 AG21 PEX_RX15
SNN_PEX_RXX15* SNN_PEX_RX15*
5 PETN15 B79 AG22 PEX_RX15 5

END OF X16
PEX_TERMP
PEX_TERMP AF25 R514 2.49k
0402 1% COMMON
50OHM_NETCLASS1 NVIDIA CORPORATION
GND 2701 SAN TOMAS EXPRESSWAY

ASSEMBLY <ASSEMBLY_DESCRIPTION> SANTA CLARA, CA 95050, USA

PAGE DETAIL PCI Express


ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 3 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

GPU Frame Buffer


G1B
@digital.u_gpu_gb2c_64(sym_2):page4_i151
5,6 FBA_D[63..0] BGA595
OUT COMMON

FBA_D0 2/14 FBA


0 E18 FBA_D0
FBA_D1
1 F18 FBA_D1
FBA_D2
2 E16 FBA_D2
FBA_D3
3 F17 FBA_D3
FBA_D4
1 4 D20 FBA_D4 1
FBA_D5
5 D21 FBA_D5
FBA_D6
6 F20 FBA_D6
FBA_D7
7 E21 FBA_D7
FBA_D8
8 E15 FBA_D8
FBA_D9
9 D15 FBA_D9
FBA_D10
10 F15 FBA_D10
FBA_D11
11 F13 FBA_D11
FBA_D12
12 C13 FBA_D12
FBA_D13
13 B13 FBA_D13
FBA_D14
14 E13 FBA_D14
FBA_D15
15 D13 FBA_D15
FBA_D16
16 B15 FBA_D16
FBA_D17
17 C16 FBA_D17
FBA_D18
18 A13 FBA_D18
FBA_D19
19 A15 FBA_D19
FBA_D20
20 B18 FBA_D20
FBA_D21
21 A18 FBA_D21
FBA_D22
22 A19 FBA_D22
FBA_D23
23 C19 FBA_D23
FBA_D24
24 B24 FBA_D24
FBA_D25
25 C23 FBA_D25
FBA_D26
26 A25 FBA_D26
FBA_D27
27 A24 FBA_D27
FBA_D28
28 A21 FBA_D28
FBA_D29
29 B21 FBA_D29
FBA_D30
30 C20 FBA_D30
FBA_D31
31 C21 FBA_D31 FBA_CMD[31..0] FB_CMD 5,6
FBA_D32 OUT
32 R22 FBA_D32
FBA_D33 FBA_CMD0
2 33 R24 FBA_D33 FBA_CMD0 C27 0 2
FBA_D34 FBA_CMD1
34 T22 FBA_D34 FBA_CMD1 C26 1
FBA_D35 FBA_CMD2
35 R23 FBA_D35 FBA_CMD2 E24 2
FBA_D36 FBA_CMD3
36 N25 FBA_D36 FBA_CMD3 F24 3
FBA_D37 FBA_CMD4
37 N26 FBA_D37 FBA_CMD4 D27 4
FBA_D38 FBA_CMD5
38 N23 FBA_D38 FBA_CMD5 D26 5
FBA_D39 FBA_CMD6
39 N24 FBA_D39 FBA_CMD6
F25 6
FBA_D40 FBA_CMD7
40 V23 FBA_D40 FBA_CMD7 F26 7
FBA_D41 FBA_CMD8
41 V22 FBA_D41 FBA_CMD8 F23 8
FBA_D42 FBA_CMD9
42 T23 FBA_D42 FBA_CMD9 G22 9
FBA_D43 FBA_CMD10
43 U22 FBA_D43 FBA_CMD10 G23 10
FBA_D44 FBA_CMD11
44 Y24 FBA_D44 FBA_CMD11 G24 11
FBA_D45 FBA_CMD12
45 AA24 FBA_D45 FBA_CMD12 F27 12
FBA_D46 FBA_CMD13
46 Y22 FBA_D46 FBA_CMD13 G25 13
FBA_D47 FBA_CMD14
47 AA23 FBA_D47 FBA_CMD14 G27 14
FBA_D48 FBA_CMD15
48 AD27 FBA_D48 FBA_CMD15 G26 15
FBA_D49 FBA_CMD16
49 AB25 FBA_D49 FBA_CMD16
M24 16 FBVDDQ
FBA_D50 FBA_CMD17
50 AD26 FBA_D50 FBA_CMD17 M23 17
FBA_D51 FBA_CMD18
51 AC25 FBA_D51 FBA_CMD18 K24 18
FBA_D52 FBA_CMD19
52 AA27 FBA_D52 FBA_CMD19 K23 19
FBA_D53 FBA_CMD20
53 AA26 FBA_D53 FBA_CMD20 M27 20
FBA_D54 FBA_CMD21
54 W26 FBA_D54 FBA_CMD21 M26 21 CKE*
FBA_D55 FBA_CMD22
55 Y25 FBA_D55 FBA_CMD22 M25 22
FBA_D56 FBA_CMD23 FBA_CMD30
56 R26 FBA_D56 FBA_CMD23 K26 23 R505 10k
FBA_D57 FBA_CMD24
57 T25 FBA_D57 FBA_CMD24 K22 24 0402 5% COMMON
FBA_D58 FBA_CMD25
58 N27 FBA_D58 FBA_CMD25 J23 25
FBA_D59 FBA_CMD26
59 R27 FBA_D59 FBA_CMD26
J25 26
FBA_D60 FBA_CMD27
60 V26 FBA_D60 FBA_CMD27 J24 27
FBA_D61 FBA_CMD28
61 V27 FBA_D61 FBA_CMD28 K27 28
FBA_D62 FBA_CMD29 FBA_CMD14
62 W27 FBA_D62 FBA_CMD29 K25 29 R503 10k
FBA_D63 FBA_CMD30
3 FB_DBI 63 W25 J27 30 0402 5% COMMON 3
FBA_D63 FBA_CMD30 FBA_CMD31
FBA_CMD31 J26 31
SNN_FBA_CMD32
5,6 FBA_DBI[7..0]
FBA_CMD32 B19
OUT FBA_DBI0 FBA_CMD34_DEBUG
0 D19 FBA_DQM0 FBA_CMD34 F22 TP501
FBA_DBI1 FBA_CMD35_DEBUG
1 D14 FBA_DQM1 FBA_CMD35 J22 TP502
FBA_DBI2
2 C17 FBA_DQM2 RESET*
FBA_DBI3
3 C22 FOR DEBUG
FBA_DBI4 FBA_DQM3 FBA_CMD13
4 P24 FBA_DQM4
R509 10k
FBA_DBI5
5 W24 FBA_DQM5 0402 5% COMMON
FBA_DBI6
6 AA25 FBA_DQM6
FBA_DBI7
FB_EDC 7 U25 FBA_DQM7 FBA_CMD29
R510 10k
5,6 FBA_EDC[7..0] 0402 5% COMMON
OUT FBA_EDC0
0 E19 FBA_DQS_WP0
FBA_EDC1
1 C15 FBA_DQS_WP1
FBA_EDC2
2 B16 FBA_DQS_WP2 FBA_CLK0 D24 FBA_CLK0 FBA_CLK0 FB_CLK 5
FBA_EDC3 OUT
3 B22 FBA_DQS_WP3 FBA_CLK0
D25 FBA_CLK0* FBA_CLK0 FB_CLK 5
FBA_EDC4 OUT
4 R25 FBA_DQS_WP4 FBA_CLK1 N22 FBA_CLK1 FBA_CLK1 FB_CLK 6
FBA_EDC5 OUT
5 W23 FBA_DQS_WP5 FBA_CLK1 M22 FBA_CLK1* FBA_CLK1 FB_CLK 6
FBA_EDC6 OUT
6 AB26 FBA_DQS_WP6
FBA_EDC7
7 T26 FBA_DQS_WP7
GND

SNN_FBA_DQS_RN0
F19 FBA_DQS_RN0 FBA_WCK01 D18 FBA_WCK01 FBA_WCK01 FB_WCK 5
SNN_FBA_DQS_RN1 OUT
C14 FBA_DQS_RN1 FBA_WCK01 C18 FBA_WCK01* FBA_WCK01 FB_WCK 5
SNN_FBA_DQS_RN2 OUT
A16 FBA_DQS_RN2 FBA_WCK23 D17 FBA_WCK23 FBA_WCK23 FB_WCK 5
SNN_FBA_DQS_RN3 OUT
A22 FBA_DQS_RN3 FBA_WCK23
D16 FBA_WCK23* FBA_WCK23 FB_WCK 5
SNN_FBA_DQS_RN4 OUT
P25 FBA_DQS_RN4 FBA_WCK45 T24 FBA_WCK45 FBA_WCK45 FB_WCK 6
SNN_FBA_DQS_RN5 OUT
W22 FBA_DQS_RN5 FBA_WCK45 U24 FBA_WCK45* FBA_WCK45 FB_WCK 6
SNN_FBA_DQS_RN6 OUT
AB27 FBA_DQS_RN6 FBA_WCK67 V24 FBA_WCK67 FBA_WCK67 FB_WCK 6 1V8
SNN_FBA_DQS_RN7 OUT
4 T27 FBA_DQS_RN7 FBA_WCK67 V25 FBA_WCK67* FBA_WCK67 FB_WCK 6 4
OUT

FB_PLL_AVDD 104.5mA
FB_PLL_AVDD F16 LB501 30ohm
BEAD_0603 COMMON

FB_PLL_AVDD
P22

FB_REFPLL_AVDD H22

C552
C555 C554 C579 C553 22uF
0.1uF 0.1uF 0.1uF 22uF 4V
16V 16V 16V 6.3V 20%
10% 10% 10% 20% X6S
X7R X7R X7R X6S 0603W
0402 0402 0402 0805 COMMON
SNN_FB_VREF_D32
D23 FB_VREF
COMMON COMMON COMMON COMMON

GND GND GND GND


CO-LAYOUT 0805 AND 0603

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY

ASSEMBLY <ASSEMBLY_DESCRIPTION> SANTA CLARA, CA 95050, USA

PAGE DETAIL GPU Frame Buffer


ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 4 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

FBA bits 31..00 M1B


@memory.u_mem_sd_ddr5_x32(sym_6):page5_i98
M1D BGA170
4 FBA_CMD[15..0] COMMON FBVDDQ
IN @memory.u_mem_sd_ddr5_x32(sym_5):page5_i94
GDDR5_BGA170_MIRR FBVDDQ
BGA170
COMMON
Normal
J1 MF_VSS/SOE*
FBA_CMD12
12 G3 RAS add 1k to VSS
FBA_CMD15
CMD 0..31 32..63 15 L3 B10 C10 C517 C530 C523 C515 C525 C514 C539 C535
FBA_CMD5 CAS VSS VDD 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
5 L12 WE B5 VSS VDD C5
FBA_CMD0 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
0 G12 CS D10 VSS VDD D11
10% 10% 10% 10% 10% 10% 10% 10%
CMD0 CS* G10 VSS VDD G1 X6S X6S X6S X6S X6S X6S X6S X6S
FBA_CMD8
1 CMD1 A3_BA3 8 J4 ABI G5 VSS VDD G11 0402 0402 0402 0402 0402 0402 0402 0402 1
CMD2 A2_BA0 H1 VSS VDD G14 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
FBA_CMD10
CMD3 A4_BA2 10 H4 A0_A10 H14 VSS VDD G4
FBA_CMD11
CMD4 A5_BA1 11 H5 A1_A9 K1 VSS VDD L1
FBA_CMD2
CMD5 WE* 2 H11 A2_BA0 K14 VSS VDD L11
FBA_CMD1
CMD6 A7_A8 1 H10 A3_BA3
L10 VSS VDD
L14
FBA_CMD3
CMD7 A6_A11 3 K11 A4_BA2 L5 L4 GND
FBA_CMD4 VSS VDD
CMD8 ABI* 4 K10 A5_BA1 P10 VSS VDD P11
FBA_CMD7
CMD9 A12_RFU 7 K5 A6_A11 T10 VSS VDD R10
FBA_CMD6
CMD10 A0_A10 6 K4 A7_A8 T5 VSS VDD R5
CMD11 A1_A9 9
FBA_CMD9
J5 RFU_A12
PLACE Directly Under DRAM
CMD12 RAS* A1 VSSQ VDDQ B1
CMD13 RST* A12 VSSQ VDDQ B12
CMD14 CKE* A14 VSSQ VDDQ B14
CMD15 CAS* A3 VSSQ VDDQ B3
CMD16 CS* C1 VSSQ VDDQ
D1
FBA_CMD13
CMD17 A3_BA3 13 J2 RESET C11 VSSQ VDDQ D12
FBA_CMD14
CMD18 A2_BA0 14 J3 CKE C12 VSSQ VDDQ D14
CMD19 A4_BA2 C14 VSSQ VDDQ D3
CMD20 A5_BA1 4 FBA_CLK0 J12 CLK C3 VSSQ VDDQ E10
IN
CMD21 WE* 4 FBA_CLK0* J11 CLK C4 VSSQ VDDQ E5
IN
CMD22 A7_A8 E1 VSSQ VDDQ F1 FBVDDQ
CMD23 A6_A11 R144 R143 E12 F12
40.2ohm 40.2ohm VSSQ VDDQ
CMD24 ABI* E14 VSSQ VDDQ F14
1% 1%
CMD25 A12_RFU E3 VSSQ VDDQ F3
0402 0402
CMD26 A0_A10 COMMON COMMON F10 VSSQ VDDQ
G13
CMD27 A1_A9 F5 G2 C520 C534 C155 C501 C518 C513 C511 C531 C157 C156
FBA_CLK0_CM VSSQ VDDQ 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
CMD28 RAS* H13 VSSQ VDDQ H12
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
CMD29 RST* H2 VSSQ VDDQ H3
C153 SNN_FBA_RFU_1 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
2 CMD30 CKE* A5 NC_RFU_A5 K13 VSSQ VDDQ K12 X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S 2
10nF SNN_FBA_RFU_2
CMD31 CAS* V5 NC_RFU_V5 K2 VSSQ VDDQ K3 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
25V
M10 VSSQ VDDQ L13 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
10%
X7R
M5 VSSQ VDDQ L2
0402 N1 VSSQ VDDQ M1
FBVDDQ COMMON N12 VSSQ VDDQ M12
N14 VSSQ VDDQ
M14
GND N3 VSSQ VDDQ M3 GND
R502 R1 N10
549ohm VSSQ VDDQ
6 R11 VSSQ VDDQ N5 FBVDDQ
1% OUT
0402
R12 VSSQ VDDQ P1
COMMON R14 VSSQ VDDQ P12
FBA_VREFC J14 VREFC R3 VSSQ VDDQ P14
0.300 0.140A
R4 VSSQ VDDQ P3
R506 R504 C159 FBA_ZQ_1
R507 121ohm J13 ZQ V1 VSSQ VDDQ T1
1.33k 931ohm 820pF 0402 COMMON V12 T12 C502 C503 C504 C505
1% VSSQ VDDQ
1% 1% 50V
J10 V14 T14 10uF 10uF 10uF 10uF
0402 0402 10% SEN VSSQ VDDQ 4V 4V 4V 4V
COMMON COMMON X7R V3 VSSQ VDDQ T3
20% 20% 20% 20%
0402 X6S X6S X6S X6S
COMMON 0603 0603 0603 0603
COMMON COMMON COMMON COMMON
GND GND GND

GND

GND

3
FBA_VREF_Q PLACE CLOSE TO DRAM
1G1D1S
D Q501 0.300
3 @discrete.q_fet_n_enh(sym_2):page5_i7 3
SOT323_1G1D1S
12 GPIO10_FBVREF_SEL 1G COMMON
IN
S 2
R501 30V
10k 0.3A
1900mohm@10V / [email protected] / [email protected]
5% 1.2A
0.2W
0402 12V
COMMON FBVDDQ

GND
GND

C163 C160 C161 C162


10uF 10uF 22uF 22uF
4V 4V 4V 4V
20% 20% 20% 20%
X6S X6S X6S X6S
4 FBA_D[31..0] 0603 0603 0603W 0603W
BI
COMMON COMMON COMMON COMMON

M1A M1C
@memory.u_mem_sd_ddr5_x32(sym_1):page5_i76 @memory.u_mem_sd_ddr5_x32(sym_3):page5_i97 GND
BGA170 BGA170
COMMON COMMON

FBA_D0
NORMAL
FBA_D16
NORMAL PLACE Around DRAM
0 A4 DQ0 16 V11 DQ16
FBA_D1 FBA_D17
FB_DBI 1 A2 DQ1 17 V13 DQ17
FBA_D2 FBA_D18
4,6 FBA_DBI[7..0] 2 B4 18 T11
BI FBA_DBI0 FBA_D3 DQ2 FBA_D19 DQ18
0 3 B2 DQ3 19 T13 DQ19
FBA_DBI1 FBA_D4 FBA_D20
4 1 4 E4 DQ4 20 N11 DQ20 4
FBA_DBI2 FBA_D5 FBA_D21
2 5 E2 DQ5 21 N13 DQ21
FBA_DBI3 FBA_D6 FBA_D22
3 6 F4 DQ6 22 M11 DQ22
FBA_DBI4 FBA_D7 FBA_D23
4 7 F2 DQ7 23 M13 DQ23
FBA_DBI5
5
FBA_DBI6 FBA_EDC0 FBA_EDC2
6 C2 EDC0 R13 EDC2
FBA_DBI7 FBA_DBI0 FBA_DBI2
7 D2 DBI0
P13 DBI2
SNN_FBA_VREFD_1 SNN_FBA_VREFD_2
FB_EDC VREFD A10 VREFD V10
4,6 FBA_EDC[7..0]
OUT FBA_EDC0
0 x32 x16 x32 x16
FBA_EDC1 FBA_D8 FBA_D24
1 8 A11 DQ8 NC
24 V4 DQ24 NC
FBA_EDC2 FBA_D9 FBA_D25
2 9 A13 DQ9 NC
25 V2 DQ25 NC
FBA_EDC3 FBA_D10 FBA_D26
3 10 B11 DQ10 NC
26 T4 DQ26 NC
FBA_EDC4 FBA_D11 FBA_D27
4 11 B13 DQ11 NC
27 T2 DQ27 NC
FBA_EDC5 FBA_D12 FBA_D28
5 12 E11 DQ12 28 N4 DQ28
FBA_EDC6 FBA_D13 NC FBA_D29 NC
6 13 E13 DQ13 29 N2 DQ29
FBA_EDC7 FBA_D14 NC FBA_D30 NC
7 14 F11 DQ14 30 M4 DQ30
FBA_D15 NC FBA_D31 NC
15 F13 DQ15 NC
31 M2 DQ31 NC
FBA_EDC1 FBA_EDC3
C13 EDC1 GND
R2 EDC3 NC
FBA_DBI1 FBA_DBI3
D13 DBI1 NC
P2 DBI3 NC

4 FBA_WCK01 D4 WCK01 4 FBA_WCK23 P4 WCK23


IN IN
4 FBA_WCK01* D5 WCK01 4 FBA_WCK23* P5 WCK23
IN IN

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY

ASSEMBLY <ASSEMBLY_DESCRIPTION> SANTA CLARA, CA 95050, USA

PAGE DETAIL FBA bits 31..00


ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 5 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

FBA bits 63..32

FBVDDQ
FBVDDQ
GDDR5_BGA170_MIRR
1 1
M2B
@memory.u_mem_sd_ddr5_x32(sym_7):page6_i87
4 FBA_CMD[31..16]
IN BGA170_MIRR
CMD 0..31 32..63 COMMON
C521 C524 C538 C528 C536 C510 C516 C529
M2D 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
@memory.u_mem_sd_ddr5_x32(sym_5):page6_i77
BGA170_MIRR
Mirrored 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10%
CMD0 CS* COMMON
SOE*/MF_VDD J1 X6S X6S X6S X6S X6S X6S X6S X6S
CMD1 A3_BA3 add 1k to VDD 0402 0402 0402 0402 0402 0402 0402 0402
FBA_CMD28
CMD2 A2_BA0 28 L3 RAS B10 VSS VDD C10 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
FBA_CMD31
CMD3 A4_BA2 31 G3 CAS B5 VSS VDD C5
FBA_CMD21
CMD4 A5_BA1 21 G12 WE D10 VSS VDD D11
FBA_CMD16
CMD5 WE* 16 L12 CS G10 VSS VDD G1
CMD6 A7_A8 G5 VSS VDD G11
FBA_CMD24
CMD7 A6_A11 24 J4 ABI H1 VSS VDD G14
CMD8 ABI* H14 VSS VDD G4 GND
FBA_CMD26
CMD9 A12_RFU 26 K4 A0_A10
K1 VSS VDD
L1
FBA_CMD27
CMD10 A0_A10 27 K5 A1_A9 K14 VSS VDD L11
CMD11 A1_A9 18
FBA_CMD18
FBA_CMD17
K11 A2_BA0 L10 VSS VDD L14 PLACE Directly Under DRAM
CMD12 RAS* 17 K10 A3_BA3 L5 VSS VDD L4
FBA_CMD19
CMD13 RST* 19 H11 A4_BA2 P10 VSS VDD P11
FBA_CMD20
CMD14 CKE* 20 H10 A5_BA1 T10 VSS VDD R10
FBA_CMD23
CMD15 CAS* 23 H5 A6_A11 T5 VSS VDD R5
FBA_CMD22
CMD16 CS* 22 H4 A7_A8
FBA_CMD25
CMD17 A3_BA3 25 J5 RFU_A12 A1 VSSQ VDDQ B1
CMD18 A2_BA0 A12 VSSQ VDDQ B12
CMD19 A4_BA2 A14 VSSQ VDDQ
B14
CMD20 A5_BA1 A3 VSSQ VDDQ B3
CMD21 WE* C1 VSSQ VDDQ D1 FBVDDQ
CMD22 A7_A8 C11 VSSQ VDDQ D12
FBA_CMD29
2 CMD23 A6_A11 29 J2 RESET C12 VSSQ VDDQ D14 2
FBA_CMD30
CMD24 ABI* 30 J3 CKE C14 VSSQ VDDQ D3
CMD25 A12_RFU C3 VSSQ VDDQ E10
CMD26 A0_A10 4 FBA_CLK1 J12 C4 E5 C158 C533 C526 C154 C537 C519 C512 C540 C532 C522
IN CLK VSSQ VDDQ 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
CMD27 A1_A9 4 FBA_CLK1* J11 CLK E1 VSSQ VDDQ F1
IN 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
CMD28 RAS* E12 VSSQ VDDQ F12
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
CMD29 RST* E14 VSSQ VDDQ
F14 X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S
CMD30 CKE* R512 R511 E3 F3
VSSQ VDDQ 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
40.2ohm 40.2ohm F10 G13
CMD31 CAS* VSSQ VDDQ
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
1% 1%
0402 0402
F5 VSSQ VDDQ G2
COMMON COMMON H13 VSSQ VDDQ H12
FBA_CLK1_CM
H2 VSSQ VDDQ H3
K13 VSSQ VDDQ K12
C541 SNN_FBA_RFU7
A5 NC_RFU_A5 K2 VSSQ VDDQ K3
10nF SNN_FBA_RFU8
V5 M10 L13 GND
25V NC_RFU_V5 VSSQ VDDQ
M5 VSSQ VDDQ L2 FBVDDQ
10%
X7R
N1 VSSQ VDDQ
M1
0402 N12 VSSQ VDDQ M12
COMMON N14 VSSQ VDDQ M14
N3 VSSQ VDDQ M3
GND R1 VSSQ VDDQ N10
R11 N5 C509 C507 C506 C508
VSSQ VDDQ 10uF 10uF 10uF 10uF
R12 VSSQ VDDQ P1
4V 4V 4V 4V
R14 VSSQ VDDQ P12
20% 20% 20% 20%
R3 VSSQ VDDQ P14 X6S X6S X6S X6S
5 FBA_VREFC J14 VREFC R4 VSSQ VDDQ P3 0603 0603 0603 0603
IN
V1 VSSQ VDDQ
T1 COMMON COMMON COMMON COMMON
C527 FBA_ZQ_2_B
R508 121ohm J13 ZQ V12 VSSQ VDDQ T12
820pF 0402 COMMON V14 T14
1% VSSQ VDDQ
50V
J10 SEN V3 VSSQ VDDQ T3
10%
3 X7R 3
0402 GND
COMMON

PLACE CLOSE TO DRAM


GND GND GND

FBVDDQ

4 FBA_D[63..32] C167 C164 C165 C166


BI 10uF 10uF 22uF 22uF
4V 4V 4V 4V
M2A M2C 20% 20% 20% 20%

@memory.u_mem_sd_ddr5_x32(sym_2):page6_i66 @memory.u_mem_sd_ddr5_x32(sym_4):page6_i88 X6S X6S X6S X6S


BGA170_MIRR BGA170_MIRR 0603 0603 0603W 0603W
COMMON COMMON COMMON COMMON COMMON COMMON

MIRRORED MIRRORED

FB_DBI x32 x16 x32 x16


FBA_DBI[7..0] FBA_D32 FBA_D48
4,5 32 V4 DQ0 48 A11 DQ16
BI FBA_DBI0 FBA_D33 NC FBA_D49 NC
0 33 V2 DQ1 NC
49 A13 DQ17 NC
FBA_DBI1 FBA_D34 FBA_D50
1 34 T4 50 B11 GND
FBA_DBI2 FBA_D35 DQ2 NC FBA_D51 DQ18 NC
2 35 T2 DQ3 NC
51 B13 DQ19 NC
FBA_DBI3 FBA_D36 FBA_D52
4 3 36 N4 DQ4 52 E11 DQ20 4
4
FBA_DBI4
FBA_DBI5
37
FBA_D37
FBA_D38
N2 DQ5
NC
NC
53
FBA_D53
FBA_D54
E13 DQ21
NC
NC
PLACE Around DRAM
5 38 M4 DQ6 NC
54 F11 DQ22 NC
FBA_DBI6 FBA_D39 FBA_D55
6 39 M2 DQ7 NC
55 F13 DQ23 NC
FBA_DBI7
7
FBA_EDC4 FBA_EDC6
FB_EDC R2 EDC0 C13 EDC2
FBA_DBI4 NC FBA_DBI6 GND
4,5
FBA_EDC[7..0] P2 D13
IN FBA_EDC0 DBI0 NC DBI2 NC
0
FBA_EDC1
1
FBA_EDC2 SNN_FBA_VREFD_3 SNN_FBA_VREFD_4
2
VREFD V10 VREFD A10
FBA_EDC3 FBA_D40 FBA_D56
3 40 V11 DQ8 56 A4 DQ24
FBA_EDC4 FBA_D41 FBA_D57
4 41 V13 DQ9 57 A2 DQ25
FBA_EDC5 FBA_D42 FBA_D58
5 42 T11 DQ10 58 B4 DQ26
FBA_EDC6 FBA_D43 FBA_D59
6 43 T13 DQ11 59 B2 DQ27
FBA_EDC7 FBA_D44 FBA_D60
7 44 N11 DQ12 60 E4 DQ28
FBA_D45 FBA_D61
45 N13 DQ13 61 E2 DQ29
FBA_D46 FBA_D62
46 M11 DQ14 62 F4 DQ30
FBA_D47 FBA_D63
47 M13 DQ15 63 F2 DQ31
FBA_EDC5 FBA_EDC7
R13 EDC1 C2 EDC3
FBA_DBI5 FBA_DBI7
P13 DBI1 D2 DBI3

4 FBA_WCK45 P4 WCK01 4 FBA_WCK67 D4 WCK23


IN IN
4 FBA_WCK45* P5 WCK01 4 FBA_WCK67* D5 WCK23
IN IN

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY

ASSEMBLY <ASSEMBLY_DESCRIPTION> SANTA CLARA, CA 95050, USA

PAGE DETAIL FBA bits 63..32


ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 6 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

NVVVD Decoupling
G1D
NVVDD
@digital.u_gpu_gb2c_64(sym_7):page7_i55
BGA595
COMMON

7/14 VDDS

NVVDD
L11 VDDS
L17 VDDS
M14 VDDS
1 P10 VDDS 1
P12 VDDS
C584 C575 C586 C566 C585 P16
1uF 1uF 1uF 1uF 1uF VDDS
PLACE UNDER GPU P18 VDDS
6.3V 6.3V 6.3V 6.3V 6.3V
T14 VDDS
10% 10% 10% 10% 10%
X6S X6S X6S X6S X6S
U11 VDDS
0402 0402 0402 0402 0402 U17 VDDS
COMMON COMMON COMMON COMMON COMMON

nv_res GPU_NVVDD_VSENSE
GM108 R524 0ohm
C576 C587 C604 C582 0402 0.05 ohm COMMON
4.7uF 4.7uF 4.7uF 4.7uF C615 C608 C598 C578 GPU_NVDS_VSENSE
VDDS_SENSE F4 nv_res
6.3V 6.3V 6.3V 6.3V 4.7uF 4.7uF 4.7uF 4.7uF RSVD GPU_GND_S_GSENSE
GNDS_SENSE
F3 R525 0ohm GPU_NVVDD_GNDSNS
20% 20% 20% 20% 6.3V 6.3V 6.3V 6.3V RSVD
0402 0.05 ohm COMMON
X6S X6S X6S X6S 20% 20% 20% 20%
0603 0603 0603 0603 X6S X6S X6S X6S
COMMON COMMON COMMON COMMON 0603 0603 0603 0603
COMMON COMMON COMMON COMMON

G1C
@digital.u_gpu_gb2c_64(sym_11):page7_i54
BGA595
C580 C592 C597 C602 COMMON
GND
4.7uF 4.7uF 4.7uF 4.7uF
11/14 NVVDD
6.3V 6.3V 6.3V 6.3V
K10 VDD
20% 20% 20% 20%
X6S X6S X6S X6S
K12 VDD
0603 0603 0603 0603 K14 VDD
2 COMMON COMMON COMMON COMMON K16 VDD 2
K18 VDD
L13 VDD
L15 VDD
M10 VDD
M12 VDD
GND M16 VDD
M18 VDD
N11 VDD
N13 VDD
N15 VDD
PLACE NEAR GPU CO-Layout 0603 and 0805 N17 VDD
P14 VDD
R11 VDD
R13 VDD
R15 VDD
C634 C635 C638 C639 C636 C637 C649 C650 C655 C654 R17
4.7uF 22uF 4.7uF 22uF 4.7uF 22uF 4.7uF 22uF 10uF 22uF VDD
T10 VDD
10V 4V 10V 4V 10V 4V 10V 4V 16V 4V
T12 VDD
10% 20% 10% 20% 10% 20% 10% 20% 10% 20%
X7R X6S X7R X6S X7R X6S X7R X6S X6S X6S
T16 VDD
0805 0603W 0805 0603W 0805 0603W 0805 0603W 0805 0603W T18 VDD
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON U13 VDD
U15 VDD
V10 VDD
V12 VDD
V14 VDD
V16 VDD nv_res
V18 VDD
R122 0ohm 7,19
OUT
04020.05 ohm COMMON
C647 C648 C653 C652 C139 C120 C146 C145 C138 C137
10uF 22uF 10uF 22uF 10uF 22uF 10uF 22uF 10uF 22uF
3 3
16V 4V 16V 4V 16V 4V 16V 4V 16V 4V GPU_NVVDD_VSENSE_L
VDD_SENSE F2 nv_res
10% 20% 10% 20% 10% 20% 10% 20% 10% 20% GPU_NVVDD_GNDSNS_L
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S GND_SENSE F1 R117 0ohm 7,19
OUT
0805 0603W 0805 0603W 0805 0603W 0805 0603W 0805 0603W 04020.05 ohm COMMON
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON

C144 C143 C136 C135 C142 C141 C133 C134 C128 C127
10uF 22uF 10uF 22uF 10uF 22uF 10uF 22uF 10uF 22uF
16V 4V 16V 4V 16V 4V 16V 4V 16V 4V
10% 20% 10% 20% 10% 20% 10% 20% 10% 20%
X6S X6S X6S X6S X6S X6S X6S X6S X6S X6S G1E
0805 0603W 0805 0603W 0805 0603W 0805 0603W 0805 0603W NVVDD @digital.u_gpu_gb2c_64(sym_6):page7_i56 NVVDD
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON BGA595
COMMON

6/14 XVDD

G1 XVDD XVDD N4
G2 XVDD XVDD N5
G3 XVDD XVDD N7
C119 C140 C132 C131 C641 C640 C129 C130 G4 P3
22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF XVDD XVDD
G5 XVDD XVDD
P4
6.3V 4V 6.3V 4V 6.3V 4V 6.3V 4V
G6 XVDD XVDD P6
20% 20% 20% 20% 20% 20% 20% 20%
X6S X6S X6S X6S X6S X6S X6S X6S
G7 XVDD XVDD R1
0805 0603W 0805 0603W 0805 0603W 0805 0603W H3 XVDD XVDD R2
4 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON H4 XVDD XVDD R3 4
H6 XVDD XVDD R4
J1 XVDD XVDD R5
J2 XVDD XVDD R6
J3 XVDD XVDD R7
J4 XVDD XVDD T1
J5 XVDD XVDD
T2
C644 C658 J6 XVDD XVDD T3
C642 C643 C646 C645 C656 C657 C661 C660 J7 T4
330uF 22uF 22uF 22uF 22uF 330uF 22uF 22uF 22uF 22uF XVDD XVDD
K1 XVDD XVDD T5
COMMON 4V 6.3V 6.3V 4V COMMON 6.3V 4V 6.3V 4V
20% 20%
K2 XVDD XVDD T6
20% 20% 20% 20% 20% 20% 20% 20%
2V@105degC X6S X6S X6S X6S 2V@105degC X6S X6S X6S X6S
K3 XVDD XVDD T7
AL-Polymer 0603W 0805 0805 0603W AL-Polymer 0805 0603W 0805 0603W K4 XVDD XVDD U3
3.5A@105degC,100KHz COMMON COMMON COMMON COMMON 3.5A@105degC,100KHz COMMON COMMON COMMON COMMON K5 XVDD XVDD U4
0.006ohm 0.006ohm
SMD_7343 SMD_7343
K6 XVDD XVDD U6
K7 XVDD XVDD V1
L3 XVDD XVDD
V2
L4 XVDD XVDD V3
M1 XVDD GM108 XVDD V4
GND M2 XVDD XVDD V5
CO-Layout 0603, 0805 and POSCAP M3 XVDD XVDD V6
M4 XVDD XVDD V7
RSVD
M5 XVDD XVDD W1
C630 M7 XVDD XVDD W2
C623 C622 C631 N1 W3
330uF 10uF 22uF 22uF XVDD XVDD
C632 N2 W4
COMMON 16V 4V 6.3V 22uF XVDD XVDD
20%
N3 XVDD
10% 20% 20% 4V
2V@105degC X6S X6S X6S 20%
AL-Polymer 0805 0603W 0805 X6S
3.5A@105degC,100KHz COMMON COMMON COMMON 0603W
0.006ohm
5 SMD_7343
COMMON 5

GND NVIDIA CORPORATION


2701 SAN TOMAS EXPRESSWAY

ASSEMBLY <ASSEMBLY_DESCRIPTION> SANTA CLARA, CA 95050, USA

PAGE DETAIL NVVVD Decoupling


ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 7 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

FBVDDQ and 1V8 Decoupling


G1H
FBVDDQ G1G @digital.u_gpu_gb2c_64(sym_13):page8_i47
@digital.u_gpu_gb2c_64(sym_12):page8_i44 BGA595
BGA595 COMMON
COMMON
[email protected] 13/14 GND
12/14 FBVDDQ
A2 GND GND K11
B26 FBVDDQ AB17 GND GND K13
1 C25 FBVDDQ AB20 GND GND K15 1
C590 C563 C561 C562 E23 AB24 K17
1uF 1uF 1uF 1uF FBVDDQ GND GND
E26 FBVDDQ AC2 GND GND L10
6.3V 6.3V 6.3V 6.3V
F14 FBVDDQ AC22 GND GND L12
10% 10% 10% 10%
X6S X6S X6S X6S
F21 FBVDDQ AC26 GND GND L14
0402 1005_BGA 1005_BGA 0402 G13 FBVDDQ
AC5 GND GND
L16
COMMON COMMON COMMON COMMON G14 FBVDDQ AC8 GND GND L18
G15 FBVDDQ AD12 GND GND L5
G16 FBVDDQ AD13 GND GND M11
G18 FBVDDQ A26 GND GND M13
G19 FBVDDQ AD15 GND GND M15
G20 FBVDDQ AD16 GND GND M17
C560 C591 C589 C558 G21 AD18 N10
1uF 1uF 1uF 1uF FBVDDQ GND GND
L22 FBVDDQ AD19 GND GND N12
6.3V 6.3V 6.3V 6.3V
L24 FBVDDQ AD21 GND GND N14
10% 10% 10% 10%
X6S X6S X6S X6S
L26 FBVDDQ
AD22 GND GND
N16
0402 0402 0402 0402 M21 FBVDDQ AE11 GND GND N18
COMMON COMMON COMMON COMMON N21 FBVDDQ AE14 GND GND P11
R21 FBVDDQ AE17 GND GND P13
T21 FBVDDQ AE20 GND GND P15
V21 FBVDDQ AB11 GND GND P17
W21 FBVDDQ AF1 GND GND P23
H24 FBVDDQ AF11 GND GND P26
C593 C599 H26 AF14 R10
10uF 10uF FBVDDQ GND GND
J21 FBVDDQ AF17 GND GND R12
4V 4V
K21 FBVDDQ
AF20 GND GND
R14
20% 20%
X6S X6S
AF23 GND GND R16
0603 0603 AF5 GND GND R18
COMMON COMMON AF8 GND GND T11
2 AG2 GND GND T13 2
AG26 GND GND T15
AB14 GND GND T17
PLACE UNDER GPU B1 GND GND U10
B11 GND GND U12
GND B14 GND GND U14
B17 GND GND
U16
B20 GND GND U18
B23 GND GND U23
B27 GND GND U26
C559 C594 C595 C596 B5 V11
10uF 22uF 22uF 22uF GND GND
B8 GND GND V13
4V 4V 4V 4V
E11 GND GND V15
20% 20% 20% 20%
X6S X6S X6S X6S
E14 GND GND V17
0603 0603W 0603W 0603W E17 GND GND Y2
COMMON COMMON COMMON COMMON E2 GND GND Y23
E20 GND GND
Y26
FBVDDQ E22 GND GND Y5
PLACE NEAR GPU E25 GND GND AA7
E5 GND GND AB7
E8 GND
GND FB_CAL_PD_VDDQ
FB_CAL_PD_VDDQ D22 R513 40.2ohm
0402 1% COMMON GND
FB_CAL_PU_GND GND
C24 R141 40.2ohm OPTIONAL GND:
FB_CAL_PU_GND
0402 1% COMMON

FB_CALTERM_GND
FB_CALTERM_GND B25 R142 60.4ohm XVDD AREA
SNN_PIN_H2 SNN_PIN_P2
0402 1% COMMON H2 GND_OPT GND_OPT P2
SNN_PIN_H5 SNN_PIN_P5
3 H5 GND_OPT GND_OPT P5 3
SNN_PIN_L2 SNN_PIN_U2
L2 GND_OPT GND_OPT U2
SNN_PIN_U5
GND_OPT U5
GND

PCB ADR/CMD
PWR REFERENCE
SNN_PIN_H23 SNN_PIN_L23
H23 GND_OPT GND_OPT L23
SNN_PIN_H25 SNN_PIN_L25
H25 GND_OPT GND_OPT L25

G1F
@digital.u_gpu_gb2c_64(sym_14):page8_i46
BGA595
COMMON

14/14 VDD18 1V8


51mA
G1I
VDD18 G8
VDD18 G9 @digital.u_gpu_gb2c_64(sym_5):page8_i36

1V8_AON G10 BGA595

G12 C606 C601 C616 C614 COMMON


1V8_AON 0.1uF 0.1uF 1uF 4.7uF
5/14 NC
16V 16V 6.3V 6.3V
10% 10% 10% 20%
X7R X7R X6S X6S SNN_GPU_NC_AA14 GM108
4 0402 0402 0402 0603 AA14 NC 4
SNN_GPU_NC_AA15 PEX_PLLVDD
COMMON COMMON COMMON COMMON AA15 NC
SNN_GPU_NC_AB6 PEX_PLLVDD
AB6 NC
SNN_GPU_NC_AB8
AB8 NC
SNN_GPU_NC_AD10 PEX_SVDD_3V3
AD10 NC
SNN_GPU_NC_AD7
GND AD7 NC
SNN_GPU_NC_AE22
AE22 NC
SNN_GPU_NC_AE3 PEX_TSTCLK*
GND AE3 NC
SNN_GPU_NC_AE4
PLACE UNDER GPU PLACE NEAR GPU AE4 NC
SNN_GPU_NC_AF2
AF2 NC
SNN_GPU_NC_AF22
1V8 AF22 NC
SNN_GPU_NC_AF3 PEX_TSTCLK
AF3 NC
SNN_GPU_NC_AF4
AF4 NC
SNN_GPU_NC_AG3
AG3 NC
SNN_GPU_NC_D10
D10 NC
SNN_GPU_NC_E10
E10 NC
C607 C603 C564 C611 SNN_GPU_NC_F10
F10 NC
0.1uF 0.1uF 1uF 4.7uF SNN_GPU_NC_F5
F5 NC
16V 16V 6.3V 6.3V SNN_GPU_NC_F6
F6 NC
10% 10% 10% 20% SNN_GPU_NC_W5 MLS_REF0
X7R X7R X6S X6S
W5 NC
0402 0402 0402 0603
COMMON COMMON COMMON COMMON
GM108 COMPATIBLE DESIGNS MUST
LEAVE NC PINS FLOATING EXCEPT
FOR THOSE SHOWN

GND GND

5 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY

ASSEMBLY <ASSEMBLY_DESCRIPTION> SANTA CLARA, CA 95050, USA

PAGE DETAIL FBVDDQ and 1V8 Decoupling


ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 8 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

IFPAB DL DVI-D DP_PWR DDC_5V

R599 DP R602 DVI


DP_PWR DDC_5V 0ohm 0ohm
0.05 ohm 0.05 ohm
NV3V3
0402 0402
COMMON COMMON
R597 R604
R44 DP 100k 2k
10k 5% 5% IFPA_ESD
0402 0402
5% DVI COMMON COMMON
0402

5
1 COMMON
DP DVI D503B
C725 1
0.1uF
@discrete.d_3pin_ac(sym_1):page9_i106
C720 0.1uF 16V
3 0.215A
100V 10%
0402 16V
SC70-6_DUAL X7R
10% DVI COMMON 0402
R40 X7R
R571 0ohm COMMON NV3V3

4
100k COMMON
0402 0.05 ohm COMMON
5% DP
0402 IFPA_AUX_SDA_Q R574
COMMON S D GND
4 3 3 4 GND DVI 0ohm
Q509B D S 0.05 ohm
Q5B 0402
SOT363
G SOT363 COMMON
GND @discrete.q_fet_n_enh(sym_6):page9_i76
@discrete.q_fet_n_enh(sym_6):page9_i85
COMMON
DP
COMMON G

5
IFPA_MODE 10
IN

DDC_5V C723

2
G G 10nF
Q5A Q509A
@discrete.q_fet_n_enh(sym_6):page9_i75 DP
@discrete.q_fet_n_enh(sym_6):page9_i84 25V
SOT363 SOT363 R603 10%
NV3V3
COMMON COMMON X7R
1 6 6 1 2k
S D D S 0402
IFPA_AUX_SCL_Q

2
DVI 5%
D503A COMMON
0402
R43
COMMON @discrete.d_3pin_ac(sym_1):page9_i99
10k 6 GND
0.215A
5% DVI R570 0ohm 100V DDC_5V
0402 SC70-6_DUAL
IFPA_AUX COMMON
DP 0402 0.05 ohm COMMON COMMON
DVI_HDMI_SIGNALS DVI R598

1
C719 0.1uF DP 100k
DVI_HDMI_SIGNALS
2 0402 16V
5% C5 2
0402 4.7nF
IFPA_AUX 10%
COMMON
R39 X7R 16V
100k COMMON 10%
X7R
5% DP 0402
0402
COMMON
COMMON
GND
G1J
@digital.u_gpu_gb2c_64(sym_4):page9_i136
BGA595 GND GND
COMMON IFPA_AUX_SDA_C 10

10
BI

10
10 IFPA_AUX_SCL_C 10
4/14 IFPAB OUT OUT
10
OUT
DVI HDMI DP OUT
SL/DL OUT

IFPA_L3
AC4 IFPA_TXC* DVI_HDMI_SIGNALS IFPA_L3 C20 0.1uF 29
SHIELD5
TXC/TXC IFPA_L3 AC3 IFPA_TXC DVI_HDMI_SIGNALS IFPA_L3 0402 COMMON C21 0.1uF 27
SHIELD3
0402 COMMON 25
SHIELD1
IFPAB_RSET
GND R518 1k AA6 IFPAB_RSET IFPAB_TXD0_C*
0402 1% COMMON TXD0/0 IFPA_L2 Y3 IFPA_TXD0* DVI_HDMI_SIGNALS IFPA_L2 C22 0.1uF DVI_HDMI_SIGNALS 17
TX0-
IFPAB_TXD0_C J4
IFPA_L2 Y4 IFPA_TXD0 DVI_HDMI_SIGNALS IFPA_L2 0402 COMMON C23 0.1uF DVI_HDMI_SIGNALS 18
TX0+
C24 0.1uF IFPAB_TXD1_C* @electro_mechanic.con_dvi_d(sym_4):page9_i96
IFPA_L1 0402 COMMON DVI_HDMI_SIGNALS TX1-9
C25 0.1uF IFPAB_TXD1_C 17 9 1
IFPA_L1 0402 COMMON DVI_HDMI_SIGNALS 10
TX1+ 90
IFPAB_TXD2_C*
330mA TXD1/1 IFPA_L1 AA2 IFPA_TXD1* DVI_HDMI_SIGNALS IFPA_L0 C26 0.1uF 0402 COMMON DVI_HDMI_SIGNALS TX2-1 DVI_D_SHLD
IFPAB_TXD2_C
12 GPU_PLLVDD W7 IFPAB_PLLVDD IFPA_L1 AA3 IFPA_TXD1 DVI_HDMI_SIGNALS IFPA_L0 0402 COMMON C27 0.1uF DVI_HDMI_SIGNALS 2
TX2+ DVI_D_SHLD
IN
0402 COMMON 3
SHLD24 COMMON

11
SHLD13
C618 AA1 IFPA_TXD2* DVI_HDMI_SIGNALS 19
SHLD05
TXD2/2 IFPA_L0 10
IFPAB_TXD3_M* IFPAB_TXD3_C*
0.1uF AB1 IFPA_TXD2
OUT
C28 0.1uF 12
TX3-
IFPA_L0 DVI_HDMI_SIGNALS 10 DVI_HDMI_SIGNALS
16V OUT IFPAB_TXD3_M C29 0.1uF IFPAB_TXD3_C
3 0402 COMMON DVI_HDMI_SIGNALS 13
TX3+ 3
10% IFPAB_TXD4_M* C30 0.1uF IFPAB_TXD4_C*
10 0402 COMMON DVI_HDMI_SIGNALS TX4-4
X7R IFPA_AUX_SDA OUT IFPAB_TXD4_M C31 0.1uF IFPAB_TXD4_C
0402 IFPA_AUX_SDA AA5 10 0402 COMMON DVI_HDMI_SIGNALS 5
TX4+
IFPA_AUX_SCL OUT IFPAB_TXD5_M* C32 0.1uF IFPAB_TXD5_C*
COMMON
IFPA_AUX_SCL AA4 0402 COMMON DVI_HDMI_SIGNALS 20
TX5-
IFPAB_TXD5_M C33 0.1uF IFPAB_TXD5_C
0402 COMMON DVI_HDMI_SIGNALS 21
TX5+
GND 0402 COMMON 6
DDCC
PLACE NEAR BALL IFPB_L3
AB4 IFPB_TXC* DVI_HDMI_SIGNALS IFPB_L3 11 7
DDCD
OUT
PEX_VDD TXC IFPB_L3 AB5 IFPB_TXC DVI_HDMI_SIGNALS IFPB_L3 11 14
VDDC
OUT
R581 0ohm 15
GND
0402 0.05 ohm COMMON R20 499ohm YES 22
SHLDC
IFPAB_TXD3* IFPB_TXD0* IFPAB_TXC_C*
PLACE NEAR GPU PLACE NEAR BALLS W6 IFP_IOVDD TXD0/3 IFPB_L2 AB2 DVI_HDMI_SIGNALS IFPB_L2 R580 0ohm 11 0402 1% COMMON DVI_HDMI_SIGNALS 24
TXC-
IFPAB_TXD3 OUT IFPAB_TXC_C
IFPB_L2 AB3 DVI_HDMI_SIGNALS IFPB_L2 0402 0.05 ohm COMMON R21 499ohm YES DVI_HDMI_SIGNALS 23
TXC+
SNN_DACA_VSYNC_DVI
Y6 IFP_IOVDD
R589 0ohm 0402 1% COMMON 8
VSYNC
610mA 0402 0.05 ohm COMMON R22 499ohm YES 16
HPD
IFPAB_TXD4* IFPB_TXD0 24 16 8
TXD1/4 IFPB_L1 AD2 DVI_HDMI_SIGNALS IFPB_L1 R588 0ohm 11 0402 1% COMMON
IFPAB_TXD4 OUT
C551 C548 C550 C613
IFPB_L1 AD3 DVI_HDMI_SIGNALS IFPB_L1 04020.05 ohm COMMON R23 499ohm YES
4.7uF 1uF 0.1uF 0.1uF R583 0ohm 0402 COMMON
1%
6.3V 6.3V 16V 16V
0402 0.05 ohm COMMON R24 499ohm YES
20% 10% 10% 10% IFPAB_TXD5* IFPB_TXD1*
TXD2/5 IFPB_L0 AD1 DVI_HDMI_SIGNALS IFPB_L0 R591 0ohm 11 0402 1% COMMON
X6S X6S X7R X7R IFPAB_TXD5 OUT
YES
0603 0402 0402 0402 IFPB_L0 AE1 DVI_HDMI_SIGNALS IFPB_L0 0402 0.05 ohm COMMON R25 499ohm
COMMON COMMON COMMON COMMON R582 0ohm 0402 1% COMMON
04020.05 ohm COMMON R5 499ohm YES
IFPB_AUX_SDA
AD5 R590 0ohm IFPB_TXD1 11 0402 1% COMMON
IFPB_AUX_SDA OUT
IFPB_AUX_SCL
IFPB_AUX_SCL
AD4 04020.05 ohm COMMON R6 499ohm YES 26
SHIELD2
R584 0ohm 0402 1% COMMON 28
SHIELD4
GND 0402 0.05 ohm COMMON R8 499ohm YES 30
SHIELD6
R592 0ohm IFPB_TXD2* 11 0402 1% COMMON
OUT
YES
IFPAB (DEFEATURED 0N GM108) 04020.05 ohm COMMON
R585 0ohm
R7
0402 1%
499ohm
COMMON
04020.05 ohm COMMON R10 499ohm YES GND
4 R593 0ohm IFPB_TXD2 11 0402 1% COMMON 4
OUT
DVI_HDMI_SIGNALS IFPB_AUX 11 04020.05 ohm COMMON R9 499ohm YES
OUT
DVI_HDMI_SIGNALS IFPB_AUX 11 0402 1% COMMON
OUT
R19 499ohm YES
0402 1% COMMON
NV3V3 R18 499ohm YES
D1852
0402 1% COMMON
IFPAB_TERM_CM IFPAB_TXD2_C IFPAB_TXD2_C
1G1D1S 3 8 5 6 8
D IFPAB_TXD2_C* IFPAB_TXD2_C*
Q514 0.400 8 4 D Y4 7 8
@discrete.q_fet_n_enh(sym_2):page9_i28 3 C Y3 8
SOT323_1G1D1S IFPAB_TXD1_C IFPAB_TXD1_C
1G COMMON 8 2 GND GND1 9 8
IFPAB_TXD1_C* IFPAB_TXD1_C*
S 2 8 1 B Y2 10 8
60V
A Y1
0.115A
-1000mohm@10V / [email protected] / [email protected] RCLAMP0524P DNI
0.8A
0.2W
20V

D1853
GND
IFPAB_TXD0_C IFPAB_TXD0_C
8 5 6 8
IFPAB_TXD0_C* IFPAB_TXD0_C*
1V8 8 4 D Y4 7 8
3 C Y3 8
IFPAB_TXC_C IFPAB_TXC_C
8 2 GND GND1 9 8
R577 IFPAB_TXC_C* IFPAB_TXC_C*
8 1 B Y2 10 8
10k A Y1
5%
RCLAMP0524P DNI
0402
COMMON
12 GPIO14_IFPA_HPD 3 1B1C1E
OUT C
Q512
GPIO14_IFPA_HPD_R IFPA_HPD_R ED108 IFPA_AUX_SCL_C
1B
@discrete.q_npn(sym_1):page9_i26 R600 100k R601 0ohm IFPA_DVI_DP_HPD 9,10 2 1 ESD5V3U1U-02LRH DNI DNI
SOT23_1B1C1E IN
0402 5% COMMON 0402 0.05 ohm COMMON
COMMON IFPA_AUX_SDA_C
2 E ED109
2 1 ESD5V3U1U-02LRH DNI
5 R576 C733 C746 5
100k 220pF 220pF
5% 50V 50V ED104
2 1 ESD5V3U1U-02LRH IFPA_DVI_DP_HPD
DNI
0402 5% 5%
COMMON C0G C0G
GND 0402 0402
COMMON COMMON
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
GND GND GND
ASSEMBLY <ASSEMBLY_DESCRIPTION> SANTA CLARA, CA 95050, USA

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NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 9 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

IFPA DP
NV12V NV3V3

R616
10k
5% R615
0402 10k
COMMON
5%
0402
1 9 IFPA_MODE 3 1B1C1E COMMON 1
OUT
Q513B C IFPA_MODE*
B 5
@discrete.q_npn(sym_1):page10_i38 6 1B1C1E
Q513A C
SOT363
COMMON IFPA_MODE_R
4 E 2B
@discrete.q_npn(sym_1):page10_i44 R626 10k
SOT363
0402 5% COMMON
COMMON
1 E

GND GND DP_PWR


J1
@electro_mechanic.con_displayport(sym_3):page10_i50
RECEPTACLE
C7 C744
NORM_4GND
0.1uF 10uF
COMMON
SHIELD4 16V 16V
21
10% 10%
SHIELD3
23 X7R X6S
0402 0805
COMMON COMMON
PWR
20
20
PWR_RET
19
19
9
IFPA_DVI_DP_HPD HPD
18
OUT 18
GND
17
9
IFPA_AUX_SDA_C AUXN
17 GND
16
BI DVI_HDMI_SIGNALS 16
9 DVI_HDMI_SIGNALS
IFPA_AUX_SCL_C AUXP
15
BI 15 DPA_CEC
CEC
14
14 IFPA_MODE_C
MODE
13
IFPA_L3_C* 13
2 9 IFPA_TXC* C12 0.1uF DVI_HDMI_SIGNALS
LANE_3N
12 2
IN IFPA_L3_C 12
9 IFPA_TXC 0402 COMMON C13 0.1uF DVI_HDMI_SIGNALS
LANE_3P
10 GND
11
IN 11
0402 COMMON
IFPA_L2_C* 10
R625 R627
9
IFPA_TXD0* C14 0.1uF LANE_2N
9
DVI_HDMI_SIGNALS IFPA_L2_C 9
IN IFPA_TXD0 C15 0.1uF LANE_2P
7 8GND 5.1M 1M
9 0402 COMMON DVI_HDMI_SIGNALS
IN 8 5% 5%
0402 COMMON
IFPA_L1_C* 7 0402 0402
9
IFPA_TXD1* C16 0.1uF LANE_1N
6
IN DVI_HDMI_SIGNALS IFPA_L1_C 6 COMMON COMMON
9 IFPA_TXD1 0402 COMMON C17 0.1uF DVI_HDMI_SIGNALS
LANE_1P
4 5GND
IN 5
0402 COMMON
IFPA_L0_C* 4
9 IFPA_TXD2* C18 0.1uF DVI_HDMI_SIGNALS
LANE_0N
3
IN IFPA_L0_C 3
9 IFPA_TXD2 0402 COMMON C19 0.1uF DVI_HDMI_SIGNALS
LANE_0P
1 2GND GND GND
IN 2
0402 COMMON
1

SHIELD2
22
SHIELD1
24
D1800

IFPA_L0_C IFPA_L0_C
8 5 6 8
IFPA_L0_C* IFPA_L0_C*
8 4 D Y4 7 8
3 C Y3 8 080-0707-000
IFPA_L1_C IFPA_L1_C
8 2 GND GND1 9 8
IFPA_L1_C* IFPA_L1_C*
8 1 B Y2 10 8
080-0636-000
A Y1 GND
RCLAMP0524P DNI

D1801

IFPA_L2_C IFPA_L2_C
8 5 6 8
IFPA_L2_C* IFPA_L2_C*
8 4 D Y4 7 8
3 3 C Y3 8 3
IFPA_L3_C IFPA_L3_C
8 2 GND GND1 9 8
IFPA_L3_C* IFPA_L3_C*
8
1 B Y2 10 8
A Y1

RCLAMP0524P DNI

DNI

3V3_PEX
U3 DP_PWR
@analog.u_sw_pwr_tps2031(sym_1):page10_i4
SO8
COMMON 1A
2 IN OUT 8
3 IN OUT 7 C8
6 R4 C11 C745
OUT 10k 0.1uF 10uF 270uF
C37
0.1uF 4 5% 16V 16V COMMON
16V EN 0402 10% 10% 20%
COMMON X7R X6S 16V@105degC
10% SNN_PWRA_OC
X7R
5 OC* GND
1 0402 0805 AL-Polymer
COMMON COMMON [email protected],100KHz
0402
0.01ohm
COMMON
TH_D63P25

4 GND GND GND GND GND 4

GND

5
17ci203 5

NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY

ASSEMBLY <ASSEMBLY_DESCRIPTION> SANTA CLARA, CA 95050, USA

PAGE DETAIL IFPA DP


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NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 10 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

IFPB HDMI/DP DP_PWR DDC_5V

DP_PWR DDC_5V R13 DP R17 HDMI


NV3V3 0ohm 0ohm
0.05 ohm 0.05 ohm
R11 R14 0402 0402
COMMON COMMON
R586 DP 100k 2k
10k 5%
0402
5%
0402
IFPB_ESD
DP-SKU ONLY
5% HDMI COMMON COMMON
NV12V
0402

5
COMMON
DP HDMI D1B
C34 NV3V3
0.1uF
1 @discrete.d_3pin_ac(sym_1):page11_i95 1
C726 0.1uF 16V
3 0.215A
100V 10% R596
0402 16V
SC70-6_DUAL X7R 10k
10% HDMI COMMON 0402 NV3V3
R587 X7R
R32 0ohm COMMON
5% R572

4
100k COMMON 0402 10k
04020.05 ohm COMMON COMMON
5% DP 5%
0402 IFPB_AUX_SDA_Q R594 0402
COMMON S D GND 3 1B1C1E COMMON
0ohm
4 3 3 4 GND Q510B C IFPB_MODE*
Q511B
Q3B D S HDMI 0.05 ohm
5 B
@discrete.q_npn(sym_1):page11_i124 6 1B1C1E
0402
Q510A C
SOT363 SOT363
G SOT363 COMMON COMMON IFPB_MODE_R
GND @discrete.q_fet_n_enh(sym_6):page11_i68
@discrete.q_fet_n_enh(sym_6):page11_i71
COMMON
DP 4 E 2 B
@discrete.q_npn(sym_1):page11_i123 R595 10k
COMMON SOT363
G
COMMON 0402 5% COMMON

5
IFPB_MODE
1 E

GND
DDC_5V C36

2
G G 10nF GND
Q511A Q3A
@discrete.q_fet_n_enh(sym_6):page11_i67 DP
@discrete.q_fet_n_enh(sym_6):page11_i70 25V
SOT363 SOT363 R15 10%
NV3V3
COMMON COMMON 2k X7R
1 S D 6 6 D S 1 0402
IFPB_AUX_SCL_Q

2
HDMI 5%
0402 D1A COMMON
R578 DDC_5V
COMMON @discrete.d_3pin_ac(sym_1):page11_i83
ED106
2 1 ESD5V3U1U-02LRH
IFPB_AUX_SCL_C 10k 6 GND
DNI 0.215A
5%
HDMI R33 0ohm 100V
IFPB_AUX_SDA_C 0402 SC70-6_DUAL
ED107
2 1 ESD5V3U1U-02LRH DNI COMMON
DP 0402 0.05 ohm COMMON COMMON
HDMI R12 C1 J3

1
C724 0.1uF DP 100k 100pF RECEPTACLE
ED105
2 1 ESD5V3U1U-02LRH DNI
IFPB_HPD_C 0402 16V
5% 50V HDMI_A_SMD
0402 5%
10% @electro_mechanic.con_hdmi(sym_1):page11_i108
2 COMMON C0G 2
R579 X7R
0402
COMMON
100k COMMON
COMMON 20 SHIELD1
5%
0402
DP 21 SHIELD2
COMMON
GND GND 19 HP_DET
19
18 +5V
18
17 DDC/CEC_GND
IFPB_AUX_SDA IFPB_AUX_SDA_C SDA
17
9 GND 16
BI
IFPB_AUX_SCL IFPB_AUX_SCL_C SCL
16
9 15
IN SNN_HDMI_RSVD RESERVED
15
14
SNN_HDMI_CEC CEC
14
13
IFPB_TXC* C736 0.1uF IFPB_TXC_C1* IFPB_TXC_CR1* CK-
13
9,11 DVI_HDMI_SIGNALS R617 6.04ohm DVI_HDMI_SIGNALS 12
IN
IFPB_TXC C737 0.1uF IFPB_TXC_C1 IFPB_TXC_CR1 CK_SHIELD
12
9,11 0402 COMMON DVI_HDMI_SIGNALS 0402 1% COMMON R618 6.04ohm DVI_HDMI_SIGNALS 11 11
IN CK+
0402 COMMON 0402 1% COMMON 10
IFPB_TXD0* C738 0.1uF IFPB_TXD0_C1* IFPB_TXD0_CR1* D0-
10
9,11 DVI_HDMI_SIGNALS R619 6.04ohm DVI_HDMI_SIGNALS 9
IN IFPB_TXD0 C739 0.1uF IFPB_TXD0_C1 IFPB_TXD0_CR1 D0_SHIELD
9
9,11 0402 COMMON DVI_HDMI_SIGNALS 0402 1% COMMON R620 6.04ohm DVI_HDMI_SIGNALS 8 8
IN
0402 COMMON 0402 1% COMMON 7 D0+
IFPB_TXD1* C740 0.1uF IFPB_TXD1_C1* IFPB_TXD1_CR1* D1-
7
9,11 DVI_HDMI_SIGNALS R621 6.04ohm DVI_HDMI_SIGNALS 6
IN
IFPB_TXD1 C741 0.1uF IFPB_TXD1_C1 IFPB_TXD1_CR1 D1_SHIELD
6
9,11 0402 COMMON DVI_HDMI_SIGNALS 0402 1% COMMON R622 6.04ohm DVI_HDMI_SIGNALS 5 5
IN
0402 COMMON 0402 1% COMMON 4 D1+
IFPB_TXD2* C742 0.1uF IFPB_TXD2_C1* IFPB_TXD2_CR1* D2-
4
9,11 DVI_HDMI_SIGNALS R623 6.04ohm DVI_HDMI_SIGNALS 3
IN
C743 0.1uF IFPB_TXD2_C1 IFPB_TXD2_CR1 D2 _SHIELD
3
9,11 0402 COMMON DVI_HDMI_SIGNALS 0402 1% COMMON R624 6.04ohm DVI_HDMI_SIGNALS 2 2
IN D2+
1V8 0402 COMMON 0402 1% COMMON 1 1

22 SHIELD3
R106 23 SHIELD4
10k
5%
0402
COMMON
3 12 GPIO15_IFPB_HPD 3 1B1C1E 3
OUT C
Q2
IFPB_HPD_C_Q IFPB_HPD_C_R IFPB_HPD_C
1 B
@discrete.q_npn(sym_1):page11_i130 R2 100k R1 0ohm
SOT23_1B1C1E GND
COMMON
0402 5% COMMON 0402 0.05 ohm COMMON DP_PWR
2 E R3 C3 C2
100k 220pF PLACE CLOSE 220pF
5% 50V 50V
TO CONNECTOR
0402 5% 5% C9 C10
COMMON C0G C0G
10uF 0.1uF
0402 0402
COMMON COMMON 16V 16V
10% 10%
GND GND YES X6S X7R
YES GND YES GND YES 0805 0402
IFPB_TXD2_L
LB510 600ohm R612 499ohm COMMON COMMON
IFPB_TXD2_L*
BEAD_0402 COMMON LB509 600ohm 0402 1% COMMON R611 499ohm
YES BEAD_0402 COMMON YES 0402 1% COMMON
Hotplug Detection LB508 600ohm YES IFPB_TXD1_L
IFPB_TXD1_L*
R610 499ohm YES GND GND
BEAD_0402 COMMON LB507 600ohm 0402 1% COMMON R609 499ohm
YES BEAD_0402 COMMON YES 0402 1% COMMON
YES IFPB_TXD0_L YES
LB506 600ohm R608 499ohm
IFPB_TXD0_L*
BEAD_0402 COMMON LB505 600ohm 0402 1% COMMON R607 499ohm
YES BEAD_0402 COMMON YES 0402 1% COMMON J2
IFPB_TXC_L
LB504 600ohm YES R606 499ohm YES @electro_mechanic.con_displayport(sym_1):page11_i104
IFPB_TXC_L*
BEAD_0402 COMMON LB503 600ohm 0402 1% COMMON R605 499ohm RECEPTACLE
NV3V3 BEAD_0402 COMMON 0402 1% COMMON NORM
IFPB_TERM_EN_D SHIELD6
COMMON
21
3 SHIELD5
23
1G1D1S
D Q1 SHIELD4
25
@discrete.q_fet_n_enh(sym_2):page11_i25
SOT323_1G1D1S
1G COMMON
S 2 PWR
20
20
4 60V
PWR_RET
19 4
19
0.115A
-1000mohm@10V / [email protected] / [email protected]
HPD
18
0.8A
18
0.2W
IFPB_AUX_SDA_C AUXN
17
GND
20V
17 16
IFPB_AUX_SCL_C AUXP
16
15 15 DPF_CEC
GND CEC
14
14 IFPF_MODE_C
MODE
13
IFPB_L3_C* 13
C727 0.1uF DP_SIGNALS
LANE_3N
12
IFPB_L3_C 12
0402 COMMON C728 0.1uF DP_SIGNALS
LANE_3P
10 GND
11
11
0402 COMMON R613 R614
IFPB_L2_C* 10
C729 0.1uF LANE_2N
9 5.1M 1M
DP_SIGNALS
IFPB_L2_C 9 5% 5%
0402 COMMON C730 0.1uF DP_SIGNALS
LANE_2P
7 8GND
8 0402 0402
0402 COMMON COMMON COMMON
IFPB_L1_C* 7
C731 0.1uF LANE_1N
6
DP_SIGNALS IFPB_L1_C 6
0402 COMMON C732 0.1uF LANE_1P
4 5GND
DP_SIGNALS 5
0402 COMMON
IFPB_L0_C* 4
C734 0.1uF LANE_0N
3 GND GND
DP_SIGNALS 3
IFPB_L0_C
IFPB_TXD2 0402 COMMON C735 0.1uF DP_SIGNALS
LANE_0P
1 2GND
2
0402 COMMON
1

D1803
IFPB_L0_C IFPB_L0_C
8 5 6 8
SHIELD3
22
IFPB_L0_C* IFPB_L0_C*
4 D Y4 7 SHIELD2
24
8 8
3 C Y3 8 SHIELD1
26
IFPB_L1_C IFPB_L1_C
8
2 GND GND1 9 8
IFPB_L1_C* IFPB_L1_C*
8
1 B Y2 10 8
A Y1

RCLAMP0524P DNI
GND
D1802
5 5
IFPB_L2_C IFPB_L2_C
8 5 6 8
IFPB_L2_C* IFPB_L2_C*
8
4 D Y4 7 8
3 C Y3 8
IFPB_L3_C IFPB_L3_C
8
2 GND GND1 9 8
IFPB_L3_C* IFPB_L3_C*
8
1 B
A
Y2
Y1
10 8 NVIDIA CORPORATION
RCLAMP0524P DNI 2701 SAN TOMAS EXPRESSWAY

ASSEMBLY <ASSEMBLY_DESCRIPTION> SANTA CLARA, CA 95050, USA

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DNI NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 11 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

JTAG,GPIO&XTAL

9
OUT
1 G1L 1
@digital.u_gpu_gb2c_64(sym_9):page12_i132
1V8

112mA
BGA595
COMMON

9/14 XTAL_PLL
Smart Fan
GM108
LB502 30ohm GPU_PLLVDD 1V 0.300 L6 XS_PLLVDD
BEAD_0603 COMMON M6 PLLVDD
SP_PLLVDD
F11 GPCPLL_AVDD
N6 VID_PLLVDD
NC XTALOUTBUFF GPIO PWM %
NC 1V8
C625 C624 C633 C620 C619 C621 C617
22uF 22uF 4.7uF 0.1uF 0.1uF 0.1uF 0.1uF
1V8
4V 6.3V 6.3V 16V 16V 16V 16V
20%
X6S
20%
X6S
20%
X6S
10%
X7R
10%
X7R
10%
X7R
10%
X7R
PU 66% HIGH
0603W 0805 0603 0402 0402 0402 0402 R119 100k XTALSSIN A10 XTALSSIN XTALOUTBUFF
C10 XTALOUTBUFF R120 100k
COMMON COMMON COMMON COMMON COMMON COMMON COMMON 0402 5% COMMON 0402 5% COMMON

CO-LAYOUT 0805 AND 0603 C11 XTALIN XTALOUT B10


PLACE NEAR GPU PLACE UNDER GPU MID 33% HIGH (2-PIN DEFAULT)

R128 XTALIN Y1 27MHz XTALOUT R127


XTAL XTAL
100k 100k
GND GND GENERIC_DEZ1 TH_HC49S 30ppm COMMON GENERIC_DEZ1
5%
@clocks.xtal(sym_1):page12_i56
5% PD 100% HIGH
0402 0402
C109 C110
COMMON COMMON
15pF 15pF
50V 50V
5% 5%
C0G C0G
2 0402 0402 2
COMMON COMMON

GND GND GND GND G1M


@digital.u_gpu_gb2c_64(sym_3):page12_i133
BGA595
COMMON
1V8
3/14 JTAG

3 JTAG_TCLK AE5 JTAG_TCK


IN
3 JTAG_TDI AE6 JTAG_TDI
1

R113 G IN
Q22 NV3V3 NV3V3 NV3V3 NV3V3 3 JTAG_TDO AF6 JTAG_TDO
10k @discrete.q_fet_n_enh(sym_6):page12_i144
IN
AD6
3 JTAG_TMS JTAG_TMS
5% SOT323_1G1D1S IN
COMMON 3 JTAG_TRST* AG4 JTAG_TRST
0402 IN NVJTAG_SEL
COMMON 2 S D 3 AD9 NVJTAG_SEL
R535 R539
100k 100k R137 R517
GPU_THERM_OVERT*

5
R111 0ohm 5% 5% G G 10k 10k
THERM_OVERT* 14
0402 0402
Q503A Q503B
OUT 5% 5%
04020.05 ohm COMMON @discrete.q_fet_n_enh(sym_6):page12_i108
@discrete.q_fet_n_enh(sym_6):page12_i107
COMMON COMMON 0402 0402
SOT363 SOT363
COMMON COMMON COMMON COMMON
1 S D 6 4 S D 3

I2CS_SCL_R
R536 33ohm PEX_SMCLK 3 GND GND
OUT
0402 5% COMMON
I2CS_SDA_R
R540 33ohm PEX_SMDAT 3
BI
0402 5% COMMON
G1K
3 @digital.u_gpu_gb2c_64(sym_8):page12_i134 3
BGA595
COMMON

8/14 MISC1

D3
@discrete.d_3pin_aa(sym_1):page12_i77 12V_PEX
GPU_I2CS_SCL
I2CS_SCL D9 30V
GPU_I2CS_SDA 0.2A
I2CS_SDA D8
A6 OVERT
SOT23
COMMON
CO-Layout
SNN_GPU_TS_VREF SNN_I2CC_SCL
AE2 TS_VREF I2CC_SCL A9 12V_PEX 1 For Bring-Up
SNN_I2CC_SDA
I2CC_SDA B9 3 1 J6
2 2 @electro_mechanic.hdr_1x2(sym_1):page12_i95
R65 MALE
2.5MM
SNN_GPU_THERM_DN 10k C64 C65 C55 C58
E12 THERMDN
0
SNN_I2CB_SCL 5% 10uF 10uF 10uF 1uF
I2CB_SCL C9 1V8 1V8 NV3V3 NV3V3 3V3_PEX
0402
NORM
SNN_GPU_THERM_DP SNN_I2CB_SDA 16V 16V 16V 16V COMMON
F12 THERMDP I2CB_SDA C8 COMMON
R58 0ohm
20% 10% 10% 10%
0402 0.05 ohm COMMON
X7R X6S X6S X7R
R103 R519 R57
1206 0805 0805 0603
10k 10k 10k COMMON COMMON COMMON COMMON
5% 5% 5% FAN_PWM_2PIN
0402 0402 0402 1G1D1S
3 L1 180uH
D FAN_PWM_2PIN_R
COMMON COMMON COMMON Q9 SMD_4_5X4 COMMON
@discrete.q_fet_n_enh(sym_2):page12_i68
C6 GPIO0_NVVDD_PWM_VID 19
R92 R93 1G SOT23_1G1D1S C42 R59
GPIO0 SNN_GPU_GPIO1 OUT 10k 10k COMMON
1uF 0ohm
GPIO1
B2 S 2 12V_PEX
SNN_GPU_GPIO2 5% 5% 16V 0.05 ohm
GPIO2 D6 0402 0402 0402
SNN_GPU_GPIO3 10%
GPIO3 C7 COMMON COMMON X7R nv_cap nv_cap COMMON
SNN_GPU_GPIO4 R26
GPIO4 F9 0603
SNN_GPU_GPIO5 10k C63 C56
4 GPIO5 A3 COMMON 4
A4 GPIO6_NVVDD_PSI*
5% 4.7uF 4.7uF
19
GPIO6 SNN_GPU_GPIO7 OUT 0402 16V 16V
GPIO7 B6 COMMON GND GND GND

1
G 20% 20%
GPIO8 E9 GPIO8_FBVDD_SEL 18 Q20
SNN_GPU_GPIO9 OUT X6S X6S
GPIO9 F8 @discrete.q_fet_n_enh(sym_6):page12_i35 0603W 0603W
SOT323_1G1D1S
GPIO10 C5 GPIO10_FBVREF_SEL 5 COMMON POWER_BRAKE* COMMON COMMON
GPIO11_POWER_BRAKE* OUT FAN_PWM_2PIN_R
GPIO11
E7 2 S D 3 3
SNN_GPU_GPIO12 IN
GPIO12 D7 GND NV3V3 NV3V3 NV3V3 CO-LAY WITH 0805 CAP
GPIO13_FAN_TACH
GPIO13 B4
GPIO14 B3 GPIO14_IFPA_HPD 9 12V_PEX
IN
GPIO15 C3 GPIO15_IFPB_HPD 11 D502
GPIO16_FAN_PWM

3
IN R16 R564
GPIO16 D5 @discrete.d_3pin_cc(sym_2):page12_i84
SNN_GPU_GPIO17 10k 10k
D4 30V
GPIO17 SNN_GPU_GPIO18 5% 5% 0.2A
C2 R28 0ohm
GPIO18 SNN_GPU_GPIO19 0402 0402 SOT23
F7 0402 0.05 ohm COMMON COMMON COMMON

2
GPIO19 SNN_GPU_GPIO20 COMMON
E6
GPIO20 SNN_GPU_GPIO21 FAN_PWM_4PIN
GM108 C4 1 J5
GPIO21 SNN_GPU_GPIO22
A7 2 @electro_mechanic.hdr_1x4(sym_1):page12_i87
I2CA_SDA GPIO22 SNN_GPU_GPIO23 MALE
B7 NV3V3 3 2.0MM
I2CA_SCL GPIO23
4 VERTICAL
NORM

5
C699 C702 COMMON
U4
1 1uF 1nF
@logic.u_and_2in(sym_1):page12_i37
16V 16V
4
10% 10%
2 SC70-5 X7R X7R
COMMON 0603 0402
COMMON COMMON

3
GND GND GND
5 5

17ci203
GND

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NV_PN 600-1G110-BASE-A00
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A B C D E F G H
A B C D E F G H

ROM & STRAPS


ROM_SO ROM_SI ROM_SCLK SOR_EXPOSED[3:0] 1:ENABLE 0:DISABLE
H=High :Tied to 1.8V
L L L 1111 DEFAULT SOR0/1 ENABLE M=Middle:Tied to 0.9V
L=Low :Tied to 0V 1V8
1 L L H 1110 1

L H L 1101
G1N
@digital.u_gpu_gb2c_64(sym_10):page13_i37 R526
L H H 1100 BGA595 10k
COMMON 5%
0402
U501 1V8
10/14 MISC2 COMMON
H L L 1011 @memory.u_mem_fl_ser_512kx8(sym_1):page13_i31
SO_8
COMMON
7 8
H L H 1010 HOLD* VCC
3
ROM_CS* ROM_CS_R* WP*/NC C651
ROM_CS D12 R521 0ohm 1
CS* 0.1uF
0402 0.05 ohm COMMON
H H L 1001 ROM_SI
B12 ROM_SI
R530 33ohm
ROM_SI_R
5 16V
DIO 10%
ROM_SO A12 0402 5% COMMON 2 DO X7R
ROM_SO ROM_SO_R
STRAP0 D1 STRAP0 ROM_SCLK C12 R522 0ohm 6 CLK GND
4 0402
H H H 1000 STRAP1 D2 STRAP1 04020.05 ohm COMMON COMMON
ROM_SCLK ROM_SCLK_R
STRAP2 E4 STRAP2
R527 33ohm
STRAP3 E3 STRAP3 0402 5% COMMON
L L M 0111 STRAP4 D3 STRAP4
STRAP5 C1 STRAP5 GND
NC GM108
L M L 0110
SNN_GPU_BUFRST*
BUFRST D11
L M H 0101 RESERVED

2 2
L H M 0100

H L M 0011

H M L 0010

H M H 0001

H H M 0000

STRAP2 STRAP1 STRAP0 RAMCFG[4:0]

L L L 0000 DEFAULT

L L H 0001

L H L 0010

3 L H H 0011 3

H H L 0110
1V8 1V8
H H H 0111 1V8

L L M 1000 R112 R118 R115


100k 100k 100k R123 R125 R110 R523 R531 R529
5% 5% 5% 100k 100k 100k 100k 100k 100k
L M L 1001 0402 0402 0402 5% 5% 5% 5% 5% 5%
COMMON COMMON COMMON 0402 0402 0402 0402 0402 0402
STRAP2
COMMON COMMON COMMON ROM_SO COMMON COMMON COMMON
STRAP5
STRAP1
ROM_SI
STRAP4
STRAP5 STRAP4 STRAP3 SMB_ALT_ADDR DEVID_SEL PCIE_CFG VGA_DEVICE STRAP0
ROM_SCLK
STRAP3

M H H 1 1 1 1 R116 R124 R121


100k 100k 100k R126 R129 R114 R520 R532 R528
5% 5% 5% 100k 100k 100k 100k 100k 100k
0402 0402 0402
M H L 1 1 1 0 COMMON COMMON COMMON
5% 5% 5% 5% 5% 5%
0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON

M L H 1 1 0 1

4 M L L 1 1 0 0 GND 4
GND GND

L H M 1 0 1 1

L M H 1 0 1 0

L M L 1 0 0 1

L L M 1 0 0 0

H H H 0 1 1 1

H H L 0 1 1 0 1:SMB_ALT_ADDR ENABLE

H L H 0 1 0 1 0:SMB_ALT_ADDR DISABLE

H L L 0 1 0 0 1:DEVID_SEL REBRAND
0:DEVID_SEL ORIGNAL
L H H 0 0 1 1
1:PCIE_CFG LOW POWER
5 L H L 0 0 1 0 0:PCIE_CFG HIGH POWER 5

L L H 0 0 0 1 DEFAULT 1:VGA_DEVICE ENABLE

L L L 0 0 0 0 0:VGA_DEVICE DISABLE NVIDIA CORPORATION


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NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 13 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

Power Sequence

1 R545 10k PS_NVVDD_EN 19 1


OUT
0402 5% COMMON
C690
0.1uF
16V
10%
X7R
0402
NV3V3 3V3_PEX COMMON
GND
NV3V3

R91 R90 C692 10nF


10k 1k GND
0402 25V
5% 5% 10%
0402 0402 X7R
COMMON COMMON COMMON
D4
PS_NVVDD_S_EN_R PS_NVVDD_PEXVDD_EN
@discrete.d_3pin_aa(sym_1):page14_i26

5
12 THERM_OVERT* 1 U503
IN
3 R548 0ohm 1 @logic.u_and_2in(sym_1):page14_i143
PS_1V8_PG PS_NVVDD_S_EN PS_PEXVDD_EN
15,16 2 04020.05 ohm COMMON 4 R553 0ohm 17
IN OUT
SOT23 2 SC70-5 0402 0.05 ohm COMMON

COMMON COMMON
R554 C707

3
10k 10nF
5% 25V
0402 10%
18,19 PS_NVVDD_PG GND COMMON
IN X7R
0402
R550 0ohm COMMON
2 0402 0.05 ohm COMMON 2
GND
GND

16 PS_NV3V3_EN R552 0ohm


IN
0402 0.05 ohm COMMON

Optional

PS_DW_CTL
R549 0ohm 16
OUT
04020.05 ohm COMMON

POWER DOWN CTL


R551 0ohm
3 0402 0.05 ohm COMMON 3
Optional

4 4

17ci203
5 5

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NV_PN 600-1G110-BASE-A00
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IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

POWER:1V8 & 5V
12V_PEX

C106 C97 C98 C103 C104


0.1uF 1uF 1uF 1uF 1uF
16V 16V 16V 16V 16V
10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R
0402 0603 0603 0603 0603
COMMON COMMON COMMON COMMON COMMON
1 1

GND

3V3_PEX

12V_PEX 12V_PEX U7
@pow er_supply.u_sw reg_sot23_8hv(sym_1):page15_i92
3V3_PEX R95
0.807V
R107 R104 10k PS_1V8_BOOT PS_1V8_BOOT_R
SOT23_8
10k 10k 5% COMMON
1% 1% 0402 X7R
2 VIN 5 R100 4.7ohm C108 0.1uF
0402 0402 COMMON BOOT
R109 0402 5% COMMON 0402 16V
COMMON COMMON PS_1V8_EN COMMON
10k 3 6 EN/FSYNC 10%
INPUT_12V_EN 1B1C1E
1% C Q21B
0402 0.03ohm
6 B5 @discrete.q_npn(sym_1):page15_i79 R105 1V8
COMMON 1B1C1E 3.5A
3.83k PS_1V8_SWTH_VDD
C SOT363 C107 7 VCC 2.1A MAX
INPUT_3V3_EN
Q21A COMMON 1% 1uF
0.250 SW 3 3A
B2 @discrete.q_npn(sym_1):page15_i76 E 4 2.1A
SOT363 0402 6.3V
COMMON 0.400
L8 2.2uH 1.8V
COMMON 10% PS_1V8_SW
R108 C124 E 1 1 MOD/PG SMD_5X5 COMMON
X6S
3.01k 10nF C105
0402
1% 25V COMMON 0.1uF R96 4 GND 8 L9 2.2uH R130
0402 10% 49.9k FB 0ohm
GND GND 16V
SMD_4X4 COMMON C121 C117 C125 C111 C112 C126 C116 C122
COMMON X7R PS_1V8_SWTH_FB_U
10% 1% 0.05 ohm 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF
0402 GND X7R 0402 0402 6.3V 4V 6.3V 4V 6.3V 4V 6.3V 4V
COMMON 0402 COMMON COMMON
20% 20% 20% 20% 20% 20% 20% 20%
GND COMMON GND X6S X6S X6S X6S X6S X6S X6S X6S
GND GND 0805 0603W 0805 0603W 0805 0603W 0805 0603W
R99 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
R98 100ohm
2 2
100k 1%
GND 0402
1%
0402 COMMON
14,16
PS_1V8_PG
COMMON
OUT
GND GND GND GND

PS_1V8_SWTH_FB

Co-Layout 0805 and 0603


GND
C114 15pF
0402 50V
5%
COMMON
MP1475:316-0470-000 C0G
PS_1V8_SWTH_FB_MISC
R102 12.7k
RT7296F:316-0472-000 0402 1% COMMON
Rtop
R101
10k
1%
0402
Rbot
COMMON

GND Vout = Vref * (1+Rtop/Rbot)


1.8V = 0.8V * (1+12.7K/10K)

3 3

DDC_5V 5V_PVCC

5V = 5V @ 120mA U1
@power_supply.u_vreg_3pin(sym_2):page15_i89 U504 R563 0ohm
1.25V @power_supply.u_vreg_3pin(sym_2):page15_i100
12V_PEX GOI,IGOI,TO263 04020.05 ohm COMMON
1.25V
SOT223_GOI DDC_5V 12V_PEX GOI,IGOI,TO263
COMMON
0.400 0.400 SOT223_GOI
PS_5V_PROT_D PS_5V_PROT
R31 0ohm FR1 1.8ohm 12V 3 2 5V
COMMON
0.1A
IN OUT
0402 0.05 ohm COMMON 5% COMMON 4 0.12A 3 2
C35 TAB C4 C6 IN OUT
4
GND/ADJ

1206_F
1uF R27 0.1uF 4.7uF TAB C710 C712

GND/ADJ
1D2 3
@discrete.d(sym_3):page15_i56
16V 340ohm 16V 6.3V R557 0.1uF 4.7uF
SOT23 COMMON
10% 1% 10% 20% C711 C713 340ohm 16V 6.3V
X7R X7R X6S
1

0402 0.1uF 1uF 1% 10% 20%


0603 COMMON 0402 0603 X7R X6S

1
PS_5V_ADJ 16V 16V 0402
4 COMMON COMMON COMMON
COMMON 0402 0603 4
10% 10%
ALTERNATIVES X7R X7R
COMMON COMMON
R29 PS_5VPVCC_ADJ
GND GND GND 0402 0603
1.02k COMMON COMMON R556
GND GND
1% 1.02k
0402 1%
COMMON GND GND 0402
COMMON
U2
@power_supply.u_vreg_3pin(sym_3):page15_i127
[]
IGO,IGOI GND
TO92
COMMON
GND
3 1
IN OUT

100mA
GND
2

GND

5 5

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NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 15 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

POWER: NV3V3, NV12V

12V_PEX

DP SKU
1 1
3V3_PEX
C2 C49 R53
1nF 10k R3 NV12V
16V 5%
10% 0402
X7R COMMON
0402 S
COMMON G 2 Q4 0.1A
3V3_PEX 1 1G1D1S 3
COMMON D
D SOT323_1G1D1S Q4
Q10 @discrete.q_fet_p_enh(sym_2):page16_i99 @discrete.q_fet_n_enh(sym_2):page16_i107
SOT23_1G1D1S
3 1G COMMON
1G1D1S S 2
R64 C46 R38 Q1
R2 0ohm 0.1uF 100ohm
0.05 ohm 16V 5%
0402 10% 0603
COMMON X7R COMMON
3V3_PEX 0402
COMMON
GND NV3V3
R54 1k
PS_NV3V3_EN_Q PS_NV3V3_EN_DW
0402 5% COMMON
R42 3
1G1D1S
10k D Q8 Co-Layout Q1&Q2
5%
@discrete.q_fet_n_enh(sym_2):page16_i102
0402 PS_NV3V3_EN_R SOT323_1G1D1S
COMMON 1G1D1S 3 1G COMMON
D Q11 S 2
@discrete.q_fet_n_enh(sym_2):page16_i93 C45 Q3
PS_1V8_PG R77 0ohm PS_NV3V3_EN 1G SOT323_1G1D1S 0.1uF
2 14,15
COMMON 0.5A 2
IN 16V
3.3V 0402 0.05 ohm COMMON S 2
C60 10%
X7R
10nF R30 C38
0402
25V C51 COMMON GND 10k 0.1uF
10%
GND 1nF GND 5% 16V
X7R 0402 10%
0402
C1 16V
COMMON X7R
10%
COMMON 0402
X7R
0402 COMMON

GND
COMMON S
G 2 GND GND
R49 1k 1
COMMON
0402 5% COMMON
D SOT323_1G1D1S
Q7 @discrete.q_fet_p_enh(sym_2):page16_i117
R1 3
Non-DP SKU 1G1D1S
Q2

For Non-DP SKU, No stuff C2,R3,Q4,Q3,Q1

Stuff R2,C1,R1,Q2

14
OUT

3 12V_PEX 3V3_PEX 3
12V_PEX

12V_PEX D501
2

1
R567 @discrete.d_3pin_cc(sym_3):page16_i82
10k 30V
R573 5% 0.2A
43.2k 0402 SOT23
COMMON 1B1C1E 6 PEX_VDD PEX_VDD
3

1% C COMMON
Q508A
0402 INPUT_PEX6_EN*
COMMON 1B1C1E 3 B2 @discrete.q_npn(sym_1):page16_i75
C SOT363 PS_DISC_D R516
Q508B
INPUT_PEX6_VDET COMMON
15ohm R515
B5 @discrete.q_npn(sym_1):page16_i57 E 1 nv_res
SOT363 C697 C698 5% 15ohm
COMMON 10uF 1uF 0805
R575 C722 E 4 R555 5%
COMMON 0805
3.01k 10nF 16V 16V
NV3V3 2k
10% 10% COMMON
1% 25V 5%
0402 10% X6S X7R 0402
COMMON X7R
GND 0805 0603 COMMON
R565 R566 PS_PEXVDD_DSH_QR
0402 GND COMMON COMMON
COMMON 2k 15ohm 3
1G1D1S
5% 5% D Q502
0402 0805
GND GND COMMON COMMON
@discrete.q_fet_n_enh(sym_2):page16_i134
PS_NV3V3_DIS PS_DW_CTL_INV SOT323_1G1D1S
3V3_PEX 1G1D1S 3 1G1D1S 3 1G COMMON
D Q507 D Q504 S 2
3V3_PEX GND @discrete.q_fet_n_enh(sym_2):page16_i86 PS_DW_CTL @discrete.q_fet_n_enh(sym_2):page16_i131
R558 PS_NV3V3_EN* SOT323_1G1D1S SOT23_1G1D1S
1G1D1S 3 1G COMMON 14 1G COMMON
10k D Q506 S 2 IN
S 2
R560 5%
@discrete.q_fet_n_enh(sym_2):page16_i79
10.7k 0402 SOT23_1G1D1S
COMMON 1B1C1E 6 1G COMMON
1% C Q505A S 2 GND
0402 INPUT_3V3_EN*
COMMON 1B1C1E 3 B2 @discrete.q_npn(sym_1):page16_i71 60V

4 C Q505B
SOT363 0.3A
GND 4
2000mohm@10V / [email protected] / [email protected]
INPUT_3V3_VDET COMMON
B5 @discrete.q_npn(sym_1):page16_i53 E 1 0.8A
0.35W
GND
SOT363 20V

COMMON
R562 C715 E 4
3.01k 10nF
1% 25V GND
0402 10%
COMMON X7R
GND
0402 GND
COMMON

GND GND

5 5

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NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 16 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

POWER:PEX_VDD

1 1

PEX_VDD
FBVDDQ

5V_PVCC
C152 C150
4.7uF 0.1uF
6.3V 16V
20% 10%
X6S X7R
0603 0402
1.0V : 0.745A
C151 COMMON COMMON
1uF
6.3V
2 2
10%
X6S
0402
U8 PEX_VDD
@power_supply.u_vreg_apl5910(sym_1):page17_i36
COMMON GND
SOP8
COMMON
PEX_VDD
GND 3 VIN VOUT 6 1V 0.745A 0.400

4 C545 C546 C571 C557 C573


VCNTL R138 22uF 22uF 22uF 22uF 22uF
PS_PEXVDD_EN 2 0ohm 6.3V 6.3V 6.3V 6.3V 6.3V
14
IN
EN PS_PEX_LDO_FB 20% 20% 20% 20% 20%
0.05 ohm
FB 7 0402 X6S X6S X6S X6S X6S
SNN_PS_PEXVDD_PG
1 POK COMMON 0805 0805 0805 0805 0805

GND 9 COMMON COMMON COMMON COMMON COMMON


SNN_PS_PEXVDD_NC
5 NC GND 8
PS_PEX_LDO_FB_R
C147 Co-Layout 0603 and 0805
1nF R139
GND
16V 2.55k
GND 10% 1%
X7R 0402
Rt
Vout = Vref * (1+Rtop/Rbot) C574 C547 C556 C544 C572
0402 COMMON
COMMON 22uF 22uF 22uF 22uF 22uF
4V 4V 4V 4V 4V
1.00V = 0.8V * (1+2.55k/10.2k)
20% 20% 20% 20% 20%
X6S X6S X6S X6S X6S
R140 0603W 0603W 0603W 0603W 0603W
10.2k COMMON COMMON COMMON COMMON COMMON
1%
Rb
0402
COMMON

GND

3 GND 3

4 4

5 5

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IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

POWER:FBVDDQ
12V_PEX

Input Ripple: ~2A CLOSE TO HFET

C685 C689 C88 C87 C92


1uF 1uF 1uF 1uF 0.1uF
1 1
16V 16V 16V 16V 16V
10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R
0603 0603 0603 0603 0402
COMMON COMMON COMMON COMMON COMMON

12V_PEX

GND LFPAK D 5
Q18
R83 U6 @discrete.q_fet_n_enh(sym_5):page18_i52 FBVDDQ = 5A @ 1.5V
0ohm PS_FB_UG_R
@power_supply.u_swreg_up6101(sym_1):page18_i90
0.400
R87 0ohm 0.400
4G DFN3X3
0.05 ohm 0.6V COMMON
PSOP8
0402 0.05 ohm COMMON S 1 30V
0402
COMMON COMMON 2 10.6A

PS_FB_VCC12 PS_FB_BOOT
0.400 5 VCC 1 0.400
C89 0.1uF 3 60A
2.2W
BOOT 20V
12V 0402 16V
10%
C72 X7R
COMMON
Ripple Current: ~4.5A FBVDDQ
1uF PS_FB_UG
HDRV 2
16V
10% PS_FB_PHASE
X7R PHASE 8 0.400
L5 1uH 0.300 5A 1.5V
FBVDDQ

0603 TH COMMON
COMMON
LFPAK D 5
PS_FB_FS C680
7 COMP/EN Q19
1nF C99
GND @discrete.q_fet_n_enh(sym_5):page18_i51
PS_FB_LG 50V C123 C118 C664 C113
3 GND LDRV/OCS 4 0.400 4G DFN3X3
820uF
PS_FB_FB COMMON 10% 22uF 22uF 22uF 22uF
9 GND FB 6 0.200 S 1 30V
X7R 6.3V 6.3V 6.3V 6.3V COMMON
2 2 10.6A
0402 20% 2
R86 C95 20% 20% 20% 20%
R145 3 60A
2.2W
COMMON
X6S X6S X6S X6S 2.5V@105degC
10k 100pF

PS_FB_RC_SNUB
20V
0ohm Roc 0805 0805 0805 0805 AL-Polymer
5% 50V 5A@105degC,100KHz
GND COMMON COMMON COMMON COMMON
0402 5% 0.007ohm
COMMON C0G 0.400 TH_D63P25
0402
COMMON
GND GND GND GND GND
R542
GND
2.2ohm
5%
1206
COMMON

GND
GND
C73 100pF
0402 50V
5%
C0G PS_FB_RC_FB PS_FB_RC_FB_R
R80 200ohm 0.200
C57 6.8nF R81 100ohm
C66 COMMON
0402 5% COMMON 0402 50V 0402 5% COMMON
22nF 10%
25V X7R
10% COMMON
R82 2k
X7R
0402 0402 1% COMMON
COMMON
0.200 R74 6.49k Rt
0402 1% COMMON
C71
PS_FB_RC_CP

15pF R66 R73


12V_PEX
50V 6.19k 1.33k
Rb1 Rb
5% 1% 1%
C0G 0402 0402
3 R60 3
0402 COMMON COMMON
10k 3 COMMON R67
1G1D1S
5% D 13.3k
0402
Q12B
1%
COMMON
@discrete.q_fet_n_enh(sym_2):page18_i94
0402
Vout = Vref * (1+Rt/Rb)
SOT363
1G1D1S
6 5G COMMON COMMON
D PS_FB_EN*
PS_NVVDD_PG Q12A S 4 GS72V3SP-R:315-0872-000 300K
@discrete.q_fet_n_enh(sym_2):page18_i95 60V Vref=0.6V: 1.5V = 0.6V * (1+2K/1.33K)
PS_FB_EN_L SOT363 0.115A
14,19 R85 1k 2G COMMON
IN
0402 5% COMMON S 1 0.8A
0.2W
R84 C74 20V
60V GND
100k 1uF 0.115A
GND GND
5% 16V 0.8A
0.2W
0402 10% 20V
COMMON X7R GPIO11_FBVDD_CTL_Q
0603 GND 1G1D1S 3 GS72V3SP-R:315-0872-000 300K
COMMON D Q6 0.200 Vref=0.6V: 1.5V = 0.6V * (1+1.87K/1.5K//6.19K)
GND @discrete.q_fet_n_enh(sym_2):page18_i35
1.35V = 0.6V * (1+1.87K/1.5K)
GPIO18_FBVDD_CTL_R SOT23_1G1D1S
12 GPIO8_FBVDD_SEL R48 1k 1G COMMON
IN
GND 0402 5% COMMON S 2
R63 C44 APW8720:315-0601-000 300K
60V
10k 10nF 0.3A
2000mohm@10V / [email protected] / [email protected] Vref=0.5V: 1.5V = 0.5V * (1+1.87K/1.1K//6.19K)
5% 25V 0.8A

0402
0.35W 1.35V = 0.5V * (1+1.87K/1.1K)
10% 20V
COMMON X7R
0402
COMMON

GND GND GND

4 4

5 5

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ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 18 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

POWER:NVVDD

1 1

5V_PVCC

12V_PEX
R50
0ohm
R45 0.05 ohm
NV3V3 0402
2.2ohm
COMMON
5%
0402
R36
COMMON
10k U5
5% PS_NVVDD_FS_PU 2V
0402 C54 C50
@power_supply.u_openvreg_type2plus(sym_1):page19_i34
COMMON
R51 C47 QFN3X3 4.7uF 1uF
590k 1uF COMMON 6.3V 16V
14,18 PS_NVVDD_PG
OUT 1% 16V 20% 10%
X6S X7R
1V8
0402 10% OPENVREG 0603 0603
COMMON X7R
0603 COMMON COMMON
PS_NVVDD_PVCC
COMMON 9 PVCC 18
OCS/CB
R559
GND
1k
GND
1% PS_NVVDD_FS
0402
COMMON
R46 R52 C48 PS_NVVDD_HG1
HGATE1 2 R75 0ohm PS_NVVDD_HGATE1 20
GPIO6_NVVDD_PSI* R78 10k 54.9k 64.9k 100pF 0402 0.05 ohm COMMON
OUT
12
IN 1% 1% 50V
2 0402 1% COMMON
0402 0402
2
5% PS_NVVDD_BOOT1 PS_NVVDD_BOOT_RC1
C59 0.1uF
BOOT1 1
COMMON COMMON
R76 0ohm
C0G
0402 04020.05 ohm COMMON 0402 16V COMMON
R561 COMMON PHASE1 20 10% PS_NVVDD_PHASE1 19,20
4.99k IN
1%
0402 GND GND LGATE1 19 PS_NVVDD_LGATE1
OUT
20

COMMON

R69 7.5k
GND
0402 5% COMMON

GND 13 PGOOD

14 PS_NVVDD_EN 3
IN EN

PS_NVVDD_PSI* PS_NVVDD_HG2
4 HGATE2 14 R34 0ohm PS_NVVDD_HGATE2 20
PSI OUT
0402 0.05 ohm COMMON
12 GPIO0_NVVDD_PWM_VID 5 VID
IN PS_NVVDD_BOOT2 PS_NVVDD_BOOT_RC2
15 R35 0ohm C39 0.1uF 20
BOOT2 IN
0402 0.05 ohm COMMON 0402 16V COMMON
PS_NVVDD_VREF
8 VREF PHASE2 16 PS_NVVDD_PHASE2 10%

C62 PS_NVVDD_VREF_R3 PS_NVVDD_VREF_R2


R55 0ohm R56 20.5k LGATE2 17 PS_NVVDD_LGATE2 20
1uF C61 OUT
04020.05 ohm COMMON 0402 1% COMMON
6.3V 1uF
10% 6.3V PS_NVVDD_REFIN
X6S
R71 4.32k R47 20k
10% GND
0402 X6S 0402 1% COMMON 7 REFIN 0402 5% COMMON PS_NVVDD_VSNS 19,20,20 R537 100ohm
IN GND
COMMON 0402 0402 5% COMMON
PS_NVVDD_VREF_R1 PS_NVVDD_REFADJ
COMMON R79 0ohm R68 6.19k 6 REFADJ
GND 0402 0.05 ohm COMMON 0402 1% COMMON
PS_NVVDD_GND_SENSE
3 GNDSNS 10 R533 0ohm GPU_NVVDD_GNDSNS 7 3
C53 PS_NVVDD_VREF_R4 IN
R62 309ohm R61 16.5k 04020.05 ohm COMMON
4.7nF PS_NVVDD_VSNS_R
0402 1% COMMON 0402 1% COMMON 11 R37 1k
16V FB/VSNS C40
0402 1% COMMON
10% 1nF
X7R PS_NVVDD_COMP
C43 150pF 16V
0402 COMP 12
C52 10%
COMMON 50V
0402 X7R
4.7nF 5%
0402
PS_NVVDD_VREFIN_GND 16V C0G
R72 0ohm COMMON
GND 10% COMMON
04020.05 ohm COMMON
X7R
21 THERM/GND
R70 PS_NVVDD_COMP_RC PS_NVVDD_VSNS_RC
0402 R568 15k C718 1nF R41 1.5k C41 1nF R534 0ohm GPU_NVVDD_VSENSE 7
0ohm COMMON
IN
0402 1% COMMON 0402 16V 0402 1% COMMON 0402 16V 04020.05 ohm COMMON
0.05 ohm 10% 10%
0402
C721 C714 X7R X7R
COMMON GND COMMON COMMON
1nF 1nF R538 100ohm
GND
16V 16V NVVDD
0402 5% COMMON
10% 10%
X7R X7R
0402 0402
COMMON COMMON

GND GND

R569
10k
1%
0402
4 COMMON 4

GND

5 5

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ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 19 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

POWER:NVVDD

1 1

12V_PEX

C76 C79 C78 C67 C68 C85


0.1uF 1uF 1uF 1uF 1uF
16V 16V 16V 16V 16V 270uF
10% 10% 10% 10% 10% COMMON
X7R X7R X7R X7R X7R 20%
0402 0603 0603 0603 0603 [email protected]
2 LFPAK D 5 COMMON COMMON COMMON COMMON COMMON AL-Polymer 2
[email protected],100KHz
Q13
0.01ohm
@discrete.q_fet_n_enh(sym_5):page20_i5
TH_D63P25
19
PS_NVVDD_HGATE1 4G LFPAK
IN COMMON
S 1 30V

2 38A
5.5mohm@10V / [email protected] / [email protected] NVVDD
3 120A
1.6W
GND L4 0.47uH
20V
TH COMMON

19 PS_NVVDD_PHASE1 L3 0.36uH 22A 1.0V


OUT
TH COMMON C101 C100
LFPAK D 5 L7 0.36uH
820uF 820uF
Q15 TH COMMON C668 C666 C659 C669
@discrete.q_fet_n_enh(sym_5):page20_i4 C691 FOR RT8817 22uF 22uF 22uF 22uF COMMON COMMON
2.2nF 20% 20%
PS_NVVDD_LGATE1 6.3V 6.3V 6.3V 6.3V
19 4G LFPAK
2.5V@105degC 2.5V@105degC
IN COMMON 50V PS_NVD_PH1_RI C686 1nF 20% 20% 20% 20%
S 1 30V R543 10k X6S X6S X6S X6S
AL-Polymer AL-Polymer
10%
2 60A
3mohm@10V / [email protected] / [email protected]
X7R
0402 5% COMMON 0402 16V 0805 0805 0805 0805
5A@105degC,100KHz 5A@105degC,100KHz
C700 160A 0.007ohm 0.007ohm
3 1.6W 0603
10% COMMON COMMON COMMON COMMON
TH_D63P25 TH_D63P25
100pF 20V
COMMON X7R
50V COMMON
LFPAK D 5
5% PS_NVVDD_PH1_SNU
C0G Q16 GND GND GND GND
0402 @discrete.q_fet_n_enh(sym_5):page20_i103 GND
COMMON GND 4G LFPAK R546 GND
COMMON
1 1ohm
S 30V
5% C717 1nF
2 60A
3mohm@10V / [email protected] / [email protected] PS_NVVDD_VSNS 19,20
C687 1206 OUT
GND 3 160A
1.6W COMMON 0402 16V
100pF 20V
10%
50V X7R
5% COMMON
C0G
0402
3 COMMON GND 3
GND
12V_PEX
GND

C77 C82 C80 C69 C70 C81 C75 C709 C706 C705 C708 C703 C704
0.1uF 0.1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
16V 16V 16V 16V 16V 16V 270uF 16V 16V 16V 16V 16V 16V
10% 10% 10% 10% 10% 10% COMMON 10% 10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R X7R 20% X7R X7R X7R X7R X7R X7R
0402 0402 0603 0603 0603 0603 [email protected] 0603 0603 0603 0603 0603 0603
COMMON COMMON COMMON COMMON COMMON COMMON AL-Polymer COMMON COMMON COMMON COMMON COMMON COMMON
[email protected],100KHz
0.01ohm
LFPAK D
5 TH_D63P25
Q14
@discrete.q_fet_n_enh(sym_5):page20_i59
19 PS_NVVDD_HGATE2 4G LFPAK
IN COMMON
S 1 30V

2 38A
5.5mohm@10V / [email protected] / [email protected]
GND GND NVVDD
3 120A
1.6W
20V
L6 0.36uH
TH COMMON
19
PS_NVVDD_PHASE2 L2 0.36uH
OUT
TH COMMON

LFPAK D 5
Q17 C696 C115 C667 C665 C670 C102
@discrete.q_fet_n_enh(sym_5):page20_i60 2.2nF FOR RT8817 22uF 22uF 22uF 22uF
50V 6.3V 6.3V 6.3V 6.3V 820uF
4 19 PS_NVVDD_LGATE2 4G LFPAK 4
IN COMMON 10% PS_NVD_PH2_RI C688 1nF 20% 20% 20% 20% COMMON
S 1 30V
X7R
R544 10k
X6S X6S X6S X6S 20%
2 60A
3mohm@10V / [email protected] / [email protected] 0603 0402 5% COMMON 0402 16V 0805 0805 0805 0805 2.5V@105degC
C701 3 160A
1.6W
COMMON 10% COMMON COMMON COMMON COMMON AL-Polymer
100pF 20V X7R 5A@105degC,100KHz
50V PS_NVVDD_PH2_SNU COMMON 0.007ohm
5% TH_D63P25
R547 GND GND GND GND
C0G
1ohm
0402
5%
COMMON GND GND
1206
COMMON
C716 1nF PS_NVVDD_VSNS 19,20
OUT
GND 0402 16V
10%
X7R
COMMON
GND

5 5

NVIDIA CORPORATION
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ASSEMBLY <ASSEMBLY_DESCRIPTION> SANTA CLARA, CA 95050, USA

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ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 20 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H
A B C D E F G H

Mechanical

1 1

J8
J7
3 1
BKT1 4 2
@mechanic.bracket(sym_4):page21_i15 impedence
ATX_2X_ALL X_PIN1*2
COMMON
1
Top
Single end Top
Address trunk Differential
2 50 ohm +/- 10% PEX_PCIE 2

1
FM 1
1
FM 4 GND
4.4mils 85 ohm +/- 10 %

MECH. MOUNTING ALL


SW_FB SW_FB
4.17 mils / 4 mils

FM 2 FM 5 J10
1 SW_FB 1 SW_FB J9
2 3 1
4 2
impedence
X_PIN1*2
FM 3
1 SW_FB FM 6
1 SW_FB Bottom Bottom
Single end Differential
HDMI HDMI
Mechanical 50 ohm +/- 10% 95 ohm +/- 10 %
4.4mils 4 mils / 7.05 mils

3 3

MEC2
COOLING SOLUTION @mechanic.heatsink(sym_5):page21_i11
4PIN
4 connected mounting pins COMMON

1
2
3
4
GND

4 4

MEC3 MEC1
@electro_mechanic.mec_sprng(sym_1):page21_i3 @electro_mechanic.mec_sprng(sym_1):page21_i5
SMD SMD
COMMON COMMON

EMI CLIP EMI CLIP

1 GND
1 GND

GND GND

5 5

NVIDIA CORPORATION
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ASSEMBLY <ASSEMBLY_DESCRIPTION> SANTA CLARA, CA 95050, USA

PAGE DETAIL Mechanical


ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-1G110-BASE-A00
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG110-A00 PAGE 21 OF 21
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 19-JUL-2016

A B C D E F G H

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