About the FDP Participants

Semiconductor technology has revolutionised human lives • Faculty members/Engineering professionals of the
for the past two centuries. Starting from the invention of AICTE approved institutions/ Universities and
junction transistor to advanced filed effect transistors this Industries.
technology is the key for developments in various fields • Research and M.Tech scholars with an ambition to
like medical, communication and power industry. The study in this exciting area. One Week
programme will offer learning relevant to nanoscale device • The number of participants is limited to 200, and Faculty Development Programme on
and circuit design and developments, including modelling, the selection is based on a first-come, first-serve Beyond CMOS Devices &
simulation, device fabrication and their application in real
time followed by a Hands-on session on Cadence and
basis.
Circuit Design Challenges
Visual TCAD. 04 - 08 December, 2023 Mode: Hybrid
Registration
This faculty development programme is intended to
address recent advancements in the field of
Technically supported by:
semiconductor materials, devices and circuits.
https://link.geu.ac.in/HFsaLR
Resource Persons

• Prof. Sudeb Dasgupta, Professor, IIT Roorkee

Organized by:
• Prof. Anand Bulusu, Professor, IIT Roorkee Participants Type Registration Charges Department of Electronics &
• Prof. Ram Awadh Mishra, Professor, MNNIT Allahabad Industry Professionals ₹1000 Communication Engineering
• Prof. Naushad Alam, Professor, AMU Academician ₹700
• Dr. Santosh Kumar Gupta, Associate Professor,
Research Scholars ₹400
Graphic Era (Deemed to be University),
MNNIT Allahabad
Dehradun, Uttarakhand, India – 248 001

• Dr. Aminul Islam, Associate Professor, BIT Mesra

• Dr. Md. Waseem Akram, Assistant Professor, Important Dates
Jamia Millia Islamia • Last date for online registration: 30.11.2023
• Dr. Lucky Agarwal, Assistant Professor, • Selected participants will be notified via email by
University of Allahabad 01.12.2023

• Mr. Anish Kumar Sharma, Entuple Technologies

Certification
• Mr. Kamlesh Kukreti, Assistant Professor,
Graphic Era (Deemed to be University) Certificate will be provided to the participant upon
successful completion of the STTP with 100% attendance
and securing a minimum of 60% marks in quiz.
 About Graphic Era (Deemed to be University) About Entuple Technologies
Prof. (Dr.) Kamal Ghanshala
Graphic Era Deemed to be University is the culmination of the hard Entuple Technologies was Founded on 1st January 2010
President, Graphic Era Group of Institutions,
work of its visionary founder, Prof. (Dr.) Kamal Ghanshala, who had by professionals with a combined experience of over 80 Dehradun, India
the dream to change the destiny of thousands of youths through
years in the Electronics Industry. Combined from the words
quality and holistic education. In 1993, he embarked on the
"Enable" and "n-tuple", Entuple is suggestive of enabling
mission to transform the higher education landscape of the Doon
multi-dimensional possibilities and growth for all their Dr. Vijay Kumar Saraswat
Valley with twenty-nine thousand rupees in his pocket and loads of
stakeholders. Chancellor, Graphic Era (Deemed to be University),
determination and tenacity in his heart. His vision gained concrete
Dehradun, India
shape in 1997 in the form of Graphic Era Institute of Technology Entuple Technologies is a Design Service, Product and
Prof. (Dr.) Narpinder Singh
(GEIT). In 2008 it was accorded the status of Deemed University Engineering Solution Provider for Electronic System
Vice Chancellor, Graphic Era (Deemed to be University),
under Section 3 of the UGC Act, 1956 vide Notification Design, VLSI/Semiconductor, Electrical Drives & Dehradun, India
F.9-48/2007-U.3 (A) dated 14 August 2008 and approved by the
Renewable Energy Systems, RF & Antenna, Additive
Ministry of Human Resource Development, Government of India.
Manufacturing, Mechanical, Finite Element Analysis (FEA),
Today Graphic Era Deemed to be University stands tall as NAAC
Computational Fluid Dynamics, PCB Design & Prototyping Prof. (Dr.) Md. Irfanul Hasan
A+ accredited university with 7 NBA accredited programs and is
Solutions, IoT & Data Sciences and more. HoD-ECE Department
ranked among the Top 55 universities of India in MHRD’s National
Institutional Ranking Framework (NIRF) with All-India Rank 62 in
the Engineering Category, All India Rank 65 in Management
To provide precise quality solutions to their customers and
Category, All India Rank 55 in the University Category. Dr. Varun Mishra
win loyalty by leveraging their technical capability. Satisfac-
Dr. Vikas Rathi
tion of the customer is valued and is of paramount impor-
About the Department tance right from the beginning of the engagement with the
customer.
Mr. Kamlesh Kukreti
The Department of Electronics and Communication Engineering
came into existence in 2001, to meet the growing requirement of
Tentative Programme Contents
practical design engineers in the country and abroad. Along with
the regular labs the department has various research labs such as ADDRESS FOR CORRESPONDENCE
INTEL lab, Cadence lab, Wireless Sensor Network lab, Texas • FinFET/Nanosheet Transistor Technology
Instrumentation lab, Polymer sensors & Actuator's lab, etc. All • Tunnel FET Device Dr. Varun Mishra
Assistant Professor,
these labs complement the high standards set by the competitive • Tunnel FET-based Circuit Design Challenges
Graphic Era (Deemed to be University), Dehradun,
syllabus and nurture the inclination of the students towards • Dielectric Modulated FD SOI MOSFET for Nanoscale India-248001
research and development. The Department provides access to
Applications Contact No.: +91-8979891801
study of high-end software like Mathworks Suite, Genesys, Xilinx, Email: [email protected]
• Novel Circuit-Level Techniques for Designing
OrCAD Circuit Design Simulation & PCB Design Tools, Cadence
Low-Leakage and Robust Nanoelectronic Circuits
University Bundle. Industry leaders like IBM, Infosys and
• Memristor and its application in nonvolatile memory Dr. Vikas Rathi
Accenture and leaders in academia like from IITs, Defense R&D
Associate Professor
institutions and various academic institutions abroad regularly • Junction-less Transistors Graphic Era (Deemed to be University), Dehradun,
provide lectures and organize training and other technical events • Low-power VLSI Circuit Design India-248001
throughout the year to enhance the exposure available to our • Hands-on practical session on Cadence Contact No.: +91-9760207981
students. The Department of Electronics and Communication is Email: [email protected]
• Hands-on practical session on Visual TCAD
NBA accredited from Academic Year 2022 to 2025.