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    Reliability Information t10 Sot1023

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    Cynthia

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    Reliability Information t10 Sot1023

    Uploaded by

    Cynthia
    19 views1 page

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    19 views1 page

    Reliability Information t10 Sot1023

    Uploaded by

    Cynthia

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 1

    Reliability qualification information

    Stress Conditions Duration Quantity Rejects


    Stress
    See
    Pre and Post stress Tamb = 25°C N/A All parts
    below
    electrical test
    JESD22-A113
    24 hours
    PC Bake Tamb = 125°C
    168 hours 693 0
    Preconditioning Soak Tamb = 85°C, RH = 85%
    3 cycles
    reflow
    HTRB MIL-STD-750-1
    High temperature Tj = Tj max, VDS = 80% of rated 1000 hours 231 0
    reverse bias Voltage M1039 Method A
    HTGB JESD22-A108
    High temperature gate Tj = Tj max, VGS = 20V(SL), 16V 1000 hours 231 0
    bias (LL)
    TC JESD22-A104
    500 cycles 231 0
    Temperature Cycling -55°C to 150°C
    UHAST JESD22-A118
    Unbiased highly Tamb = 130°C, RH = 85% 96 hours 231 0
    accelerated stress test Pressure = +2.27atm
    HAST* JESD22-A110
    Highly accelerated Tamb = 130°C, RH = 85% 96 hours
    stress test VDS = 80% of rated voltage
    231 0
    H3TRB* JESD22-A101
    Temperature Humidity Tamb = 85°C, RH = 85% 1000 hours
    bias VDS = 80% of rated voltage
    IOL
    MIL-STD-750 method 1037
    Intermittent operating 5000 cycles 231 0
    ΔTj = 80°C
    life

    RSH
    JESD22-A111 (SMD)
    Resistance to solder 10s 30 0
    260°C ± 5°C
    heat

    IPC/ECA J-STD-002
    Method A dip and look 3 sec dip 66 0
    No aging, solder Ta = 245°C

    IPC/ECA J-STD-002
    Method B dip and look
    No aging
    SD Solder Ta = 245°C 8 hours
    66 0
    Solderability >95% lead coverage required 3 sec dip
    Steam Aging: condition C
    Steam Ta = 93°C, 8 hours
    Solder Ta = 245°C, 3 sec dip
    Dry Bake:
    Ta = 150°C 16 hours
    66 0
    Solder Ta = 245°C 3 sec dip
    >95% lead coverage required
    *Either HAST or HT3RB are tested for a set of devices.

    Calculation of FIT and MTBF


    Test considered for FIT calculation: High Temperature Reverse Bias (HTRB) and High temperature Gate
    Bias (HTGB). Confidence level 60%, derated to 55°C, activation energy 0.7Ev test time 168 to 1000
    hours.

    Technology Quantity Failure rate MTBF

    T10 462 2.6 3.83E+8

    © 2022 Nexperia B.V.


    All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presentedin this document does not form
    part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its
    use. Publication thereof does not convey nor imply any license under patent – or other industrial or intellectual property rights

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