BBEE103
BBEE103
BBEE103
Teaching-Learning Process
These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes and make Teaching –Learning more effective
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various analog and digital circuits.
3. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyse information rather than simply recall it.
4. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
5. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1 (8 Hours)
Semiconductor Diodes:Introduction, PN Junction diode, Characteristics and Parameters, Diode
Approximations, DC Load Line analysis (Text 1: 2.1,2.2,2.3,2.4)
Diode Applications: Introduction, Half Wave Rectification, Full Wave Rectification,Full Wave Rectifier
Power Supply: Capacitor Filter Circuit, RC π Filter (includes numerical)
(Text 1: 3.1,3.2,3.4,3.5)
Zener Diodes: Junction Breakdown, Circuit Symbol and Package, Characteristics and Parameters,
Equivalent Circuit, Zener Diode Voltage Regulator. (Text1:2.9, 3.7)
Module-2(8 Hours)
Bipolar Junction Transistors: IntroductionBJT Voltages & Currents, BJT Amplification, Common Base
Characteristics, Common Emitter Characteristics, Common Collector Characteristics, BJT Biasing:
Introduction, DC Load line and Bias point
(Text 1: 4.2, 4.3, 4.5,4.6, 5.1)
Field Effect Transistor: Junction Field Effect Transistor, JFET Characteristics, MOSFETs: Enhancement
MOSFETs, Depletion Enhancement MOSFETs (Text 1: 9.1,9.2,9.5)
Module-3(8 Hours)
Operational Amplifiers: Introduction,The Operational Amplifier, Block Diagram Representation of
Typical Op-Amp, Schematic Symbol, Op-Amp parameters - Gain, input resistance, Output resistance,
CMRR, Slew rate, Bandwidth, input offset voltage, Input bias Current and Input offset Current, The Ideal
Op-Amp , Equivalent Circuit of Op-Amp, Open Loop Op-Amp configurations, Differential Amplifier,
Inverting & Non Inverting Amplifier
Op-Amp Applications: Inverting Configuration, Non-Inverting Configuration, Differential Configuration,
Voltage Follower, Integrator, Differentiator(Text 2: 1.1, 1.2, 1.3, 1.5, 2.2, 2.3, 2.4, 2.6, 6.5.1, 6.5.2, 6.5.3,
6.12, 6.13).
Module-4(8 Hours)
16-2-2022
Boolean Algebra and Logic Circuits:Binary numbers, Number Base Conversion, octal & Hexa Decimal
Numbers, Complements, Basic definitions, Axiomatic Definition of Boolean Algebra, Basic Theorems and
Properties of Boolean Algebra, Boolean Functions, Canonical and Standard Forms, Other Logic Operations,
Digital Logic Gates (Text 3: 1.2, 1.3, 1.4, 1.5,2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7)
Combinational logic: Introduction, Design procedure, Adders- Half adder, Full adder (Text 3:4.1, 4.2, 4.3)
Module-5(8 Hours)
Introduction to Transducers: Introduction, Resistive Transducers, Inductive Transducers, Capacitive
Transducers, Thermal transducers, Optoelectronic transducer, and Piezoelectric transducers (Text 4:
Chapter 18: 18.1, 18.2, 18.3, 18.4, 18.5)
Communications: Introduction to communication, Communication System, Modulation (Text book 5: 1.1,
1.2, 1.3
Course outcome (Course Skill Set)
Cos/P PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO1 PO1 PO1
Os 0 1 2
CO1 3 3 2 - 2 2
CO2 3 2 3 - 2 1
CO3 3 2 3 - 3 1
CO4 2 1 1 - 2 1 1 1
CO5 2 1 1 - 2 1 1 1
16-2-2022
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). The minimum
passing mark for the SEE is 35% of the maximum marks (18 marks out of 50). A student shall be deemed to
have satisfied the academic requirements and earned the credits allotted to each subject/ course if the
student secures not less than 35% (18 Marks out of 50) in the semester-end examination(SEE), and a
minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal Evaluation) and
SEE (Semester End Examination) taken together.
Continuous Internal Evaluation(CIE):
Three Tests each of 20 Marks;
1st, 2nd, and 3rd tests shall be conducted after completion of the syllabus of 30-35%,
70-75%, and 90-100% of the course/s respectively.
Assignments/Seminar/quiz/group discussion /field survey & report presentation/ course
project/Skill development activities, suitably planned to attain the COs and POs for a total of
40 Marks.
If the nature of the courses requires assignments/Seminars/Quizzes/group discussion two
evaluation components shall be conducted. If course project/field survey/skill development
activities etc then the evaluation method shall be one.
Total CIE marks (out of 100 marks) shall be scaled down to 50 marks