HANDS-ON FPGA MODULE

Versatile FPGA M
Modern technology
for everyone
Paul Goossens

MA TICS
SCHE OUT!
N FO LD
O

FPGAs have established a

firm position in the modern
electronics designer’s
toolkit. Until recently, these
‘super components’ were
practically reserved for
specialists in high-tech
companies. That’s all
changed now thanks to
low component prices
and free design software,
so it’s high time to devote
attention to this technology
in Elektor Electronics. The
FPGA module discussed in
this article forms the core
of various upcoming
projects in the magazine.

16 elektor electronics - 3/2006

 Technical features

Module
• Altera Cyclone FPGA
• 12,060 logic elements
• 4 MB configuration memory
• 8 MB user SRAM
• 1 MB user flash RAM
• on-board 50-MHz clock
If you want to use an FPGA in your • JTAG/programming interface
design, there are several things you
can’t do without, including a program-
• Byteblaster compatible
ming interface and configuration mem- • 80 user I/O lines
ory. We thought it would be a good • dedicated clock signals
idea to incorporate the standard items • indicator LED
normally associated with an FPGA into
a single electronics module, in order to
• built-in switch-mode power supply
avoid the need for everyone to reinvent • small multilayer PCB (110 x 77 mm)
the wheel each time. This module can • supplied ready to use
then be used as a ‘digital core’ for var-
ious circuits. A major benefit of this
approach is that it allows
designers to concentrate
on specific applica-
tions without It takes more than just an FPGA All the individual elements of the cir-
having to cuit can be easily identified in the
worry about
to make a circuit schematic drawing.
the sound- As already mentioned, you’ll need
ness of the some peripheral electronics to enable
FPGA element. you to use an FPGA in a practical cir- The design
cuit. One of the most important ele- Due to the size of the schematic draw-
ments beside the FPGA is the configu- ing of the FPGA module, we decided to
Getting started is ration memory. In contrast to most print it on a foldout which may be
the hard part FPGAs, the configuration memory found in the centre of the magazine.
retains its data when the supply volt- Let’s start at the beginning with the
For those of you who age is switched off. power supply. It is built around a
haven’t used FPGAs before, TPS75003 (IC2) and can work with an
this module and the associ- Each time the unit is switched on, the input voltage in the range of 4.5–6.5 V.
ated prototyping board FPGA must be configured again before This IC is specially designed for use in
described elsewhere in this issue it can fulfil its intended function. Fortu- FPGA circuits. It contains two switch-
form an ideal starting point for nately, FPGA manufacturers have mode power supply circuits and one
learning about FPGAs. developed special memory ICs that series regulator. The latter is not used
It’s impossible to avoid using SMDs in can configure FPGA ICs automatically in our circuit; only the two switch-
a circuit such as this. To make things when power is switched on. Our cir- mode circuits are used.
even worse, we decided to use an cuit includes one of these memory ICs.
FPGA in a BGA package for this cir- Easy programming of the FPGA and A step-down regulator that provides a
cuit, which means DIY soldering with the configuration memory during the 3.3-V supply voltage is implemented
a normal soldering iron is simply development phase is also highly using T1, D1, L1, C1 and associated
impossible. Soldering the other mem- desirable. That’s why a programming components. IC2 periodically drives
ber of the family (in a PQFP package) interface (using JTAG) also forms part FET T1 into conduction to allow a cur-
is also very difficult. However, using of the standard peripheral circuitry. rent to flow from the input voltage via
these ‘difficult’ components allows the Another quite important part of such a T1, L1 and C1. This causes the current
overall dimensions of the circuit board circuit is the power supply. The inter- through the inductor to increase,
to be kept reasonably compact. nal operating voltage of most such ICs which in turn causes capacitor C1 to
is quite low (1.5 V in our case). The be charged. When IC2 switches off the
Fortunately, you don’t have to worry power supply must be able to handle FET, the current flowing in L1 cannot
about assembling the board, because short current spikes without problems. stop immediately, so it continues to
the FPGA module is available from In addition, a different voltage is used flow through C1 and D1. R1, R3 and C3
Elektor Electronics with most of the for the inputs and outputs. Here we provide feedback so IC2 can determine
components pre-assembled. The only decided to use 3.3 V. The supply for whether it has to supply more power
components you have to solder by this voltage must also be able to or less power.
hand are the connectors. deliver fairly heavy currents and
Besides this module, you will need a remain stable under heavy loads. The values of these components have
programming interface that sits been chosen such that IC2 tries to
between the PC and the FPGA board. Our circuit also includes an oscillator, maintain the output voltage at 3.3 V.
Naturally, we’ve also developed a SRAM and flash memory. They can be Resistor R2 is a sense resistor. IC2 will
design for this interface. used freely by the application. limit the current if the voltage across

3/2006 - elektor electronics 17

HANDS-ON FPGA MODULE

uration memory.
Here again, the sig-
nals are arranged
to be compatible
with the Byte-
blaster interface.
The circuitry
around T3–T5
forms an indicator
circuit that clearly
displays the status
of the FPGA using
bicolour LED D3.
Any error states
that may occur are
also indicate visibly
by D3.

An abundance
of I/O
As this circuit is
intended to be
used for all sorts of
applications, it has
an abundance of
I/O pins. They are
accessible via con-
nectors K3, K4, K7,
K8 and K2. These
Figure 1. The programming mode of the Quartus program. connectors fit stan-
dard pin headers
with 0.1” pin spac-
ing. That avoids
this resistor rises above 0.1 V. The And now for the digital part the difficulties of using SMD connec-
value used here (50 mΩ) results in a tors on the motherboard and thus
current limit threshold of 2 A. Now that we’ve looked after the sup- makes it quite easy to connect the
A similar circuit is built around T2, ply voltages, we can turn to the digital board to your own hardware.
with only the values of the feedback portion of the circuit. The first thing the Connectors K3, K4, K7 and K8 present
resistors being different. They are cho- FPGA needs is a configuration mem- an impressive total of 80 I/O pins of the
sen to yield an output voltage of 1.5 V. ory. That memory is present in the cir- FPGA to the outside world. The I/O
The electrolytic capacitors at the input cuit in the form of IC6, which has been lines are all routed to one side of each
buffer the input voltage. They also pre- designed to work with the FPGA. connector. The supply voltage (3.3 V)
vent fast current spikes from leaving When the MSEL signals from the and ground are available on the other
the board. That prevents generation of FPGA are at ground level, the IC side on alternating pins. You can use
interference that could impair the oper- expects to find a configuration memory the supply and ground pins to power
ation of nearby equipment. (such as the EPCDS4) connected to it. your own circuit if it doesn’t require too
The FPGA will then independently much current. This supply voltage is
The FPGA is powered from these sup- control the memory IC and read data also filtered on the module by a ferrite
ply voltages, but not directly. The sup- from it in order to configure itself based bead and two capacitors.
ply lines for the two sections of the on the data. That makes the process Connector K2 provides a special con-
FPGA are first fed through ferrite very easy in actual use. nection. Besides ground lines, it has
beads to block high-frequency radia- A programming connector (K5) is pro- several signals that are specifically
tion. The supply voltages are also vided for programming IC6. The pin intended to be used as clock signals.
buffered close to the IC by several assignments of this connector have Pin 10 is an input that can be used to
additional capacitors. That may appear been chosen to make it compatible supply an external clock signal to the
to be a bit of overkill, but fairly large with the Altera ‘Byteblaster’ program- FPGA. The remaining even-numbered
switching currents at high frequencies ming interface. pins are all connected to the outputs of
can flow through the FPGA, depending Connector K6 is used for in-circuit pro- the internal PLLs of the FPGA.
on the final circuit configuration. It is gramming of the FPGA from a PC. That Of course, it’s possible to provide an
always a good idea to keep the paths makes it unnecessary to first program a external clock signal on any other
of such currents as short as possible. design into the configuration memory. desired input of the FPGA, but these
Otherwise the circuit can easily gener- This connector can be used to quickly pins are specifically intended to be
ate too much undesirable interference. test a design without using the config- used for that purpose.

18 elektor electronics - 3/2006

 The extras gramming interface. The schematic Testing
diagram of the programming interface
Many FPGA-based designs require is also shown on the foldout. It con- Although this circuit does not have
memory. Although there is memory nects the FPGA or configuration mem- any real input or output capabilities,
available in the FPGA, it’s not enough ory to the parallel port of a PC. The it’s still possible to make a simple
for many types of applications. In light programming interface is compatible test.
of the fact that a ‘softcore’ processor is with the Altera Byteblaster interface After installing the software, it’s
often used, a flash memory can be and can be used with free Altera soft- best to switch off your PC for the
quite handy for storing the firmware of ware. The circuit is quite straightfor- next steps. Start by connecting the
the processor. That makes it possible ward. programming interface to the paral-
to use larger amounts of code in appli- Everything is powered by 3.3 V taken lel port of your PC. Next, use the
cation designs without taking up addi- from the FPGA module. The two ICs supplied 10-way flat cable to con-
tional space in the FPGA. The flash are used to convert the +3.3-V signals nect the interface to the FPGA mod-
memory takes the form of IC5 in the from the FPGA to +5-V signals for the ule. You should connect the flat
schematic diagram. PC and vice versa. The 100-Ω resistors cable to connector K6 (JTAG) on the
A bit of extra RAM can also be desir- prevent the +5-V signals from raising FPGA module. Now switch on the
able in some cases. Besides being use- the supply voltage above the allow- PC and connect a power source to
ful if one or more softcore processors able level. the FPGA (caution: maximum volt-
are used in the FPGA, additional RAM The interface is connected to the par- age 6.5 V).
can also be welcome for various types allel port of a PC via connector K3. K2 is
of signal processing. a box header that is connected to the Start up Quartus and then click on
The RAM memory is provided by IC3 FPGA board by a 10-way flat cable the programming icon in the menu
and IC4. These ICs have a capacity of with a matching plug at each end. bar, or click on the Tools menu and
4 Mbits and are configured as 256K 16- If you just want to program the FPGA select Programmer (the result will
bit words. Signals BHE and BLE can be in order to test something, this cable be the same in either case). The pro-
used as two separate CE lines, with must be connected to K6 (JTAG) on the gramming window will be opened.
BHE being the chip-enable line for the FPGA module. If you want to program Click on the Hardware Setup button,
upper byte (D8–D15) of the data lines the module so it can operate on its and then click on Add Hardware in
and BLE the chip-enable line for the own, this cable must be connected to the new window. Select ‘Byte-
lower byte (D0–D7). That means this K5 (PROGRAM) on the FPGA module. blaster’ and specify the printer port
memory can also be used as a 512-KB you connected to the programming
memory with 8-bit data. interface (usually LPT1:).
IC3 is connected directly to the FPGA, Software If you then click on the Autodetect
while IC4 shares its data and address A project of this sort naturally includes button in the main window, the pro-
busses with the flash memory (IC5). corresponding software. The manufac- gram will automatically detect your
The busses are shared to ensure that turer of the FPGA we use here, Altera, FPGA (EP1C12). That way you can
enough I/O pins of the FPGA are kept has a very nice package of support be sure the FPGA is working and
free for the user connectors. However, software for its FPGAs. The free ver- the supply voltage is present.
that means the FPGA cannot read or sion of the software is called ‘Quartus (040477-1)
write the RAM and flash memory at Web Edition’ and can be downloaded
the same time. That doesn’t form a from the manufacturer’s website
major problem in practice, especially (www.altera.com). It’s a quite sizeable
when softcore processors are used. download (240 MB at the time of writ- The Versatile FPGA module can be
That completes the description of the ing this article), but you can also ordered from
main parts of the circuit. request a free CD-ROM on the Altera Elektor Electronics Readers Services
We already mentioned that the circuit website. under order number 040477-91.
board for the module is provided nearly
fully assembled. The only thing you After installing the software, which by
have to do is to solder the eight pro- the way goes without a hitch, you will
vided connectors to the board. Connec- need a licence. You can also obtain this
tors K2, K3, K4, K7 and K8 are fitted on via the Altera website, and it is valid
the bottom of the board. The other
three connectors are fitted on the top
for six months. At the end of the six
months you can request a new licence.
Included
of the board (on the component side).
Make sure pin 1 of each connecter is in
For the sceptics among our readers,
the manufacturer has assured us that
items
the right position, which is marked by this software will remain free in the • FPGA module (ready to use)
a ‘1’ on the component overlay. future.
There’s not enough room here to show • programming interface (ready to
use)
you everything you can do with this
software, and it’s equally impossible to • programming cable
Programming interface present a full course in VHDL here. If • interconnect cable (between PC
This module by itself is only a starting you’re new to using FPGAs, you and programming interface)
point. The FPGA and/or configuration should have a look at the accompany- • 8 pinheaders (supplied
memory must be programmed before ing FPGA Prototyping Board described separately)
they can be used. That requires a pro- elsewhere in this issue.

3/2006 - elektor electronics 19