74HC126; 74HCT126

Quad buffer/line driver; 3-state

Rev. 5 — 12 July 2021 Product data sheet

1. General description
The 74HC126; 74HCT126 is a quad buffer/line driver with 3-state outputs controlled by the output
enable inputs (nOE). A LOW on nOE causes the outputs to assume a high-impedance OFF-state.
Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to
voltages in excess of VCC.

2. Features and benefits

• Wide supply voltage range from 2.0 to 6.0 V
• CMOS low power dissipation
• High noise immunity
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
• Inverting outputs
• Complies with JEDEC standards:
• JESD8C (2.7 V to 3.6 V)
• JESD7A (2.0 V to 6.0 V)
• Input levels:
• For 74HC126: CMOS levels
• For 74HCT126: TTL levels
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C

3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC126D -40 °C to +125 °C SO14 plastic small outline package; 14 leads; SOT108-1
74HCT126D body width 3.9 mm

74HC126PW -40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; SOT402-1
74HCT126PW body width 4.4 mm
Nexperia 74HC126; 74HCT126
Quad buffer/line driver; 3-state

4. Functional diagram

2 1A 1Y 3
2 1
1 1OE 3
1 EN1
5 2A 2Y 6
5
6
4 2OE
4
9 3A 3Y 8
9
8
10 3OE
10
12 4A 4Y 11 12
11
13 4OE 13

mna235 mna236

Fig. 1. Logic symbol Fig. 2. IEC logic symbol

nA nY

nOE
mna234

Fig. 3. Logic diagram (one buffer/line driver)

5. Pinning information

5.1. Pinning
74HC126
74HCT126

1OE 1 14 VCC
74HC126
74HCT126
1A 2 13 4OE

1Y 3 12 4A 1OE 1 14 VCC
1A 2 13 4OE
2OE 4 11 4Y
1Y 3 12 4A
2A 5 10 3OE 2OE 4 11 4Y
2A 5 10 3OE
2Y 6 9 3A
2Y 6 9 3A
GND 7 8 3Y GND 7 8 3Y

aaa-014836 aaa-014837

Fig. 4. Pin configuration SOT108-1 (SO14) Fig. 5. Pin configuration SOT402-1 (TSSOP14)

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Product data sheet Rev. 5 — 12 July 2021 2 / 13

Nexperia 74HC126; 74HCT126
Quad buffer/line driver; 3-state

5.2. Pin description

Table 2. Pin description
Symbol Pin Description
1OE, 2OE, 3OE, 4OE 1, 4, 10, 13 data enable input (active HIGH)
1A, 2A, 3A, 4A 2, 5, 9, 12 data input
1Y, 2Y, 3Y, 4Y 3, 6, 8, 11 data output
GND 7 ground (0 V)
VCC 14 supply voltage

6. Functional description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Control Input Output
nOE nA nY
H L L
H H H
L X Z

7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage -0.5 +7 V
IIK input clamping current VI < -0.5 V or VI > VCC + 0.5 V [1] - ±20 mA
IOK output clamping current VO < -0.5 V or VO > VCC + 0.5 V [1] - ±20 mA
IO output current -0.5 V < VO < VCC + 0.5 V - ±35 mA
ICC supply current - 70 mA
IGND ground current -70 - mA
Tstg storage temperature -65 +150 °C
Ptot total power dissipation Tamb = -40 °C to +125 °C [2] - 500 mW

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SOT108-1 (SO14) package: Ptot derates linearly with 10.1 mW/K above 100 °C.
For SOT402-1 (TSSOP14) package: Ptot derates linearly with 7.3 mW/K above 81 °C.

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Product data sheet Rev. 5 — 12 July 2021 3 / 13

Nexperia 74HC126; 74HCT126
Quad buffer/line driver; 3-state

8. Recommended operating conditions

Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 74HC126 74HCT126 Unit
Min Typ Max Min Typ Max
VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V
VI input voltage 0 - VCC 0 - VCC V
VO output voltage 0 - VCC 0 - VCC V
Tamb ambient temperature -40 +25 +125 -40 +25 +125 °C
Δt/ΔV input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V
VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V
VCC = 6.0 V - - 83 - - - ns/V

9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
74HC126
VIH HIGH-level VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V
input voltage VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V
VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V
VIL LOW-level VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V
input voltage VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V
VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V
VOH HIGH-level VI = VIH or VIL
output voltage IO = -20 μA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO = -20 μA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO = -20 μA; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V
IO = -6.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V
IO = -7.8 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V
VOL LOW-level VI = VIH or VIL
output voltage IO = 20 μA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO = 20 μA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO = 20 μA; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V
IO = 6.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V
IO = 7.8 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V
II input leakage VI = VCC or GND; VCC = 6.0 V - - ±0.1 - ±1.0 - ±1.0 μA
current
IOZ OFF-state VI = VIH or VIL; VCC = 6.0 V; - ±0.5 - ±5.0 - ±10 - μA
output current VO = VCC or GND
ICC supply current VI = VCC or GND; IO = 0 A; - - 8.0 - 80 - 160 μA
VCC = 6.0 V

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Nexperia 74HC126; 74HCT126
Quad buffer/line driver; 3-state

Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit

Min Typ Max Min Max Min Max
CI input - 3.5 - - - - - pF
capacitance
74HCT126
VIH HIGH-level VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V
input voltage
VIL LOW-level VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V
input voltage
VOH HIGH-level VI = VIH or VIL; VCC = 4.5 V
output voltage IO = -20 μA 4.4 4.5 - 4.4 - 4.4 - V
IO = -6.0 mA 3.98 4.32 - 3.84 - 3.7 - V
VOL LOW-level VI = VIH or VIL; VCC = 4.5 V
output voltage IO = 20 μA - 0 0.1 - 0.1 - 0.1 V
IO = 6.0 mA - 0.16 0.26 - 0.33 - 0.4 V
II input leakage VI = VCC or GND; VCC = 5.5 V - - ±0.1 - ±1.0 - ±1.0 μA
current
IOZ OFF-state VI = VIH or VIL; VCC = 5.5 V; - - ±0.5 - ±5.0 - ±10 μA
output current VO = VCC or GND
ICC supply current VI = VCC or GND; IO = 0 A; - - 8.0 - 80 - 160 μA
VCC = 5.5 V
ΔICC additional per input pin; - 100 360 - 450 - 490 μA
supply current VI = VCC - 2.1 V; IO = 0 A;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V
CI input - 3.5 - - - - - pF
capacitance

10. Dynamic characteristics

Table 7. Dynamic characteristics
GND = 0 V; CL = 50 pF; for test circuit, see Fig. 8.
Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
74HC126
tpd propagation nA to nY; see Fig. 6 [1]
delay VCC = 2.0 V - 30 100 - 125 - 150 ns
VCC = 4.5 V - 11 20 - 25 - 30 ns
VCC = 5.0 V; CL = 15 pF - 9 - - - - - ns
VCC = 6.0 V - 9 17 - 21 - 26 ns
ten enable time nOE to nY; see Fig. 7 [1]
VCC = 2.0 V - 41 125 - 155 - 190 ns
VCC = 4.5 V - 15 25 - 31 - 38 ns
VCC = 6.0 V - 12 21 - 26 - 32 ns
tdis disable time nOE to nY; see Fig. 7 [1]
VCC = 2.0 V - 41 125 - 155 - 190 ns
VCC = 4.5 V - 15 25 - 31 - 38 ns
VCC = 6.0 V - 12 21 - 26 - 32 ns

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Nexperia 74HC126; 74HCT126
Quad buffer/line driver; 3-state

Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit

Min Typ Max Min Max Min Max
tt transition see Fig. 6 [1]
time VCC = 2.0 V - 14 60 - 75 - 90 ns
VCC = 4.5 V - 5 12 - 15 - 18 ns
VCC = 6.0 V - 4 10 - 13 - 15 ns
CPD power per package; [2] - 23 - - - - - pF
dissipation VI = GND to VCC
capacitance
74HCT126
tpd propagation nA to nY; see Fig. 6 [1]
delay VCC = 4.5 V - 14 24 - 30 - 36 ns
VCC = 5.0 V; CL = 15 pF - 11 - - - - - ns
ten enable time nOE to nY; see Fig. 7; [1] - 13 25 - 31 - 38 ns
VCC = 4.5 V
tdis disable time nOE to nY; see Fig. 7; [1] - 18 28 - 35 - 42 ns
VCC = 4.5 V
tt transition VCC = 4.5 V; see Fig. 6 [1] - 5 12 - 15 - 18 ns
time
CPD power per package; [2] - 24 - - - - - pF
dissipation VI = GND to VCC - 1.5 V
capacitance

[1] tpd is the same as tPLH and tPHL.

ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
tt is the same as tTHL and tTLH.
[2] CPD is used to determine the dynamic power dissipation (PD in μW).
2 2
PD = CPD x VCC x fi x N + Σ(CL x VCC x fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
2
Σ(CL x VCC x fo) = sum of outputs.

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Product data sheet Rev. 5 — 12 July 2021 6 / 13

Nexperia 74HC126; 74HCT126
Quad buffer/line driver; 3-state

10.1. Waveforms and test circuit

VI

nA input VM

GND
tPHL tPLH
VOH VI
90%
nY output VM

VOL 10%

tTHL tTLH
mna948

Measurement points are given in Table 8.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 6. Input (nA) to output (nY) propagation delays

VI

nOE input VM

GND
tPLZ tPZL
VCC
output
LOW-to-OFF VM
OFF-to-LOW
VOL VX

tPHZ tPZH
VOH
VY
output
HIGH-to-OFF VM
OFF-to-HIGH
GND
outputs outputs outputs
enabled disabled enabled
mna684

Measurement points are given in Table 8.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 7. Enable and disable times

Table 8. Measurement points

Type Input Output
VM VM VX VY
74HC126 0.5VCC 0.5VCC 0.1VCC 0.9VCC
74HCT126 1.3 V 1.3 V 0.1VCC 0.9VCC

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Product data sheet Rev. 5 — 12 July 2021 7 / 13

Nexperia 74HC126; 74HCT126
Quad buffer/line driver; 3-state

tW
VI
90 %
negative
pulse VM VM
10 %
0V
tf tr

tr tf
VI
90 %
positive
pulse VM VM
10 %
0V
tW

VCC VCC

VI VO RL S1
G DUT open

RT CL

001aad983

Test data is given in Table 9.

Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig. 8. Test circuit for measuring switching times

Table 9. Test data

Type Input Load S1 position
VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ
74HC126 VCC 6 ns 15 pF, 50 pF 1 kΩ open GND VCC
74HCT126 3V 6 ns 15 pF, 50 pF 1 kΩ open GND VCC

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Product data sheet Rev. 5 — 12 July 2021 8 / 13

Nexperia 74HC126; 74HCT126
Quad buffer/line driver; 3-state

11. Package outline

SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

D E A
X

y HE v M A

14 8

Q
A2
(A 3) A
A1
pin 1 index
θ
Lp

1 7 L

e w M detail X
bp

0 2.5 5 mm
scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A
UNIT A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ
max.
0.25 1.45 0.49 0.25 8.75 4.0 6.2 1.0 0.7 0.7
mm 1.75 0.25 1.27 1.05 0.25 0.25 0.1
0.10 1.25 0.36 0.19 8.55 3.8 5.8 0.4 0.6 0.3 8
o
o
0.010 0.057 0.019 0.0100 0.35 0.16 0.244 0.039 0.028 0.028 0
inches 0.069 0.01 0.05 0.041 0.01 0.01 0.004
0.004 0.049 0.014 0.0075 0.34 0.15 0.228 0.016 0.024 0.012

Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION

99-12-27
SOT108-1 076E06 MS-012
03-02-19

Fig. 9. Package outline SOT108-1 (SO14)

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Product data sheet Rev. 5 — 12 July 2021 9 / 13

Nexperia 74HC126; 74HCT126
Quad buffer/line driver; 3-state

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1

D E A
X

y HE v M A

14 8

Q
A2 (A 3 )
A
A1
pin 1 index

θ
Lp
L
1 7
detail X
w M
e bp

0 2.5 5 mm
scale

DIMENSIONS (mm are the original dimensions)

A
UNIT A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ
max.

mm
0.15 0.95 0.30 0.2 5.1 4.5 6.6 0.75 0.4 0.72 8o
1.1 0.25 0.65 1 0.2 0.13 0.1
0.05 0.80 0.19 0.1 4.9 4.3 6.2 0.50 0.3 0.38 0o

Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION

99-12-27
SOT402-1 MO-153
03-02-18

Fig. 10. Package outline SOT402-1 (TSSOP14)

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Product data sheet Rev. 5 — 12 July 2021 10 / 13

Nexperia 74HC126; 74HCT126
Quad buffer/line driver; 3-state

12. Abbreviations
Table 10. Abbreviations
Acronym Description
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic

13. Revision history

Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74HC_HCT126 v.5 20210712 Product data sheet - 74HC_HCT126 v.4
Modifications: • The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
• Legal texts have been adapted to the new company name where appropriate.
• Type numbers 74HC126DB and 74HCT126DB (SOT337-1/SSOP14) removed.
• Section 2 updated.
• Section 7: Derating values for Ptot total power dissipation updated.
74HC_HCT126 v.4 20151201 Product data sheet - 74HC_HCT126 v.3
Modifications: • Type numbers 74HC126N and 74HCT126N (SOT27-1) removed.
74HC_HCT126 v.3 20140922 Product data sheet - 74HC_HCT126_CNV v.2
Modifications: • The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
74HC_HCT126_CNV v.2 19901201 Product specification - -

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Nexperia 74HC126; 74HCT126
Quad buffer/line driver; 3-state
injury, death or severe property or environmental damage. Nexperia and its

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Nexperia 74HC126; 74HCT126
Quad buffer/line driver; 3-state

Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................2
5.1. Pinning.........................................................................2
5.2. Pin description............................................................. 3
6. Functional description................................................. 3
7. Limiting values............................................................. 3
8. Recommended operating conditions..........................4
9. Static characteristics....................................................4
10. Dynamic characteristics............................................ 5
10.1. Waveforms and test circuit........................................ 7
11. Package outline.......................................................... 9
12. Abbreviations............................................................ 11
13. Revision history........................................................11
14. Legal information......................................................12

© Nexperia B.V. 2021. All rights reserved

For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: [email protected]
Date of release: 12 July 2021

74HC_HCT126 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. All rights reserved

Product data sheet Rev. 5 — 12 July 2021 13 / 13