Inventec A10 R15-6050A2940901-MB-A01 Rev A02 Schematic

8 7 6 5 4 3 2 1
THIS DRAWING AND SPECIFICATIONS,HEREIN,ARE THE PROPERTY OF INVENTEC

CORPORATION AND SHALL NOT BE REPODUCED,COPIED,OR USED IN WHOLE OR NOTES:
IN PART AS THE BASIS FOR THE MANUFACTURE OR SALE OF ITEMS WITHOUT 1.HSF Property:Comply iSupplier system HSF property attribute up-to-date value.
WRITTEN PERMISSION,INVENTEC CORPORATION, 2017 ALL RIGHT RESERVED.
F F
E E
A10
D
REFRESH D
SVT BUILD
2019.04.08
C C
B B
A A
TITLE
INVENTEC
DESIGN / DRAWER XXX DATE 03-Oct-2019 A10
CHECK BRYAN CHIOU
03-Oct-2019 APPROVAL TICKY TSAI SIZE CODE DOC.NUMBER REV
FILE NAME A3 CS 1310xxxxx-0-0 A02
A A10_SOVP
DATE CHANGE NO. REV PCB P/N 60xxxxxxxxxx PCB VER A02 SHEET 1 of 70
8 7 6 5 4 3 2 1
Index
D
1 COVER 23 CPU-DDR 49 NGFF M.2 SSD2 D
2 INDEX 24 CPU-LPC, SPI, SMBUS, CLINK 50 DP REDRIVER

3 BLOCK DIAGRAM 25 CPU-GPIO 51 USB3 REDRIVER
4 POWER PROCEDURE 26 CPU-MISC, HDA, SDIO, JTAG 52 TYPE C RTS5450
5 CHARGER 27 CPU-PCIE, USB3, USB2 53 TYPE C CONN2
6 P5V0A / P3V3AL 28 CPU-CLK, RTC, CFG 54 EDP CN
7 P5V0_SYS 29 CPU-DDI, EDP, CSI2, EMMC 55 CAMERA
C
8 DDR POWER 30 CPU-POWER MANAGEMENT 56 FAN C
9 P2V5 31 CPU-POWER1 57 HDMI 4K\2K
10 P1V8A 32 CPU-POWER2 58 HDMI CONN
11 P1V05A 33 CPU-POWER3 59 GPU COVER
12 VCORE & GT & GA 34 CPU-GND, CFG, RSVD 60 GPU-1
13 VCORE 35 EC _NPCE285 61 GPU-2
14 VCCGT 36 KB CONN & LED 62 GPU-3
15 VCCSA 37 TOUCH CONN/LID SWITCH 63 GPU-4
B
16 ENABLE PIN 38 CODEC ALC256M 64 GPU-5 B
17 SYSTEM POWER 39 AUDIO JACK 65 GDDR5 VRAM

40 AMP ALC1304 66 DGPU_RT8816A
18 PCB SCREW 41 CARDREADER RTS5170
19 DDR4-1 67 DGPU_P1V35
42 USB3.0 CONN1 68 DGPU_P1V0S
20 DDR4-2 43 USB3.0 CONN2 69 GPU POWER SEQUENCE
21 DDR4-3 44 USB3 REDRIVER 70 RF&EMI
45 TYPE C RTS5441P
A 22 DDR4-4 46 TYPE C CONN1 A
47 WLAN ON BOARD
48 NGFF_M.2 SSD1
INVENTEC
TITLE
A10
INDEX
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 A02
CHANGE by DATE A3 CS
XXX 03-Oct-2019
PCB P/N PCB VER A02 SHEET of 2 70
<ENG>
60xxxxxxxxxx
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
EDP EDP CHA

PANEL DDR4 1.2V 2400MHZ/2667MHZ
NVIDIA GPU CHB

D PEG DDR4 1.2V 2400MHZ/2667MHZ
GDDR5 N17S-G2/G5 D
DDI2 DP REDRIVER DP
HDMI CONNECTOR
HDMI 4KREPEATER DDI1 RTS5450
PS8330B
PS8407
USB3 USB3 REDRIVER

SPEAKER AMP ALC1304 PS8713B USB TYPE-C (W/ PD)
CODEC CML U42/U62
HDA
COMBO JACK ALC256M 15W USB3.0 USB S&G
C
TPS2546 X2 USB TYPE A X2 C
USB 3.0
INT MIC
USB 3.0 TYPE C MUX
RTS5441P USB TYPE C X1
CNVI
WLAN / BT PCIE
USB 2.0
WEBCAM
SATA / PCIE X4
SSD M.2 USB2.0
CARDREADER
SATA/PCIE X2
B
SSD M.2 RTS5170 B
I2C USB/I2C
CLICKPAD FINGERPRINT
LPC SPI SPI ROM
SPI
KBC
KEYBOARD WINBOND
NPCE285UA0DX_LQFP_128P
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
SIZE CODE 1310xxxxx-0-0 A02
XXX 03-Oct-2019
PCB P/N 60xxxxxxxxxx PCB VER A02 SHEET 3 of 70
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3AL P5V0A P5V0_SYS P3V3A P2V5

RQ3E100BNFU7TB
ADAPTER U60400
DCIN JACK 0.02 PVBAT U60100

U60200
EN_2V5 EN VO
EN_P3V3AL U60250 RICHTEK_RT8097ALGE
EN_P5V0A
P5 EN_P5V0_SYS 3.3/5 V
D RQ3E100BNFU7TB SILERGY_SY8288BRAC(P3V3AL) P3V3A P1V8A
SILERGY_SY8286CRAC(P5V0A) D
SILERGY_SY8284CRAC(P5V0_SYS)
P1V2 U60600
EN_1V8A EN VO
U60300
P0V6S RICHTEK_RT8097ALGE
EN_VTT S3 VO
PVPACK EN_VDDQ S5 P3V3A P1V0S_DGPU
GMT_M5388K11U U67600
0.01 P1V05A
EN_1V0S_DGPU EN VO
U60800
VO SILERGY_SY8088A1AAC
EN_P1V05A
C CHARGER EN C
U60000
GMT_G5335QT1U
BATT_CLK SCL P5V0A P5V0S P3V3AL P3V3A
U66000 U7003 U7004
BATT_DAT SDA ACDET AC_OK
SLP_S3#_3R EN_3V3A
CN6050 EN1 Vout1 EN1 Vout1
EN_PVCORE VR_ON
BQ24780S
VR_SVID_ALERT#
P1V2 P1V2S P3V3AL
ALERT#
P3V3S
VR_SVID_CLK SCLK
PVBAT VR_SVID_DATA SDA PWM
SLP_S3#_3R
EN2 Vout2 SLP_S3#_3R
EN2 Vout2
B PVCORE_DGPU GMT_G2898KD1U GMT_G2898KD1U
B
U67000 RENESAS_ISL95880HRTZ
VO P1V05A PVCCIO VCCSTG
EN_DGPU PVCORE
EN PVCCSA U66010
U7005
U66610 VIN VO SLP_S3#_3R

P1V35S_DGPU
RICHTEK_RT8816A EN1 Vout1
VIN VO PWM P1V05A
U67200 PWM
VO PVCCST
VISHAY_SIC634CD
EN_1V35S_DGPU PVCORE SLP_S4#_3R
EN INTERSIL_ISL95808HRZ EN2 Vout2
PVCCGT U66020
VIN VO GMT_G2898KD1U
A GMT_G5335AQT1U U66310 A
VIN PWM
VO P1V8A P1V8S
PWM
Q7001
VISHAY_SIC634CD
PVCORE
VISHAY_SIC634CD
P5V0A
VIN
U66030
VO INVENTEC
PWM PM514BA TITLE
A10
POWER PROCEDURE
DOC.NUMBER REV
VISHAY_SIC634CD CHANGE by XXX DATE A3 CS
PCB P/N <ENG>
60xxxxxxxxxx PCB VER A02
03-Oct-2019 SHEET of 4 70
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
TP6050 1
TP24
PVPACK
CHARGER
TP6051 1 PAD6050
1 2
TP24 1 2
1
POWERPAD_2_0610 C6050
R6055
28 P3V3_RTC_BATTERY 1 2
OUT
1000PF_50V_2
1UF_6.3V_2
1
P3V3_LDO 1K_5%_2
2
C6051
R6053
1 R6054 2 1 2
13 CN6050 G4
2
RSC_0402_DY 220K_5%_2 13 G4
D 12
12 G3
G3
11
11 G2
G2 D
10 G1
10 G1
9
9
8
8
35 5 EC_SMB1_CLK R60521 2 33_5%_2 7
BI EC_SMB1_DATA 7
35 5 BI R60501 2 33_5%_2 6
6
35 BATT_IN R60511 2 1K_5%_2 5
OUT 5
DON'T PUT 4
4
3
ANY CAPACITOR 2 3
2
1
PVADPTR SPECIAL CASE, PLEASE CHECK CN6050 PIN 1 1
BELL_80188_8578_13P
1
TP60000
PVBAT TP24
Q60011
Q60010 R60000 Q60012 C60019
8 D S 1 1 S D 8 1 2 8 D S 1 1 2
7 2 2 7 3 4 7 2
6 3 3 6 6 3 0.1UF_25V_3_DY
0.02_1%
5 4 4 5 5 4
2
4.7_5%_6
G G G
2
DON'T PUT ANY CAPACITOR
R60048
NMOS_4D3S NMOS_4D3S NMOS_4D3S

VRACHG_MP1 C60018
I 1 2
C PE534BA NEMOS_PE528BA OUT 16 PE534BA C
2
C60002 C60003
1 2 1 2 0.1UF_16V_2 PVADPTR
PAD60000
1
1
I
4700PF_50V_2 POWERPAD_2_0610
0.1UF_25V_3
1
VRACHG_ACDRV1 VRACHG_CMSRC1 D60000
1
16 OUT OUT
1UF_25V_3
1
R60002
1
20.5K_1%_2
1 A1 A2 2
C60048
C60014
2
C60017 SIT 0612
C
BAT54C_30V_0_6A
AOS_AON7506_TRANSISTOR
R60004 R60005
2
2
4.3K_5%_2 4.3K_5%_2 0.1UF_25V_3 0.1UF_25V_3
22UF_25V_5
2
CSC0805
C60000
C60001
5
6
7
8
1
VRACHG_CMSRC
2
VRACHG_ACDRV
VRACHG_ACN
VRACHG_ACP
Q60000
D
35 16 ACPRES OUT R60009
NMOS_4D3S
VRACHG_ACDET 10_5%_5
16
2
OUT HW_I_ADC
35 OUT PVPACK
6
5
4
3
2
1
7
C60009
1
OUT IDCHG U60000
1UF_25V_3
S
IMVP_PSYS 1 2
1
ACDET
1
ACOK
ACN
IADP
ACDRV
ACP
CMSRC
12 OUT
1
NEAR IC
1
4
3
2
R60003 C60012 C60008
1
B TML 29 B
100PF_50V_2 8 28
IDCHG VCC VRACHG_VCC L60000
3.32K_1% CSC0402_DY 9 27 1 2 1 R60001 2
C60007 C60005 PMON PHASE VRPCHG_PH
1 2
10 26 3 4 3 4
2
100PF_50V_2 100PF_50V_2 VRPCHG_HG R60015 C60015

2
PROCHOT# HIDRV
11 VRACHG_BST 1
25 2 VRACHG_BST1 1 2 3 4
NEAR EC NEAR IC SDA BTST
12 24 MAGIC_SRPG0803_1R5M_A 0.01_1%_6
2
2.2_5%_3
2
SCL REGN
VRACHG_REGN
22UF_25V_5
ACIN 13 23
1
IN 0.047UF_16V_2
33UF_25V
CMPIN LODRV
ACIN_OK#
C60010
C60011
14 22 D60001
5
6
7
8
OUT
3
CMPOUT GND
R60016
+
C60021
Q60001
1 2
D
2.2_5%_3
BATPRES#
AON7752
TB_STAT#
BATSRC
BATDRV
A1 A2
1 2
1
ILIM
SRN
SRP
0.1UF_25V_3
0.1UF_25V_3
2
2
PROCHOT# 0.1UF_16V_2
1
26 OUT C60023
C60022
C60020
EC_SMB1_DATA TI_BQ24780S_QFN_28P BAT54C_30V_0_6A_DY
15
16
17
18
19
20
BI VRACHG_SNB
21
35 5
1
G
1UF_10V_2
S
35 5 EC_SMB1_CLK
BI
C60016
2
BATPRES#
4
3
2
OUT
1
VRACHG_REGN
2
TB_STAT# OUT 5 16 2200PF_50V_2
OUT
SHORT_0402_15
2
I VRPCHG_LG
A
1
R60006
P3V3_LDO
VRACHG_ILIM
A A
3.16K_1%_2
2
R60013
2
VRACHG_SRP 1 2 VRACHG_SRP1
R60008 10_5%_2
VRACHG_SRN 1 2 VRACHG_SRN1
1
R60010 10_5%_2
VRACHG_BATDRV 1 2 VRACHG_BATDRV1
R60011 4.3K_5%_2
4.99K_1%_2
INVENTEC
1 2
1
2
R60014
C60024 R60012 10_5%_2
0.1UF_16V_2 TITLE
2
A10
1
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P5V0A
I
PVBAT
I VRB_VDD5
U60200
PAD60210 SIT 0612 SILERGY_SY8286CRAC_QFN_20P OUT 8 11 12 13 14 15 66 67
1 1 2
2 VRP5V0A_VIN 2 IN NC 10
3 IN VRB5V0A_VCC
POWERPAD_2_0610 NI I 4 16 P5V0A
0.1UF_25V_2
22UF_25V_5
IN NC
OUT
2 C60212 1
1
1
CSC0805
D 5 IN
C60210
C60211
I I I
PG 9
OUT 5V_PG D
TP60201 R60204 R60215 C60215
1 1 211 EN2 BS 1 1 2 1 2 VRB5V0A_BST1
4
SHORT_0402_5 0_5%_3 I
TP24 16
2
7 12 VRB5V0A_BST 0.1UF_16V_2 L60200 TP60200
IN EN1
6 VRP5V0A_PH 1 2
VRP5V0A 1 2 1
LX
EN_5V
1
19
RSC_0603
LX NI
15 20 PAD60200 TP24
PCMC063T_2R2MN
R60216
VRA5V0A_LDO OUT LDO LX NI
POWERPAD_4_0610
100UF_6.3V
1
3
CSC0805
I
C60200
C60204
VRB5V0A_VCC17 14
+
VCC OUT
I
2
I VRA5V0A_SNB
PANJIT_PZ1AL5V6B_DY
4.7UF_6.3V_2
4.7UF_6.3V_2
NI
1
SVT 0903
C60230
C60209
7 13
1
2
2
GND
GND
GND
GND FF
CSC0402
C60216
D7006
18
8
21
2
VRA5V0A_FF
2
I
VRA5V0A_OUT 1 R60203 2 VRA5V0A_VOUT
2
C I C60231 SHORT_0402_15I
R60239 C
2 1 VRA5V0A_FF_R 1 2
1000PF_50V_2 1K_1%_2
P3V3AL
P3V3AL
PVBAT I
I A I
A A
PAD60110 VRP3V3A_VIN R60115 C60115
VRB3V3A_BST
1 2 1 2 1 2
1 2 A I VRB3V3A_BST1
NI
0.1UF_25V_2
22UF_25V_5
POWERPAD_2_0610 0_5%_3 0.1UF_16V_2 VRB_VDD3

1
1
CSC0805
1
C60112
C60111
C60110
I A OUT
I
IN
IN
IN
IN
BS
4
A
B VRP3V3A_PH L60100 B
6 LX LX 20 VRP3V3A_PH 1 2 1 2
OUT
2
7 19 PCMC063T-1R5MN PAD60100
GND LX
1
RSC_0603
I POWERPAD_4_0610
3
U60100
A
8 18 P3V3_LDO
4.7UF_6.3V_2
R60116
GND GND
A
NI
100UF_6.3V
A I
1
1
3V_PG PAD60103 TP60100
499K_1%
C60100
C60101
VRA3V3A_LDO 1
R60119
9 PG LDO 17 1 2
OUT
+
SILERGY_SY8288BRAC_QFN_20P
1 2
2
I
PANJIT_PZ1AL3V9B_DY
10 NC NC 16 A POWERPAD1X1M
1
1
4.7UF_6.3V_3
VRA3V3A_SNB
C60191
NI
2
SVT 0903
2
A
21
1
OUT
GND
EN2
EN1
CSC0402
NC
FF
C60116
D60100
VRA3V3AL_EN
SIT 0612
12
13
14
15
11
2
1
499K_1%
I A
2
R60110
2
I
2
A SHORT_0402_15
VRA3V3A_VOUT1 R60118
1 2 VRA3V3A_VOUT
I
A I
A A A
C60192
R60114
R60101
1 2 VRA3V3A_EN 2 1 1 2
16
17 EN_3V IN A I
SHORT_0402_5
1000PF_50V_2 1K_1%_2
1
TP60101
2
RSC_0402
R60117
INVENTEC
NI
A
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
PVBAT
I
A
PAD60260
1 2
VRP5V0_VIN
1 2
NI I
POWERPAD_2_0610
0.1UF_25V_2
10UF_25V_5
1 A
1
CSC0805
C60260
C60261
C60262
I
A
U60250
SILERGY_SY8284CRAC_QFN_20P
2
2
2 IN NC 10
C 3 IN C
4 IN NC 16 P5V0_SYS
5 IN
I 9 I I
A PG A A OUT 5V0_PG 35
EC_TYPEC5V_EN1 R60256 2 R60254 R60265 C60265
35 IN 1 2 11 EN2 BS 11 2 1 2 VRB5V0_BST1 A
I
0_5%_2
4
SHORT_0402_5 0_5%_3
EN_5V 1 R60255 2 12 VRB5V0_BST
0.1UF_16V_2
L60250
PAD60250
16 6 IN EN1
6 1 2
VRP5V0 1 2 1
TP60250
0_5%_2_DY LX VRP5V0_PH
1 2
1
LX 19 NI 3 4
A 3 4 TP24
15 20
VRA5V0_LDO OUT LDO LX CYNTEC_PCMB051H_3R3MS I I I I I
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
R60266 A A A A A POWERPAD_4_0610
3
RSC_0603_DY
C60250
C60251
C60252
C60253
C60254
VRB5V0_VCC
17 VCC OUT 14
I I
1 2
1UF_6.3V_2
1UF_6.3V_2
A A VRA5V0_SNB
1
NI
C60280
C60259
7 13
2
GND
GND
GND
GND FF A
C60266
18
8
CSC0402_DY
21
2
2
I
A
B B
R60253
1 SHORT_0402_15
2
I I
A A
C60281 R60289
1 2 1 2
1K_1%_2
1000PF_50V_2
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DDR POWER
RCS=10K A
I PVBAT
R60306 A
RTON=511K 511K_1%_2
I
PAD60310
1 2 1 2
1 2
VRAVDDQ_TON VRPVDDQ_VIN
10UF_25V_5_DY
POWERPAD_2_0610
10UF_25V_5
A NI
D I A
1
TP60301
D
C60311
1
C60310
TP24
TP60351
1
2
U60300
TP24 7 TON V+ 24
V+ 23 A A
16 IN EN_VTT 5 S3 V+ 22 I I
21 R60315 C60315 VRPVDDQ_VLDOIN

V+
0_5%_3 0.1UF_16V_2
8 OUT P1V2
16 IN EN_VDDQ 6 S5
BST 27 1 2 2 1 A
I I
VDDQ_PG 8
4
16 VRAVDDQ_BST VRAVDDQ_BST1
I
A IN PGOOD A
PAD60300
R60305 2
L60300 SIT 0612 TP60300
I 1 VRAVDDQ_CS 10 CS LX 25 1 2 VRPVDDQ 1 2 1
A NI 3 4
4.75K_1%_2 LX 20 VRPVDDQ_PH
R60309 2 A A TP24
VRB_VDD5 1 VRBVDDQ_VCC 9 19
22UF_6.3V_3_DY
2
15 14 13 12 11 6 IN VCC LX PCMC063T_1R0MN
22uF_6.3V_3
22uF_6.3V_3
22uF_6.3V_3
I I I
67 66 A A A A POWERPAD_4_0610
1
18
3
2.2_5%_2 LX
1
32 17 R60316
C60306 GND LX
VRAVDDQ_SNB
RSC_0603_DY
C60303
C60301
C60302
C60300
1UF_6.3V_2
2
I
NI
8 IN VRPVDDQ_VLDOIN 28 26 OCP=13A
1 1
VLDOIN NC
NI
2
A
C 31 VTTSNS VDDQSNS 2 FSW=463KHZ C
VDDQSET 3
VRPVTT 29 C60316 VO=0.75*(1+R30300/R60301)
8 OUT VTT
CSC0402_DY
PGND 11
12
10uF_6.3V_3
A PGND
2
I
1
PGND 13
4 VTTGND PGND 14
C60350
30 VTTGND PGND 15
VRAVDDQ_SNS
PGND 16
OUT VRPVTT_REF 1 VTTERF
33 R60300
2
TML
VRAVDDQ_SET 1 2
0.1UF_16V_2
A
I SIT2 0722
1
GMT_M5388K11U_QFN_32P A 6.19K_1%_2
C60351
I
10K_1%_2
R60301
A
NI
C60304
1 2
2
1
0.022UF_16V_2_DY
B B
P0V6S
A
I
PAD60350 TP60350
8 VRPVTT 1 2 1
IN 1 2
TP24
POWERPAD1x1m
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P2V5
D
D
P2V5
A
PAD60400
P3V3A TP60401 1 2 1
TP60400
C 1 A
9
VRP2V5 IN 1 2 C
TP24
TP24 I POWERPAD1x1m
A
A I U60400 NRS5020T2R2N
PAD60410 VRP2V5_VIN L60400
I
1 2 4 VIN LX 3 1 2 9
A
OUT VRP2V5
1
1 2
AZ6225_01F_DY
I
1
324K_1%_2
16 VRP2V5_PH
47PF_50V_2
EN
EN_2V5 IN
22UF_6.3V_5_DY
GND
C60405
POWERPAD_2_0610 5 6
10UF_6.3V_3
PG FB
R60400
I I NI
22UF_6.3V_5
1
A
D60400
1
1
16
2V5_PG OUT RICHTEK_RT8097ALGE_TSOT23_6P
C60400
C60410
C60401
2
2
A
2
1
100K_1%_2
2
2
R60401
I
2
2
VOUT=0.6*(1+(R60400/R60401))
B B
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P1V8
D
D
I
P1V8A
VRP1V8A PAD60600
TP60600
10 1 2 1
IN 1 2
TP24
POWERPAD1x1m
C C
TP60601
1
P3V3A
AZ6118_01F_DY
1
TP24
I
D60600
U60600 NRS5020T2R2N
PAD60610 VRP1V8A_VIN L60600
1 2 4 VIN LX 3 1 2 10
1 2 I
OUT VRP1V8A
47PF_50V_2
I I I
EN_1V8A 1
1
VRP1V8A_PH
16 IN EN
1
1
205K_1%_2
10UF_6.3V_3
GND
5 6
C60602
POWERPAD1X1M
2
PG FB
R60600
22UF_6.3V_5
22UF_6.3V_5
1
1
RICHTEK_RT8097ALGE_TSOT23_6P
C60610
C60600
C60601
2
2
VRA1V8A_FB
2
2
16 P1V8A_PG OUT
2
1
100K_1%_2
R60601
I
2
VOUT=0.6*(1+(R60400/R60401))
B B
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P1V05
D
D
I
A
C60809 R60809
1 2 VRA1V05A_VCC1 2 VRB_VDD5
IN 6 8 12 13 14 15 66 67
10_5%_2
I I
1UF_6.3V_2 A A
R60815 C60815
1 2 1 2
VRB1V05A_BST
I AC60817
VRB1V05A_BST1
1 2 VRA1V05A_SS 2.2_5%_3
I 0.1UF_16V_2
A
23
21
20
0.01UF_50V_2
TP60801
6.65K_1%_2
1
1
R60800
TP24
BST
VCC
SS
C 10 OCP=14A P1V05A C
LX VRP1V05A
1V05_PG 1 11 OUT
2
35 16 OUT PGOOD LX
16 I PAD60800 I A
3
LX A
I 2 17 POWERPAD_4_0610
16 IN EN_1V05 A EN LX VRP1V05A_PH L60800
R60829 VRA1V05_PFM LX 18 1 2 1 2
1 2 3 24 3 4
RSC_0603_DY
PFM# LX
I
22UF_6.3V_3_DY
A SHORT_0402_5 NI PCMC063T_1R0MN I I I I
22uF_6.3V_3
22uF_6.3V_3
22uF_6.3V_3
22uF_6.3V_3
1
4 A A A A A A
20K_1%_2
TP60800
4
AGND
R60801
U60800 1
R60816
C60800
C60801
C60802
C60803
C60804
GMT_G5335QT1U_QFN_23P TP24
5 FB
PGND 12
2
13
2
PGND NI
VRA1V05A_TON
6 14
VRA1V05A_SNB
TON PGND
PGND
PGND
NC
IN
IN
IN
IN
I
88.7K_1%_2
A
1
VRA1V05A_AIN
R60811
SHORT_0402_15
NI
CSC0402_DY
A
1
I
VRA1V05A_FB 22
25
19
15
17
8
9
A
C60816
B B
2
R60807
2
I
A
FSW=500KHZ C60811
2
1 2
VO=((R6200/R6201+1)*0.8 PVBAT
0.1UF_25V_3
I I
A A
PAD60810 C60810
1 1 2
2 VRPVBAT_1V05A 1 2
POWERPAD_2_0610 10UF_25V_5
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CONTROLLER I
R66460
1 2 PVBAT
VRAGT_NTC1
PVCCST 14 13 12 11 8 6 IN VRB_VDD5
470K_5%_NTC
I I 67 66 15 I
SHORT_0603_25
1
1
R66462 R66461
R66109
R66199
2_5%_2
1 2 1 2
NI
27.4K_1%_2 10K_1%_2
C66460
2
1 2 NI I I
RSC_0402_DY
1UF_6.3V_2
1
1
45.3_1%_2
100_1%_2
0.22UF_25V_3
C66100
R66104
R66101
R66100
I
1UF_6.3V_2
1
1
CSC0402_DY
I
C66109
C66199
C66471
1 2 I
2
I I NI NI
33PF_50V_2 I VRASA_ISUMN3 I D
2
C66470 R66470 SIT 0612 R66655 C66653 C66654
1 2 1 2 I 1 2 1 2 1 2
VRAGT_COMP1
R66103
8200PF_50V_2 2.87K_1%_2 VR_SVID_DATA 1 2 VRACPU_PROG1 1 R66901 2 RSC_0402_DY CSC0402_DY 0.1UF_16V_2
32 IN
10_1%_2 110K_1%_2 1 R66654 2 VRASA_ISUMN
I
IN 15
I 32 IN VR_SVID_ALERT#
SIT 0612 VRAGT_FB3 487_1%_2
1
VRACPU_SVID_DATA
I
C66473 R66102 VRACPU_PROG2 1 R66902 2
R66473 I
VRACPU_SVID_CLK
VR_SVID_CLK 1 2
VRACPU_PROCHOT
1 2 1 2 32 IN I
1.87K_1%_2 I
0.047UF_16V_2
49.9_1%_2 R66650
VRASA_ISUMN1
1
R66105 2
11K_1%_2
CPU_PROCHOT# 1
1
26 IN
R66652
330PF_50V_2 2K_1%_2 R66903 2
VRACPU_VCC
VRACPU_VIN
64
35 75_1%_2 VRACPU_PROG3 1 10K_1%_NTC
C66652
PVCORE_PG
0.022UF_16V_2
12
30 16 OUT 34K_1%_2
0.01UF_50V_2
I I
I VRAGT_FB1 I
56
1
I
VRAGT_FB2 C66472 R66472
C66651
C66650
C66482 1 2 1 2 16 IN VRAVR_ON VRACPU_PROG4 1 R66904 2 R66651
2
1 2 SIT2 0809
2
2.61K_1%_2
165K_1%_2
VRACPU_PROG5
IMVP_PSYS
330PF_50V_2 330PF_50V_2 1K_1%_2
1 R66195 20_5%_2 VRACPU_PSYS I
5 IN
VGT_VCCSENSE
48
47
46
45
44
43
42
41
40
39
38
37
2
R66480 1 R66905 2 I
1 R66471
2
33 IN 1 2 2
1 R66197 2 1 R66407 2 SIT 0612 U66000 100K_1%_2
VRASA_ISUMP
IN 15
2K_1%_2 I I
1
VCC
ALERT#
SDA
SCLK
VIN
VR_READY
PROG2
PROG3
VR_HOT#
SHORT_0402_15
VR_ENABLE
PROG4
93.1K_1%_2
PROG1
NI 22K_1%_2
C66480
SIT 0612 C66197 C66407 SIT 0612 I
C 1 2 1 2 C66682 C
CSC0402_DY 1 PSYS PROG5 36 1 2
SHORT_0402_15 4700PF_50V_2 330PF_50V_2 VRAGT_IMON 2 35 VRASA_PWM1
VGT_VSSSENSE IMON_B PWM_C
IN 15
R66481 VRAGT_NTC 3 34 VRASA_FCCM
IN 330PF_50V_2
2
1 2 NTC_B FCCM_C 15
33 IN VRAGT_COMP 4 COMP_B ISUMN_C 33 VRASA_ISUMN4
C66481 VRAGT_FB 5 FB_B ISUMP_C 32 R66680VCCSA_VSSSENSE
1 2 VRAGT_RTN 6 RTN_B RTN_C 31 VRASA_RTN 1NI 2 33
IN
1
7 ISUMP_B FB_C 30 VRASA_FB
2.49K_1%_2
I
VRAGT_ISUMN4 8 29 VRASA_COMP C66680 SHORT_0402_15
330PF_50V_2 ISUMN_B COMP_C
CSC0402_DY RSC_0402_DY
1K_1%_2
I NI I
VRAGT_ISUMP 9 28 VRASA_IMON CSC0402_DY
14 IN NC IMON_C
1
10 27 VRACPU_PWM3 A01-0817
NC PWM3_A IN 13 67 R66681
R66670
R66673
R66672
0.047UF_16V_2
0.022UF_16V_2
I I 15 66 1 2
VRAGT_FCCM 11 26 VRACPU_PWM2
14 IN FCCM_B PWM2_A IN 13 IN 33
10K_1%_NTC2.61K_1%_2
1
13 14
1
2
VRAGT_PWM1 12 VRACPU_PWM1 I I
25
330PF_50V_2
10PF_50V_2
VRASA_COMP1
14 IN PWM_B PWM1_A IN 13 12 SHORT_0402_15
R66451
C66450
C66451
1
2
1
2.1K_1%_2
VRASA_FB3
11
C66607
C66671
I VCCSA_VCCSENSE
VRAGT_ISUMN1
VRB_VDD5
VRASA_FB1
IN 6
0.033UF_16V_2
49
2 R66671
I EP 8 C66681
1200PF_50V_2
8200PF_50V_2
12
12
12
I I NI I
ISUMN_A
1 2
ISUMP_A
1
ISEN1_A
ISEN2_A
1
ISEN3_A
COMP_A
FCCM_A
IMON_A
11K_1%_2
R66607
1
NTC_A
RTN_A
57.6K_1%_2
I
VRAGT_ISUMN3
R66452
C66452
FB_A
C66672
C66670
C66673
2
NC
R66455 C66453 WHL-U R66306 = 0 OHM 330PF_50V_2
2
I 1 2 1 2 R66306 CML-U R66306 =DY
1
13
14
15
16
17
18
19
20
22
23
24
RSC_0402
21
R66450
1K_1%_2 2200PF_50V_2 RENESAS_ISL95880HRTZ_TQFN_48P
2
2
2
SIT 0612 VRACPU_FCCM
IN 13
VRACPU_COMP
VRACPU_IMON
VRACPU_ISUMN4
VRAGT_PWM2
IN
VRACPU_NTC
VRACPU_RTN
B VRASA_FB2 B
VRACPU_FB
VRACPU_ISEN3
IN 13
2
VRAGT_ISUMN 1 R66454 2 SIT 0612

14 IN C66130 1 2
309_1%_2
0.022UF_16V_2
VRACPU_ISEN2
R66107 IN 13
1 2 I
1 2
63.4K_1%_2 C66120 0.022UF_16V_2
VRACPU_ISEN1
I
C66107 IN 13
I
1 2 1 2
C66110 0.022UF_16V_2
I I
330PF_50V_2 VRACPU_ISUMN3 I
R66155 C66153 C66154
1 2 1 2 1 2
1K_1%_2 2200PF_50V_2 0.1UF_16V_2

R66154
1 I 2 VRACPU_ISUMN IN 13
I
1
340_1%_2
1
10K_1%_2
VRACPU_ISUMN1
I
R66161
I I I
I
1
R66150
8200PF_50V_2 3.4K_1%_2
1
0.1UF_16V_2
2K_1%_2
1K_1%_2
11K_1%_2
R66170
R66173
R66172
1
I
R66152
10K_1%_NTC
C66152
A C66181 A
0.033UF_16V_2
0.1UF_16V_2
12
NI I 1 2
CSC0402_DY
2
33PF_50V_2
2.8K_1%_2
1
1
2
VRACPU_FB1
VRACPU_COMP1
VRACPU_NTC1 I
VRACPU_FB3
C66160
C66171
R66171
C66151
C66150
2
I
330PF_50V_2 R66151
2
470K_5%_NTC
2
I I I I
330PF_50V_2
330PF_50V_2
27.4K_1%_2
1
1
2
2.61K_1%_2
C66173
R66181 I
R66162
VSSSENSE
C66170
C66172
R66160
1 2 32
IN
1
2
2
1
2
VRACPU_ISUMP IN 13
C66180
SHORT_0402_15
I
A01-0817
INVENTEC
2
2
1
CSC0402_DY
R66180 VCCSENSE
2
1 2 32
IN
VRACPU_FB2 SHORT_0402_15
I
TITLE
C66182 A10
SIT 0612 1 2
Block Diagram
DOC.NUMBER REV
330PF_50V_2 CHANGE by DATE A3 CS
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
WS-0413
13 IN
PVBAT_CPU_1
PVCORE PVBAT
10
11
12
13
14
15
32
33
35
9
I
6014B0226601 PVCORE I
I
VIN
VIN
VIN
VIN
PGND
PGND
PGND
PGND
AGND
PGND
I I PAD66010
L66010 1 2 PVBAT_CPU_1 OUT
VRACPU_BST11 8
VRACPU_BST1 16 VRPCPU_PH1 1 2 1 2 13
R66015 C66015 VIN SW 1 2
1 2 1 7 2 17 3 4
NI POWERPAD_2_0610 NI
22UF_25V_5
PHASE SW 3 4
VRACPU_CSN11
1
6 18
CSC0805
2.2_5%_3 0.1UF_16V_2 NC SW ETQP4LR15AFM I I
R66016
C66010
C66011
VRACPU_BST12 5 19 I
1
BOOT U66010 SW
15UF_25V
15UF_25V
R66017 4 20
VRACPU_SNB1
C66299
C66298
67 66 I NC SW R66018
VRB_VDD5 1 2 3 21
12 11 8 6 IN 1 2 VRACPU_ISUMN
+
D 15 14 13 VRACPU_FCCM2 VCC SW
22 OUT 12 13
13
12 IN D
1
2.2_5%_3 VRACPU_PWM11 FCCM_PS4# SW
23
2
C66017
12 IN PWM SW 2.2_5%_2
2
NI
SHORT_0402_15
R66211
1UF_6.3V_2 1 R66013 2 VRACPU_ISEN2
1
12 13
PGND
OUT
PVCC
GLTP
I
SIT2 0725
C66016
SW
SW
SW
100K_1%_2
NC
NC
GL
A01-0817
2
2
R66012 2
34
30
29
28
27
26
25
24
31
1 VRACPU_ISEN3 OUT 12 13
100K_1%_2
I
2
VISHAY_SIC634CD_T1_GE3_MLP_31P
VRACPU_CSP11 R66019 PVBAT
R66212 1 2 VRACPU_ISUMP
OUT 12 13
1
1 2
15 14 13 12 11 8 6
VRB_VDD5 IN C66018
67 66 I 3.65K_1%_2
I I
I
10K_5%_2
R66014 PAD66020 PVBAT_CPU_2
1UF_6.3V_2 1 2 VRACPU_ISEN1 OUT 1 2
12 13 1 2 OUT 13
2
NI
POWERPAD_2_0610
22UF_25V_5
100K_1%_2
CSC0805
C66020
C66021
PVBAT_CPU_2
13 IN
2
C C
10
11
12
13
14
15
32
33
35
9
I
6014B0226601 PVCORE
VIN
VIN
VIN
VIN
PGND
PGND
PGND
PGND
AGND
PGND
I I
I PVBAT
L66020
R66025 VRACPU_BST21 C66025 8 16 VRPCPU_PH2 1 2
VRACPU_BST2 VIN SW 1 2
1 2 1 2 7 17 3 4
NI I
PHASE SW 3 4
VRACPU_CSN21
1
6 18 ETQP4LR15AFM
2.2_5%_3 VRACPU_BST22 0.1UF_16V_2 NC SW I PAD66030 PVBAT_CPU_3
R66026
5 19
BOOT U66020 SW 1 2
I
R66027 4 20 R66028 1 2 OUT 13
VRACPU_SNB2
67 66 NC SW
VRB_VDD5 1 2 3 21 1 2 VRACPU_ISUMN OUT
12 11 8 6 IN 12 13 POWERPAD_2_0610 NI
22UF_25V_5
VCC SW
15 14 13 VRACPU_FCCM2 22
1
13
12 IN 2.2_5%_2
1
CSC0805
C66030
C66031
23
2
I 12 IN
R66221
C66027 PWM SW
1 R66023 2 VRACPU_ISEN1
NI
OUT 12 13
SHORT_0402_15
1UF_6.3V_2
1
PGND
100K_1%_2
PVCC
GLTP
C66026
SW
SW
SW
NC
NC
GL
A01-0817
2
R66022 2
2
1 VRACPU_ISEN3 OUT 12 13
34
30
29
28
27
26
25
24
31
100K_1%_2
I
2
VRACPU_CSP21 R66029
B R66222 1 2 VRACPU_ISUMP 12 13 B
OUT
1
67 66 15 14 13 12
8 6 1 2
VRB_VDD5 11
IN C66028
3.65K_1%_2
I
I
10K_5%_2 I
1UF_6.3V_2
R66024 PVCORE SIT2 0730
1 2 VRACPU_ISEN2 OUT 12 13
C66003,6,7,8 BOM CHANGE TO OPEN
2
100K_1%_2
330UF_2V_9MR_PANA_-35%
22UF_6.3V_5_DY
22UF_6.3V_5_DY
22UF_6.3V_5_DY
22UF_6.3V_5_DY
I I
22UF_6.3V_5
1
1
1
470UF_2V
PVBAT_CPU_3
C66000
C66001
C66003
C66006
C66007
C66008
C66009
13 IN
+
I
15
32
10
11
12
13
14
33
35
9
2
2
2
6014B0226601 PVCORE
PGND
VIN
VIN
VIN
VIN
PGND
PGND
PGND
PGND
AGND
I
I I VRACPU_BST3
L66030
R66035 VRACPU_BST31 8
C66035 16 VRPCPU_PH3 1 2
1 2 1 2 VIN SW 3 1 2 4
7 17
PHASE SW
NI
3 4 VRACPU_CSN31
1
6 18
2.2_5%_3 0.1UF_16V_2 NC SW ETQP4LR15AFM
R66036
I
VRACPU_BST32 5 19 I R66038
4 BOOT U66030 SW
20 1 2 VRACPU_ISUMN SIT2 0730 PVCORE
R66037 OUT 12 13
VRACPU_SNB3
1 2 NC SW
A 13 12 11 8 6 IN VRB_VDD5 3 21 A
VCC SW
67 66 15 14 12
13 IN VRACPU_FCCM 2 22 2.2_5%_2
1

23 TP66000
2
12 IN 1
R66231
C66037 I PWM SW
1 R66033 2 VRACPU_ISEN1 OUT 12 13
NI
SHORT_0402_15
1UF_6.3V_2 100K_1%_2 TP24

1
PGND
PVCC
GLTP
C66036
SW
SW
SW
NC
NC
GL
A01-0817
2
1 R66032 2 VRACPU_ISEN2 OUT 12 13

34
30
29
28
27
26
25
24
31
100K_1%_2
INVENTEC
2
VISHAY_SIC634CD_T1_GE3_MLP_31P I
VRACPU_CSP31 R66039
R66232 1 2 VRACPU_ISUMP
OUT 12 13
1
1 2
6 IN C66038
VRB_VDD5 8 I 3.65K_1%_2
I
TITLE
11
67 66 15 14 13 12 10K_5%_2 A10
I R66034 Block Diagram
1UF_6.3V_2 1 2 VRACPU_ISEN3
OUT 12 13
DOC.NUMBER REV
2

100K_1%_2 CHANGE by DATE A3 CS
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PVBAT
I
PVCCGT 1
PAD66310
1 2
2
I NI
PVBAT_GT OUT 14
22UF_25V_5
POWERPAD_2_0610
1
15UF_25V
CSC0805
C66599
C66310
C66311
+
2
2
D
D
PVBAT_GT
14 IN
10
11
6
9
VIN2
VIN3
PGND2
PGND3
VIN1
PGND1
I
R66315 C66315
I
I
PVCCGT
2.2_5%_3 0.1UF_16V_2 L66310
1 2 VRAGT_BST11 1 2 VRAGT_BST1 5 PHASE VSWH1 12 1 2
3 1 2 4 VRAGT_V1N
RSC_0603_DY
I NI
3 4 OUT
1
U66310 ETQP4LR15AFM
R66316
VRAGT_SNB1
VRAGT_BST12 4 BOOT VSWH2 13
2
C C
NI
CSC0402_DY
3 NC VSWH3 14
1
I
C66316
VRB_VDD5 R66317
6 1 2 2 15
8
IN VCC VSWH4
11
2
I
1UF_6.3V_2
12
1
I
13 2.2_5%_3
15
C66317
1 FCCM R66318
66
16 1 2 VRAGT_ISUMN
67 VSWH5 OUT 12
2.2_5%_2
2
VRAGT_CSP11 1
I
R66319 SIT2 0730
2 VRAGT_ISUMP
PGND6
PGND5
PGND4
OUT 12
AGND
PVCC
GLTP
PWM
C66308,C66309,C66302
GL
3.65K_1%_2
PVCCGT BOM CHANGE TO OPEN

24
23
20
18
17
22
19
21
1
B VRAGT_FCCM TP66300 B
330UF_2V_9MR_PANA_-35%
12 IN TP24
22UF_6.3V_5_DY
22UF_6.3V_5_DY
22UF_6.3V_5_DY
I I
VRAGT_PWM1
22UF_6.3V_5
22UF_6.3V_5
12 IN
100UF_6.3V
1
1
1
C66300
C66301
C66302
C66306
C66307
C66308
C66309
+
+
I
1UF_6.3V_2
1
C66318
2
2
2
SIT2 0725
2
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PVCCSA
D PVBAT
I D
PAD66610
1 2 PVBAT_SA
1 2 OUT 15
NI
POWERPAD_2_0610
22UF_25V_5
1
1
CSC0805
C66610
C66611
2
2
SVT 0827
C C
VRPSA_HG1
PVBAT_SA
15 IN I
10
1
4
2
VRASA_FCCM
G1
D1
D1
D1
D1
IN 12
Q2
I
Q1
VRB_VDD5
AON7934
I
VRASA_BST11 I R66617
1 2
C66615 6813
1
12
6667
14
1IN Q66610
VRASA_VCC1
R66615
1 2 1 2 I
1
I I 5.1_5%_3 PVCCSA
PH
G2
S2
S2
S2
A
C66617
2.2_5%_3 0.1UF_16V_2 L66610
VRPSA_PH1 1 2
5
7
8
9
4.7UF_6.3V_3
VRASA_BST1 3 4
RSC_0603_DY
NI
1
U66610
2
PCMC063T_R47MN3R867
R66616
1 UGATE PHASE 8
2 BOOT FCCM 7 VRASA_CSN11
12 IN VRASA_PWM13 PWM VCC 6
B 4 GND LGATE 5 VRPSA_LG1 R66618 B
1 2 VRASA_ISUMN 12
VRASA_SNB1 OUT
1 2
EP
SHORT_0402_15
INTERSIL_ISL95808HRZ_DFN_8P
PVCCSA
NI
9
VRASA_CSP11 1 R66619
C66616 2 VRASA_ISUMP
OUT 12
CSC0402_DY I
3.65K_1%_2
2
22UF_6.3V_3_DY
22UF_6.3V_3_DY
I I I
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
A A
1
C66601
C66602
C66603
C66608
C66609
2
2
NI NI
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
2
3V & 5V P3V3_LDO
DDR D7001
NC
R7017 EN_2V5 P3V3A
1 3 1 2
2
OUT 9
100_5%_2
R7000
10K_5%_2
100K_5%_2 DIODE-BAT54-TAP-PHP
R7013
SLP_S4#_3R 1 R7012 2
R7001 30 17 16 IN
FR_EN_5V 1 2 EN_5V 35
OUT
1
6 7
PANJIT_2N7002KW_3P I 330K_5%_2
1
SHORT_0402_5
0.22UF_6.3V_2
Q7000
2
C7010
EC_PW_ON# 8 IN VDDQ_PG OUT
D
G G P3V3A
35 IN
10K_5%_2_DY
S
2
R7019
2
R7121
S
D 2 1
D
2
100K_5%_2
A2
R7118 EN_VDDQ
BAT54C_30V_0_6A
2V5_PG
1
9 1 2 8
IN OUT
R7026 0_5%_2
P5VAUXON 1 2 3
35 IN C
P3V3_LDO R7018
1K_5%_2 SLP_S4#_3R 1 2
D7000
17
35
16
30
IN
10K_5%_2
2
A1
R7002
2
0_5%_2_DY
100K_5%_2
R7023
30 17 IN SLP_S3#_3R 1 2 EN_VTT OUT 8
1
R7027
R7005 40
35
1
FR_EN_3V 1 2 EN_3V OUT
1
616
17 47K_5%_2_DY
0.1UF_10V_1
10K_5%_2 C7009
1
R7007
1
23 IN DDR_VTT_PG_CTR 1 2 CSC0402_DY
C7106
2
47K_5%_2
2
I
C
D
C
Q7003
PANJIT_2N7002KW_3P
D
EC_3V_PW_ON# G
35 IN G
S
R7028 P1V05A SIT 0612 PVCORE

S
2 1
R7035
35 17 16 IN EN_3V3A 1 2
100K_5%_2
EN_PVCORE
SHORT_0402_5
0_5%_2_DY IN P3V3S 30 35
A
1
I
R7024 A
1
EXT_PWR_GATE# 1 2
10K_5%_2
EN_1V05
R66000
30 IN OUT 11
16
R66002
1
0_5%_2_DY
C7021
2
CSC0402_DY VRAVR_ON
2
OUT 12
P3V3A PVCORE_PG OUT 12 30
NI 56
RSC_0402_DY
A
1
2
R66001
1
B B
R7020
10K_5%_2
2
2
16 11
35 IN 1V05_PG 1V05_PG OUT
5 IN
S
VRACHG_MP1
PVPACK
MP VRACHG_REGN
S
D60002 Q60003 1 R60023 2
G G IN 5
P1V8A P3V3A 1 A1 A2 2 PANJIT_2N7002KW_3P 100K_5%_2
1
SIT 0529
100K_5%_2
I
P3V3AL
C
A I
1 D
R60024
1
EN_3V 1 R7030 2 BAT54C_30V_0_6A

17 16 6 IN R7033 PVADPTR
3
47K_5%_2_DY
1
0.1UF_25V_3
I
BAV99
1
D60003
2
A
470K_5%_2
10K_5%_2 1 R60021 2 3
R7031
R60017
R7021 2 Q60002
EN_3V3A EN_1V8A EN_1V05 ACPRES
C60013
1 1
D 2
35
17 16 IN OUT 10 10K_5%_2 OUT 11 16 S1
A G1 2 4.7K_5%_3 A
IN 5
35
VRACHG_ACDRV1
0.1UF_16V_2
47K_5%_2
1
Q7004 6
6015B0167001
PANJIT_2N7002KW_3P
I
R60022 2 VRACHG_ACDET
2
A D1
1 3
2
1
D2
2
5
SIT 0611 IN
D
C7020
G G G2 5 5 IN
1
1
470K_5%_2
1K_5%_2
D
S2
S
P1V8A
R60018
R7032
Q7005 2N7002KDW
2
R7022
D
P1V8A_PG 1 10K_5%_2_DY
2 G G
16 10 IN
1
RSC_0402_DY
INVENTEC
2
2
0_5%_2
S
R7025
PJA138K
R7034
10K_5%_2
S
TITLE
2
IN P1V8A_PG P1V8A_PG OUT A10

1
10
16 Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SYSTEMPOWER P5V0S
P5V0A
PAD7000
PAD7001 1 1 2 2
PANJIT_PZ1AL5V6B_DY
1 1 2 2
10UF_6.3V_3
22UF_6.3V_3
1
POWERPAD_2_0610
1
1
2
POWERPAD_2_0610
1UF_6.3V_2
C7003
C7002
D7002
C7004
P3V3AL
2
2
1
P1V2
2
U7003
D TML 15
1 IN1 OUT1 14 D
2 IN1 OUT1 13
SLP_S3#_3R 3 EN1 CT1 12 C7006 1 2 1000PF_50V_2 P1V2S
35
40 30 17 16 IN
4 VBIAS GND 11
SLP_S3#_3R 1 R7003 2 5 EN2 CT2 10 C7022 1 2680PF_50V_2 PAD7008
40
35 30 17 16 IN
1
SHORT_0402_5 6 IN2 OUT2 9 1 1 2
2
7 IN2 OUT2 8
C7031 POWERPAD1X1M
0.1UF_16V_2_DY GMT_G2898KD1U_TDFN_15P
PAD7009
10UF_6.3V_3
1 1 2 2
C7029
POWERPAD1X1M
1UF_6.3V_2
C7030
2
P3V3AL
1
1
10K_5%_2
R7011
1UF_6.3V_2
2200PF_50V_2
C C
0.1UF_6.3V_1
10UF_6.3V_3
P3V3A
1
1
C7017
D7003
I
2
P3V3AL
C7016
C7015
C7014
SIT 0529
1 2
R7004 2 U7004
1
16 IN EN_3V3A 1
15
35 TML
2
2
0_5%_2 1 14 PAD7006
IN1 OUT1 PANJIT_PZ1AL3V9B_DY
2 13 1 2 P3V3S P1V8A P1V8S
IN1 OUT1 1 2
EN_3V 1 R7029 2 3 12
16 6 IN EN1 CT1
0_5%_2_DY 4 VBIAS GND 11 POWERPAD_2_0610 D7004 Q7001 C7012
5 10 PAD7002 D S
A
I
EN2 CT2 D S 1 2
6 IN2 OUT2 9 1 2 1 2
1 2 10UF_6.3V_2
2200PF_50V_2
7 IN2 OUT2 8
SLP_S3#_3R
10UF_6.3V_3
1
PM514BA
0.1UF_6.3V_1
35
40 30 17 16 IN POWERPAD_2_0610
G
2
GMT_G2898KD1U_TDFN_15P PANJIT_PZ1AL3V9B_DY
C7008
SIT 0606
C7007
PAD7004
C7005
C7028
2
G
1UF_6.3V_2
1 1 2
2 2 1
P5V0A
C7026
Q7002 0.01UF_50V_2
POWERPAD_2_0610
1
1
1
S1
1
2 G1
6 R7008 1 2 220K_5%_2
1
C7032 D1
0.1UF_16V_2_DY SLP_S3#_3R R7006 D2 3 R7009 1 2 220K_5%_2
1 2 5
B 35
40 30 17 16 IN 0_5%_2
G2
B
4
2
0.022UF_16V_2
S2
1
2N7002KDW
C7011
P1V05A
P1V05A
2
PAD7007 PAD7005 I
A
1 2 1 2
1 2 1 2 C7018
2 1
POWERPAD1X1M POWERPAD1X1M
I
A 22UF_6.3V_3
I
A
C7024
2
2 1 C7023
D7005 P3V3AL 1 2
NC
1UF_6.3V_2 PVCCIO VCCSTG

3 1 1UF_6.3V_2
U7005 I
15 A
TML
DIODE-BAT54-TAP-PHP 1 14 R7010 2
1
IN1 OUT1 I
10UF_6.3V_2
2 13 A
1
R7014 IN1 OUT1 SHORT_0402_15_NSP

40
35 30 17 16 SLP_S3#_3R 1 2 3 EN1 CT1 12 1 2 I
IN A
C7001
47K_5%_2 4 VBIAS GND 11 C7000 1000PF_50V_2

SLP_S5#_3R 1 R7015 2 5 10 1 2 I
30 IN EN2 CT2 A
0_5%_2_DY 6 IN2 OUT2 9 C7019 1000PF_50V_2
0.022UF_16V_2
0.01UF_50V_2
I
7 8
2
R7016 A IN2 OUT2

A A
1
1
SLP_S4#_3R 1 2 PVCCST
1
35 30 16 IN GMT_G2898KD1U_TDFN_15P
C7027
C7025
0_5%_2 C7033
0.1UF_16V_2_DY
22uF_6.3V_3
I
2
2
A
1
2
C7013
INVENTEC
2
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 0~49(PCB SCREW)
FINGER1 FINGER11
1 1
1 1
CP25
EMI_STOP_SUL_15A3M_1P 1 1
EMI_STOP_SUL_15A3M_1P
FINGER2 FINGER12 FINGER40 EMI_STOP_SUL_15A8M_1P
1 1
1 1 1 1 CP22 CP26
D 1 1 1 1
EMI_STOP_SUL_15A3M_1P D
EMI_STOP_SUL_15A3M_1P EMI_STOP_QM_23A1Q3G EMI_STOP_SUL_15A8M_1P EMI_STOP_SUL_15A8M_1P
FINGER3 FINGER13
1 1
1 1 FINGER41 FINGER41
CP23 CP27
1 1
BOM OPEN 1 1
1
1
FINGER14
FINGER4 1 EMI_STOP_QM_23A1Q3G CP28
1 1 CP24 1
1 1 1
FINGER42 1
1 EMI_STOP_SUL_15A8M_1P EMI_STOP_SUL_15A8M_1P
EMI_STOP_SUL_15A3M_1P 1
EMI_STOP_SUL_15A3M_1P FINGER15
FINGER5 1
1 1 EMI_STOP_QM_23A1Q3G
1
FINGER43
FINGER16
FINGER6 1 1
1 1 EMI_STOP_QM_23A1Q3G
EMI_STOP_SUL_15A3M_1P CP29 CP33
FINGER17 FINGER44 1 1
1 1
FINGER7 1 1
1 1 EMI_STOP_SUL_15A8M_1P EMI_STOP_SUL_15A8M_1P
1 1
EMI_STOP_QM_23A1Q3G CP30 CP34
FINGER18
FINGER8 1 FINGER45 EMI_STOP_SUL_15A8M_1P EMI_STOP_SUL_15A8M_1P
1 1 1
C 1 1 C
CP31 CP35
EMI_STOP_SUL_15A3M_1P 1 1 1 1
EMI_STOP_SUL_15A3M_1P EMI_STOP_QM_23A1Q3G
EMI_STOP_SUL_15A8M_1P EMI_STOP_SUL_15A8M_1P
FINGER9
1 FINGER46
1
1 CP36
1 CP32 1 1
1 1
EMI_STOP_SUL_15A3M_1P EMI_STOP_SUL_15A8M_1P
EMI_STOP_QM_23A1Q3G EMI_STOP_SUL_15A8M_1P
FINGER10
1 1
CPU PCB
B 1
ST1 B
GPU FAN STDPAD_2.4_5.0_TOP
0.9MM 1
S2
ST14
1 ST2
1
STANDOFF_3.2_6.0 SCREW230_500_1P
STDPAD_2.4_5.0_TOP S3
1 FIX1 1 FIX5 1 ST16 1 ST11 2.33MM 1
0.9MM
SCREW230_500_1P
FIX_MASK FIX_MASK STDPAD_2.4_5.0_TOP STDPAD_3.15_5.5_TOP ST3 S4
0.9MM 1.25MM 1
ST15 SSD 1 1
1 FIX2 1 FIX6 STDPAD_2.4_5.0_TOP
ST17 ST12 STDPAD_320_750_600_1P SCREW230_500_1P
1 1 0.9MM S5
1.25MM 1
FIX_MASK FIX_MASK STDPAD_2.4_5.0_TOP STDPAD_3.15_5.5_TOP ST4
1
0.9MM 1.25MM SCREW230_500_1P
1 FIX3 1 FIX7 STDPAD_2.4_5.0_TOP 1
S6
1 ST13 0.9MM
FIX_MASK FIX_MASK SCREW230_500_1P
STDPAD_3.15_5.5_TOP 1
S7
1 FIX4 1 FIX8 1.25MM
SCREW230_500_1P
1 ST18
FIX_MASK FIX_MASK
STDPAD_3.15_5.5_TOP
1.25MM
1
S9
SCREW230_500_1P
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DDR4
P1V2 P1V2
F SIT2 0717 SIT2 0717 F
U4103 U4104
G7
G1
G9
G7
G1
G9
D1
R1
C1
D9
D1
R1
C1
D9
B3
B9
A1
A9
B3
B9
A1
A9
T9
F2
F8
T9
F2
F8
L1
L9
L1
L9
J1
J9
J2
J8
J1
J9
J2
J8
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
23 20 19 IN M_A_A_0 P3 A0 DQL0 G2 M_A_DQ<3> BI 23 23 20 19 IN M_A_A_0 P3 A0 DQL0 G2 M_A_DQ<20> BI 23
23 20 19 M_A_A_1 P7 F7 M_A_DQ<5> 23 23 20 19 M_A_A_1 P7 F7 M_A_DQ<19> 23
IN M_A_A_2 R3
A1 DQL1
H3 M_A_DQ<6>
BI IN M_A_A_2 R3
A1 DQL1
H3 M_A_DQ<17>
BI
23 20 19 IN M_A_A_3 N7
A2 DQL2
H7 M_A_DQ<2>
BI 23 23 20 19 IN M_A_A_3 N7
A2 DQL2
H7 M_A_DQ<18>
BI 23
23 20 19 A3 DQL3 23 23 20 19 A3 DQL3 23
IN M_A_A_4 N3 H2 M_A_DQ<1>
BI IN M_A_A_4 N3 H2 M_A_DQ<21>
BI
23 20 19 23 23 20 19 23
IN M_A_A_5 P8
A4 DQL4
H8 M_A_DQ<0>
BI IN M_A_A_5 P8
A4 DQL4
H8 M_A_DQ<16>
BI
23 20 19 IN P2
A5 DQL5
J3
BI 23 23 20 19 IN P2
A5 DQL5
J3
BI 23
23 20 19
IN M_A_A_6 A6 DQL6 M_A_DQ<7> BI 23 23 20 19
IN M_A_A_6 A6 DQL6 M_A_DQ<22> BI 23
23 20 19 IN M_A_A_7 R8 A7 DQL7 J7 M_A_DQ<4> BI 23 23 20 19 IN M_A_A_7 R8 A7 DQL7 J7 M_A_DQ<23> BI 23
23 20 19 M_A_A_8 R2 A8 23 20 19 M_A_A_8 R2 A8
IN M_A_A_9 R7 A3 M_A_DQ<10>
23 20 19 23 23 20 19 23
IN M_A_A_10
A9 DQU0
M_A_DQ<12>
BI IN A9 DQU0 BI
23 20 19 IN M3 A10/AP DQU1 B8 BI 23 23 20 19 IN M_A_A_10 M3 A10/AP DQU1 B8 M_A_DQ<28> BI 23
23 20 19 M_A_A_11 T2 C3 M_A_DQ<14> 23 23 20 19 M_A_A_11 T2 C3 M_A_DQ<30> 23
IN M_A_A_12 M7
A11 DQU2
C7 M_A_DQ<9>
BI IN M_A_A_12 M7
A11 DQU2
C7 M_A_DQ<24>
BI
23 20 19 23 23 20 19 23
IN M_A_A_13 T8
A12/BC_n DQU3
C2 M_A_DQ<11>
BI IN M_A_A_13 T8
A12/BC_n DQU3
C2 M_A_DQ<31>
BI
23 20 19 IN L2
A13 DQU4
C8
BI 23 23 20 19 IN L2
A13 DQU4
C8
BI 23
23 20 19
IN M_A_A_14 A14/ WE_n DQU5 M_A_DQ<8> BI 23 23 20 19
IN M_A_A_14 A14/ WE_n DQU5 M_A_DQ<25> BI 23
23 20 19 IN M_A_A_15 M8 A15/ CAS_n DQU6 D3 M_A_DQ<15> BI 23 23 20 19 IN M_A_A_15 M8 A15/ CAS_n DQU6 D3 M_A_DQ<26> BI 23
23 20 19 M_A_A_16 L8 A16/ RAS_n DQU7 D7 M_A_DQ<13> 23 23 20 19 M_A_A_16 L8 A16/ RAS_n DQU7 D7 M_A_DQ<29> 23
IN T7 BI IN T7 BI
NC NC
DQSL_t G3 M_A_DQS0_DP BI 23 DQSL_t G3 M_A_DQS2_DP BI 23
23 20 19
IN M_A_BS0 N2 BA0 DQSL_c
F3 M_A_DQS0_DN
BI 23 23 20 19
IN M_A_BS0 N2 BA0 DQSL_c
F3 M_A_DQS2_DN BI 23
23 20 19 IN M_A_BS1 N8 BA1 DQSU_t B7 M_A_DQS1_DP BI 23 23 20 19 IN M_A_BS1 N8 BA1 DQSU_t B7 M_A_DQS3_DP BI 23
23 20 19
IN M_A_BG0 M2 BG0 DQSU_c A7 M_A_DQS1_DN
BI 23 23 20 19
BI 23
E P1V2 P1V2 E
23 20 19 IN M_A_PAR T3 PAR 23 20 19 IN M_A_PAR T3 PAR
DML_n/ DBIL_n E7 DML_n/ DBIL_n E7
23 20 19 M_A_ACT# L3 23 20 19 M_A_ACT# L3
IN ACT_n DMU_n/ DBIU_n E2 IN ACT_n DMU_n/ DBIU_n E2
23 20 19
IN M_CKE0 K2 CKE P9 M_A_ALERT# 23 20 19
IN M_CKE0 K2 CKE P9 M_A_ALERT#
23 20 19 M_CS#0 L7 ALERT_n OUT 19 P2V5 23 20 19 M_CS#0 L7 ALERT_n OUT 19 P2V5
IN CS_n 20 23 IN CS_n 20 23
23 20 19 IN M_ODT0 K3 ODT
VPP B1 23 20 19 IN M_ODT0 K3 ODT
VPP B1
R9 R9 P0V6S_DIMM0_VREF_CA
23 22 21 20 19 IN DDR_DRAMRST# P1 RESET_n
VPP P0V6S_DIMM0_VREF_CA
21 20 19 IN DDR_DRAMRST#P1 RESET_n
VPP
23 22
M1 M1
23 20 19 M_CLK_DDR0_DP K7 CK_t VREFCA
23 20 19 M_CLK_DDR0_DP K7 CK_t VREFCA
IN M_CLK_DDR0_DN
IN
23 20 19 IN K8 CK_c N9 23 20 19 IN M_CLK_DDR0_DN K8 CK_c N9
TEN TEN
R4102 R4127
ZQ F9 1 2 ZQ F9 1 2
A I A I
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
240_1%_1 240_1%_1
P0V6S
D2
D8
C9
H9
D2
D8
C9
H9
B2
E9
K9
A2
E3
A8
E8
B2
E9
K9
A2
E3
A8
E8
M9
M9
T1
F1
T1
F1
G8
G8
SAMSUNG_K4A8G165WB_BCPB_FBGA_96P SAMSUNG_K4A8G165WB_BCPB_FBGA_96P
N1
H1
N1
H1
E1
K1
E1
K1
M_A_BS0 R4153 I 1 2 36_1%_2
A
M_A_BG1_2
M_A_BG1_1
A M_A_BS1 R4154 I 1 2 36_1%_2
A
A
1
0_5%_1
M_A_BG0 R4113 I 1 2 A
0_5%_1
36_1%_2
P1V2 M_CKE0 I
R4114 I 1 2 36_1%_2
A
R4100
R4125
1 2 A
M_CS#0 R4118 36_1%_2
R4103 I M_A_A_0 R4119 I 1 2 36_1%_2
A
I
23
19
OUT M_CLK_DDR0_DP 1 2 M_A_A_1 R4120 I 1 2 36_1%_2
A
P1V2
SDP DDP
0_5%_1_DY
D 20 M_A_A_2 R4124 I 1 2 36_1%_2
A
D
0_5%_1_DY
SDP DDP
1
M_A_A_3 R4140 I 1 2 A
R4125 SDP DDP
1
33_1%_1 C4111 36_1%_2 0 OHM 240 OHM
1 2 R4100 0 OHM 240 OHM M_A_A_4 R4141 I 1 2 36_1%_2
A
C4154 1 2 1UF_6.3V_2
SDP DDP R4126
R4126
M_A_A_5 R4142 I 1 2 A OPEN 0OHM
R4101
36_1%_2 1 2
M_A_A_6 R4128 I 1 2 A C4155 1UF_6.3V_2
R4105 0.01UF_10V_1 R4101 OPEN 0OHM 36_1%_2
M_A_A_7 R4129 I 1 2 36_1%_2
A
C4156 1 2 1UF_6.3V_2
M_CLK_DDR0_DN 1 2
2
20 19 OUT M_A_A_8 R4130 I 1 2 A
2
36_1%_2 P0V6S 1 2
23
M_A_BG1 M_A_A_9 R4133 I 1 2 A
M_A_BG1 C4157 1UF_6.3V_2
IN 19 20 23 36_1%_2 IN 19 20 23
33_1%_1 M_A_A_10 R4135 I 1 2 A 1 2
36_1%_2 C4158 1UF_6.3V_2
M_A_A_11 R4156 I 1 2 36_1%_2
A
C4133 1 21UF_6.3V_2
C4159 1 2 1UF_6.3V_2
M_A_A_12 R4137 I 1 2 36_1%_2
A
M_A_A_13 R4138 I 1 2 A C4134 1 21UF_6.3V_2

1 2
36_1%_2 C4160 1UF_6.3V_2
SDP DDP M_A_A_14 R4139 I 1 2 36_1%_2
A
C4135 1 21UF_6.3V_2
1 2 C4161 1 2 1UF_6.3V_2
0_5%_1 M_A_A_15 R4143 I 36_1%_2
A
1UF_6.3V_1
R4107 0OHM OPEN M_A_BG1_1 R4107 1 2 I
M_A_A_16 R4144 I 1 2 36_1%_2
A
I
C4136 1 2 A
C4162 1 2 1UF_6.3V_2
R4108 1 2 0_5%_1 M_A_PAR R4145 I 1 2 36_1%_2
A
C4137 1 21UF_6.3V_2
R4108 0OHM OPEN M_A_BG1_2 I
M_A_ACT# R4146 I 1 2 36_1%_2
A C4163 1 2 1UF_6.3V_2
M_ODT0 I 1 2 A C4138 1 21UF_6.3V_2
1 2
R4109 1 2 0_5%_1 I R4147 36_1%_2 C4164 1UF_6.3V_2
R4109 0OHM OPEN M_A_BG1_3
M_A_BG1 R4148 I 1 2 36_1%_2
A I
C4139 1 2 1UF_6.3V_1 A A
C4165 1 2 2.2UF_6.3V_2
P0V6S_DIMM0_VREF_CA R4110 1 2 0_5%_1 I
R4110 0OHM OPEN M_A_BG1_4 C4140 1 21UF_6.3V_2
C4166
A
1 2 2.2UF_6.3V_2
C4141 1 2 2.2UF_6.3V_2
C4167 A 1 2 2.2UF_6.3V_2
C4100 1 2 0.1UF_16V_2 C4142 1 2 2.2UF_6.3V_1
C4168 1 2 2.2UF_6.3V_2
1 2 2.2UF_6.3V_2 A
C4101 1 2
P0V6S C4169 2.2UF_6.3V_2
C4102 1 2 0.047UF_16V_2 P2V5
C4170 1 2 1UF_6.3V_2
C C4103 1 2 0.047UF_16V_2 P1V2 C4184 1 21UF_6.3V_2 I 1UF_6.3V_1 A C
C4143 1 2 C4171 1 2 1UF_6.3V_2
C4104 1 2 0.047UF_16V_2 C4123 1 21UF_6.3V_2
C4107 1 20.01UF_50V_2 I
C4144 1 2 1UF_6.3V_1 A
C4172 1 2 1UF_6.3V_2
C4105 1 2 0.047UF_16V_2 C4185 1 21UF_6.3V_2
C4108 1 20.01UF_50V_2 I
C4145 1 2 1UF_6.3V_1 A
C4173 1 2 1UF_6.3V_2
1 20.01UF_50V_2 C4125 1 21UF_6.3V_2
C4109 C4146 1 2
1UF_6.3V_2 C4174 1 2 1UF_6.3V_2
1 20.01UF_50V_2 C4126 1 21UF_6.3V_2 I 1 2 1UF_6.3V_1 A
C4120 C4147
1 20.01UF_50V_2 C4127 1 21UF_6.3V_2
C4121 C4148 1 2
1UF_6.3V_2
P1V2 C4259 1 2 2.2UF_6.3V_2
P0V6S_DIMM0_VREF_CA C4128 1 21UF_6.3V_2 I 1 2 1UF_6.3V_1 A
C4149 1 2
C4260 2.2UF_6.3V_2
C4129 1 21UF_6.3V_2 I 1 2 1UF_6.3V_1 A
C4150 1 2
1.8K_1%_2
2
C4130 1 22.2UF_6.3V_2 C4262 2.2UF_6.3V_2

C4152 1 2 2.2UF_6.3V_2
C4261 1 2
I
A 2.2UF_6.3V_2
R4106
P1V2 C4131 1 22.2UF_6.3V_2

C4153 1 2 2.2UF_6.3V_2
C4263 1 2 2.2UF_6.3V_2
C4132 1 22.2UF_6.3V_2
C4266 1 2 2.2UF_6.3V_1
1
R4149
1 2 C4267 1 2 2.2UF_6.3V_1
M_A_ALERT#
49.9_1%_1
REFERENCE NUMBER:4100~4299 C4265 1 2 2.2UF_6.3V_2
C4264 1 2 2.2UF_6.3V_1
C4268 1 2 2.2UF_6.3V_1
C4252 1 2 2.2UF_6.3V_2
1 2 2.2UF_6.3V_2
1.8K_1%_2
2
C4253
C4254 1 2 2.2UF_6.3V_2
R4122
A I
B B
C4255 1 2 2.2UF_6.3V_2
C4256 1 2 2.2UF_6.3V_2
1
C4258 1 2 2.2UF_6.3V_2
C4269 1 2 2.2UF_6.3V_1
C4270 1 2 2.2UF_6.3V_2
C4271 1 2 2.2UF_6.3V_2
C4272 1 2 2.2UF_6.3V_2
C4273 1 2 2.2UF_6.3V_2
C4274 1 2 2.2UF_6.3V_1
C4275 1 2 2.2UF_6.3V_2
C4276 1 2 2.2UF_6.3V_2
A A
INVENTEC
TITLE
A10
Block Diagram
SIZE CODE DOC.NUMBER REV

CHANGE by DATE 03-Oct-2019 A3 CS 1310xxxxx-0-0 A02
XXX
8 7 6 5 4 3 2 1
DDR4
F F
P1V2 P1V2
SIT2 0717 SIT2 0717
U4101 U4102
G7
G1
G9
G7
G1
G9
D1
R1
C1
D9
D1
R1
C1
D9
B3
B9
A1
A9
B3
B9
A1
A9
T9
F2
F8
T9
F2
F8
L1
L9
L1
L9
J1
J9
J2
J8
J1
J9
J2
J8
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
23 20 19 M_A_A_0 P3 A0 DQL0 G2 M_A_DQ<58> 23 23 20 19 M_A_A_0 P3 A0 DQL0 G2 M_A_DQ<50> 23
IN M_A_A_1 P7 F7 M_A_DQ<56>
BI IN M_A_A_1 P7 F7 M_A_DQ<48>
BI
23 20 19 23 23 20 19 23
IN M_A_A_2 R3
A1 DQL1
H3 M_A_DQ<62>
BI IN M_A_A_2 R3
A1 DQL1
H3 M_A_DQ<55>
BI
23 20 19 IN M_A_A_3 N7
A2 DQL2
H7 M_A_DQ<57>
BI 23 23 20 19 IN M_A_A_3 N7
A2 DQL2
H7 M_A_DQ<49>
BI 23
23 20 19 A3 DQL3 23 23 20 19 A3 DQL3 23
IN M_A_A_4 N3 H2 M_A_DQ<59>
BI IN M_A_A_4 N3 H2 M_A_DQ<51>
BI
23 20 19 23 23 20 19 23
IN M_A_A_5 P8
A4 DQL4
H8 M_A_DQ<60>
BI IN M_A_A_5 P8
A4 DQL4
H8 M_A_DQ<52>
BI
23 20 19 IN P2
A5 DQL5
J3
BI 23 23 20 19 IN P2
A5 DQL5
J3
BI 23
23 20 19
IN M_A_A_6 A6 DQL6 M_A_DQ<63> BI 23 23 20 19
IN M_A_A_6 A6 DQL6 M_A_DQ<54> BI 23
23 20 19 IN M_A_A_7 R8 A7 DQL7 J7 M_A_DQ<61> BI 23 23 20 19 IN M_A_A_7 R8 A7 DQL7 J7 M_A_DQ<53> BI 23
23 20 19 M_A_A_8 R2 A8 23 20 19 M_A_A_8 R2 A8
23 20 19 23 23 20 19 23
IN M_A_A_10 M3
A9 DQU0
B8 M_A_DQ<40>
BI IN M_A_A_10 M3
A9 DQU0
B8 M_A_DQ<32>
BI
23 20 19 IN T2
A10/AP DQU1
C3
BI 23 23 20 19 IN T2
A10/AP DQU1
C3
BI 23
E 23 20 19
IN M_A_A_11 A11 DQU2 M_A_DQ<42> BI 23 23 20 19
IN M_A_A_11 A11 DQU2 M_A_DQ<39> BI 23 E
23 20 19 IN M_A_A_12 M7 A12/BC_n DQU3 C7 M_A_DQ<41> BI 23 23 20 19 IN M_A_A_12 M7 A12/BC_n DQU3 C7 M_A_DQ<33> BI 23
23 20 19 M_A_A_13 T8 A13 DQU4 C2 M_A_DQ<46> 23 23 20 19 M_A_A_13 T8 A13 DQU4 C2 M_A_DQ<38> 23
IN M_A_A_14 L2 C8 M_A_DQ<45>
BI IN M_A_A_14 L2 C8 M_A_DQ<37>
BI
23 20 19 A14/ WE_n 23 23 20 19 A14/ WE_n 23
IN M_A_A_15 M8
DQU5
D3 M_A_DQ<47>
BI IN M_A_A_15 M8
DQU5
D3 M_A_DQ<35>
BI
23 20 19 IN L8
A15/ CAS_n DQU6
D7
BI 23 23 20 19 IN L8
A15/ CAS_n DQU6
D7
BI 23
23 20 19
IN M_A_A_16 A16/ RAS_n DQU7 M_A_DQ<44> BI 23 23 20 19
IN M_A_A_16 A16/ RAS_n DQU7 M_A_DQ<36> BI 23
T7 NC T7 NC
DQSL_t G3 M_A_DQS7_DP 23 DQSL_t G3 M_A_DQS6_DP 23
M_A_BS0 N2 F3 M_A_DQS7_DN BI M_A_BS0 N2 F3 M_A_DQS6_DN
BI
23 20 19 BA0 23 23 20 19 BA0 23
IN DQSL_c BI IN DQSL_c BI
23 20 19 IN M_A_BS1 N8 BA1 DQSU_t B7 M_A_DQS5_DP BI 23 23 20 19 IN M_A_BS1 N8 BA1 DQSU_t B7 M_A_DQS4_DP BI 23
23 20 19
BI 23 23 20 19
IN M_A_BG0 M2 BG0 DQSU_c A7 M_A_DQS4_DN BI 23
P1V2
P1V2
23 20 19 M_A_PAR T3 PAR 23 20 19 M_A_PAR T3 PAR
IN M_A_ACT# L3 DML_n/ DBIL_n
E7 IN M_A_ACT# L3 DML_n/ DBIL_n
E7
23 20 19 ACT_n 23 20 19 ACT_n
IN DMU_n/ DBIU_n
E2 IN DMU_n/ DBIU_n
E2
23 20 19 IN M_CKE0 K2 CKE P9 M_A_ALERT# 23 23 20 19 IN M_CKE0 K2 CKE P9 M_A_ALERT# 23

19 19 P2V5
23 20 19
IN M_CS#0 L7 CS_n
ALERT_n
OUT 20 P2V5 23 20 19
IN M_CS#0 L7 CS_n
ALERT_n
OUT 20
23 20 19 IN M_ODT0 K3 ODT
VPP B1 23 20 19 IN M_ODT0 K3 ODT
VPP B1
R9 R9 P0V6S_DIMM0_VREF_CA
23 22 21 20 19 IN DDR_DRAMRST#P1 RESET_n
VPP P0V6S_DIMM0_VREF_CA
23 22 21 20 19 IN DDR_DRAMRST# P1 RESET_n
VPP
VREFCA M1 VREFCA M1
23 20 19
IN M_CLK_DDR0_DP K7 CK_t 23 20 19
IN M_CLK_DDR0_DP K7 CK_t
23 20 19 IN M_CLK_DDR0_DN K8 CK_c 23 20 19 IN M_CLK_DDR0_DN K8 CK_c
TEN N9 A TEN N9
R4152 R4178
ZQ F9 1 2 ZQ F9 1 2
I A I
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D 240_1%_1 240_1%_1 D
B2
E9
K9
A2
E3
A8
E8
B2
E9
K9
A2
E3
A8
E8
M9
M9
G8
G8
N1
H1
D2
D8
C9
H9
N1
H1
D2
D8
C9
H9
E1
K1
E1
K1
T1
F1
T1
F1
1
1
0_5%_1
0_5%_1
A
A
R4150
R4176
I
I
2
2
SDP DDP SDP DDP
M_A_BG1_3
M_A_BG1_4
R4150 0 OHM 240 OHM R4176 0 OHM 240 OHM
R4177
R4151 1 2 M_A_BG1 19 20 23
1 2 M_A_BG1 IN 19 20 23 IN
0_5%_1_DY
0_5%_1_DY
SDP DDP
SDP DDP R4177 OPEN 0OHM
R4151 OPEN 0OHM
C C
B B
REFERENCE NUMBER:4100~4299
A A
INVENTEC
TITLE
A10
Block Diagram

XXX
8 7 6 5 4 3 2 1
DDR4
F F
P1V2 P1V2
SIT2 0717 SIT2 0717
U4201
U4202
G7
G1
G9
D1
R1
C1
D9
B3
B9
A1
A9
T9
F2
F8
L1
L9
J1
J9
J2
J8
G7
G1
G9
D1
R1
C1
D9
B3
B9
A1
A9
T9
F2
F8
L1
L9
J1
J9
J2
J8
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
23 22 21 M_B_A_0 P3 G2 M_B_DQ<19> 23
23 22 21
IN M_B_A_0 P3 A0 DQL0
G2 M_B_DQ<26> BI 23 IN M_B_A_1 P7
A0 DQL0
F7 M_B_DQ<17>
BI
23 22 21 IN M_B_A_1 P7 A1 DQL1 F7 M_B_DQ<25> BI 23
23 22 21 IN M_B_A_2 R3
A1 DQL1
H3 M_B_DQ<18>
BI 23
23 22 21 A2 DQL2 23
23 22 21
IN M_B_A_2 R3 A2 DQL2
H3 M_B_DQ<30> BI 23 IN M_B_A_3 N7 H7 M_B_DQ<16>
BI
23 22 21 23
23 22 21 IN M_B_A_3 N7 A3 DQL3 H7 M_B_DQ<29> BI 23 IN M_B_A_4 N3
A3 DQL3
H2 M_B_DQ<21>
BI
23 22 21 M_B_A_4 N3 A4 DQL4 H2 M_B_DQ<27> 23
23 22 21 IN A4 DQL4 BI 23
IN M_B_A_5 P8 H8 M_B_DQ<28>
BI 23 22 21
H8 M_B_DQ<22> BI 23
23 22 21 23
IN M_B_A_6 P2
A5 DQL5
J3 M_B_DQ<31>
BI 23 22 21
J3 M_B_DQ<20> BI 23
23 22 21 IN M_B_A_7 R8
A6 DQL6
J7 M_B_DQ<24>
BI 23
23 22 21 IN M_B_A_7 R8 A7 DQL7 J7 M_B_DQ<23> BI 23
23 22 21 A7 DQL7 23
IN M_B_A_8 R2 BI 23 22 21
IN M_B_A_8 R2 A8
23 22 21
IN M_B_A_9 R7
A8
A3 M_B_DQ<15> 23 22 21 IN M_B_A_9 R7 A9 DQU0 A3 M_B_DQ<6> BI 23
23 22 21 IN A9 DQU0 BI 23
23 22 21 M_B_A_10 M3 A10/AP DQU1 B8 M_B_DQ<4> 23
23 22 21
IN M_B_A_10 M3 A10/AP DQU1
B8 M_B_DQ<13> BI 23 IN M_B_A_11 T2 C3 M_B_DQ<7>
BI
23 22 21 23
23 22 21 IN M_B_A_11 T2 A11 DQU2 C3 M_B_DQ<14> BI 23 IN M_B_A_12 M7
A11 DQU2
C7 M_B_DQ<1>
BI
23 22 21 M_B_A_12 M7 A12/BC_n DQU3 C7 M_B_DQ<12> 23
23 22 21 IN A12/BC_n DQU3 BI 23
IN M_B_A_13 T8 C2 M_B_DQ<11>
BI 23 22 21
IN M_B_A_13 T8 A13 DQU4
C2 M_B_DQ<3> BI 23
23 22 21 23
IN M_B_A_14 L2
A13 DQU4
C8 M_B_DQ<8>
BI 23 22 21 IN M_B_A_14 L2 A14/ WE_n DQU5 C8 M_B_DQ<0> BI 23
23 22 21 IN A14/ WE_n DQU5 BI 23
23 22 21 M_B_A_15 M8 A15/ CAS_n DQU6 D3 M_B_DQ<2> 23
E 23 22 21
IN M_B_A_15 M8 A15/ CAS_n DQU6
D3 M_B_DQ<10> BI 23 IN M_B_A_16 L8 D7 M_B_DQ<5>
BI E
23 22 21 DQU7 23
23 22 21 IN M_B_A_16 L8 A16/ RAS_n DQU7 D7 M_B_DQ<9> BI 23 IN T7
A16/ RAS_n BI
T7 NC
NC G3 M_B_DQS2_DP
DQSL_t 23
DQSL_t G3 M_B_DQS3_DP BI 23
M_B_BS0 N2 F3 M_B_DQS2_DN
BI
23 22 21 IN M_B_BS0 N2 BA0 DQSL_c F3 M_B_DQS3_DN BI 23
23 22 21 IN M_B_BS1 N8
BA0 DQSL_c
B7 M_B_DQS0_DP
BI 23
23 22 21 23
23 22 21
IN M_B_BS1 N8 BA1 DQSU_t B7 M_B_DQS1_DP BI 23 IN M_B_BG0 M2
BA1 DQSU_t
A7 M_B_DQS0_DN BI
23 22 21 23
23 22 21 IN M_B_BG0 M2 BG0 DQSU_c A7 M_B_DQS1_DN BI 23 IN BG0 DQSU_c
P1V2 BI
P1V2
23 22 21 M_B_PAR T3
23 22 21
IN M_B_PAR T3 PAR E7
IN M_B_ACT# L3
PAR
DML_n/ DBIL_n
E7
23 22 21 IN M_B_ACT# L3 ACT_n
DML_n/ DBIL_n
E2
23 22 21 IN ACT_n
DMU_n/ DBIU_n E2
DMU_n/ DBIU_n
M_CKE2 K2 23 23 22 21
IN M_CKE2 K2 CKE P9 M_B_ALERT#
23
23 22 21 IN CKE P9M_B_ALERT# OUT 21 P2V5 23 22 21 IN M_CS#2 L7 ALERT_n OUT 21 P2V5
23 22 21
IN M_CS#2 L7 CS_n
ALERT_n
22 M_ODT2 K3
CS_n 22
23 22 21
23 22 21
IN M_ODT2 K3 ODT B1 IN ODT VPP B1
VPP R9
R9 P0V6S_DIMM1_VREF_DQ
DDR_DRAMRST#P1 VPP P0V6S_DIMM1_VREF_DQ
23 22 21 20 19 IN DDR_DRAMRST#
P1 RESET_n
VPP 23 22 21 20 19 IN RESET_n
VREFCA
M1
23 22 21 IN M_CLK_DDR2_DP K7 CK_t
VREFCA M1 23 22 21 IN M_CLK_DDR2_DP K7 CK_t
23 22 21 M_CLK_DDR2_DN K8 CK_c
23 22 21 IN M_CLK_DDR2_DN K8 CK_c
TEN N9
IN TEN
N9
R4227
R4202 F9 1 2
F9 1 2 ZQ
ZQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A I
240_1%_1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A I
240_1%_1
G8
SAMSUNG_K4A8G165WB_BCPB_FBGA_96P
D2
D8
C9
H9
E1
K1
B2
E9
K9
A2
E3
A8
E8
M9
T1
F1
N1
H1
SAMSUNG_K4A8G165WB_BCPB_FBGA_96P
D2
D8
C9
H9
B2
E9
K9
A2
E3
A8
E8
M9
T1
F1
G8
N1
H1
E1
K1
P1V2
M_B_BG1_2
M_B_BG1_1
D A D
1
R4203
0_5%_1
A
1
0_5%_1
22 21 M_CLK_DDR2_DP 1 2
OUT
R4225
23
R4200
33_1%_1 C4277 SDP DDP I
1 2 I
R4225 0 OHM 240 OHM
0_5%_1_DY
2
0_5%_1_DY
SDP DDP
1
0.01UF_10V_1
1
R4205
22 21 OUT M_CLK_DDR2_DN 1 2 R4200 0 OHM 240 OHM
SDP DDP
R4226
23 SDP DDP
R4201
33_1%_1 R4201 OPEN 0OHM

R4226 OPEN 0OHM
2
2
M_B_BG1 IN 21 22 23
M_B_BG1 IN 21 22 23
P0V6S
M_B_BS0 R4210 I A
1 2 36_1%_2
M_B_BS1 R4211 I A 1 2 36_1%_2
M_B_BG0 R4212 I A 1 2 36_1%_2
M_CKE2 R4213 1 2 36_1%_2 P1V2
SDP DDP M_CS#2 R4214
I A
I A 1 2 36_1%_2
C R4204 M_B_A_0 R4215 1 2 C
0OHM OPEN I A 36_1%_2
C4232 1 2 1UF_6.3V_1
M_B_A_1 R4216 I A 1 2 36_1%_2 P0V6S I A
R4206 0OHM OPEN M_B_A_2 R4217 I A 1 2 36_1%_2 I C4233 1 2 1UF_6.3V_1 A

M_B_A_3 R4218 1 2 36_1%_2
I A
C4216 1 21UF_6.3V_2 C4234 1 2 1UF_6.3V_1
R4207 0OHM OPEN M_B_A_4 R4219 I A 1 2 36_1%_2
I A
M_B_A_5 R4220 I A 1 2 36_1%_2

I
C4217 1 2 1UF_6.3V_1 A C4235 1 2 1UF_6.3V_2
R4208 0OHM OPEN M_B_A_6 R4221 I A
1 2 36_1%_2 I 1UF_6.3V_1
M_B_A_7 R4222 1 2 C4218 1 2 A C4236 1 2 1UF_6.3V_2
I A 36_1%_2
1 2 I 1UF_6.3V_1
M_B_A_8 R4223 I A 36_1%_2 C4219 1 2 A C4237 1 2 1UF_6.3V_2
M_B_A_9 R4224 1 2 36_1%_2
I A
C4220 1 21UF_6.3V_2 C4238 1 2 1UF_6.3V_2
M_B_A_10R4228 I A 1 2 36_1%_2
1 2 1UF_6.3V_1
P0V6S_DIMM1_VREF_DQ M_B_BG1_1 R4204 1 2 AI 0_5%_1 M_B_A_11R4229 I A 36_1%_2
I
C4221 1 2 A C4239 1 2 1UF_6.3V_2
P1V2 M_B_A_12R4230 1 2 36_1%_2
R4206
I A
C4222 1 21UF_6.3V_2 C4240 1 2 1UF_6.3V_2
0_5%_1 M_B_A_13R4231 1 2 36_1%_2
M_B_BG1_2 1 2 AI I A
1UF_6.3V_1
I A M_B_A_14R4232 I A 1 2 36_1%_2
I
C4223 1 2 A C4241 1 2 1UF_6.3V_2
R4207
2
M_B_A_15R4233 1 2
1.8K_1%_2
1 2 AI 0_5%_1 I A 36_1%_2 2 1UF_6.3V_1

M_B_BG1_3
M_B_A_16R4234 1 2 C4224 1 22.2UF_6.3V_1 I C4242 1 A
36_1%_2
R4132
I A
R4208 M_B_PAR R4235 1 2 1 22.2UF_6.3V_1
1 2 AI 0_5%_1 I A 36_1%_2 C4225 C4243 1 2 2.2UF_6.3V_1
M_B_BG1_4 1 2
M_B_ACT#R4236 I A 36_1%_2
C4244 1 2 2.2UF_6.3V_2
M_ODT2 R4237 I A 1 2 36_1%_2
1
M_B_BG1 R4238 I A 1 2 36_1%_2 C4245 1 2 2.2UF_6.3V_2

P1V2 C4246 1 2 2.2UF_6.3V_1
C4247 1 2 2.2UF_6.3V_2
C4201 1 2 0.01UF_50V_2 P2V5 P0V6S_DIMM1_VREF_DQ C4248 1 2 1UF_6.3V_2
C4202 1 2 0.01UF_50V_2 2 1UF_6.3V_1 2 1UF_6.3V_1
A I
C42061 I C4249 1 A
B A I
C4203 1 2 0.01UF_10V_1 B
I A A I
C42071 2 1UF_6.3V_1 C4226 1 2 0.1UF_16V_2 I C4250 1 2 1UF_6.3V_1 A
2
1 2 0.01UF_50V_2
1.8K_1%_2
C4204 1 2 1UF_6.3V_1
C42081 2 1UF_6.3V_2 C4227 1 2 2.2UF_6.3V_2 I C4251 A
R4131
A I
C4205 1 2 0.01UF_10V_1 A I 1UF_6.3V_1 0.047UF_16V_2 2 1UF_6.3V_1
C42091 2 C4228 1 2 I C4257 1 A
0.047UF_16V_2
C42101 2 1UF_6.3V_2 C4229 1 2
P1V2 0.047UF_16V_2
1
C42111 2 1UF_6.3V_2 C4230 1 2

0.047UF_16V_2
C42121 2 1UF_6.3V_2 C4231 1 2
R4209
M_B_ALERT# 1 2 C42131 2 1UF_6.3V_2
C42141 2 10UF_6.3V_2
49.9_1%_1
C42151 2 10UF_6.3V_2
A
REFERENCE NUMBER:4100~4299 A
INVENTEC
TITLE
A10
Block Diagram

XXX
8 7 6 5 4 3 2 1
DDR4
F F
P1V2 P1V2
SIT2 0717 SIT2 0717
U4204 U4203
G7
G1
G9
G7
G1
G9
D1
R1
C1
D9
D1
R1
C1
D9
B3
B9
A1
A9
B3
B9
A1
A9
T9
F2
F8
T9
F2
F8
L1
L9
L1
L9
J1
J9
J2
J8
J1
J9
J2
J8
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
23 22 21 IN M_B_A_0 P3 A0 DQL0 G2 M_B_DQ<62> BI 23 23 22 21 IN M_B_A_0 P3 A0 DQL0 G2 M_B_DQ<55> BI 23
23 22 21 M_B_A_1 P7 A1 DQL1 F7 M_B_DQ<57> 23 23 22 21 M_B_A_1 P7 A1 DQL1 F7 M_B_DQ<52> 23
IN M_B_A_2 R3 H3 M_B_DQ<59>
BI IN M_B_A_2 R3 H3 M_B_DQ<50>
BI
23 22 21 23 23 22 21 23
IN M_B_A_3 N7
A2 DQL2
H7 M_B_DQ<60>
BI IN M_B_A_3 N7
A2 DQL2
H7 M_B_DQ<53>
BI
23 22 21 IN N3
A3 DQL3
H2
BI 23 23 22 21 IN N3
A3 DQL3
H2
BI 23
23 22 21
IN M_B_A_4 A4 DQL4 M_B_DQ<63> BI 23 23 22 21
IN M_B_A_4 A4 DQL4 M_B_DQ<54> BI 23
23 22 21 IN M_B_A_5 P8 A5 DQL5 H8 M_B_DQ<61> BI 23 23 22 21 IN M_B_A_5 P8 A5 DQL5 H8 M_B_DQ<49> BI 23
23 22 21 M_B_A_6 P2 A6 DQL6 J3 M_B_DQ<58> 23 23 22 21 M_B_A_6 P2 A6 DQL6 J3 M_B_DQ<51> 23
IN M_B_A_7 R8 J7 M_B_DQ<56>
BI IN M_B_A_7 R8 J7 M_B_DQ<48>
BI
23 22 21 23 23 22 21 23
IN M_B_A_8 R2
A7 DQL7 BI IN M_B_A_8 R2
A7 DQL7 BI
23 22 21 IN R7
A8
A3
23 22 21 IN R7
A8
A3
E 23 22 21
IN M_B_A_9 A9 DQU0 M_B_DQ<43> BI 23 23 22 21
IN M_B_A_9 A9 DQU0 M_B_DQ<35> BI 23 E
23 22 21 IN M_B_A_10 M3 A10/AP DQU1 B8 M_B_DQ<44> BI 23 23 22 21 IN M_B_A_10 M3 A10/AP DQU1 B8 M_B_DQ<36> BI 23
23 22 21 M_B_A_11 T2 A11 DQU2 C3 M_B_DQ<47> 23 23 22 21 M_B_A_11 T2 A11 DQU2 C3 M_B_DQ<39> 23
IN M_B_A_12 M7 C7 M_B_DQ<41>
BI IN M_B_A_12 M7 C7 M_B_DQ<33>
BI
23 22 21 23 23 22 21 23
IN M_B_A_13 T8
A12/BC_n DQU3
C2 M_B_DQ<46>
BI IN M_B_A_13 T8
A12/BC_n DQU3
C2 M_B_DQ<38>
BI
23 22 21 IN L2
A13 DQU4
C8
BI 23 23 22 21 IN L2
A13 DQU4
C8
BI 23
23 22 21
IN M_B_A_14 A14/ WE_n DQU5 M_B_DQ<45> BI 23 23 22 21
IN M_B_A_14 A14/ WE_n DQU5 M_B_DQ<37> BI 23
23 22 21 IN M_B_A_15 M8 A15/ CAS_n DQU6 D3 M_B_DQ<42> BI 23 23 22 21 IN M_B_A_15 M8 A15/ CAS_n DQU6 D3 M_B_DQ<34> BI 23
23 22 21 M_B_A_16 L8 A16/ RAS_n DQU7 D7 M_B_DQ<40> 23 23 22 21 M_B_A_16 L8 A16/ RAS_n DQU7 D7 M_B_DQ<32> 23
IN T7 BI IN T7 BI
NC NC
DQSL_t G3 M_B_DQS7_DP BI 23 DQSL_t G3 M_B_DQS6_DP BI 23
23 22 21
IN M_B_BS0 N2 BA0 DQSL_c
F3 M_B_DQS7_DN BI 23 23 22 21
IN M_B_BS0 N2 BA0 DQSL_c
F3 M_B_DQS6_DN BI 23
23 22 21 IN M_B_BS1 N8 BA1 DQSU_t B7 M_B_DQS5_DP BI 23 23 22 21 IN M_B_BS1 N8 BA1 DQSU_t B7 M_B_DQS4_DP BI 23
23 22 21
IN M_B_BG0 M2 BG0 DQSU_c A7 M_B_DQS5_DN
BI 23 23 22 21
IN M_B_BG0 M2 BG0 DQSU_c A7 M_B_DQS4_DN
BI 23
P1V2 P1V2
23 22 21 IN M_B_PAR T3 PAR 23 22 21 IN M_B_PAR T3 PAR
DML_n/ DBIL_n E7 DML_n/ DBIL_n E7
23 22 21 IN M_B_ACT# L3 ACT_n 23 22 21 IN M_B_ACT# L3 ACT_n
DMU_n/ DBIU_n E2 DMU_n/ DBIU_n E2
23 22 21 IN M_CKE2 K2 CKE P9 M_B_ALERT# 23 23 22 21 IN M_CKE2 K2 CKE P9 M_B_ALERT# 23

23 22 21 M_CS#2 L7 CS_n
ALERT_n OUT 21 P2V5 23 22 21 M_CS#2 L7 CS_n
ALERT_n OUT 21 P2V5
IN M_ODT2 K3
22 IN M_ODT2 K3
22
23 22 21 IN ODT
VPP B1 23 22 21 IN ODT
VPP B1
R9 P0V6S_DIMM1_VREF_DQ R9 P0V6S_DIMM1_VREF_DQ
23 22 21 20 19
IN DDR_DRAMRST#P1 RESET_n
VPP
23 22 21 20 19
IN DDR_DRAMRST#
P1 RESET_n
VPP
VREFCA M1 VREFCA M1
23 22 21 M_CLK_DDR2_DP K7 CK_t 22 21 M_CLK_DDR2_DP K7 CK_t
IN M_CLK_DDR2_DN K8
INM_CLK_DDR2_DN
23 22 21 IN CK_c N9 23 22 21 23 IN K8 CK_c N9
TEN TEN
R4252 R4277
ZQ F9 1 2 ZQ F9 1 2
D D
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A I A I
240_1%_1 240_1%_1
D2
D8
C9
H9
D2
D8
C9
H9
B2
E9
K9
A2
E3
A8
E8
B2
E9
K9
A2
E3
A8
E8
M9
M9
T1
F1
T1
F1
G8
G8
N1
H1
N1
H1
E1
K1
E1
K1
M_B_BG1_3
M_B_BG1_4
A
1
1
0_5%_1
0_5%_1
R4250
R4275
A I I
SDP DDP
2
2
0_5%_1_DY
0_5%_1_DY
SDP DDP
1
1
R4250 R4275 0 OHM 240 OHM
0 OHM 240 OHM
SDP DDP SDP DDP
R4276
R4251
R4251 OPEN 0OHM R4276 OPEN 0OHM

2
2
M_B_BG1 IN 21 22 23 M_B_BG1 IN 21 22 23
C C
B B
REFERENCE NUMBER:4100~4299
A A
INVENTEC
TITLE
A10
Block Diagram

XXX
8 7 6 5 4 3 2 1
REFERENCE:4500~4949
F F
I
I A
A
U4500
U4500
19 M_A_DQ<16> J22 DDR1_DQ_0/DDR0_DQ_16 DDR1_CKN_0/DDR1_CKN_0 AF28 M_CLK_DDR2_DNOUT 21 22

V32 M_CLK_DDR0_DN
BI M_A_DQ<17> H25 AF29 M_CLK_DDR2_DP OUT
19 20 19 21 22
19 BI M_A_DQ<0> A26 DDR0_DQ_0/DDR0_DQ_0
DDR0_CKN_0/DDR0_CKN_0
M_CLK_DDR0_DP
OUT BI M_A_DQ<18>
DDR1_DQ_1/DDR0_DQ_17 DDR1_CKP_0/DDR1_CKP_0
M_CLK_DDR3_DNOUT
M_A_DQ<1> DDR0_CKP_0/DDR0_CKP_0 V31 OUT 19 20 19 BI G22 DDR1_DQ_2/DDR0_DQ_18 DDR1_CKN_1/DDR1_CKN_1 AE28
19 D26 DDR0_DQ_1/DDR0_DQ_1
BI M_A_DQ<2> D28 DDR0_CKN_1/DDR0_CKN_1 T32 M_CLK_DDR1_DN OUT 19
BI M_A_DQ<19> H22 DDR1_DQ_3/DDR0_DQ_19 DDR1_CKP_1/DDR1_CKP_1 AE29 M_CLK_DDR3_DP OUT
19
BI M_A_DQ<3>
DDR0_DQ_2/DDR0_DQ_2
DDR0_CKP_1/DDR0_CKP_1
T31 M_CLK_DDR1_DP OUT 19 BI M_A_DQ<20> F25 DDR1_DQ_4/DDR0_DQ_20
19 BI C28 DDR0_DQ_3/DDR0_DQ_3
M_A_DQ<21> M_CKE2
19 J25 DDR1_DQ_5/DDR0_DQ_21 DDR1_CKE_0/DDR1_CKE_0 T28 21 22
19
BI M_A_DQ<4> B26 DDR0_DQ_4/DDR0_DQ_4
U36 M_CKE0
BI M_A_DQ<22> G25 T29 M_CKE3
OUT
19 20 19
19 BI M_A_DQ<5> C26 DDR0_DQ_5/DDR0_DQ_5
DDR0_CKE_0/DDR0_CKE_0
M_CKE1
OUT BI M_A_DQ<23>
DDR1_DQ_6/DDR0_DQ_22 DDR1_CKE_1/DDR1_CKE_1 OUT
M_A_DQ<6> DDR0_CKE_1/DDR0_CKE_1 U37 OUT 19 BI F22 DDR1_DQ_7/DDR0_DQ_23 DDR1_CKE_2/NC V28
19 B28 DDR0_DQ_6/DDR0_DQ_6
BI M_A_DQ<7> A28 DDR0_CKE_2/NC U34 19
BI M_A_DQ<24> D22 DDR1_DQ_8/DDR0_DQ_24 DDR1_CKE_3/NC V29
19
BI M_A_DQ<8>
DDR0_DQ_7/DDR0_DQ_7
DDR0_CKE_3/NC
U35 19 BI M_A_DQ<25> C22 DDR1_DQ_9/DDR0_DQ_25
M_CS#2
19 BI B30 DDR0_DQ_8/DDR0_DQ_8
M_A_DQ<26> DDR1_CS#_0/DDR1_CS#_0 AL37 OUT 21 22
19 C24 DDR1_DQ_10/DDR0_DQ_26
E 19
BI M_A_DQ<9> D30 DDR0_DQ_9/DDR0_DQ_9
AE32 M_CS#0 BI M_A_DQ<27> D24 DDR1_CS#_1/DDR1_CS#_1 AL35 M_CS#3 OUT E
19 20 19
19 BI M_A_DQ<10> B33 DDR0_DQ_10/DDR0_DQ_10
DDR0_CS#_0/DDR0_CS#_0 OUT BI DDR1_DQ_11/DDR0_DQ_27
DDR1_ODT_0/DDR1_ODT_0
AL36 M_ODT2 OUT 21 22
M_A_DQ<11> DDR0_CS#_1/DDR0_CS#_1 AF32 M_CS#1 OUT 19 BI M_A_DQ<28> A22 DDR1_DQ_12/DDR0_DQ_28
M_ODT3
19 D32 DDR0_DQ_11/DDR0_DQ_11 NC/DDR1_ODT_1 AL34
BI M_A_DQ<12> A30 DDR0_ODT_0/DDR0_ODT_0 AE31 M_ODT0
OUT 19 20 19
BI M_A_DQ<29> B22 DDR1_DQ_13/DDR0_DQ_29 OUT
19
BI M_A_DQ<13>
DDR0_DQ_12/DDR0_DQ_12
NC/DDR0_ODT_1
AF31 M_ODT1
OUT 19 BI M_A_DQ<30> A24 DDR1_DQ_14/DDR0_DQ_30 DDR1_CAB_9/DDR1_MA_0
AG36 M_B_A_0 OUT 21 22
19 BI C30 DDR0_DQ_13/DDR0_DQ_13
M_A_DQ<31> M_B_A_1
19 B24 DDR1_DQ_15/DDR0_DQ_31 DDR1_CAB_8/DDR1_MA_1 AG35 21 22
19
BI M_A_DQ<14> B32 DDR0_DQ_14/DDR0_DQ_14
AC37 M_A_A_0
BI M_A_DQ<48> G31 AF34 M_B_A_2
OUT
19 20 20 21 22
19 BI M_A_DQ<15> C32 DDR0_DQ_15/DDR0_DQ_15
DDR0_CAB_9/DDR0_MA_0
M_A_A_1
OUT BI M_A_DQ<49>
DDR1_DQ_16/DDR0_DQ_48 DDR1_CAB_5/DDR1_MA_2
M_B_A_3
OUT
M_A_DQ<32> DDR0_CAB_8/DDR0_MA_1 AC36 OUT 19 20 20 BI G32 DDR1_DQ_17/DDR0_DQ_49 NC/DDR1_MA_3 AG37 OUT 21 22
20 H37 DDR0_DQ_16/DDR0_DQ_32
BI M_A_DQ<33> H34 DDR0_CAB_5/DDR0_MA_2 AC34 M_A_A_2 OUT 19 20 20
BI M_A_DQ<50> H29 DDR1_DQ_18/DDR0_DQ_50 NC/DDR1_MA_4 AE35 M_B_A_4 OUT 21 22
20
BI M_A_DQ<34>
NC/DDR0_MA_3
AC35 M_A_A_3 OUT 19 20 20 BI M_A_DQ<51> H28 DDR1_DQ_19/DDR0_DQ_51 DDR1_CAA_0/DDR1_MA_5
AF35 M_B_A_5 OUT 21 22
20 BI K34 DDR0_DQ_18/DDR0_DQ_34
M_A_A_4 M_A_DQ<52> M_B_A_6
NC/DDR0_MA_4 AA35 19 20 20 G28 DDR1_DQ_20/DDR0_DQ_52 DDR1_CAA_2/DDR1_MA_6 AE37 21 22
20
BI M_A_DQ<35> K35 DDR0_DQ_19/DDR0_DQ_35
AB35 M_A_A_5
OUT BI M_A_DQ<53> G29 AC29 M_B_A_7
OUT
19 20 20 21 22
20 BI M_A_DQ<36> H36 DDR0_DQ_20/DDR0_DQ_36
DDR0_CAA_0/DDR0_MA_5
M_A_A_6
OUT BI M_A_DQ<54>
DDR1_DQ_21/DDR0_DQ_53 DDR1_CAA_4/DDR1_MA_7
M_B_A_8
OUT
M_A_DQ<37> DDR0_CAA_2/DDR0_MA_6 AA37 OUT 19 20 20 BI H31 DDR1_DQ_22/DDR0_DQ_54 DDR1_CAA_3/DDR1_MA_8 AE36 OUT 21 22
20 H35 DDR0_DQ_21/DDR0_DQ_37
BI M_A_DQ<38> K36 DDR0_CAA_4/DDR0_MA_7 AA36 M_A_A_7 OUT 19 20 20
BI M_A_DQ<55> H32 DDR1_DQ_23/DDR0_DQ_55 DDR1_CAA_1/DDR1_MA_9 AB29 M_B_A_9 OUT 21 22
20 DDR0_DQ_22/DDR0_DQ_38
BI M_A_DQ<39> K37 DDR0_CAA_3/DDR0_MA_8
AB34 M_A_A_8 OUT 19 20 20
BI M_A_DQ<56> L31 DDR1_DQ_24/DDR0_DQ_56 DDR1_CAB_7/DDR1_MA_10
AG34 M_B_A_10 OUT 21 22
20 BI M_A_DQ<40>
DDR0_CAA_1/DDR0_MA_9 W36 M_A_A_9 OUT 19 20 20 BI M_A_DQ<57> L32 DDR1_DQ_25/DDR0_DQ_57 DDR1_CAA_7/DDR1_MA_11 AC28 M_B_A_11 OUT 21 22
20 BI N36 DDR0_DQ_24/DDR0_DQ_40
M_A_A_10 M_A_DQ<58> M_B_A_12
DDR0_CAB_7/DDR0_MA_10 Y31 19 20 20 N29 DDR1_DQ_26/DDR0_DQ_58 DDR1_CAA_6/DDR1_MA_12 AB28 21 22
20
BI M_A_DQ<41> N34 DDR0_DQ_25/DDR0_DQ_41 W34 M_A_A_11
OUT BI M_A_DQ<59> N28 AK35 M_B_A_13
OUT
20 BI M_A_DQ<42> R37 DDR0_DQ_26/DDR0_DQ_42
DDR0_CAA_7/DDR0_MA_11
M_A_A_12
OUT 19 20 20 BI M_A_DQ<60>
DDR1_DQ_27/DDR0_DQ_59 DDR1_CAB_0/DDR1_MA_13 OUT 21 22
M_A_DQ<43> DDR0_CAA_6/DDR0_MA_12 AA34 OUT 19 20 20 BI L28 DDR1_DQ_28/DDR0_DQ_60
M_B_A_14
20 R34 DDR0_DQ_27/DDR0_DQ_43 DDR1_CAB_2/DDR1_MA_14 AJ35 21 22
BI M_A_DQ<44> N37 DDR0_CAB_0/DDR0_MA_13
AC32 M_A_A_13 OUT 19 20 20
BI M_A_DQ<61> L29 DDR1_DQ_29/DDR0_DQ_61 AK34 M_B_A_15
OUT
20 BI M_A_DQ<45>
20 BI M_A_DQ<62> N31 DDR1_DQ_30/DDR0_DQ_62
DDR1_CAB_1/DDR1_MA_15
M_B_A_16
OUT 21 22
20 BI N35 DDR0_DQ_29/DDR0_DQ_45 DDR1_CAB_3/DDR1_MA_16 AJ34 OUT 21 22
DDR0_CAB_2/DDR0_MA_14 AC31 M_A_A_14 19 20 20 M_A_DQ<63> N32 DDR1_DQ_31/DDR0_DQ_63
20
BI M_A_DQ<46> R36 DDR0_DQ_30/DDR0_DQ_46 AB32 M_A_A_15 OUT BI M_B_DQ<16> AJ29
20 BI M_A_DQ<47> R35 DDR0_DQ_31/DDR0_DQ_47
DDR0_CAB_1/DDR0_MA_15 OUT 19 20 21 BI DDR1_DQ_32/DDR1_DQ_16
DDR1_CAB_4/DDR1_BA_0 AJ37 M_B_BS0 OUT 21 22
M_B_DQ<0> DDR0_CAB_3/DDR0_MA_16 Y32 M_A_A_16 OUT 19 20 21 BI M_B_DQ<17> AJ30 DDR1_DQ_33/DDR1_DQ_17
M_B_BS1
21 AN35 DDR0_DQ_32/DDR1_DQ_0 DDR1_CAB_6/DDR1_BA_1 AJ36 21 22
BI M_B_DQ<1> AN34 21
BI M_B_DQ<18> AM32 DDR1_DQ_34/DDR1_DQ_18 W29 M_B_BG0
OUT
21 BI M_B_DQ<2>
DDR0_CAB_4/DDR0_BA_0 W32 M_A_BS0 OUT 19 20 21 BI M_B_DQ<19> AM31 DDR1_DQ_35/DDR1_DQ_19
DDR1_CAA_5/DDR1_BG_0 OUT 21 22
21 BI AR35 DDR0_DQ_34/DDR1_DQ_2
DDR0_CAB_6/DDR0_BA_1 AB31 M_A_BS1 19 20 21 M_B_DQ<20> AM30 DDR1_DQ_36/DDR1_DQ_20
21
BI M_B_DQ<3> AR34 DDR0_DQ_35/DDR1_DQ_3 V34 M_A_BG0
OUT BI M_B_DQ<21> AM29 DDR1_CAA_9/DDR1_BG_1
Y28 M_B_BG1 OUT 21 22
D 21 BI M_B_DQ<4> AN37 DDR0_DQ_36/DDR1_DQ_4
DDR0_CAA_5/DDR0_BG_0 OUT 19 20 21 BI M_B_DQ<22>
DDR1_CAA_8/DDR1_ACT# W28 M_B_ACT# OUT 21 22 D
M_B_DQ<5> 21 BI AJ31 DDR1_DQ_38/DDR1_DQ_22
21 AN36 DDR0_DQ_37/DDR1_DQ_5
BI M_B_DQ<6> AR36 DDR0_CAA_8/DDR0_ACT#
V35 M_A_ACT# OUT 19 20 21
BI M_B_DQ<23> AJ32 DDR1_DQ_39/DDR1_DQ_23 H24 M_A_DQS2_DN
21 BI M_B_DQ<7>
DDR0_CAA_9/DDR0_BG_1 W35 M_A_BG1 OUT 19 20 21 BI M_B_DQ<24> AR31 DDR1_DQ_40/DDR1_DQ_24
DDR1_DQSN_0/DDR0_DQSN_2
M_A_DQS2_DP
BI 19
21 BI AR37 DDR0_DQ_39/DDR1_DQ_7
M_B_DQ<25> DDR1_DQSP_0/DDR0_DQSP_2 G24 BI 19
21 AR32 DDR1_DQ_41/DDR1_DQ_25
21
BI M_B_DQ<8> AU35 DDR0_DQ_40/DDR1_DQ_8 C27 M_A_DQS0_DN
BI M_B_DQ<26> AV30 DDR1_DQSN_1/DDR0_DQSN_3
C23 M_A_DQS3_DN BI 19
21 BI M_B_DQ<9> AU34 DDR0_DQ_41/DDR1_DQ_9
M_A_DQS0_DP
BI 19 21 BI M_B_DQ<27>
DDR1_DQSP_1/DDR0_DQSP_3 D23 M_A_DQS3_DP BI 19
M_B_DQ<10> DDR0_DQSP_0/DDR0_DQSP_0 D27 BI 19 21 BI AV29 DDR1_DQ_43/DDR1_DQ_27
M_A_DQS6_DN
21 AW35 DDR0_DQ_42/DDR1_DQ_10 DDR1_DQSN_2/DDR0_DQSN_6 G30 20
BI M_B_DQ<11> AW34 DDR0_DQSN_1/DDR0_DQSN_1
D31 M_A_DQS1_DN BI 19 21
BI M_B_DQ<28> AR30 DDR1_DQ_44/DDR1_DQ_28 H30 M_A_DQS6_DP
BI
21 BI M_B_DQ<12>
DDR0_DQSP_1/DDR0_DQSP_1 C31 M_A_DQS1_DP BI 19 21 BI M_B_DQ<29> AR29 DDR1_DQ_45/DDR1_DQ_29
DDR1_DQSP_2/DDR0_DQSP_6
M_A_DQS7_DN
BI 20
21 BI AU37 DDR0_DQ_44/DDR1_DQ_12
M_A_DQS4_DN M_B_DQ<30> DDR1_DQSN_3/DDR0_DQSN_7 L30 BI 20
M_B_DQ<13> DDR0_DQSN_2/DDR0_DQSN_4 J35 BI 20 21 BI AV32 DDR1_DQ_46/DDR1_DQ_30
M_A_DQS7_DP
21 AU36 DDR0_DQ_45/DDR1_DQ_13 DDR1_DQSP_3/DDR0_DQSP_7 N30 20
BI M_B_DQ<14> AW36 DDR0_DQSP_2/DDR0_DQSP_4
J34 M_A_DQS4_DP BI 20 21
BI M_B_DQ<31> AV31 DDR1_DQ_47/DDR1_DQ_31 AL31 M_B_DQS2_DN
BI
21 BI M_B_DQ<15>
P34 M_A_DQS5_DN BI 20 22 BI M_B_DQ<48> BA32 DDR1_DQ_48/DDR1_DQ_48
M_B_DQS2_DP
BI 21
21 BI AW37 DDR0_DQ_47/DDR1_DQ_15
M_A_DQS5_DP M_B_DQ<49> DDR1_DQSP_4/DDR1_DQSP_2 AL30 BI 21
DDR0_DQSP_3/DDR0_DQSP_5 P35 20 22 BA31 DDR1_DQ_49/DDR1_DQ_49
22
BI M_B_DQ<32> BA35 DDR0_DQ_48/DDR1_DQ_32 AP35 M_B_DQS0_DN
BI BI M_B_DQ<50> BD31 DDR1_DQSN_5/DDR1_DQSN_3
AU31 M_B_DQS3_DN BI 21
22 BI M_B_DQ<33> BA34 DDR0_DQ_49/DDR1_DQ_33
M_B_DQS0_DP
BI 21 22 BI M_B_DQ<51>
AU30 M_B_DQS3_DP BI 21
M_B_DQ<34> DDR0_DQSP_4/DDR1_DQSP_0 AP34 BI 21 22 BI BD32 DDR1_DQ_51/DDR1_DQ_51
M_B_DQS6_DN
22 BC35 DDR0_DQ_50/DDR1_DQ_34 DDR1_DQSN_6/DDR1_DQSN_6 BC31 22
BI M_B_DQ<35> BC34 DDR0_DQSN_5/DDR1_DQSN_1
AV34 M_B_DQS1_DN BI 21 22
BI M_B_DQ<52> BA30 DDR1_DQ_52/DDR1_DQ_52 BC30 M_B_DQS6_DP
BI
22 BI M_B_DQ<36>
AV35 M_B_DQS1_DP BI 21 22 BI M_B_DQ<53> BA29 DDR1_DQ_53/DDR1_DQ_53
M_B_DQS7_DN
BI 22
22 BI BA37 DDR0_DQ_52/DDR1_DQ_36
M_B_DQS4_DN M_B_DQ<54> DDR1_DQSN_7/DDR1_DQSN_7 BH31 BI 22
DDR0_DQSN_6/DDR1_DQSN_4 BB35 22 22 BD29 DDR1_DQ_54/DDR1_DQ_54
22
BI M_B_DQ<37> BA36 DDR0_DQ_53/DDR1_DQ_37 BB34 M_B_DQS4_DP
BI BI M_B_DQ<55> BD30 DDR1_DQSP_7/DDR1_DQSP_7
BH30 M_B_DQS7_DP BI 22
22 BI M_B_DQ<38> BC36 DDR0_DQ_54/DDR1_DQ_38
M_B_DQS5_DN
BI 22 22 BI M_B_DQ<56>
M_B_DQ<39> DDR0_DQSN_7/DDR1_DQSN_5 BF34 BI 22 22 BI BG31 DDR1_DQ_56/DDR1_DQ_56

M_B_ALERT#
22 BC37 DDR0_DQ_55/DDR1_DQ_39 NC/DDR1_ALERT# Y29 21 22
BI M_B_DQ<40> BE35 DDR0_DQSP_7/DDR1_DQSP_5
BF35 M_B_DQS5_DP BI 22 22
BI M_B_DQ<57> BG32 DDR1_DQ_57/DDR1_DQ_57 AE34 M_B_PAR
IN
22 BI M_B_DQ<41>
22 BI M_B_DQ<58> BK32 DDR1_DQ_58/DDR1_DQ_58
NC/DDR1_PAR
DDR_DRAMRST#_CPU
OUT 21 22
22 BI BE34 DDR0_DQ_57/DDR1_DQ_41 P0V6M_VREF_H DRAM_RESET# BU31 OUT 23
NC/DDR0_ALERT# W37 M_A_ALERT# 19 20 22 M_B_DQ<59> BK31 DDR1_DQ_59/DDR1_DQ_59
22
BI M_B_DQ<42> BG35 DDR0_DQ_58/DDR1_DQ_42 W31 M_A_PAR IN BI M_B_DQ<60> BG29
22 BI M_B_DQ<43> BG34 DDR0_DQ_59/DDR1_DQ_43
NC/DDR0_PAR OUT 19 20 22 BI M_B_DQ<61>
DDR_RCOMP_0
BN28 RCOMP0 R4514 1 2 121_1%_1
M_B_DQ<44> 22 BI BG30 DDR1_DQ_61/DDR1_DQ_61
RCOMP1
22 BE37 DDR0_DQ_60/DDR1_DQ_44 DDR_VREF_CA F36 DDR_RCOMP_1 BN27 1 2 80.6_1%_1 I A
BI M_B_DQ<45> BE36 D35 1 22
BI M_B_DQ<62> BK30 DDR1_DQ_62/DDR1_DQ_62 BN29 RCOMP2
R4508
1 2
22 BI DDR0_DQ_61/DDR1_DQ_45 DDR0_VREF_DQ_0
TP4515 P0V6M_VREF_DQ M_B_DQ<63> BK29 DDR_RCOMP_2 R4521 100_1%_1 I A
22 BI M_B_DQ<46> BG36 DDR0_DQ_62/DDR1_DQ_46 DDR0_VREF_DQ_1 D37 22 BI DDR1_DQ_63/DDR1_DQ_63
C 22 M_B_DQ<47> BG37 E36 C

BI DDR0_DQ_63/DDR1_DQ_47 DDR1_VREF_DQ
C35 DDR_VTT_CTRL
DDR_VTT_CTL OUT 23 3 of 20
INTEL_J86075_BGA_1528P
2 of 20
P0V6S_DIMM1_VREF_DQ P0V6M_VREF_DQ P0V6S_DIMM0_VREF_CA P0V6M_VREF_H
P3V3A P3V3A
R4112 R4115
1 2 1 2
1
I I
2.7_1%_2 2.7_1%_2 A A P1V2
0.022UF_16V_2
I A I A R4675 R4676
0.022UF_16V_2
1
470_5%_1 I A
1
10K_5%_2
C4122
1
10K_5%_2
C4124
DDR_VTT_PG_CTR OUT 16
R4583
I
PANJIT_2N7002KW_3P
A
2
D
2
R4111 R4136
2
1 2 1 2
1
D
NI
B A I G A B
24.9_1%_2 I A 24.9_1%_2
G
R4677 DDR_DRAMRST#_CPU OUT 23
I
A
S
I 10K_5%_2_DY
Q4510
Q4511
A
SHORT_0201_5
DDR_VTT_CTRL1 R4674 2 B S I A
2
2
B
C
23 IN I
330_5%_2
E
A
100K_5%_2
R4584
2
MMBT4401
R4648
1
1
C4587
1 2 DDR_DRAMRST# IN 19 20 21 22
0.1UF_6.3V_1_DY
A A
INVENTEC
TITLE
A10
DDR3_SO-DIMM0

CHANGE by DATE C CS 1310xxxxx-0-0 A02
XXX
PCB P/N 60xxxxxxxxxx
<ENG> PCB VER 03-Oct-2019
<VER>
A02 SHEET of 23 70
8 7 6 5 4 3 2 1
P3V3A
GPP_C5
D GPP_C5 R4545 2
24 OUT 1 D
1K_5%_2_DY
NI
A
P3V3A
THIS SIGNAL HAS A WEAK INTERNAL PULL-DOWN.
0 = LPC IS SELECTED FOR EC.
1 = ESPI IS SELECTED FOR EC.
2
NOTES:
R4662 1. THE INTERNAL PULL-DOWN IS DISABLED AFTER RSMRST#
100K_5%_2 DE-ASSERTS.
A 2. THIS SIGNAL IS IN THE PRIMARY WELL.
R4661
1 2
1
100K_5%_2 U4500
1
B500
2
PCH_SPI_CLK CH37 CK14 PCH_3A_SMCLK BI
35 OUT CF37
SPI0_CLK GPP_C0/SMBCLK
CH15
24
PASSWORD_0805
35 OUT PCH_SPI_SO SPI0_MISO GPP_C1/SMBDATA PCH_3A_SMDATA BI 24 I P3V3A
CF36 CJ15 A
35 OUT PCH_SPI_SI SPI0_MOSI GPP_C2/SMBALERT# SMBALERT# IN 24
EC_SPI_SO2 R4563 1 249.9_1%_2 PCH_SPI_SO2 CF34 SMBALERT# 1 R4537 2
35 OUT CG34
SPI0_IO2
CH14
24 OUT
EC_SPI_SO3 R4562 1 249.9_1%_2 PCH_SPI_SO3 1K_5%_2
35 OUT CG36
SPI0_IO3 GPP_C3/SML0CLK
CF15
35 OUT PCH_SPI_CS0# SPI0_CS0# GPP_C4/SML0DATA PCH_3A_SMDATA 2R4556 1
CG35 CG15 24 BI
SPI0_CS1# GPP_C5/SML0ALERT# GPP_C5 IN 24
C P3V3A P3V3A 2.2K_5%_2 C
AI
CH34 SPI0_CS2#
GPP_C6/SML1CLK CN15
1
2R4555 1
10K_5%_2
10K_5%_2
CM15 PCH_3A_SMCLK
GPP_C7/SML1DATA
CC34
24 BI
GPP_B23
A
R4567
R4566
BI 24 2.2K_5%_2
AI
GPP_B23/SML1ALERT#/PCHHOT#
A
CF20
SIT 0531 CG22
GPP_D1/SPI1_CLK/BK1/SBK1
I
I GPP_D2/SPI1_MISO_IO1/BK2/SBK2 GPP_B23 1 R4644 2

SMDPAD_4 A CF22 24 BI
GPP_D3/SPI1_MOSI_IO0/BK3/SBK3
2
PAD4550 R4565 2 CG23 CA29 10K_5%_2_DY

#DIMM 0 Disable 1 1 GPP_D21/SPI1_IO2 GPP_A1/LAD0/ESPI_IO0 LPC_ESPI_IO0 BI 35 36
1K_5%_2 CH23 GPP_D22/SPI1_IO3 GPP_A2/LAD1/ESPI_IO1 BY29 LPC_ESPI_IO1
CG20 BY27
BI 35 36
P3V3S GND 2 I GPP_D0/SPI1_CS0#/BK0/SBK0 GPP_A3/LAD2/ESPI_IO2 LPC_ESPI_IO2 BI 35 36
A BV27
GPP_A4/LAD3/ESPI_IO3 LPC_ESPI_IO3 BI 35 36
#DIMM 1 Disable 3 1 R4564 2 CA28 LFRAME#_ESPI_CS# OUT
GPP_A5/LFRAME#/ESPI_CS# 35 36
1
1K_5%_2 CA271
10K_5%_2
CH7 GPP_A14/SUS_STAT#/ESPI_RESET#
SMDPAD3 47 BI CL_CLK1 CL_CLK TP4518 I
R4571
CH8 A
CL_DATA1
A
I
47 BI CL_DATA
GPP_A9/CLKOUT_LPC0/ESPI_CLK BV32 LPC_ESPI_CLK_R R4551 1 2 I
22_5%_2 LPC_ESPI_CLK
47 OUT CL_RST#1 CH9 A
OUT 35
22_5%_2 CLK_PCI_DEBUG
CL_RST# BV30 CLK_PCI_DEBUG_RR4550 1 2
GPP_A10/CLKOUT_LPC1
OUT 36
GPP_A8/CLKRUN# BY30 PCI_3S_CLKRUN# 24 35
IN
2
KBRST# BV29
35 IN BV28
GPP_A0/RCIN#/TIME_SYNC1
35 OUT PCI_3S_SERIRQ GPP_A6/SERIRQ
P3V3S
5 of 20
INTEL_J86075_BGA_1528P PCI_3S_CLKRUN# 1 R4577 2
B 35 24 OUT B
8.2K_5%_2
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX
<ENG> 03-Oct-2019
PCB P/N 60xxxxxxxxxx PCB VER <VER>
A02 SHEET 24 of 70
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 4700~4949(PCH)
P3V3A
I
A
GPU_EVENT_PCH#
1 R4595 2
OUT 25 64
10K_5%_2
P3V3S GPP_B22
D
R4904 P3V3A D
2 1 GPP_B22 OUT 25
10K_5%_2_DY
BOOT BIOS STRAP BIT
R4709 1 2 100K_5%_2 GPP_D12 OUT 25
0 SPI (DEFAULT)
1 LPC
P3V3A I
A
R4596 2
GPP_B18
1 10K_5%_1_DY
U4500
GPP_B18 : R4596
0 = DISABLE NO REBOOT MODE(DEFAULT) CC27 GPP_B15/GSPI0_CS0#
INTEGRATED SENSOR HUB
CC32 GPP_A7/PIRQA#/GSPI0_CS1#
1 = ENABLE NO REBOOT MODE CE28 GPP_B16/GSPI0_CLK GPP_D9/ISH_SPI_CS#/GSPI2_CS0# CN22
CE27 CR22 DCI_CLK
CE29
GPP_B17/GSPI0_MISO GPP_D10/ISH_SPI_CLK/GSPI2_CLK
CM22
IN 52
GPP_B18/GSPI0_MOSI GPP_D11/ISH_SPI_MISO/GSPI2_MISO DCI_DATA IN 52
CP22 GPP_D12
CA31
GPP_D12/ISH_SPI_MOSI/GSPI2_MOSI OUT 25
69 OUT GC6_FB_EN_PCH
C 1 R4579 2 CA32
GPP_B19/GSPI1_CS0#
GPP_A11/PME#/GSPI1_CS1#/SD_VDD2_PWR_EN#
3V3 GPP_D5/ISH_I2C0_SDA CK22 C
100K_5%_2_DY 64 25 IN GPU_EVENT_PCH#CC29 GPP_B20/GSPI1_CLK GPP_D6/ISH_I2C0_SCL CH20
CC30 GPP_B21/GSPI1_MISO
GPP_B22 CA30 CH22
25 IN GPP_B22/GSPI1_MOSI GPP_D7/ISH_I2C1_SDA
CJ22
GPP_D8/ISH_I2C1_SCL
R4910 47
CNV_BRI_RSP CK20 STRAP
25 IN GPP_F5/CNV_BRI_RSP
25
47 CNV_RGI_DT_R 1 22_5%_12 CNV_RGI_DT CG19 CJ27
25
IN CNV_BRI_DT_R 1 2 CNV_BRI_DT CJ20
GPP_F6/CNV_RGI_DT
1V8 GPP_H10/I2C5_SDA/ISH_I2C2_SDA
CJ29
47 OUT CNV_RGI_RSP CH19
GPP_F4/CNV_BRI_DT GPP_H11/I2C5_SCL/ISH_I2C2_SCL
22_5%_1 47 25 IN GPP_F7/CNV_RGI_RSP
R4912 3V3 GPP_D13/ISH_UART0_RXD CM24 MB_ID0
IN 25
GPP_D14/ISH_UART0_TXD CN23 MB_ID1 25
UART2_RX CR12 CM23 MB_ID2 IN
25 IN GPP_C20/UART2_RXD GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#
IN 25
25 UART2_TX CP12 CR24 MB_ID3 25
OUT 1 CN12
GPP_C21/UART2_TXD GPP_D16/ISH_UART0_CTS#/SML0BALERT#
IN
GPP_C22/UART2_RTS#
TP4507 P3V3S
TP4508
1 CM12 GPP_C23/UART2_CTS# GPP_C12/UART1_RXD/ISH_UART1_RXD CG12 MB_ID4
IN SIT 0612 25
GPP_C13/UART1_TXD/ISH_UART1_TXD CH12 MB_ID5 25
PCH_I2C_DATA CM11 CF12
IN
37 25 BI GPP_C16/I2C0_SDA GPP_C14/UART1_RTS#/ISH_UART1_RTS#
37 25 PCH_I2C_CLK CN11 CG14
BI GPP_C17/I2C0_SCL GPP_C15/UART1_CTS#/ISH_UART1_CTS#
R4700 2 49.9K_1%_2_DY
3V3 25 IN UART2_TX 1
52 25 PCH_I2C1_DATA CK12 BW35 R4701
BI GPP_C18/I2C1_SDA GPP_A18/ISH_GP0
UART2_RX 1 2 49.9K_1%_2_DY
52 25 PCH_I2C1_CLK CJ12 BW34 25 IN
BI GPP_C19/I2C1_SCL GPP_A19/ISH_GP1
CA37
GPP_A20/ISH_GP2
B CF27 GPP_H4/I2C2_SDA GPP_A21/ISH_GP3 CA36 B
CF29 GPP_H5/I2C2_SCL GPP_A22/ISH_GP4 CA35
CA34
CH27
GPP_A23/ISH_GP5
BW37 P3V3A
GPP_H6/I2C3_SDA 1V8 GPP_A12/ISH_GP6/BM_BUSY#/SX_EXIT_HOLDOFF#
CH28 GPP_H7/I2C3_SCL
R4616 1 210K_5%_2_DY MB_ID0
OUT 25
CJ30 R4617 1 210K_5%_2_DY MB_ID1
CJ31
GPP_H8/I2C4_SDA OUT 25
P3V3A I2C0 USE FOR TOUCHPAD GPP_H9/I2C4_SCL
R4618 1 210K_5%_2_DY MB_ID2 25
OUT
R4558 PCH_I2C_DATA R4619 1 210K_5%_2_DY MB_ID3 OUT 25
1 2 25 37 6 of 20
BI 1 210K_5%_2_DY MB_ID4
2.2K_5%_2 INTEL_J86075_BGA_1528P R4620 OUT 25
A
I
PCH_I2C_CLK
1 R4557 2 R4621 1 210K_5%_2_DY MB_ID5
BI 25 37 OUT 25
2.2K_5%_2
A
I
SIT 0612
1 R4561 2 PCH_I2C1_DATA BI 25 52
2.2K_5%_2_DY
1 R4560 2 PCH_I2C1_CLK BI 25 52
2.2K_5%_2_DY CNV_RGI_DT_R 25 47
OUT R4642 1 210K_5%_2_DY MB_ID0 OUT 25
2
10K_5%_2_DY
R4643 1 210K_5%_2_DY MB_ID1 OUT 25

R4650
A CNV STRAP R4645 1 210K_5%_2_DY MB_ID2 25 A

P1V8A OUT
1= CNVI DISABLE 1 210K_5%_2_DY MB_ID3
R4646 OUT 25
0= CNVI EABLE
1
R4647 1 210K_5%_1_DY MB_ID4 25

1 R4909 2 10K_5%_2_DY CNV_BRI_RSP OUT
BI 25 47
R4649 1 210K_5%_1_DY MB_ID5 OUT 25
1 R4913 2 CNV_RGI_RSP
10K_5%_2_DY BI 25 47
PLACEMENT CLOSE TO PCH
CNVI RGI_DT PIN GETS THE PULL-DOWN RESISTOR (1K OHM)
P1V8A
R4950 1 2 20K_5%_2_DY CNV_BRI_DT_R

FROM THE INTERNAL CRF MODULE WHEN CNVI IS ENABLED.
THERE MUST NOT BE ANY PULL-DOWN RESISTOR CONNECTED ON THE BOARD. INVENTEC
BI 47
25
TITLE
R4951 1 2 20K_5%_2 CNV_RGI_DT_R A10
BI 25 47
Block Diagram
PLACEMENT CLOSE TO WLAN(U1300)
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 A02
XXX
<ENG> 03-Oct-2019
PCB P/N 60xxxxxxxxxx PCB VER A02
<VER> SHEET 25 of 70
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
D
R4512
5 IN PROCHOT# 1 2 CPU_PROCHOT# OUT 12 26 64
35
0_5%_1
I
A
PVCCST VCCSTG
1
1K_5%_1
1K_5%_1
U4500
PVCCST
R4510
R4517
VCCSTG
1 R4604 2 AA4 T6 H_TCK
I 49.9_1%_1 CATERR# PROC_TCK IN 26
A AR1 U6 I
35 OUT H_PECI PECI PROC_TDI H_TDI IN 26 A
2
35
64 26 12 IN CPU_PROCHOT# R4515 1 2 499_1%_2 CPU_PROCHOT#_R Y4 PROCHOT# PROC_TDO Y5 H_TDO OUT 26 H_TDO 1 R4628 2
BJ1 T5 26 OUT
56 OUT CPU_THERMTRIP# THRMTRIP# PROC_TMS H_TMS IN 26
AB6 51_5%_2
PROC_TRST# H_TRST# IN
TP4502 1 BPM0 U1 I
BPM#_0 A
U2 W6 1 H_TDI 1 R4630 2
U3
BPM#_1 PCH_TCK
U5 TP4720 26 OUT
BPM#_2 PCH_TDI 1 51_5%_2
C U4 BPM#_3 PCH_TDO W5 1
TP4721 C
I
P5 TP4722 A
1 R4631 2
PCH_TMS
TP4723 26 H_TMS 1
PCH_TRST# Y6 1 OUT
P6 TP4724 51_5%_2
PCH_JTAGX
PCH_TP_I2C_INT# CE9 W2
37 IN CN3
GPP_E3/CPU_GP0 PROC_PREQ#
W1 A
I
52 IN PCH_TYPEC_INT# GPP_E7/CPU_GP1 PROC_PRDY#
PCH_TYPEC_INT1# CB34 H_TCK 1 R4509 2
45 IN CC35
GPP_B3/CPU_GP2 26 OUT
GPP_B4/CPU_GP3 51_5%_2
R4600 1 2
49.9_1%_1 BP27 PROC_POPIRCOMP
R4601 1 2
49.9_1%_1 BW25 PCH_OPIRCOMP
I
A
4 of 20
SIT 0612
C4624
2 1
B B
U4500
2PF_50V_2
I
A
HDA_3S_SYNC R4635 1 2
33_5%_2 HDA_SYNC_R BN34 CH36 DGPU_PRSNT#
38 BI I BN37
HDA_SYNC/I2S0_SFRM GPP_G0/SD_CMD
CL35
IN 26
38 BI HDA_3S_BITCLK R4634 1 2 22_5%_2 A HDA_BITCLK_R HDA_BCLK/I2S0_SCLK GPP_G1/SD_DATA0 DGPU_PWROK IN 26 69
I BN36 CL36
38 BI HDA_3S_SDOUT R4636 1 2
33_5%_2 A HDA_SDO_R HDA_SDO/I2S0_TXD GPP_G2/SD_DATA1 DGPU_PWR_EN 1 R4594 2
FLASH_OVERRIDE R4637 1 2
1K_5%_2 BN35 CM35 DGPU_HOLD_RST# OUT 69 26 OUT
35 IN I BL36
HDA_SDI0/I2S0_RXD GPP_G3/SD_DATA2
CN35
26 60
10K_5%_2_DY
38 IN HDA_3S_SDIN0 A HDA_SDI1/I2S1_RXD/SNDW1_DATA GPP_G4/SD_DATA3
HDA_3S_RST# R4638 1 2
33_5%_2 HDA_RST#_R BL35 CH35
26 BI CK23
HDA_RST#/I2S1_SCLK/SNDW1_CLK GPP_G5/SD_CD#
CK36
C4775 C4776 GPP_D23/I2S_MCLK GPP_G6/SD_CLK DGPU_PWR_EN OUT 26 69
2 1 2 1 GPP_G7/SD_WP CK34
BL37 I2S1_SFRM/SNDW2_CLK
2.7PF_50V_1 2.7PF_50V_1 BL34 I2S1_TXD/SNDW2_DATA
1 R4908 2
75K_1%_2 P3V3S
TP5001 HDA_3S_RST# CNV_RF_RST# CJ32
TP24 IN 26 47 BI GPP_H1/I2S2_SFRM/CNV_BT_I2S_BCLK/CNV_RF_RESET# A
CH32 GPP_H0/I2S2_SCLK/CNV_BT_I2S_SCLK R4929 2
69 26 OUT DGPU_PWR_EN 1 I 10K_5%_2
47 OUT CNV_CLKREQ CH29
CH30
GPP_H2/I2S2_TXD/CNV_BT_I2S_SDI/MODEM_CLKREQ
GPP_H3/I2S2_RXD/CNV_BT_I2S_SDO BW36 DGPU_HOLD_RST#
1 R4593 2
GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7 60 26 OUT 10K_5%_2_DY
GPP_A16/SD_1P8_SEL BY31 A
CP24 GPP_D19/DMIC_CLK0/SNDW4_CLK R4591 I 2
CN24 I 69 26 OUT DGPU_PWROK 1 10K_5%_2
GPP_D20/DMIC_DATA0/SNDW4_DATA CK33 A
SD_1P8_RCOMP
CM34 1 R4639 2
CK25 GPP_D17/DMIC_CLK1/SNDW3_CLK
SD_3P3_RCOMP R4589
A CJ25 200_5%_2 26 OUT DGPU_PRSNT# 1 210K_5%_2_DY A
GPP_D18/DMIC_DATA1/SNDW3_DATA A
NI R4590
NI 1 2 10K_5%_2
A GPP_B14 38 OUT PCSPKR_PCH_3 CF35 GPP_B14/SPKR
R4629 7 of 20
1 2
DGPU PRSNT#
STRAP PIN:
20K_5%_2_DY 0 =DISABLE “TOP SWAP MODE. (DEFAULT) DGPU_PRSNT#
1 =ENABLE “TOP SWAP MODE.
DIS 0
UMA 1 INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX
<ENG> 03-Oct-2019
A02 SHEET 26 of 70
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3S
I
A
1 R4553 2 M2_SSD1_DET# OUT 27 48

10K_5%_2
I
A
1 R4578 2 M2_SSD2_DET# OUT 27 49

10K_5%_2
1 R4552 2 DEVSLP_SSD1
OUT 27 48
10K_5%_2_DY
1 R4554 2 DEVSLP_SSD2
OUT 27 49
D 10K_5%_2_DY
D
U4500
60 PEG_RX0_C_DN BW9 CB5 USB3_SOC_RX1_DN 44

IN PEG_RX0_C_DP BW8
PCIE5_RXN/USB31_5_RXN PCIE1_RXN/USB31_1_RXN
CB6 USB3_SOC_RX1_DP BI
60 IN PCIE5_RXP/USB31_5_RXP PCIE1_RXP/USB31_1_RXP
BI 44
60 OUT PEG_TX0_C_DN C48461 2 0.22UF_16V_2 PEG_TX0_DN BW4 PCIE5_TXN/USB31_5_TXN PCIE1_TXN/USB31_1_TXN CA4 USB3_SOC_TX1_DN BI 44 TYPE C PORT R2
PEG_TX0_C_DP C48451 2 0.22UF_16V_2 PEG_TX0_DP BW3 CA3 USB3_SOC_TX1_DP
60 OUT PCIE5_TXP/USB31_5_TXP PCIE1_TXP/USB31_1_TXP BI 44
PEG_RX1_C_DN BU6 BY8 USB3_RX2_DN

60 IN BU5
PCIE6_RXN/USB31_6_RXN PCIE2_RXN/USB31_2_RXN/SSIC_1_RXN
BY9
BI 42
60 PEG_RX1_C_DP USB3_RX2_DP 42
IN PEG_TX1_C_DN C48381 2 0.22UF_16V_2 PEG_TX1_DN BU4
PCIE6_RXP/USB31_6_RXP PCIE2_RXP/USB31_2_RXP/SSIC_1_RXP
CA2 USB3_TX2_DN BI USB3.0 PORT L1
60 OUT PCIE6_TXN/USB31_6_TXN PCIE2_TXN/USB31_2_TXN/SSIC_1_TXN BI 42
60 OUT PEG_TX1_C_DP C47991 2 0.22UF_16V_2 PEG_TX1_DP BU3 PCIE6_TXP/USB31_6_TXP PCIE2_TXP/USB31_2_TXP/SSIC_1_TXP CA1 USB3_TX2_DP BI 42
GPU 60 IN PEG_RX2_C_DN BT7 PCIE7_RXN PCIE3_RXN/USB31_3_RXN BY7 USB3_RX3_DN BI 43
PEG_RX2_C_DP BT6 BY6 USB3_RX3_DP
60 IN
PEG_TX2_C_DN C48391 2 0.22UF_16V_2 PEG_TX2_DN BU2
PCIE7_RXP PCIE3_RXP/USB31_3_RXP
BY4 USB3_TX3_DN
BI 43 USB3.0 PORT L2
60 OUT BU1
PCIE7_TXN PCIE3_TXN/USB31_3_TXN
BY3
BI 43
60 OUT PEG_TX2_C_DP C48401 2 0.22UF_16V_2 PEG_TX2_DP PCIE7_TXP PCIE3_TXP/USB31_3_TXP USB3_TX3_DP BI 43
PEG_RX3_C_DN BU9 BW6 USB3_TYPEC_RX4_DNBI

60 IN PCIE8_RXN PCIE4_RXN/USB31_4_RXN 51
C 60 IN PEG_RX3_C_DP BU8 PCIE8_RXP PCIE4_RXP/USB31_4_RXP BW5 USB3_TYPEC_RX4_DPBI 51 TYPE-C W/PD PORT R1 C

PEG_TX3_C_DN C48411 2 0.22UF_16V_2 PEG_TX3_DN BT4 BW2 USB3_TYPEC_TX4_DNBI
60 OUT BT3
PCIE8_TXN PCIE4_TXN/USB31_4_TXN
BW1
51
60 OUT PEG_TX3_C_DP C48421 2 0.22UF_16V_2 PEG_TX3_DP PCIE8_TXP PCIE4_TXP/USB31_4_TXP USB3_TYPEC_TX4_DPBI 51
PCIE9_WLAN_RX_DN BP5 CE3 USB_P1_DN

47 IN PCIE9_RXN USB2N_1 BI 45
47 IN PCIE9_WLAN_RX_DP BP6 PCIE9_RXP USB2P_1 CE4 USB_P1_DP BI 45 USB2.0 TYPE C R2
PCIE9_WLAN_TX_C_DN C4798 1 2 0.1UF_6.3V_1 PCIE9_WLAN_TX_DN BR2
47 OUT BR1
PCIE9_TXN
CE1
47 OUT PCIE9_WLAN_TX_C_DP C4793 1 2 0.1UF_6.3V_1 PCIE9_WLAN_TX_DP PCIE9_TXP USB2N_2
USB2P_2 CE2
BN6 PCIE10_RXN
PLACE CLOSE TO WLAN BN5 PCIE10_RXP USB2N_3 CG3 USB_P3_DN
BR4 CG4
BI 42
USB2.0 PORT L1
PCIE10_TXN USB2P_3 USB_P3_DP BI 42
BR3 PCIE10_TXP
USB2N_4 CD3 USB_TYPEC_DN
PCIE7_SSD_RX_DN BN10 CD4 USB_TYPEC_DP BI 53
USB2.0 TYPE-C_R1
49 IN PCIE7_SSD_RX_DP BN8
PCIE11_RXN/SATA0_RXN USB2P_4
BI 53
49 IN PCIE7_SSD_TX_DN I A PCIE7_SSD_TX_C_DN
PCIE11_RXP/SATA0_RXP
49 OUT C4729 1 2
0.22UF_6.3V_1 BN4 PCIE11_TXN/SATA0_TXN USB2N_5 CG5
49 PCIE7_SSD_TX_DP C4727 1
I A 2
0.22UF_6.3V_1 PCIE7_SSD_TX_C_DP BN3 CG6
OUT PCIE11_TXP/SATA0_TXP USB2P_5
SSD 2X PCIE8_SATA1_SSD_RX_DN BL6 CC1 USB_CAM_DN
49 IN PCIE12_RXN/SATA1A_RXN USB2N_6
BI 55
49 PCIE8_SATA1_SSD_RX_DP BL5 CC2 USB_CAM_DP 55
HD WEBCAM
IN PCIE8_SATA1_SSD_TX_C_DN I A PCIE8_SATA1_SSD_TX_DN BN2
PCIE12_RXP/SATA1A_RXP USB2P_6
BI
49 OUT C4724 1 2
0.22UF_6.3V_1 PCIE12_TXN/SATA1A_TXN
I A
49 PCIE8_SATA1_SSD_TX_C_DP
C4723 1 2
0.22UF_6.3V_1 PCIE8_SATA1_SSD_TX_DP BN1 CG8 USB_CR_DN 41
OUT PCIE12_TXP/SATA1A_TXP USB2N_7
BI
B USB2P_7 CG9 USB_CR_DP
BI 41 CARDREADER B
48 PCIE9_SSD_RX_DN BK6
IN PCIE9_SSD_RX_DP BK5
PCIE13_RXN
CB8 USB_FINGER_DN
48 IN PCIE13_RXP USB2N_8
BI 37
I A
48 OUT PCIE9_SSD_TX_DN C4711 1 2
0.22UF_6.3V_1 PCIE9_SSD_TX_C_DN BM4 PCIE13_TXN USB2P_8 CB9 USB_FINGER_DP
BI 37 FINGERPRINT
PCIE9_SSD_TX_DP C4713 1 A 2
0.22UF_6.3V_1 PCIE9_SSD_TX_C_DP BM3
48 OUT I PCIE13_TXP
CH5 USB_P9_DN BI 43
PCIE10_SSD_RX_DN BJ6
USB2N_9
CH6 USB_P9_DP USB2.0 PORT L2
48 IN BJ5
PCIE14_RXN USB2P_9 BI 43
48 IN PCIE10_SSD_RX_DP PCIE14_RXP
C4714 1 I A 2 BL2 CC3
48 OUT PCIE10_SSD_TX_DN 0.22UF_6.3V_1 PCIE10_SSD_TX_C_DN USB_BT_DN BI 47
PCIE10_SSD_TX_DP C4715 1 A 2
0.22UF_6.3V_1 PCIE10_SSD_TX_C_DP BL1
PCIE14_TXN USB2N_10
CC4 USB_BT_DP BLUETOOTH
48 OUT I PCIE14_TXP USB2P_10 BI 47
SSD 4X BG5 CC5
48 IN PCIE11_SSD_RX_DN PCIE15_RXN/SATA1B_RXN USB2_COMP USBCOMP 1
R4708 2
113_1%_2
BG6 CE8 1 R4704 2 1K_5%_2
48 IN PCIE11_SSD_RX_DP PCIE15_RXP/SATA1B_RXP USB_ID
I A
48 OUT PCIE11_SSD_TX_C_DN C4716 1 2
0.22UF_6.3V_1 PCIE11_SSD_TX_DN BL4 PCIE15_TXN/SATA1B_TXN USB_VBUSSENSE CC6 1 2 1K_5%_2
I A
48 OUT PCIE11_SSD_TX_C_DP C4717 1 2
0.22UF_6.3V_1 PCIE11_SSD_TX_DP BL3 PCIE15_TXP/SATA1B_TXP
R4706
GPP_E9/USB2_OC0#/GP_BSSB_CLK CK6
PCIE12_SATA2_SSD_RX_DN BE5 CK5
48 IN BE6
PCIE16_RXN/SATA2_RXN GPP_E10/USB2_OC1#/GP_BSSB_DI
CK8
48 IN PCIE12_SATA2_SSD_RX_DP PCIE16_RXP/SATA2_RXP GPP_E11/USB2_OC2#
I A
48 OUT C4718 1
PCIE12_SATA2_SSD_TX_C_DN 2
0.22UF_6.3V_1 PCIE12_SATA2_SSD_TX_DN BJ4 PCIE16_TXN/SATA2_TXN GPP_E12/USB2_OC3# CK9
1 TP4501
I A
48 OUT C4719 1
PCIE12_SATA2_SSD_TX_C_DP 2
0.22UF_6.3V_1 PCIE12_SATA2_SSD_TX_DP BJ3 PCIE16_TXP/SATA2_TXP
CP8DEVSLP0
I GPP_E4/DEVSLP0
CR8DEVSLP_SSD2
IN
1 R4608 2
A GPP_E5/DEVSLP1 OUT 27 49
PCIE_RCOMPN CE6 P\C\I\E\_\R\C\O\M\P\ GPP_E6/DEVSLP2 CM8DEVSLP_SSD1
OUT 27 48
100_1%_2 PCIE_RCOMPP CE5 PCIE_RCOMP_P
A GPP_E0/SATAXPCIE0/SATAGP0 CN8 A
CR28 CM10M2_SSD2_DET#
CP28
GPP_H12/M2_SKT2_CFG0 GPP_E1/SATAXPCIE1/SATAGP1
CP10 M2_SSD1_DET#
IN 27 49
GPP_H13/M2_SKT2_CFG1 GPP_E2/SATAXPCIE2/SATAGP2
CN28
IN 27 48
GPP_H14/M2_SKT2_CFG2
CM28 GPP_H15/M2_SKT2_CFG3 GPP_E8/SATALED#/SPI1_CS1# CN7
RSVD_1/FS_RESET#/RSVD_1 AR3
8 of 20
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX
<ENG> 03-Oct-2019
A02 SHEET 27 of 70
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3AL
RTC
CLKIN_XTAL_R 1 R4911 2 I
I
A OUT
10K_5%_1
1.5K_5%_2
R4703
U4500
P3V3S
AW2 AU1
60 OUT CLK_PEG_DN CLKOUT_PCIE_N0 C\L\K\O\U\T\_\I\T\P\X\D\P\
SIT2 0729
1
CLK_PEG_DP AY3 AU2
I 60 OUT CLKOUT_PCIE_P0 CLKOUT_ITPXDP_P
2
A CF32
60 IN CLKREQ_GPU# GPP_B5/SRCCLKREQ0#
1 R4707 2 BT32 SUSCLK32_PCH
GPD8/SUSCLK OUT 47
A2
45.3K_1%_2
CLK_PCIE_SSD1_DN BC1
1
10K_5%_2 48 OUT CLKOUT_PCIE_N1 P3V3_RTC
CLK_PCIE_SSD1_DP BC2 CK3XTAL24_IN P3V3_RTC
I
A
48 OUT CE32
CLKOUT_PCIE_P1 XTAL_IN
CK2 XTAL24_OUT
IN 28
48 IN CLKREQ_SSD1# GPP_B6/SRCCLKREQ1# XTAL_OUT OUT 28
R4723
D 1 R4705 2
R4892 I
10K_5%_2 CLK_PCIE_WLAN_DN BD3 CJ1 XCLK_BIASREF 1 2 A C 3 D
47 OUT CLKOUT_PCIE_N2 XCLK_BIASREF
R4930
CLK_PCIE_WLAN_DP BC3 CM3 CLKIN_XTAL_R 1 2 CLKIN_XTAL 60.4_1%_2 D4750
2
I 47 OUT CLKOUT_PCIE_P2 CLKIN_XTAL IN 47
1
20K_1%_1
20K_1%_1
A CF30
47 IN CLKREQ_WLAN# GPP_B7/SRCCLKREQ2# 0_5%_2 BAT54C_30V_0_6A
R4712 2
R4834
R4845
1 BN31 RTCX1
RTCX1 IN 28
10K_5%_2 49 OUT CLK_PCIE_SSD2_DN BH3 CLKOUT_PCIE_N3 RTCX2 BN32 RTCX2 IN 28 SRTC_RST#
A1
35 IN
I 49 OUT CLK_PCIE_SSD2_DP BH4 CLKOUT_PCIE_P3
A CE31 BR37
49 IN CLKREQ_SSD2# GPP_B8/SRCCLKREQ3# SRTCRST#
R4722 2
1 1
2
2
1 RTCRST# BR34
BA1
1K_5%_2
10K_5%_2
I CLKOUT_PCIE_N4
A BA2 CLKOUT_PCIE_P_4 35 IN RTC_RST#
R4798 2
R4832
1 CE30 GPP_B9/SRCCLKREQ4#
10K_5%_2
BE1 I
RTCRST#_0603
I CLKOUT_PCIE_N5 A
1UF_6.3V_1
2
A BE2 CLKOUT_PCIE_P5
P3V3_RTC_BATTERY
1UF_6.3V_1
R4715 2 FOR CMOS RESET IN 5
C4704
1 CF31 GPP_B10/SRCCLKREQ5#
C4769
B4500
10K_5%_2
10 of 20 U4500
WHL QS/CFL/WHL_ES1_CNL U
2
CFG<0> T4 F37
2
CFG_0 RSVD_TP_5
RSVD_TP_6 F34
CFG<1> R4 CFG_1 CP36
CFG<2> T3 CFG_2
IST_TRIG
CN36
C CFG<3> R3 CFG_3
RSVD_TP_12 C
28 IN CFG<4> J4 CFG_4
CFG<5> M4 CFG_5 RSVD_TP_3/RSVD/RSVD_TP_3 BJ36
CFG<6> J3 CFG_6 RSVD_TP_4/RSVD/RSVD_TP_4 BJ34
1 CFG<7> M3 XTAL24_IN 1 R4899 2 I
TP4521 CFG<8> R2
CFG_7
BK34
28 OUT A
28 IN
CFG<4> N2
CFG_8 TP_3
BR18 28 IN XTAL24_OUT 1 R4897 2 22_5%_21 R4751 2
CFG_9 TP_4
1
22_5%_2 200K_1%_2
1K_5%_1
R1 CFG_10
N1 CFG_11 I
R4523
STRAPPING: J2 CFG_12
A
DP ENABLE/DISABLE L2 CFG_13 RSVD_TP_8/RSVD/RSVD_TP_8 BT9 X4751

1 3
J1 CFG_14 RSVD_TP_9/RSVD/RSVD_TP_9 BT8
0 : ENABLED
2
L1 I 4 2 I
10PF_50V_2
10PF_50V_2
CFG_15 A A
1
RSVD_TP_10/RSVD/RSVD_TP_10 BP8
TXC_8Y24000011_10PF
C4801
C4800
L3 CFG_16 RSVD_TP_11/RSVD/RSVD_TP_11 BP9
N3 CFG_18
L4 RSVD_14 CR4
CFG_17
N4
2
CFG_19
RSVD_15 CP3
P1V05A R4519 RSVD_16 CR3
1 2 49.9K_1%_2 AB5 CFG_RCOMP
I
A
B 1 R4841 2 TD_IREF W4 ITP_PMODE B
1.5K_5%_2
CG2 RSVD_8
CG1 RSVD_9
RCOMP NEED CLOSED TO CPU AT 500MIL

AT3
RSVD_TP_13/RSVD/RSVD_TP_13
AU3
28 OUT RTCX2 I
RSVD_TP_1/RSVD/RSVD_TP_1 A
H4 RTCX1 2 R4862 1
H3
RSVD_10 28 IN
RSVD_11 10M_5%_2
AN1 I
BV24 RSVD_2 A
RSVD_12 AN2 X4750
BV25 RSVD_3
RSVD_13 1 2
RSVD_6 AN4
RSVD_7 AN3 32.768KHZ_7PF
5.6PF_50V_2
5.6PF_50V_2
1
1
6018B0045001
IST_TP_0/RSVD/IST_TP_0 AL2 SIT 0606
C4788
C4767
IST_TP_1/RSVD/IST_TP_1 AL1
SRCCLKRQ[5:0]# CAN BE ASSIGNED TO DIFFERENT SRC CLOCKS USING FW SETTINGS AND MAY AL4
2
IST_TRIG_0/RSVD/IST_TRIG_0
NOT NECESSARILY CORRESPOND TO THE SAME PCI EXPRESS CLOCK NUMBER IST_TRIG_1/RSVD/IST_TRIG_1 AL3
BK36 RSVD_18
ROOT PORTS WHILE USING ANY OF THE CLKOUT_SRC_P/NDIFFERENTIAL PAIRS. BK35 TP_2 BP34
A RSVD_17
VSS_1/TP/VSS_1 BP36 A
W3 TP_1 BP35
RSVD_4
AM4 RSVD_5
AM3 RSVD_TP_7/RSVD/RSVD_TP_7
RSVD_TP_2/RSVD/RSVD_TP_2 CR35
INVENTEC
TITLE
E1 SKTOCC#1 TP4522
SKTOCC# A10
Block Diagram
20 of 20 DOC.NUMBER REV
INTEL_J86075_BGA_1528P CHANGE by DATE A3 CS
XXX
PCB P/N <ENG>
60xxxxxxxxxx PCB VER <VER>
A02
03-Oct-2019 SHEET of 28 70
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
I
A
U4500
P3V3A XTAL_FREQ_SELECT (GPP_H21)
LOW: 38.4/19.2MHZ (DEFAULT)
1
CNV_WGR_D0_DN
4.7K_5%_2
47 IN CR30
LANE0 RX CNV_WR_D0N
HIGH: 24MHZ
R4500
CNV_WGR_D0_DP CP30 CN27
47 IN CNV_WR_D0P GPP_H18/CPU_C10_GATE#
CNV_WGR_D1_DN CM30 CM27

LANE1 RX 47 IN CN30
CNV_WR_D1N GPP_H19/TIMESYNC_0
47 IN CNV_WGR_D1_DP CNV_WR_D1P R4501
2
GPP_H21 CF25 1 2
CNV_WT_D0_DN CN32 CN26
LANE0 TX 47 OUT CM32
CNV_WT_D0N GPP_H22
CM26 20K_5%_2_DY
47 OUT CNV_WT_D0_DP CNV_WT_D0P GPP_H23
CK17
D CP33
GPP_F10 P3V3A
47 OUT CNV_WT_D1_DN
LANE1 TX CNV_WT_D1_DP CN33
CNV_WT_D1N
D
47 OUT CNV_WT_D1P
BV35 R4702
GPD7 GPD7 1 2
CNV_WGR_CLK_DN CN31 CN20
47 IN CNV_WR_CLKN GPP_F3
100K_5%_2
RX CLK 47 IN CNV_WGR_CLK_DP CP31 CNV_WR_CLKP
GPP_D4/IMGCLKOUT0/BK4/SBK4 CG25
CNV_WT_CLK_DN CP34 CH25
47 OUT CNV_WT_CLKN GPP_H20/IMGCLKOUT1
TX CLK 47 OUT CNV_WT_CLK_DP CN34 CNV_WT_CLKP
R4503 2 GPP_F12/EMMC_DATA0 CR20
1 CP32 CNV_WT_RCOMP_1 CM20
150_1%_2 CR32 CNV_WT_RCOMP_2
GPP_F13/EMMC_DATA1
GPP_F14/EMMC_DATA2 CN19
CP20 GPP_F0/CNV_PA_BLANKING GPP_F15/EMMC_DATA3 CM19
CK19 GPP_F1 GPP_F16/EMMC_DATA4 CN18
CG17 GPP_F2 GPP_F17/EMMC_DATA5 CR18
GPP_F18/EMMC_DATA6 CP18
CR14 GPP_C8/UART0_RXD GPP_F19/EMMC_DATA7 CM18
CP14 GPP_C9/UART0_TXD
CN14 GPP_C10/UART0_RTS# GPP_F20/EMMC_RCLK CM16
CM14 GPP_C11/UART0_CTS# GPP_F21/EMMC_CLK CP16
GPP_F11/EMMC_CMD CR16
CJ17 GPP_F8/CNV_MFUART2_RXD GPP_F22/EMMC_RESET# CN16
CH17 GPP_F9/CNV_MFUART2_TXD
EMMC_RCOMP CK151 R4507 2
C CF17 GPP_F23/A4WP_PRESENT 200_1%_2 C
75K_1%_2_DY
1
9 of 20
R4931
I
A
2
U4500
HDMI_TX2_DN AL5 AG4 CPU_EDP_TX0_DN

58 OUT HDMI_TX2_DP AL6
DDI1_TXN_0 EDP_TXN_0
AG3 CPU_EDP_TX0_DP OUT 54
58 OUT HDMI_TX1_DN AJ5
DDI1_TXP_0 EDP_TXP_0
AG2 CPU_EDP_TX1_DN OUT 54
58 OUT HDMI_TX1_DP AJ6
AG1 CPU_EDP_TX1_DP OUT 54
58 OUT DDI1_TXP_1 EDP_TXP_1
OUT 54
58 HDMI_TX0_DN AF6 AJ4 CPU_EDP_TX2_DN 54
OUT HDMI_TX0_DP AF5
AJ3 CPU_EDP_TX2_DP OUT
OUT 54
58 HDMI_TXC_DN AE5 AJ2 CPU_EDP_TX3_DN 54
OUT HDMI_TXC_DP AE6
AJ1 CPU_EDP_TX3_DP OUT
OUT 54
50 DP_TX0_DN AC4
IN DP_TX0_DP AC3
DDI2_TXN_0
AH4 CPU_EDP_AUX_DN
B 50 IN DDI2_TXP_0 EDP_AUX#
OUT 54 B
50 DP_TX1_DN AC1
IN DP_TX1_DP AC2
DDI2_TXN_1
EDP_AUX_P AH3 CPU_EDP_AUX_DP OUT 54
50 IN DDI2_TXP_1
50 DP_TX2_DN AE4 AM7
IN DP_TX2_DP AE3
DDI2_TXN_2 DISP_UTILS
50 IN AE1
DDI2_TXP_2
AC7
50 IN DP_TX3_DN DDI2_TXN_3 DDI1_AUX#
DP_TX3_DP AE2 AC6
50 IN DDI2_TXP_3 DDI1_AUX_P
AD4
DDI2_AUX# DP_AUX_DN OUT 50
AD3 DP_AUX_DP
DDI2_AUX_P
AG7
OUT 50
DDI3_AUX#
DDI3_AUX_P AG6
P3V3S
CN6 HDMI_HPDET
GPP_E13/DDPB_HPD0/DISP_MISC0
CM6
IN 29 57
GPP_E14/DDPC_HPD1/DISP_MISC1 DP_HPD IN 29 50
R4612 1 2 RUNSCI0#_3 CP7
BI 29 35 GPP_E15/DPPD_HPD2/DISP_MISC2 HDMI_HPDET 1 R4901 2 100K_5%_2_DY
CP6 57 29 OUT
10K_5%_2 PVCCIO GPP_E16/DPPE_HPD3/DISP_MISC3
CM7 CPU_EDP_HPD DP_HPD 1 R4900 2 100K_5%_2_DY
GPP_E17/EDP_HPD/DISP_MISC4 IN 29 54 50 29 OUT
I CPU_EDP_HPD1 R4611 2
A CK11 LCM_BKLTEN 54 29 OUT 100K_5%_1
1
P3V3S EDP_BKLTEN
CG11
OUT 29 35
R4872 2
EDP_VDDEN LCM_VDDEN OUT 29 54 35 29 OUT LCM_BKLTEN 1 100K_5%_1
R4544 CH11 INV_PWM_3_CPU
EDP_BKLTCTL OUT 54 LCM_VDDEN 1 R4873 2
54 29 OUT 100K_5%_1
HDMI_DDCCLK BI 24.9_1%_2
R4606 1 2 29 57
2.2K_5%_2_DY
A A
2
R4605 1 2 HDMI_DDCDATA
BI 29 57 15MILS
2.2K_5%_2_DY AM6 DISP_RCOMP
GPP_E21
R4607 2 57 29 BI HDMI_DDCCLK CC8 GPP_E18/DPPB_CTRLCLK/CNV_BT_HOST_WAKE#
1 DP_DDC_DATA BI 29 HDMI_DDCDATA CC9
57 29 BI GPP_E19/DPPB_CTRLDATA
2.2K_5%_2
CH4 GPP_E20/DPPC_CTRLCLK
DP_DDC_DATA CH3
29 BI GPP_E21/DPPC_CTRLDATA
35
29 OUT RUNSCI0#_3 CP4
CN4
GPP_E22/DPPD_CTRLCLK
GPP_E23/DPPD_CTRLDATA
INVENTEC
CR26 GPP_H16/DDPF_CTRLCLK TITLE
CP26 GPP_H17/DDPF_CTRLDATA A10
Block Diagram
1 of 20 DOC.NUMBER REV
INTEL_J86075_BGA_1528P SIZE CODE 1310xxxxx-0-0 A02
XXX
<ENG> 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P3V3A
PVCCST
1
100K_5%_2
R4504
I
A
1
1K_5%_2
R4502
2
Q4500
S1 1
2 G1
2
6 VCCST_PWRGD 30
D1
D2 3
OUT
D 35 16 IN EN_PVCORE 5 G2
S2
4 D
2N7002KDW
R4660
P3V3S 1 2
1
100K_5%_2
U4500
R4750
10K_5%_2
BJ35 BJ37 1 TP4510

C 30 OUTPLT_RST# GPP_B13/PLTRST# GPP_B12/SLP_S0# TP24
C
2
SYS_RESET# CN10 BU36 SLP_S3#_IC_3R

BR36
SYS_RESET# GPD4/SLP_S3#
BU27
OUT 30
35 30 IN RSMRST# RSMRST# GPD5/SLP_S4# SLP_S4#_3R OUT 16 17 35
BT29 SLP_S5#_3R
AR2
GPD10/SLP_S5# OUT 17
P3V3A
PROCPWRGD
VCCST_PWRGD 1 R4539 2 VCCST_PG BJ2 BU29
1 TP24
30 IN VCCST_PWRGOOD SLP_SUS#
T4515 1 R4795 2
61.9_1%_2 SLP_LAN# BT31
SYS_PWROK 1 2 0_5%_2 SYS_PWROK_R CR10 BT30 10K_5%_1
2
35 30 IN R4800 SYS_PWROK GPD9/SPL_WLAN#
PCH_PWROK BP31 BU37 D4501
30 IN BP30
PCH_PWROK GPD6/SLP_A#
RSMRST#
NC
35 30 IN DSW_PWROK
BU28
GPD3/PWRBTN# PCH_PWRBTN# 1 3 EC_PWRSW#
IN 35
BV34 GPP_A13/SUSWARN#/SUSPWRDACK GPD1/ACPRESENT BU35 ACPRESENT
30 SUSPWRDNACK R4720 1 2 0_5%_1_DY BY32 BV36 PCH_BATLOW# DIODE-BAT54-TAP-PHP P3V3A
OUT GPP_A15/SUSACK# GPD0/BATLOW#
P3V3_RTC R4781 2
PCIE_WAKE# BU30 1
30
47 IN BU32
WAKE#
BR35 R4833
PCH_GPD2 1M_5%_1 2 1
2
30 IN GPD2/LAN_WAKE# INTRUDER# 10K_5%_2
30 PCH_GPD11 BU34 D4502
IN GPD11/LANPHYPC
CC37 EXT_PWR_GATE#
NC
GPP_B11/EXT_PWR_GATE#
OUT 16
GPP_B2/VRALERT# CC36 1 1 3EC_ACPRESENT 35
TP24TP4541 IN
BT27 1 R4640 2 P3V3A
INPUT3VSEL DIODE-BAT54-TAP-PHP
4.7K_5%_2 R4783 2
1
2
P3V3A 8.2K_5%_1
B 11 of 20 D4500
B
NC
P3V3A 1 3 LOW_BAT#_3
IN 35
2 R4538 1
DIODE-BAT54-TAP-PHP
1 R4746 2 SUSPWRDNACK
OUT 30 100K_5%_2
10K_5%_1_DY P3V3A
1 R4780 2 PCIE_WAKE# C4847

OUT 47
30 1 2
4.7K_5%_1
0.1UF_16V_2_DY
R4592 2 U4701
1 PCH_GPD2
OUT 30 30 IN SLP_S3#_IC_3R 1 B VCC 5
10K_5%_1 2 A
3 GND Y 4 SLP_S3#_3R 16 17 40
35
R4527 2 PCH_GPD11 OUT
1 30
OUT
1
NXP_74LVC1G08GW_TSOT353_5P
10K_5%_1_DY
R4737
1 R4710 2 SYS_PWROK
OUT 30 35 100K_5%_2
10K_5%_2
2
2
D4700
NC
1 3 P3V3A I
A A A
PVCORE_PG 1 R4711 2 PCH_PWROK C4814
56 16 12 IN OUT 30 1 2
DIODE-BAT54-TAP-PHP_DY
1
1
470K_5%_2
0_5%_2
0.1UF_16V_2
2 R4713
C4567 U4814
PLT_RST# 1 R4716 2 1 5
30 IN B VCC
0.022UF_16V_2 0_5%_2 2 A
BUF_PLT_RST#
0.22UF_16V_2_DY
3 4
1
2
GND Y OUT 35 36 47 48 49 60
C4721
SIT 0612
INVENTEC
1
R4714
2
100K_5%_2 TITLE
A10
Block Diagram
2
DOC.NUMBER REV
XXX
<ENG> 03-Oct-2019
A02 SHEET 30 of 70
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 4700~4949(PCH)
P1V05A
C4766
1 2
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
1
1
2.2UF_6.3V_1
C4765 P3V3_RTC
C4726
C4720
C4725
1 2 P1V05A
2.2UF_6.3V_1
D P3V3A
0.1UF_16V_2
C4764
1UF_6.3V_2
I
U4500
1
2
2
A
1 2 D
2.2UF_6.3V_1
C4709
C4710
C4785 BP20 VCCPRIM_1P05_5
1 2 BW16 VCCPRIM_1P05_6 VCCPRIM_3P3_3 CB16 PVCC_ESPI_LPC1 R4858 2
2.2UF_6.3V_1 BW18 VCCPRIM_1P05_7
1.625A SHORT_0402_15
2
C4755 BW19 VCCPRIM_1P05_8
C4742 BY16
1UF_6.3V_2 P1V8A 1 2 VCCPRIM_1P05_9
1 2 CA14 VCCPRIM_1P05_10 VCCRTC BR23
2.2UF_6.3V_1 BY20
1 2 CC15 VCCPRIM_1P8_6
VCCPRIM_1P05_3
C4703
CD15 VCCPRIM_1P8_7 DCPRTC BP24 2 0.1UF_16V_2_DY
1
1UF_6.3V_2 CD16
C4754 CP17
VCCPRIM_1P8_8 P1V05A
VCCPRIM_1P8_9 0.696A
P3V3A VCCPRIM_1P05_4 BR20
1UF_6.3V_2
CB22
1
VCCPRIM_3P3_4
CB23 VCCPRIM_3P3_5 VCCAPLL_1P05_1 BT12
C4762
1UF_6.3V_2 2 1 C4796 CC22 VCCPRIM_3P3_6
CC23 VCCPRIM_3P3_7 0.2A VCCA_BCLK_1P05 BP14
0.1uF_6.3V_1 1 2 C4797 CD22 VCCPRIM_3P3_8
P1V05A CD23 BR14
2
CP29
VCCPRIM_3P3_9 VCCAPLL_1P05_2 P1V05A
VCCPRIM_3P3_10 C4759
BU12 1 2
P1V05A BU15 VCCPRIM_CORE_1
VCCA_SRC_1P05
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
1
1
BU22 L4700
C VCCPRIM_CORE_2 CP5 1UF_6.3V_2 I 1 2 C
47UF_4V_3
BV15 VCCA_XTAL_1P05 A
1
1
VCCPRIM_CORE_3
1UF_6.3V_2
C4708
C4706
C4707
C4735
C4734
C4733
C4730
C4731
C4732
C4787 2.2UH_20%
BV16 VCCPRIM_CORE_4 4.26A
C4702
C4701
10UF_6.3V_21 2 VCCDPHY_1P24_4 BY24
BV18 VCCPRIM_CORE_5 CA24
BV19 VCCDPHY_1P24_5
C4789 VCCPRIM_CORE_6
2
2.2UF_6.3V_11 2 BV20 VCCPRIM_CORE_7 BY23

BV22 VCCDPHY_1P24_1
2
2
VCCPRIM_CORE_8 CA23 C4712
2.2UF_6.3V_1
C4740 BW20 VCCPRIM_CORE_9
VCCDPHY_1P24_2
1 2 VCCDPHY_1P24_3 CP25 2 1
BW22 VCCPRIM_CORE_10
C4741 CA12 VCCPRIM_CORE_11 BT234.7UF_10V_3
2.2UF_6.3V_11 2 CA16 VCCPRIM_CORE_12
VCCDSW_3P3_2 P3V3A
CA18 VCCPRIM_CORE_13 P1V05A
C4757 CA19 VCCA_19P2_1P05 BR12
VCCPRIM_CORE_14
1 2 CA20
1UF_6.3V_2 2 1 C4772 VCCPRIM_CORE_15
2.2UF_6.3V_1 CB12 VCCPRIM_CORE_16 P1V8A
C4756 CB14
1 2 P1V05A 1 2 CB15
VCCPRIM_CORE_17
0.1UF_16V_2 C4773 VCCPRIM_CORE_18
2.2UF_6.3V_1 VCCPRIM_1P8_1 CC18
C4751 P1V05A 2 1 BT24 VCCDSW_1P05 VCCPRIM_1P8_2 CC19
1 2 1UF_6.3V_2 C4771 VCCPRIM_1P8_3 CD18
2.2UF_6.3V_1 BU14 VCCAPLL_1P05_4 VCCPRIM_1P8_4 CD19 P3V3A
C4750 VCCPRIM_1P8_5 CP23
1 2 BV12 VCCPRIM_MPHY_1P05_2
B 2.2UF_6.3V_1 BW12 VCCPRIM_MPHY_1P05_3 VCCPRIM_3P3_2 BW23 B
C4737 BW14 VCCPRIM_MPHY_1P05_4
10UF_6.3V_21 2
P1V05A BY12 VCCPRIM_MPHY_1P05_5
BY14 VCCPRIM_MPHY_1P05_6
P1V05A P1V05A C4752 2 1 BV2 BP23

VCCAMPHYPLL_1P05 VCCPRIM_3P3_1
1UF_6.3V_2
BR15 VCCAPLL_1P05_3 GPP_B0/CORE_VID0 CB36 1
TP4712
1
1 C4739 2 GPP_B1/CORE_VID1 CB35 1

2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
CC12 TP4713
2.2UF_6.3V_1 VCCDUSB_1P05
C4780
C4781
C4782
C4783
C4784
C4791
1 C4786 2
P3V3A 2.2UF_6.3V_1 BR24 VCCDSW_3P3_1
C4728 2 1
2
1UF_6.3V_2 BT20 VCCHDA
P3V3A C4705
BV23
2 1 VCCSPI
1UF_6.3V_2
BT18 VCCPRIM_1P05_11
1
2.2UF_6.3V_1 2 C4738
BT19 VCCPRIM_1P05_12
1
2.2UF_6.3V_1 2 C4700 BU18
P3V3A P1V05A BU19
VCCPRIM_1P05_13
31 IN SPI_VCC VCCPRIM_1P05_14
BT22 VCCPRIM_1P05_1
BP22 VCCPRIM_1P05_2
A P1V05A A
0.1UF_16V_2
1
1
1UF_6.3V_2
R4860 BV14 VCCPRIM_MPHY_1P05_1

1 2 SPI_VCC OUT 31
C4794
C4795
16 of 20
1
SHORT_0402_15
10UF_6.3V_2
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
1
1
2
2
C4777
C4779
C4792
C4669
C4682
C4683
C4736
P1V05A
C4790
2
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
1
1
2
INVENTEC
C4746
C4768
C4774
TITLE
2
A10
Block Diagram
DOC.NUMBER REV
XXX
<ENG> PCB VER <VER>
A02
03-Oct-2019 SHEET of 31 70
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
32 A
10UF X11 PCS PVCORE PVCORE
I
4.7UF X14 PCS A
2.2UF X4 PCS
U4500
6
1UF X3 PCS
AN9 AW24
_
VCCCORE_28 VCCCORE_67
AN10 VCCCORE_29 VCCCORE_68 AW25
D
10UF_6.3V_3_DY
10UF_6.3V_3_DY
10UF_6.3V_3_DY
10UF_6.3V_3_DY
10UF_6.3V_3_DY
10UF_6.3V_3_DY
10UF_6.3V_3_DY
10UF_6.3V_3_DY
0 .3V_3_DY
AN24 VCCCORE_30 VCCCORE_69 AW26 I I I
D
F
10UF_6.3V_3
10UF_6.3V_3
AN26 AW27 A A A
1uF_6.3V_2
1
1
1UF_6.3V_1
1UF_6.3V_1
1
1
AN27 VCCCORE_32 VCCCORE_71 AY24
C4609
C4601
C4605
C4540
C4547
C4513
C4506
C4501
C4507
C4511
C4509
C4572
C4614
C4616
AP2 AY26
U
AP9 VCCCORE_34 VCCCORE_73 BA5
AP24 VCCCORE_35 VCCCORE_74 BA7
AP26 BA8
2
2
2
AR5 VCCCORE_37 VCCCORE_76 BA25
AR6 BA27
1
AR7 BB2
SIT2 0730 AR8
VCCCORE_39
VCCCORE_40
VCCCORE_78
VCCCORE_79 BB26
AR10 VCCCORE_41 VCCCORE_80 BC5
C4763,C4507,C4501,C4506,C4513 AR25 VCCCORE_42 VCCCORE_81 BC6
4.7UF_6.3V_2
2.2UF_6.3V_1
2.2UF_6.3V_1
4.7UF_6.3V_2
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
4.7UF_6.3V_2
2.2UF_6.3V_1
AR27 BC7
1
1
C4547,C4540,C4511,C4509,C4601 AT9 VCCCORE_44 VCCCORE_83 BC9
C4600
C4610
C4603
C4550
C4500
C4503
C4502
C4523
C4599
C4504
AT24 VCCCORE_45 VCCCORE_84 BC10
C4609,C4744,C4760,C4743 AT26 VCCCORE_46 VCCCORE_85 BC26
AU5 VCCCORE_47 VCCCORE_86 BC27
BOM CHANGE TO OPEN AU6 BD5
2
2
AU7 VCCCORE_49 VCCCORE_88 BD8
C AU25 VCCCORE_53 VCCCORE_92 BE9 C
AU26 VCCCORE_54 VCCCORE_93 BE24
2.2UF_6.3V_1
2.2UF_6.3V_1
4.7UF_6.3V_2
2.2UF_6.3V_1
2.2UF_6.3V_1 AU27 BE25

1
I I I I VCCCORE_55 VCCCORE_94
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
A A A A AV2 BE26
1
C4608
C4613
C4606
C4607
I PVCCST
C4685
AV5 VCCCORE_57 VCCCORE_96 BE27 A
C4551
C4543
C4541
C4524
AV7 VCCCORE_58 VCCCORE_97 BF2 R45281 2 56_1%_2
AV10 BF9 32 12 IN VR_SVID_ALERT#
AV27 BF24 VR_SVID_DATA R45291 2 100_1%_2
2
VCCCORE_60 VCCCORE_99 32 12 IN
AW5 BF26
2
AW6 VCCCORE_62 VCCCORE_101 BG27
AW7 VCCCORE_63
AW8 AN6 VCCSENSE
PVCORE PVCORE AW9
VCCCORE_64 VCC_SENSE
AN5 VSSSENSE
OUT 12 32
10UF X5 PCS AW10
VCCCORE_65 VSS_SENSE I
A OUT 12 32
VCCCORE_66
AA3 1 R4525 2
10UF_6.3V_3_DY
10UF_6.3V_3_DY
10UF_6.3V_3_DY
10UF_6.3V_3_DY
VR_SVID_ALERT#
10UF_6.3V_3
VIDALERT# OUT 12 32
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
BB9 PVCORE
1
1
RSVD_61 220_1%_2
BC24 AA1 VR_SVID_CLK
RSVD_62 VIDSCK OUT 12
C4761
C4651
C4652
C4653
C4654
C4655
C4656
C4657
C4658
C4548
C4763
C4760
C4743
C4744
AY9 RSVD_63 I
BB24 AA2 VR_SVID_DATA A
RSVD_64 VIDSOUT OUT 12 32
R4572
VCCSENSE 1 2
Y3 32 12 IN
2
RSVD_65
100_1%_2
I
BG3 A
B VCCSTG_3 VCCSTG R4588 B
VSSSENSE 1 2
32 12 IN
12 of 20
100_1%_2
PVCORE 22UF X13 PCS

I I I I I I I I I I I I I I I I I I I I I I I I I I
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
A A A A A A A A A A A A A A A A A A A A A A A A A A
1
1
C4749
C4745
C4758
C4618
C4518
C4611
C4615
C4748
C4753
C4565
C4566
C4542
C4544
C4808
C4809
C4810
C4811
C4817
C4818
C4819
C4820
C4821
C4831
C4835
C4836
C4837
2
2
A A
PVCORE
47UF X6 PCS
I I I I I I I I I I I I I I I I I I I I I I I I
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
A A A A A A A A A A A A A A A A A A A A A A A A
1
1
C4638
C4770
C4778
C4505
C4747
C4602
C4650
C4637
C4604
C4805
C4806
C4807
C4824
C4823
C4822
C4827
C4826
C4825
C4828
C4829
C4830
C4832
C4833
C4834
INVENTEC
2
TITLE
A10
MCP10-POWER
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PVCCSA
ROUTE VCCSENSE WITH 27.4OHM IMPEDANCE
1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
PVCCGT PVCCSA
C4673
C4674
C4675
C4676
C4677
C4678
C4684
2.2UF_6.3V_1
4.7UF_6.3V_2
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
4.7UF_6.3V_2
4.7UF_6.3V_2
4.7UF_6.3V_2
I I
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
0.1UF_16V_2
0.1UF_16V_2
1
A A
1
C4636
C4639
C4635
C4634
C4633
C4632
C4631
C4630
C4640
C4668
C4667
C4666
C4665
C4664
C4663
C4662
C4661
C4660
C4649
C4659
C4648
C4647
C4646
C4645
C4644
C4643
C4642
C4641
C4575
C4576
2
1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
C4545
C4539
C4538
C4537
C4536
C4546
2
2
2
31 A
I
2
A
PVCCGT P1V2 U4500
PVCCIO
PVCCGT
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
AK24
1
AD36 VCCIO_OUT_1
D U4500 VDDQ_1 AK26
C4622
C4623
C4625
C4619
C4626
C4627
C4628
C4629
AH32 VCCIO_OUT_2
VDDQ_2
VCCIO_OUT_3 AL24 D
WHL QS/CFL/WHL_ES1_CNL U AH36 VDDQ_3 AL25
A5 H12 I I I I I I AM36 VCCIO_OUT_4
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
VCCGT_1 VCCGT_60 A A A A A A VDDQ_4 AL26
1
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
C4991
A6 H14 AN32 VCCIO_OUT_5
1
1
VCCGT_2 VCCGT_61
IA
VDDQ_5 AL27
1
1uF_6.3V_2
2.2UF_6.3V_1
2
C4527
C4515
C4528
C4516
C4525
C4526
C4990
A8 H15 AW32 VCCIO_OUT_6
VCCGT_3 VCCGT_62 VDDQ_6
C4552
C4581
C4578
C4579
C4580
VCCIO_OUT_7 AM25
A11 VCCGT_4 VCCGT_63 H17 AY36 VDDQ_7 AM27
A12 H18 BE32 VCCIO_OUT_8
VCCGT_5 VCCGT_64 VDDQ_8 BH24
2
A14 H20 BH36 VCCIO_OUT_9
2
2
2
A15 J7 R32 VCCIO_OUT_10
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2
2
1
A17 VCCGT_8 VCCGT_67 J8 Y36 VDDQ_11
VCCIO_OUT_11
BH27
C4514
C4517
C4512
C4508
C4519
C4530
C4532
A18 VCCGT_9 VCCGT_68 J11 VCCIO_OUT_12
A20 J14 VCCIO_OUT_13 BJ24
VCCGT_10 VCCGT_69 BJ26
B3 VCCGT_11 VCCGT_70 J17 VCCIO_OUT_14
PVCCST VCCIO_OUT_15 BP16
B4 VCCGT_12 VCCGT_71 J20 BC28 RSVD_60 BP18 PVCCSA
2
VCCIO_OUT_16
B6 VCCGT_13 VCCGT_72 K2
B8 VCCGT_14 VCCGT_73 K11 C4612 BP11 VCCST_2 BG8
A
I
B11 L7 BP2 VCCSA_1
VCCGT_15 VCCGT_74 1 2 VCCST_1 BG10
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
B14 L8 VCCSA_2
1
VCCGT_16 VCCGT_75 VCCSTG 1UF_6.3V_1 VCCSA_3 BH9

B17 L10
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
C4582
C4577
C4568
C4510
C4521
C4520
VCCGT_17 VCCGT_76 BJ8
1
B20 M9 BG1 VCCSA_4
VCCGT_18 VCCGT_77 VCCSTG_1 BJ9
VCCSA_5
C4522
C4533
C4531
C4535
C4534
C4549
C4620
C4621
C2 N7 BG2
C3
VCCGT_19 VCCGT_78
N8 P1V2 VCCSTG_2
VCCSA_6 BJ10
VCCGT_20 VCCGT_79 I BK8
C6 N9 A BL27 VCCSA_7
1
1UF_6.3V_1
2
VCCGT_21 VCCGT_80 VCCPLL_OC_1 BK25

C C7 N10 I BM26 VCCSA_8 C
C4992
VCCGT_22 VCCGT_81 A PVCCST VCCPLL_OC_2 BK27
1UF_6.3V_1
2
C8 P2 VCCSA_9
VCCGT_23 VCCGT_82 BL8
C11 P8 BR11 VCCSA_10
C4557
VCCGT_24 VCCGT_83 VCCPLL_1 BL9
C12 R9 I BT11 VCCSA_11
VCCGT_25 VCCGT_84 A VCCPLL_2 BL10
1UF_6.3V_1
C14 T8 VCCSA_12
2
VCCGT_26 VCCGT_85 BL24
VCCSA_13
C4993
C15 VCCGT_27 VCCGT_86 T9
BL26
2
C17 T10 VCCSA_14
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
VCCGT_28 VCCGT_87 BM24

1
C18 U8 VCCSA_15
VCCGT_29 VCCGT_88
VCCSA_16 BN25
C4594
C4593
C4592
C4589
C4584
C4583
C20 VCCGT_30 VCCGT_89 U10
2
D4 VCCGT_31 VCCGT_90 V9 P1V2 BP28
D7 W8 VCCIO_SENSE
VCCGT_32 VCCGT_91 BP29
D11 W9 VSSIO_SENSE
VCCGT_33 VCCGT_92 I I I
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
2
D12 AA9 A A A
1
VCCGT_34 VCCCORE_1/VCCGT_93/VCCGT_93 BE7
D14 AB2 VSSSA_SENSE VCCSA_VSSSENSE IN 12 33 PVCCSA
2.2UF_6.3V_1
2.2UF_6.3V_1
2.2UF_6.3V_1
VCCGT_35 VCCCORE_2/VCCGT_94/VCCGT_94
C4802
C4803
C4804
C4816
C4844
C4843
BG7 VCCSA_VCCSENSE
D15 VCCGT_36 VCCCORE_3/VCCGT_95/VCCGT_95 AB8 VCCSA_SENSE IN 12 33
D17 VCCGT_37 VCCCORE_4/VCCGT_96/VCCGT_96 AB9 14 of 20 I
D18 AB10 A
VCCGT_38 VCCCORE_5/VCCGT_97/VCCGT_97 INTEL_J86075_BGA_1528P VCCSA_VCCSENSE1 R4585
D20 AC8 33 12 2
2
E4 AD9
OUT
F5 AE8 100_1%_2
I
VCCGT_41
VCCCORE_8/VCCGT_100/VCCGT_100 A
F6 VCCGT_42
VCCCORE_9/VCCGT_101/VCCGT_101 AE9 VCCSA_VSSSENSE1 R4586 2
F7 VCCGT_43
VCCCORE_10/VCCGT_102/VCCGT_102 AE10 PVCCIO A
I 33 12 OUT
F8 AF2 100_1%_2
B I I I I I VCCGT_44
VCCCORE_11/VCCGT_103/VCCGT_103 B
4.7UF_6.3V_2
4.7UF_6.3V_2
4.7UF_6.3V_2
4.7UF_6.3V_2
4.7UF_6.3V_2
A A A A A
F11 AF8
1
VCCGT_45
VCCCORE_12/VCCGT_104/VCCGT_104
F14 VCCGT_46
VCCCORE_13/VCCGT_105/VCCGT_105 AF10
C4573
C4574
C4590
C4591
C4585
I I I I I I I I I
F17 AG8
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
VCCGT_47
VCCCORE_14/VCCGT_106/VCCGT_106 A A A A A A A A A U4500
1
1
1UF_6.3V_1
1UF_6.3V_1
1uF_6.3V_2
F20 VCCGT_48
VCCCORE_15/VCCGT_107/VCCGT_107 AG9
WHL QS/CFL U/WHL ES1_CNL U22
C4680
C4681
C4679
C4812
C4813
C4815
G11 VCCGT_49
VCCCORE_16/VCCGT_108/VCCGT_108 AH9
C4672
C4671
C4670
G12 AJ8 K12 RSVD_25/VCC_OPC_1/RSVD_25 RSVD_39/VCCEOPIO_1/RSVD_39 AA24
2
VCCGT_50
VCCCORE_17/VCCGT_109/VCCGT_109 K14 AA26
G14 VCCGT_51
VCCCORE_18/VCCGT_110/VCCGT_110 AJ10 RSVD_26/VCC_OPC_2/RSVD_26 RSVD_40/VCCEOPIO_2/RSVD_40
G15 AK2 K15 RSVD_27/VCC_OPC_3/RSVD_27 RSVD_41/VCCEOPIO_3/RSVD_41 AB25
VCCGT_52
VCCCORE_19/VCCGT_111/VCCGT_111 K17 AC24
2
2
G17 AK9 RSVD_28/VCC_OPC_4/RSVD_28 RSVD_42/VCCEOPIO_4/RSVD_42
VCCGT_53
VCCCORE_20/VCCGT_112/VCCGT_112 K18 AC25
RSVD_29/VCC_OPC_5/RSVD_29 RSVD_43/VCCEOPIO_5/RSVD_43
G18 VCCGT_54
VCCCORE_21/VCCGT_113/VCCGT_113 AL8 K20 AC26
G20 AL9 RSVD_30/VCC_OPC_6/RSVD_30 RSVD_44/VCCEOPIO_6/RSVD_44
VCCGT_55
VCCCORE_22/VCCGT_114/VCCGT_114 L25 AD24
H5 AL10 RSVD_31/VCC_OPC_7/RSVD_31 RSVD_45/VCCEOPIO_7/RSVD_45
VCCGT_56
VCCCORE_23/VCCGT_115/VCCGT_115 M24 AD26
H6 AM8 RSVD_32/VCC_OPC_8/RSVD_32 RSVD_46/VCCEOPIO_8/RSVD_46
H7
VCCGT_57
VCCCORE_24/VCCGT_116/VCCGT_116
V2 PVCORE M26 RSVD_33/VCC_OPC_9/RSVD_23RSVD_19/VCCEOPIO_SENSE/RSVD_19 V25
VCCGT_58
VCCCORE_25/VCCGT_117/VCCGT_117 P24 T25
H8 Y8 RSVD_34/VCC_OPC_10/RSVD_34
RSVD_20/VSSEOPIO_SENSE/RSVD_20
VCCGT_59
VCCCORE_26/VCCGT_118/VCCGT_118 P26 A35
H11 Y10 RSVD_35/VCC_OPC_11/RSVD_35 RSVD_56
VCCGT_0
VCCCORE_27/VCCGT_119/VCCGT_119 R24 D34
RSVD_36/VCC_OPC_12/RSVD_36 RSVD_57
VCCGT_SENSE E3 VGT_VCCSENSE 12 33 R25 N5
D2 VGT_VSSSENSE
IN R26
RSVD_37/VCC_OPC_13/RSVD_37 RSVD_58/OPC_RCOMP/RSVD_58
VSSGT_SENSE
IN 12 33 I I RSVD_38/VCC_OPC_14/RSVD_38
A A V24
1
1
RSVD_21/VCC_OPC_1P8_3/RSVD_21
2.2UF_6.3V_2
2.2UF_6.3V_2 W25 RSVD_22/VCC_OPC_1P8_4/RSVD_22

C4561
C4617
13 of 20
Y24 RSVD_23/VCC_OPC_1P8_1/RSVD_23
INTEL_J86075_BGA_1528P Y25 RSVD_24/VCC_OPC_1P8_2/RSVD_24
G2 RSVD_47
A PVCCGT G1 A
2
RSVD_48
I C34 RSVD_49/VSS_435/RSVD_49
A
G3 RSVD_50/VSS_436/RSVD_50
R4580 2
33 12 OUT VGT_VCCSENSE
1 G4
A34
RSVD_51/VSS_437/RSVD_51
100_1%_2 RSVD_52/RSVD_TP/RSVD_52
I B35
A RSVD_53/RSVD_TP/RSVD_53
R4581 2 AJ27 RSVD_54/MSM#/RSVD_54
1
33 12 OUT VGT_VSSSENSE AH26 RSVD_55/ZVM#/RSVD_55
100_1%_2 L5 RSVD_59/OPCE_RCOMP/RSVD_59
15 of 20
INVENTEC
TITLE
A10
REFERENCE:4500~4949 SIZE CODE
MCP10-POWER
DOC.NUMBER REV
1310xxxxx-0-0 A02
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
I I
A I A
A
U4500 U4500
U4500
CR34 VSS_342 VSS_330 BL7 BT35 VSS_277 VSS_180 BY25 N6 VSS_66 VSS_99 CF23
D BT5 VSS_351 VSS_337 AE25 D6 VSS_290 VSS_183 J18 B37 VSS_73 VSS_106 V4
BY5 VSS_361 VSS_345 BM33 AL32 VSS_156 VSS_186 AU32 CB3 VSS_79 VSS_115 BE30 D
CP35 VSS_371 VSS_354 CM5 BT36 VSS_165 VSS_245 BY28 P10 VSS_84 VSS_126 CF28
CM37 VSS_381 VSS_364 AE27 D8 VSS_172 VSS_257 J21 B5 VSS_89 VSS_139 W10
CK37 VSS_391 VSS_374 BM35 AL7 VSS_208 VSS_270 AV25 CB33 VSS_95 VSS_8 BE31
AW1 VSS_401 VSS_384 CM9 D9 VSS_217 VSS_284 BY33 P3 VSS_102 VSS_19 CF3
CM1 VSS_411 VSS_302 AE30 AM10 VSS_227 VSS_151 J24 B7 VSS_110 VSS_29 W27
BD6 VSS_421 VSS_308 BM36 BU11 VSS_238 VSS_161 AV28 CB4 VSS_120 VSS_83 CF4
AY4 VSS_360 VSS_315 CN13 E23 VSS_250 VSS_169 BY35 P33 VSS_132 VSS_87 W30
B34 VSS_370 VSS_322 AE7 AM28 VSS_263 VSS_175 J33 B9 VSS_145 VSS_92 BF3
E35 VSS_380 VSS_329 BM9 E27 VSS_276 VSS_179 AV3 CB7 VSS_14 VSS_98 CG33
A4 VSS_390 VSS_336 CN17 AM33 VSS_289 VSS_182 BY36 P36 VSS_25 VSS_105 W7
AE24 VSS_400 VSS_344 AF27 BU23 VSS_155 VSS_233 J36 BA10 VSS_35 VSS_114 BF33
AE26 VSS_410 VSS_353 BN30 E29 VSS_164 VSS_244 AV33 CC11 VSS_44 VSS_125 CG7
AF25 VSS_420 VSS_363 CN21 AM35 VSS_200 VSS_256 J6 P4 VSS_52 VSS_138 BF36
AG24 VSS_428 VSS_373 AF3 BU24 VSS_207 VSS_269 AV36 BA28 VSS_59 VSS_7 Y26
AG26 VSS_434 VSS_295 BN7 E31 VSS_216 VSS_283 C1 P7 VSS_65 VSS_18 BF4
AH24 VSS_296 VSS_301 CN25 BU25 VSS_226 VSS_150 K21 BA3 VSS_72 VSS_77 CH31
AH25 VSS_350 VSS_307 AF30 E33 VSS_237 VSS_160 AV4 CC20 VSS_78 VSS_82 Y27
B2 VSS_359 VSS_314 CN29 AN25 VSS_249 VSS_168 C21 R27 VSS_131 VSS_86 BG25
B36 VSS_369 VSS_321 AF33 BU7 VSS_262 VSS_174 K22 BB3 VSS_144 VSS_91 Y30
C36 VSS_379 VSS_328 BP15 E9 VSS_275 VSS_178 AV6 CC25 VSS_13 VSS_97 BG28
C37 VSS_389 VSS_335 AF36 AN28 VSS_288 VSS_222 C25 R28 VSS_24 VSS_104 CJ11
C CN1 VSS_399 VSS_343 AF4 BV11 VSS_154 VSS_232 K24 BB33 VSS_34 VSS_113 Y33 C
CN2 VSS_409 VSS_352 CN5 F12 VSS_194 VSS_243 AV8 CC28 VSS_43 VSS_124 CJ14
CN37 VSS_419 VSS_362 AF7 AN29 VSS_199 VSS_255 C29 R29 VSS_51 VSS_137 Y35
CP2 VSS_427 VSS_416 BP25 F15 VSS_206 VSS_268 K25 BB36 VSS_58 VSS_6 BH28
D1 VSS_433 VSS_425 CN9 AN30 VSS_215 VSS_282 AW28 CC31 VSS_64 VSS_70 CJ19
A32 VSS_341 VSS_432 AG10 F18 VSS_225 VSS_149 C33 R30 VSS_71 VSS_76 Y7
F33 VSS_349 VSS_294 BP3 AN31 VSS_236 VSS_159 K27 BB4 VSS_119 VSS_81 BH29
A3 VSS_358 VSS_300 CP1 BV3 VSS_248 VSS_167 AW29 CC7 VSS_130 VSS_85 CJ23
BJ7 VSS_368 VSS_306 BP32 F2 VSS_261 VSS_173 C4 R31 VSS_143 VSS_90 BH32
CJ36 VSS_378 VSS_313 CP11 AN7 VSS_274 VSS_212 K28 BC25 VSS_12 VSS_96 CJ28
A36 VSS_388 VSS_320 AH27 BV31 VSS_287 VSS_221 AW3 CD11 VSS_23 VSS_103 BH33
BK10 VSS_398 VSS_327 BP33 F21 VSS_189 VSS_231 C9 T27 VSS_33 VSS_112 CJ33
CJ4 VSS_408 VSS_334 CP13 AN8 VSS_193 VSS_242 K29 CD12 VSS_42 VSS_123 BH35
AB27 VSS_418 VSS_405 AH28 BV33 VSS_198 VSS_254 AW30 T30 VSS_50 VSS_136 CJ35
BK2 VSS_426 VSS_415 BP4 F24 VSS_205 VSS_267 CA11 BC29 VSS_57 VSS_5 BP19
CK1 VSS_333 VSS_424 CP15 BV4 VSS_214 VSS_281 K3 CD14 VSS_63 VSS_17 BR16
AB3 VSS_340 VSS_431 AH29 F3 VSS_224 VSS_148 AW31 T33 VSS_109 VSS_28 BY18
BK28 VSS_348 VSS_293 BP7 AP3 VSS_235 VSS_158 CA15 T35 VSS_118 VSS_38 BY19
AB30 VSS_357 VSS_299 CP19 BW11 VSS_247 VSS_166 K30 BC32 VSS_129 VSS_47 CC16
BK3 VSS_367 VSS_305 AH30 F4 VSS_260 VSS_203 AY33 CD24 VSS_142 VSS_55 BU16
CK4 VSS_377 VSS_312 CP21 AP33 VSS_273 VSS_211 CA22 T36 VSS_11 VSS_62 CC14
AB33 VSS_387 VSS_319 AH31 BW15 VSS_185 VSS_220 K31 CD25 VSS_22 VSS_69 BR22
BK33 VSS_397 VSS_326 BR19 G21 VSS_188 VSS_230 AY35 T7 VSS_32 VSS_75 BU20
B CK7 VSS_407 VSS_394 CP27 AP36 VSS_192 VSS_241 K32 BC8 VSS_41 VSS_80 CD20 B
AB36 VSS_417 VSS_404 AH33 G27 VSS_197 VSS_253 B12 CE33 VSS_49 VSS_135 BT14
BK4 VSS_325 VSS_414 BR25 AP4 VSS_204 VSS_266 K4 U26 VSS_56 VSS_4 BP12
CL2 VSS_332 VSS_423 AH35 G33 VSS_213 VSS_280 B15 BD28 VSS_101 VSS_16 CB24
AB4 VSS_339 VSS_430 CP37 AR28 VSS_223 VSS_147 CA25 CE35 VSS_108 VSS_27 CC24
BK7 VSS_347 VSS_292 AJ25 G35 VSS_234 VSS_157 K9 U7 VSS_117 VSS_37 J5
CM13 VSS_356 VSS_298 BT15 G36 VSS_246 VSS_196 B18 BD33 VSS_128 VSS_46 U24
AB7 VSS_366 VSS_304 AJ28 AT33 VSS_259 VSS_202 CB11 CE36 VSS_141 VSS_54 BD7
BL25 VSS_376 VSS_311 BT16 BW24 VSS_272 VSS_210 L27 V26 VSS_10 VSS_61 AR4
CM17 VSS_386 VSS_318 CP9 G9 VSS_286 VSS_219 B21 BD35 VSS_21 VSS_68 AU4
AC10 VSS_396 VSS_383 AJ7 AT35 VSS_153 VSS_229 L33 CE7 VSS_31 VSS_74 AW4
BL28 VSS_406 VSS_393 CR2 H21 VSS_163 VSS_240 B23 V27 VSS_40 VSS_122 BA6
CM21 VSS_317 VSS_403 AK3 AT36 VSS_171 VSS_252 L35 BD36 VSS_48 VSS_134 BC4
AC27 VSS_324 VSS_413 CR36 BW7 VSS_177 VSS_265 B25 CF11 VSS_94 VSS_3 BE4
BL29 VSS_331 VSS_422 AK33 H27 VSS_181 VSS_279 CB18 V3 VSS_100 VSS_15 BE8
CM25 VSS_338 VSS_429 D21 AT4 VSS_184 VSS_146 L36 BE10 VSS_107 VSS_26 BA4
AC30 VSS_346 VSS_291 AK36 BY11 VSS_187 VSS_190 B27 CF14 VSS_116 VSS_36 BD4
BL30 VSS_355 VSS_297 BT25 AU10 VSS_191 VSS_195 CB19 V30 VSS_127 VSS_45 BG4
CM29 VSS_365 VSS_303 D25 BY15 VSS_258 VSS_201 L6 BE28 VSS_140 VSS_53 CJ2
BL31 VSS_375 VSS_310 AK4 H9 VSS_271 VSS_209 B29 CF19 VSS_9 VSS_60 CJ3
CM31 VSS_385 VSS_372 BT28 AU28 VSS_285 VSS_218 CB2 V33 VSS_20 VSS_67 AM5
AD33 VSS_395 VSS_382 AL28 BY22 VSS_152 VSS_228 N25 BE29 VSS_30 VSS_111 CM4
BL32 VSS_309 VSS_392 BT33 J12 VSS_162 VSS_239 B31 CF2 VSS_39 VSS_121 AC5
CM33 VSS_316 VSS_402 D5 AU29 VSS_170 VSS_251 CB20 V36 VSS_88 VSS_133 AG5
A AD35 VSS_323 VSS_412 AL29 J15 VSS_176 VSS_264 N27 BE3 VSS_93 VSS_2 CR6 A
VSS_278 CB25
17 of 20 19 of 20
18 of 20
INTEL_J86075_BGA_1528P INTEL_J86075_BGA_1528P
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX
<ENG> 03-Oct-2019
A02 SHEET 34 of 70
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 300~389(KBC)
P3V3AL P3V3AL_VCC P3V3S
SIP
CLOSE PIN4
R318 P3V3_LDO
1 2 P3V3AL_VCC P3V3AL_AVCC
10UF_6.3V_3_DY
10UF_6.3V_3
P3V3AL
0.1UF_6.3V_1
0.1UF_6.3V_1
0.1UF_6.3V_1
0.1UF_6.3V_1
0.1UF_16V_2
0.1UF_16V_2
1
1
2.2_5%_3
1
P3V3S
0.1UF_6.3V_1
0.1UF_6.3V_1
F F
1
C313
C300
C301
C302
C303
C304
C312
C306
1
FOR ESD PROTECT
C308
C316
R320
2
47K_5%_2
115
102
114
19
46
76
88
75
4
2
VCC_POR# OUT 35
U301
VCC1
VCC2
VCC3
VCC4
VCC5
VSBY
VDD
VBKUP
AVCC
P3V3AL P3V3AL_AVCC
L300 5 HW_I_ADC 97 GPIO90/AD0 LRESET#/GPIOF7 7 BUF_PLT_RST# 30 36 47 48 49 60

1 2 IN LID_SW#_3 98 2 LPC_ESPI_CLK
IN
37 24
IN GPIO91/AD1 LCLK/GPIOF5
LFRAME#_ESPI_CS#
BI
5 IN BATT_IN 99 GPIO92/AD2 LFRAME#/GPIOF6 3 BI 24 36
10UF_6.3V_3_DY
BLM15AG121SN1D_500MA 100 1
0.1UF_16V_2
DPTF_THERMAL_SEN LPC_ESPI_IO3
1
1
35
IN GPIO93/AD3 LAD3/GPIOF4
BI 24 36 P3V3S
EC_BKLTEN 108 128 LPC_ESPI_IO2
54 OUT GPIO05/AD4 LAD2/GPIOF3
LPC_ESPI_IO1
BI 24 36
C314
C305
29 LCM_BKLTEN 96 GPIO04/AD5 LAD1/GPIOF2 127 24 36
IN 5V0_PG 95 126 LPC_ESPI_IO0
BI
10K_5%_2
7 24 36
IN GPIO03/EXT_PURST#/AD6 LAD0/GPIOF1
125 PCI_3S_SERIRQ
BI
SERIRQ/GPIOF0
PCI_3S_CLKRUN#
BI 24
R326
2 30 16 EN_PVCORE 101 8 24
2
GPIO94/DA0 GPIO11/CLKRUN#
OUT GPU_OVERT_EC# 105 9 H_PROCHOT_EC
OUT
69 35
P3V3S IN GPIO95/DA1 GPIO65/SMI#
RUNSCI0#_3
OUT
40
30 17 16 IN SLP_S3#_3R 106 GPIO96/DA2 ECSCI#/GPIO54 29 OUT 29
37 KB_LED_OFF# 107 124 DCP_EC_CTL 45
2
GPIO97/DA3 GPIO10/LPCPD#
OUT 121 EC_CTL2
OUT
GPIO85/GA20 OUT 42 43
KBRST#
AGND_KBC 122
1
KBRST#/GPIO86 24
BTIFON 6 OUT
R350 47
OUT GPIO24
18.7K_1%_2 64 OUT GPU_THROT#_EC 26 GPIO51/TA3/N2TCK
E GPIO52/PSDAT3 27 EC_SM_INT 35 52 E
25 RSMRST#
IN
FOR DPTF P3V3_LDO GPIO50/PSCLK3
RTC_RST_EC
OUT 30 35
11 35
2
GPIO27/PSDAT2
TMSN 104 10 OUT
P3V3RTC_RST_EC OUT P3V3S
35 35
DPTF_THERMAL_SEN
OUT 35 IN GPIO80/VD_IN1 GPIO26/PSCLK2
IM_DATA_5
35 IN VSN 94 GPIO07/AD7/VD_IN2 GPIO35/PSDAT1 71 OUT 35 37
110 GPIO82/IOX_LDSH/VD_OUT1 GPIO37/PSCLK1 72 IM_CLK_5 35 37
BI
100K_5%_1
1
10K_5%_2
1
1
EC_MUTE# 112 IM_DATA_5 R3062 147K_5%_2

40 38 OUT GPIO84/IOX_SCLK/VD_OUT2 37 35 BI
C350 37 35 IM_CLK_5 R3072 147K_5%_2
R355
BI
R301
R351 47 35 CNVI_PWR_EN# 117 70 EC_SMB1_CLK 5 35
100K_1%_NTC CSC0402_DY OUT GPIO20/TA2/IOX_DIN_DIO GPIO17/SCL1/N2TCK
EC_SMB1_DATA
BI P3V3A
GPIO22/SDA1/N2TMS 69 BI 5 35
GPIO73/SCL2/N2TCK 67 EC_SMB2_CLK 35 64
BI
2
2
2
LOW_BAT#_3 80 68 EC_SMB2_DATA
30 OUT P5VAUXON
PSL_GPIO41/F_WP# GPIO74/SDA2/N2TMS
EC_SMB3_CLK
BI 35 64
16 74 PSL_OUT&GPIO71 GPIO23/SCL3/N2TCK 119 35 52 52 35 EC_SM_INT R323 1 24.7K_5%_2_DY
OUT 73 120 BI IN
16 5
OUT ACPRES PSL_IN1#&GPI70 GPIO31/SDA3/N2TMS EC_SMB3_DATA BI 35 52 45 35
IN
EC_SM_INT0 R324 1 2 4.7K_5%_2
36 OUT EC_PWR_SWIN#_3 1 R325 2 0_5%_2 93 PSL_IN2#&GPI06/EXT_PURST# GPIO47/SCL4A/N2TCK
24 EC_SMB4_CLK BI 35
16 IN EC_3V_PW_ON# 17 PSL_IN3#&GPI42 GPIO53/SDA4A/N2TMS 28 EC_SMB4_DATA BI 35
30 17 16 SLP_S4#_3R1 R353 2 20 21 EC_CTL3 42 43
IN PSL_IN4#&GPI43 GPIO44/SCL4B
EC_TYPEC5V_EN
OUT
SHORT_0402_5 GPIO46/SDA4B/CIRRXM 23 OUT 7
47 OUT WLON 83 GPIO76/SPI_MOSI P3V3AL

26 IN FLASH_OVERRIDE 84 GPIO77/SPI_MISO F_CS0# 90 EC_SPI_CS0_R# R302 1 2 33_5%_2 EC_SPI_CS0# OUT 35 P3V3AL
THERMAL SHUT DOWN PVBAT 16 EC_PW_ON# 82 92 EC_SPI_CLK_R R342 1 2 33_5%_2 EC_SPI_CLK 35
P3V3_LDO OUT EC_SM_INT0
GPIO75/SPI_SCK F_SCK
EC_SPI_SI_R EC_SPI_SI
OUT
45 35 IN 79 GPIO02/SPI_CS# F_SDIO&F_SDIO0 87 R356 1 2 33_5%_2 OUT 35
R345(14.7K OHM) =87 DEGREES 86 EC_SPI_SO_R R340 1 2 33_5%_2 EC_SPI_SO
1
F_SDI&F_SDIO1 35
91 DCIN_RLED
IN
1
GPIO81/F_WP#/F_SDIO2 OUT 37
R367
TMSN / VSN NET TYPE 1:2 44 VCORF GPIO00/32KCLKIN/F_SDIO3 77 EC_ILIM_SEL OUT 42 43 R372
R345 10K_5%_1
1
R346 10K_5%_1
1UF_6.3V_2
14.7K_1%_2
D 510K_1%_2 EC_ACPRESENT D
OUT 30 35
C310
2
1 R300 TMSN H_PROCHOT_EC
AGND
2
GND1
GND2
GND3
GND4
GND5
GND6
THERM_SHUTDWN#
1 2
1 2
56 IN OUT 35 VSN OUT 35 OUT 35

SHORT_0402_5
1
2
C318 NUVOTON_NPCE285UA0DX_LQFP_128P
R344 R347
CSC0402_DY 100K_1%_2
18
45
78
89
5
100K_1%_NTC
116
103
2
SRTC_RST# 64
26 12 OUT CPU_PROCHOT#
2
2
28
OUT
PAD319 I Q351
D
I
D
1 2 PANJIT_2N7002KW_3P
1 2
Q352
RTC_RST_EC
D
H_PROCHOT_EC
D
POWERPAD1X1M G G IN 35
THERMAL TEAM DECIDE R344 PCB LOCATION P3V3S G G
IN 35
100K_5%_1
1
S
P3V3_RTC
S
R377
PANJIT_2N7002KW_3P
S
1
10_5%_2
10K_5%_2
1
FOLLOW WHL PDG P3V3A
R361
R335
35 EC_SPI_CLK 1 R311 2 PCH_SPI_CLK 24 C319

OUT IN 1 2
49.9_1%_2 RTC_RST#
2
28
2
U302 0.1UF_16V_2_DY OUT I Q353
D
1 R315 2 1 5 I Q350 P3V3AL
D
EC_SPI_SO PCH_SPI_SO PANJIT_2N7002KW_3P
35 OUT IN 24
1V05_PG 2
B VCC
PANJIT_2N7002KW_3P
49.9_1%_2 16 11 A
C IN C
D
ALL_SYS_PWRGD
1
3 GND Y 4 OUT 35 RTC_RST_EC P3V3RTC_RST_EC
D
G GI IN
100K_5%_2
G 35
1
EC_SPI_SI 1 R312 2 PCH_SPI_SI G IN 35
1
35 24
OUT IN
100K_5%_1
S
R310
1
49.9_1%_2
R360
R303
R376
R316 100K_5%_2 100K_5%_1
S
1
EC_SPI_CS0# 2 PCH_SPI_CS0#
2
S
35 24
OUT IN
0_5%_2
2
2
2
35 30 OUT EC_PWRSW#
U301
EC_SMB1 EC_SMB2 EC_SMB3 EC_SMB4

56 35 FAN2_TACH 31 GPIO56/TA1 KBSOUT0/GPOB0/SOUT_CR/JENK# 53SCAN_OUT<0> 36
BATTERY GPU TYPE C RTK AMP IN FAN1_TACH 63 52SCAN_OUT<1> OUT
56 35 IN ALL_SYS_PWRGD
GPIO14/TB1 KBSOUT1/GPIOB1/TCK OUT 36
35 IN 64 GPIO01/TB2 KBSOUT2/GPIOB2/TMS 51SCAN_OUT<2> OUT 36 P3V3AL
CHARGE TYPE C P1 50SCAN_OUT<3> 36
PWR_WLED# 32
KBSOUT3/GPIOB3/TDI
49SCAN_OUT<4> OUT
36 OUT SYS_PWROK
GPIO15/A_PWM KBSOUT4/GPOB4 OUT 36
30 118 GPIO21/B_PWM KBSOUT5/GPIOB5/TDO 48SCAN_OUT<5> 36 47 35 CNVI_PWR_EN# R334 2 1 10K_5%_1
OUT DCIN_OLED 62 47SCAN_OUT<6> OUT BI
37 OUT DCIN_GLED
GPIO13/C_PWM KBSOUT6/GPIOB6/RDY# OUT 36
35 5 BI EC_SMB1_CLK R322 2 1
3.3K_5%_1
37 OUT 65 GPIO32/D_PWM KBSOUT7/GPIOB7 43SCAN_OUT<7> OUT 36
81 42SCAN_OUT<8> 35 5
BI
EC_SMB1_DATA R321 2 1
3.3K_5%_1
56
OUT FAN1_PWM PSL_GPIO66/G_PWM KBSOUT8/GPIOC0 OUT 36
CAPS_LED#_3 66 41SCAN_OUT<9> 64 35 BI EC_SMB2_CLK R308 2 1 3.3K_5%_2
R338 36 OUT GPO33/H_PWM/VD1_EN# KBSOUT9/GPOC1/SDP_VIS# OUT 36
64 35 BI EC_SMB2_DATA R309 2 1 3.3K_5%_2
1 2 KBSOUT10&P80_CLK/GPIOC2 40SCAN_OUT<10> 36
USB_OC#_1 109 39SCAN_OUT<11> OUT 52 35
BI
EC_SMB3_CLK R304 2 1 3.3K_5%_1_DY
1K_5%_2 42 OUT GPIO30/F_WP#/RTS1# KBSOUT11&P80_DAT/GPIOC3 OUT 36
EC_PWRSW# 15 38SCAN_OUT<12> 52 35 BI EC_SMB3_DATA R305 2 1 3.3K_5%_1_DY
B 35 30 OUT GPIO36/TB3/CTS1# KBSOUT12/GPO64/TEST# OUT 36 EC_SMB4_CLK R317 2 1 3.3K_5%_2 B
43 42 EC_CTL1 14 GPIO34/SIN1/CIRRXL KBSOUT13/GP(I)O63/TRI ST# 37SCAN_OUT<13> 36
35 BI
OUT EC_ACPRESENT 123 36SCAN_OUT<14> OUT 35
BI
EC_SMB4_DATA R319 2 1 3.3K_5%_2
ALL EC & PCH RESISTOR NEED TO WITHIN 0.5'' OF ROM(U300) 35 30 OUT FINGER_PWR_EN#
GPIO67/SOUT1/N2TMS KBSOUT14/GP(I)O62/XORTR# OUT 36
37 OUT 22 GPIO45/E_PWM//DTR1#_BOUT1 KBSOUT15/GPIO61/XOR_OUT 35SCAN_OUT<15> OUT 36
56 FAN2_PWM 16 34 USB2_PWR_EN 43
P3V3A OUT GPIO40/F_PWM/1_WIRE/RI1 GPIO60/KBSOUT16/DSR1#
33 USB_OC#_2 OUT
U300 42
OUT
USB1_PWR_EN 111 GPIO83/SOUT_CR
GPIO57/KBSOUT17/DCD1# OUT 43
EN_3V3A 113 54SCAN_IN<0>

17 16 OUT GPIO87/CIRRXM/SIN_CR KBSIN0/GPIOA0/N2TCK IN 36
KBSIN1/GPIOA1/N2TMS 55SCAN_IN<1> IN 36
37 TOUCH_OFF# 30 56SCAN_IN<2> 36
OUT GPIO55/CLKOUT/ IOX_DIN_DIO KBSIN2/GPIOA2
57SCAN_IN<3> IN
R313 1 2 10K_5%_2 VCC_POR#
KBSIN3/GPIOA3 IN 36
35 85 EXT_RST# KBSIN4/GPIOA4 58SCAN_IN<4> 36
IN 59SCAN_IN<5> IN
U300 KBSIN5/GPIOA5 IN 36
0.1UF_16V_2
1
EC_SPI_CS0# 1 8 H_PECI 1 R339 2 13 60SCAN_IN<6>

35 IN CS VCC 26 BI PECI KBSIN6/GPIOA6 IN 36
12 61SCAN_IN<7> 36
C309
EC_SPI_SO 2 7 1 R314 2
PVCCST VTT KBSIN7/GPIOA7 IN
35 OUT DO_IO1 HOLD_IO3 43_5%_2
100K_5%_2
1
1 R330 2 3 6 EC_SPI_CLK
WP_IO2 CLK IN 35
2
100K_5%_2 C307 NUVOTON_NPCE285UA0DX_LQFP_128P RSMRST#

30 35
4 GND DI_IO0
5 EC_SPI_SI
IN 35 OUT
CSC0402_DY
1
WINB_W25Q128JVSIQ_SOIC_8P
C317
2
FAN1_TACH
1
56 35 IN
SIT 0524 56 35 IN FAN2_TACH
R333
100K_5%_2
2
0.22UF_6.3V_1
680PF_50V_2
680PF_50V_2
1
A A
2
C315
C311
R330,R314 CLOSE TO PCH EC_SPI_SO3

IN 24 INVENTEC
2
TITLE
A10
EC_SPI_SO2 24 Block Diagram
IN
R390 FOR INTEL DEBUG XXX
<ENG> PCB VER03-Oct-2019
A02 SHEET of 35 70
8 7 6 5 4 3 2 1
REFERENCE 200~249(POWER CONN)

REFERENCE 250~299(KB/TP CONN)
CN250
36 35 IN SCAN_IN<0> 1 1
36 35 IN SCAN_IN<1> 2 2
SCAN_IN<7..0>
36 35 IN SCAN_IN<2> 3 3 36 35 IN 2SFI_SFI0402ML120C_LF_SMD_2P_DY
0 SCAN_IN<0> D250 1 1 2
36 35 OUT SCAN_OUT<15> 4 4
SCAN_OUT<14> 5
36 35 OUT 5
1 SCAN_IN<1> D251 1 1 2 2SFI_SFI0402ML120C_LF_SMD_2P_DY
SCAN_OUT<13> 6 6
36 35 OUT SCAN_IN<3> 7
36 35 IN 7
36 35 SCAN_OUT<12> 8 8
OUT
D 36 35 OUT SCAN_OUT<11> 9 9
3 SCAN_IN<3> D253 1 2SFI_SFI0402ML120C_LF_SMD_2P_DY
1 2
36 35 SCAN_OUT<10> 10 10 D
OUT SCAN_OUT<9>
36 35 11
OUT 11
36 35 SCAN_OUT<8> 12 12
OUT SCAN_OUT<7> 13
36 35 OUT 13
36 35 SCAN_IN<4> 14 14
IN SCAN_OUT<6> 15
36 35 OUT 15
36 35 SCAN_IN<5> 16 16
IN SCAN_IN<6> 17
36 35 IN 17
36 35 OUT SCAN_OUT<5> 18 18
36 35 OUT SCAN_OUT<4> 19 19
36 35 IN SCAN_IN<7> 20 20
36 35 OUT SCAN_OUT<3> 21 21
36 35 SCAN_OUT<2> 22 22
OUT SCAN_OUT<1> 23
36 35 OUT 23
36 35 OUT SCAN_OUT<0> 24 24
25 25
35 OUT EC_PWR_SWIN#_3 26 26
PWR_WLED# R250 1 2 220_5%_2 27 27 G G1
35 IN D259
CAPS_LED#_3 R252 1 2 220_5%_2 28 28 G G2 SCAN_OUT<0> 1 1 2 2SFI_SFI0402ML120C_LF_SMD_2P_DY
35 IN 36 35 OUT
2
P5V0S P5V0A 29
2
29
30 30 SCAN_OUT<1> D260
1 1 2 2SFI_SFI0402ML120C_LF_SMD_2P_DY
36 35 OUT
2
2
2
ENTERY_6782K_Q30N_00L_30P D263
D258 SCAN_OUT<2> 1 1 2 2SFI_SFI0402ML120C_LF_SMD_2P_DY
C 36 35 OUT C
D264 2SFI_SFI0402ML120C_LF_SMD_2P_DY
D262
D261
36 35 OUT SCAN_OUT<3> 1 1 2
1
1
1
SCAN_OUT<4> D265
36 35 OUT
1
1
1
SCAN_OUT<5> D266
36 35 OUT
SFI_SFI0402ML120C_LF_SMD_2P_DY
SFI_SFI0402ML120C_LF_SMD_2P_DY D267
SFI_SFI0402ML120C_LF_SMD_2P_DY SCAN_OUT<6> 1 1 2 2SFI_SFI0402ML120C_LF_SMD_2P_DY
36 35 OUT
SCAN_OUT<7> D268
36 35 OUT
SCAN_OUT<8> D269
1 2SFI_SFI0402ML120C_LF_SMD_2P_DY
36 35 OUT 1 2
SCAN_OUT<9> D270 2SFI_SFI0402ML120C_LF_SMD_2P_DY

KEYBOARD CONN 36
36
35
35
OUT
SCAN_OUT<10> D272
1
1 1
1
2
2 2SFI_SFI0402ML120C_LF_SMD_2P_DY
OUT
36 35 SCAN_OUT<11> D273
OUT
SCAN_OUT<12> D274 SFI_SFI0402ML120C_LF_SMD_2P_DY
36 35 1 1 2 2
OUT
36 35 SCAN_OUT<13> D275
OUT
B B
36 35 SCAN_OUT<14> D276
OUT
36 35 SCAN_OUT<15> D277
OUT
P3V3S
CN301
1 1
35 24 IN LPC_ESPI_IO0 2 2
35 24 IN LPC_ESPI_IO1 3 3
4
A
60 49 48 47
35
35
35
24
24
30
IN
IN
LPC_ESPI_IO2
LPC_ESPI_IO3
BUF_PLT_RST#
5
6
4
5
6
DBUG CONN A
IN LFRAME#_ESPI_CS# 7
35 24 IN 7
8 8
CLK_PCI_DEBUG 9 G1
24 IN 10
9 G
G2
10 G
ACES_50696_0100M_002_10P
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX
PCB P/N <ENG>
60xxxxxxxxxx PCB VER A02
03-Oct-2019 SHEET of 36 70
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SIT 0611 P3V3AL

LED
D
U50 C51 0.1UF_16V_2_DY
I
VDD VDD 1 2 A P5V0A
GND GND Q270
D
OUTPUT OUTPUT LID_SW#_3 35 35 DCIN_OLED G G
OUT IN PANJIT_2N7002KW_3P
MST_MH255ESP_PSOT23_3P 6015B0167001
S
1000PF_50V_2
R274
1
1 2
D
100K_5%_2
D Q271 D271
C50
I
A
1 2 300_5%_2 1 D
R271
D
1
35 IN DCIN_RLED G G
2
R273 1 2 300_5%_2 2 2 4 4
S
R275 PANJIT_2N7002KW_3P 1 2 120_5%_2 3
1 2 R272 3
6015B0167001
S
100K_5%_2
LITEON_LTST_C19FD5WT_4P
D
I Q272
A
D
35 IN DCIN_GLED G G
S
P3V3S R276 PANJIT_2N7002KW_3P
1 2 6015B0167001
S
100K_5%_2
1
1
4.7K_5%_2
2.2K_5%_2
R281
R282
P3V3S
2
2
C
SIT2 0718 P3V3A C
P5V0A P3V3A_FB
Q280
S1 1 PCH_I2C_TP_CLK
BI 37
D280
2 G1
1 V I/O V I/O 6 3 S D 2
6 PCH_I2C_CLK C282
D1 BI 25
Q281
1
D2 3 PCH_I2C_DATA 2 5 1 2
BI 25 GND VBUS
PM513BA
5 G2
3 4
G
4 PCH_I2C_TP_DATA V I/O V I/O 0.1UF_16V_2_DY C281
S2 BI 37
CSC0402_DY
2N7002KDW AMC_AZC199_04S_R7G_DSSOT23_6P
1
R283
FINGER_PWR_EN# 1 2
2
35 IN
100K_5%_2_DY
0_5%_2
1
P3V3A_FB
R284
P5V0S Q250
CN281
PM513BA P5V0S_KBLED
3 2 6 G2
S D USB_FINGER_DN 6 G2
2
27 BI 5 G1
USB_FINGER_DP
100K_5%_2
5 G1
27 BI
1
4
1
4
2.2UF_6.3V_3
G
3
3
R251
2
C250
P3V3A 2
P3V3S 1
1
1
B C255 ACES_51619_00601_001_6P B
R253
2
2
1 2 1 2
J2:FINGER
2
2
100K_5%_2
R285
I
D
CSC0402_DY
R280
G
Q251
10K_5%_2
10K_5%_2 Q282 Q283
A
D
I
A
I
KB_LED_OFF#G 1
IN G
G
35
1
S
PCH_TP_I2C_INT# D S S D TP_I2C_INT#
PANJIT_2N7002KW_3P
26 BI D S S D
BI 37
S
PANJIT_2N7002KW_3P PANJIT_2N7002KW_3P
6015B0167001 6015B0167001 P3V3S CN280
12 G
12 G2
11 G
11 G1
10
CN251 10
9
35 IM_CLK_5 9
4 G2 BI IM_DATA_5
8
4 G 35 8
3 G1 BI 7
3 G 37 PCH_I2C_TP_CLK 7
2 IN 6
2 37 PCH_I2C_TP_DATA 6
1 BI TP_I2C_INT# 5 5
1 37 BI 4
TOUCH_OFF# 4
ACES_50592_00401_001_4P
35 IN 3
3
2
A D281 D282
2
1
A
1
2
1
ENTERY_6712K_Y12N_07L_12P
LITEON_L30ESDXVC3_2_DSOT23_3P_DY
D283
TOUCHPAD CONN (CLICK PAD)
LITEON_L30ESDXVC3_2_DSOT23_3P_DY
3
KEYBOARD LED CONN LITEON_L30ESDXVC3_2_DSOT23_3P_DY
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
SIZE CODE
1310xxxxx-0-0 A02
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P5V0S P5V0S_AUDIO_AVDD
I
REFERENCE 500~549(AUDIO CODEC) C501
1 2 R500
1 2
AGND_AUDIO 10UF_6.3V_3 0_5%_3
1
2.2UF_6.3V_2
1
1 R531 2 AGND_AUDIO BLM18PG121SN1(6014B0041601_0603)
PANJIT_PZ1AL5V6B_DY
100K_5%_2
C502
D500
P1V8S
1UF_25V_3
PAD503 1 2
1
C503
2
1 1 2
2 C511
10UF_6.3V_3
1
2
P1V8S
1UF_25V_3
POWERPAD1X1M
D HP_R OUT 39
C513
2
HP_L D
OUT 39
LINE1_VREFO_L
1
OUT 39
10UF_6.3V_3
LINE1_VREFO_R OUT 39
C532
MIC2_VREFO 39 P5V0S_AUDIO_AVDD
OUT
AGND_AUDIO
2
P5V0S
1
36
35
34
33
32
31
30
28
27
26
25
0.1UF_16V_2
29
4.7UF_10V_3
I
1
R513
C504
P5V0S_PVDD
C505
1 2 U500
0_5%_3
10UF_6.3V_5_DY
0.1UF_16V_2_DY
HP-OUT-R
MIC2-VREFO
LINE1-VREFO-L
LDO1-CAP
CPVDD
LINE1-VREFO-R
CBN
HP-OUT-L
VREF
CPVEE
10UF_6.3V_3
AVDD1
AVSS1
0.1UF_16V_2
2
1
2
SVT 0903
1
C515
C514
C500
C522
C519
37 CBP LINE2-L 24 1 2 LINE2_L 40

BI
C506 0.1UF_16V_2
AGND_AUDIO 38 ANALOG 23 1 2 LINE2_R 40
2
2
AVSS2 LINE2-R
BI AGND_AUDIO
2
C512 0.1UF_16V_2
C 1 2 39 LDO2-CAP LINE1-L 22 LINE1_L 39 C
BI
10UF_6.3V_3 40 AVDD2
DIGITAL LINE1-R 21 LINE1_R 39 P5V0A
BI
SVT 0917 41 PVDD1 5VSTB 20 1 R514 2
SHORT_0402_15
42 SPK-L+ MIC-CAP 19 C531 1 2 4.7UF_6.3V_3
C523 AGND_AUDIO
2 1
43 SPK-L- MIC2-R/SLEEVE 18 SLEEVE 39
(THERMAL PAD 3X3 VIAS) BI
CSC0402_DY
44 SPK-R- MIC2-L/RING2 17 RING2 BI 39
C507
C524 R505 2
45 SPK-R+ PCBEEP 16 1 2 1 PCSPKR_PCH_3 IN 26
2 1
1K_5%_1
46 PVDD2 SPDIFO/FRONT JD3/GPIO3 15 0.1UF_16V_2
CSC0402_DY
C525 PLACEMENT CLOSE TO CODEC
10UF_6.3V_3
47 14
0.1UF_16V_2
2 1 PDB MIC2/LINE2 JD2

1
R502
GPIO0/DMIC-DATA12
48 13 1 2 HPS IN 39
C521
C520
SPDIFO/GPIO2 HP/LINE1 JD1

CSC0402_DY
GPIO1/DMIC-CLK
40 35 IN EC_MUTE#
DC_DET/EAPD
49 200K_1%_2
SDATA-OUT
TML P3V3S
LDO3-CAP
SDATA-IN
BIT-CLK
I2C_SDA
DVDD-IO
I2C_SCL
2
R504
DVDD
SYNC
1 2
B AGND_AUDIO 100K_1%_2
B
REA_ALC256M_CG_MQFN_48P
SVT 0917
P3V3S I
TP502
10
12
2
11
1
R501 1
1 2
P3V3S_DVDD TP24
TP501
1
1
10UF_6.3V_3
0_5%_3 TP24
0.1UF_16V_2
10UF_6.3V_3
1
TIED UNDER OR NEAR CODEC
C530
C517
C516
EAPD
PAD500
1 1 2 2
2
2
POWERPAD1X1M HDA_3S_SYNC 26
IN
OUT
R507
HDA_R_SDIN0 1 2 HDA_3S_SDIN0 26
IN
PAD501 33_5%_2
1 2 R506
40
1 2 HDA_R_BITCLK 1 2 HDA_3S_BITCLK IN 26
SIT2 0626
POWERPAD1X1M 0_5%_2 HDA_3S_SDOUT
IN 26
55 BI DMIC_DATA
PAD502 R512
1 2 55 BI DMIC_CLK 1 2 MIC_IN_CLK_R P3V3S
A 1 2
22_5%_2
A
POWERPAD1X1M
22PF_50V_2
1
22PF_50V_2_DY
10UF_6.3V_3
C518
0.1UF_16V_2
1
1
1
C510
C509
C508
2
AGND_AUDIO RESERVE FOR EMI

INVENTEC
2
2
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX
<ENG> 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERCE 600~649(JACK/MIC/SPEAKER)
AUDIO JACKS
MIC2_VREFO IN 38 39
2
R600
D
2.2K_5%_2
D
1
MIC 1 R611 2 SLEEVE
39 BI BI 38
A
I
SHORT_0402_15
CSC0402_DY
1
C605
2
SVT 0917
EMI CAPACITORS TO CLOSE TO JACK SIDE

D600
LITEON_L30ESDXVC3_2_DSOT23_3P
2
3
AGND_AUDIO 1
C C
MIC2_VREFO LINE1_VREFO_L 1 R607 2
IN 38 39 38 IN 4.7K_5%_2_DY
LINE1_VREFO_R 1 R606 2
38 IN 4.7K_5%_2_DY
2
R601
2.2K_5%_2 C602
38 IN LINE1_L 1 2
1
JACK601
4.7UF_6.3V_3_DY RING2_CONN 3
R605 39 BI 3 G/M
RING2_CONN 1 R612 2 RING2 HP_L 1 2 1 1L
39 BI BI 38 38 IN
I
A
SHORT_0402_15 22_5%_2 HPS 5 5

38 OUT
CSC0402_DY
6
1
R604 6
38 HP_R 1 2 2 2R
IN
C604
39 MIC 4 4 M/G
22_5%_2 BI
MS MS
SINGA_2SJ3095_166111F_6P
SFI_SFI0402ML120C_LF_SMD_2P
2
470PF_50V_2
470PF_50V_2
B C603 B
1
EMI CAPACITORS TO CLOSE TO JACK SIDE 38 IN LINE1_R 1 2
2
C601
C600
4.7UF_6.3V_3_DY
2
AGND_AUDIO
2
AGND_AUDIO
D601
D602
D603
1
1
SVT 0917
1
RESERVE FOR EMI
AGND_AUDIO
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SPKR1_L_DP
PVBAT 40
IN
PVBAT_DB_AMP
CN600
AMP
Q551 40 SPKR1_L_DN
1 8
IN 1 1
S D
I 2 2
2 7
100K_5%_2
3 G1
1
3 G1
3 6
4 4 G2 G2
F 4 5 SPKR1_R_DN F
10UF_25V_3
G 40 IN
0.1UF_25V_2
2200PF_50V_2
1000PF_50V_2
R563
1
1
ACES_50224_0040N_001_4P
C588
SM3335PSQGC_TRG
C587
C586
C589
40 SPKR1_R_DP
IN
2
PVBAT_DB_AMP
2
2
I
100K_5%_2
1
SIT 0606
R564
P3V3S
2
I
D
Q550
PANJIT_2N7002KW_3P
D
I
R565
100K_5%_2
SLP_S3#_3R 1 2 G
1
35 30 17 16 G
IN
0_5%_2
R569
CSC0402_DY
1
2
D551
C564
S
SIT2 0626
NC
2
38 EAPD 3 1
IN
2
DIODE-BAT54-TAP-PHP
2
D550
NC
38 35
IN EC_MUTE# 3 1
DIODE-BAT54-TAP-PHP_DY C558 R552
E 1 2 E
1 2
R566
C553
SVT 0903 330PF_50V_2_DY 10_5%_2_DY
38
IN LINE2_R 1 2
1 2
SIT2 0729
0.01UF_25V_2_DY
C552 L550
C554 0.1UF_25V_2
1
10K_5%_2 I
2.87K_1%_2
R567 1 2 SPKR1_R_DP 40
1 2 1 2 2 1 A
OUT
C557
R577
C628
0.1UF_25V_2 0.22UF_50V_3 120OHM_25%_6A I
A
SIT 0611 AGND_AUDIO 2.2K_1%_2 SIT2 0624 1 2
SIT2 0725 C577 SIT 0612
33
32
31
30
29
28
27
26
25
680PF_50V_2
2
2 1 U550 C559 R553
1 2 1 2 C556
1 2
FAULTZ
PVCC
PVCC
OUTPR
SDZ
EPAD
BSPR
1UF_25V_2
INNR
INPR
10_5%_2_DY
330PF_50V_2_DY
680PF_50V_2
40 IN AMP_PLIMIT 1 PLIMIT GND 24 L551
40 OUT GVDD 2 GNDD OUTNR 23 C555 1 2 SPKR1_R_DN OUT 40
AGND_AUDIO 40 AMP_GAIN 3 22 2 1 120OHM_25%_6A
IN 4
GAIN/SLV BSNR
21
SIT2 0729 R568
C579 GND GND 0.22UF_50V_3
1 2 1 2 5 INNL GND 20 C572 SIT2 0624 L552
2.2K_1%_2 6 INPL BSNL 19 2 1 1 2 SPKR1_L_DN OUT 40
R578 0.1UF_25V_2 C578 7 18
38 LINE2_L 1 2 AGND_AUDIO 1 2 MUTE OUTNL
120OHM_25%_6A
C551
IN 8 PBTL/BTL GND
17 0.22UF_50V_3
I
A
1 2
0.01UF_25V_2_DY 0.1UF_25V_2 C560 R554
10K_5%_2
2.87K_1%_2
1 2 1 2
1
OUTPL
680PF_50V_2
SVT 0903
SYNC
AVCC
PVCC
PVCC
BSPL
1
AM1
AM0
10_5%_2_DY
330PF_50V_2_DY
R579
C629
SIT 0611 REALTEK_ALC1304_CGT_QFN_32P
16
9
10
11
12
13
14
15
D D
AMP_AM1
2
40
SIT2 0725 IN SIT2 0624
1 L553
SPKR1_L_DP
2
C573 2 OUT 40
40 IN AMP_AM0
2 1
120OHM_25%_6A
C561 I C550
0.22UF_50V_3 1 21 R555 2 A 1 2
PVBAT_DB_AMP 10_5%_2_DY
AGND_AUDIO R556 330PF_50V_2_DY 680PF_50V_2
1 2
0_5%_2
10UF_25V_3
10UF_25V_3
1
0.1UF_25V_2
1000PF_50V_2
1
1
0.1UF_25V_2
C563
C562
C576
C575
C574
2
2
C C
40 IN GVDD
10K_5%_2_DY
10K_5%_2_DY
10K_5%_2_DY
2
R558 2
2
10K_5%_2
R550
R561
R557
1
1
40
OUT AMP_PLIMIT
40 OUT AMP_AM1
40 AMP_AM0
OUT AMP_GAIN
40 OUT
10K_5%_2_DY
10K_5%_2
10K_5%_2
1
2
0_5%_2
R560
R559
R551
R562
2
1
B B
A A
INVENTEC
TITLE
A10
Block Diagram

XXX
8 7 6 5 4 3 2 1
REFERNCE 900~999(CARDREADER)
CARD READER
D
D
SD_D2 BI 41
C900
2 1 CARD_V18 SD_D3 BI 41
1UF_6.3V_2
23
22
21
20
19
24
U900
XD_D7
SP14
SP13
SP12
V18
SP11
6.2K_1%_2 1 R901 2 CARD_REF 1 RREF SP10 18 SD_CMD BI 41
C P3V3S 27 USB_CR_DN 1 L900 4 USB_CR_DN_L 2 17 RESERVE FOR EMI C
BI USB_CR_DP 2 3 USB_CR_DP_L 3
DM GPIO0
16
27 PAD900
1 2
BI
P3V3S_CARD 4
DP SP9
15 SD_R_CLK 1 R900 2 SD_CLK OUT
1 2 3V3_IN SP8 41
LS_SHORT_0504 5 CARD_3V3 SP7 14 0_5%_2
1
1
POWERPAD1X1M 6 13 SD_CD# IN
0.1UF_16V_2
4.7UF_6.3V_3
P3V3S_CR SDREG SP6 41
1
C907
C906
XD_CD#
1UF_6.3V_2
1
1
C901
SP1
SP2
SP3
SP4
SP5
25 GND
0.1UF_16V_2
CSC0402_DY
2
C902
REA_RTS5170_GRT_QFN_24P
RESERVE FOR EMI
C905
2
5~6.8PF IF NEEDED
10
2
7
8
9
12
11
SD_D0 BI 41
SD_D1 BI 41
SD_WP OUT 41
B B
CN900
P3V3S_CR 41 BI SD_D3 P1 CD/DAT3
41 IN SD_CMD P2 CMD
20MIL P3 VSS1 BOM TO 6026B0473701

P4 VDD
41 IN SD_CLK P5 CLK SIT2 0719
P6 VSS2
SD_D0 P7
1
4.7UF_6.3V_3
41 BI DAT0
0.1UF_16V_2
C904
C903
41 BI SD_D1 P8 DAT1 GND P12
41 BI SD_D2 P9 DAT2 GND P13
41 IN SD_WP P10 WP GND P14
41 OUT SD_CD# P11 CD GND P15
2
2
TAISOL_156_5001902605_1_15P
A A
INVENTEC
TITLE
A10
CARD READER
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 2400~2450(USB3.0)
USB 3.0 PORT1
1
D
R2401
R2402 D
22K_1%_2 54.9K_1%_2 P3V3AL
P5V0A
1
1UF_6.3V_2
1
1
R2403
C2403 10K_5%_2
C2404
2
10UF_6.3V_5_DY
USB_OC#_1 OUT
2
2
35
17
16
15
14
13
U2400 P5V0A_USB1
GND
FAULT#
PWPD
ILIM_HI
ILIM_LO
1 IN OUT 12
27 USB_P3_DN 2 DM_OUT DM_IN 11 USB_IC1_DN 42
BI USB_P3_DP USB_IC1_DP BI
27 3 DP_OUT DP_IN 10 42
BI EC_ILIM_SEL 1 R2420 2 4 9
BI
43 35 IN ILIM_SET STATUS#
SHORT_0402_5
P5V0A
CTL1
CTL2
CTL3
C C
EN
TEXAS_TPS2546RTER_QFN_16P
8
5
6
7
1 R2400 2
P5V0A_USB1
USB1_PWR_EN D2402
35 IN 100K_5%_2_DY
43 35 EC_CTL1
IN EC_CTL2 1 2
43 35 IN
43 35 EC_CTL3
IN
PANJIT_SMF5_0A_DY
1
SIT2 0718 P5V0A_USB1 C2402 C2401 C2400
0.1UF_16V_2 1000PF_50V_222UF_6.3V_5
D2400
1 6
2
V I/O V I/O
C2407
2 GND VBUS 5 1 2
3 V I/O V I/O 4 0.1UF_16V_2
AMC_AZC199_04S_R7G_DSSOT23_6P
B B
CN2400
1 VBUS
USB_IC1_DN L2400 USB_IC1_L_DN 2 D-
42 IN 2 3
42 IN USB_IC1_DP USB_IC1_L_DP 3 D+
1 MCF12102G900-T
4 4 GND
42 OUT USB3_RX2_L_DN 5 SSRX- G1 G1
42 OUT USB3_RX2_L_DP 6 SSRX+ G2 G2
7 GND G3 G3
42 IN USB3_TX2_L_DN 8 SSTX- G4 G4
42 IN USB3_TX2_L_DP 9 SSTX+
1 D2401 10
Line-1 NC
2 Line-2 NC 9 SINGATRON_2UB4008_360201F_9P
3 GND GND 8
4 Line-3 NC 7
5 Line-4 NC 6
AMAZING_AZ1045_04F_R7G_10P
WCM_2012SHS_850T
USB3_RX2_DN L2402 USB3_RX2_L_DN
27 OUT IN 42
27 OUT USB3_RX2_DP 2 3 USB3_RX2_L_DP IN 42
1 4
A A
WCM_2012SHS_850T
USB3_TX2_DN 2 0.1UF_16V_2 USB3_TX2_C_DN L2401 USB3_TX2_L_DN
27 IN C2405 1 OUT 42
27 IN USB3_TX2_DP C2406 1 2 0.1UF_16V_2 USB3_TX2_C_DP 2 3 USB3_TX2_L_DP OUT 42
1 4
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P5V0A_USB2
D2412
USB3.0 PORT2
1
PANJIT_SMF5_0A_DY
2
1
C2413 C2412 C2411
22UF_6.3V_5 0.1UF_16V_2 1000PF_50V_2
SIT2 0718 P5V0A_USB2
D
2
D2410 D
1 V I/O V I/O 6
C2417
2 GND VBUS 5 1 2
3 V I/O V I/O 4 0.1UF_16V_2
AMC_AZC199_04S_R7G_DSSOT23_6P
CN2410
L2410 1 VBUS
USB_IC2_DN MCF12102G900-T USB_IC2_L_DN 2
43 IN D-
43 IN USB_IC2_DP 2 3 USB_IC2_L_DP 3 D+
1 4 4 GND
43 OUT USB3_RX3_L_DN 5 SSRX- G1 G1
43 OUT USB3_RX3_L_DP 6 SSRX+ G2 G2
7 GND G3 G3
43 IN USB3_TX3_L_DN 8 SSTX- G4 G4
43 IN USB3_TX3_L_DP 9 SSTX+
1 D2411 10
Line-1 NC
2 Line-2 NC 9 SINGATRON_2UB4008_360201F_9P
3 GND GND 8
4 Line-3 NC 7
C 5 Line-4 NC 6 C
DGND_USB2
1
1
AMAZING_AZ1045_04F_R7G_10P
R2412
R2411
22K_1%_2 54.9K_1%_2 P3V3AL
P5V0A
2
2
1
1UF_6.3V_2
1
1
R2408
10K_5%_2 WCM_2012SHS_850T
C2414
L2404
C2410 USB3_RX3_DN USB3_RX3_L_DN
27 OUT IN 43
2
10UF_6.3V_5_DY USB3_RX3_DP 2 3 USB3_RX3_L_DP

27 OUT IN 43
1 4
USB_OC#_2 OUT
2
2
35
17
16
15
14
13
U2410
P5V0A_USB2 WCM_2012SHS_850T
ILIM_LO
GND
FAULT#
PWPD
ILIM_HI
USB3_TX3_DN L2403 USB3_TX3_L_DN

27 IN C2416 1 2 0.1UF_16V_2 USB3_TX3_C_DN
OUT 43
1 12 27 IN USB3_TX3_DP C2415 1 2 0.1UF_16V_2 USB3_TX3_C_DP 2 3 USB3_TX3_L_DP OUT 43
IN OUT
1 4
27 USB_P9_DN 2 DM_OUT DM_IN 11 USB_IC2_DN 43
BI USB_P9_DP 3 10 USB_IC2_DP BI
B 27 BI DP_OUT DP_IN
BI 43 B
EC_ILIM_SEL 1 R2410 2 4 9
42 35 IN ILIM_SET STATUS#
SHORT_0402_5
P5V0A
CTL1
CTL2
CTL3
EN
TEXAS_TPS2546RTER_QFN_16P
8
5
6
7
1 R2458 2
35 IN USB2_PWR_EN 100K_5%_2_DY
42 35 IN EC_CTL1
42 35 IN EC_CTL2
42 35 IN EC_CTL3
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
USB3 REDRIVER 1
REFERENCE 2600~2699(USB RESERVE)
D
D
P3V3S
R2629 2 P3V3S
1
4.7K_5%_2_DY
1 R2628 2
4.7K_5%_2_DY
0.1UF_16V_2
1
1 R2631 2
C2618
4.7K_5%_2_DY
1 R2630 2
C 4.7K_5%_2_DY
C
2
1 R2632 2
C2620
18
17
16
15
14
13
USB3_SOC_TX1_DP 1 2 0.1UF_10V_1 4.7K_5%_2_DY
27 IN U2603
TST/NC
A_DE0/SCL_CTL
VDD
A_EQ0/NC
A_EQ1/SDA_CTL
A_DE1/NC
C2626
27 USB3_SOC_TX1_DN 1 2
IN USB3_SOC_TX1_C_DP 19 A_INp A_OUTp 12 USB3_TCL1_TX_IC_DP
OUT 45
0.1UF_10V_1 USB3_SOC_TX1_C_DN20 A_INn A_OUTn 11 USB3_TCL1_TX_IC_DN
OUT 45
21 GND GND 10
USB3_SOC_RX1_C_DP 22 B_OUTp B_INP 9 USB3_TCL1_RX_IC_DP
IN 45
C2625 USB3_SOC_RX1_C_DN23 8 USB3_TCL1_RX_IC_DN
27 OUT USB3_SOC_RX1_DP 1 2 B_OUTN B_INn
IN 45
B_EQ1/I2C_ADDR1
B_DE0/I2C_ADDR0
24 I2C_EN REXT 7 1 2
0.1UF_10V_1
R2627 4.99K_1%_2
B_EQ0/NC
B_DE1/NC
25 TML
C2627
VDD
PD#
27 OUT USB3_SOC_RX1_DN 1 2
0.1UF_10V_1
2
3
4
5
PARADE_PS8713BTQFN24GTR2_A3_TQFN_24P
6
1
B P3V3S B
P3V3S
1 R2633 2
10K_5%_2_DY
0.1UF_16V_2
P3V3S
1
C2619
1 R2634 2
4.7K_5%_2_DY
1 R2635 2
2
4.7K_5%_2_DY
1 R2636 2
4.7K_5%_2_DY
1 R2637 2
4.7K_5%_2
SIT2 0726
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
33K OHM 1.65A PW_USB_TYPE_C_B
USB3.1 TYPE C
R2425
P5V0A 1 2
33K_1%_2
U2420
1
1
4.7K_5%_2
22UF_6.3V_3
A3 C2
C2423
ILIM VBUS1
R2428
F F
VBUS2
D1
B1 VINT1
2
P3V3AL P3V3_USB3 D2
2
VBUS3
C1 VINT2
10K_5%_2_DY
100_5%_6
1
10K_5%_2
B2 VINT3
R2422
R2427
R2426
GND1 B3
A1 EN
C3
2
GND2
2
45 USB_OC#_0 A2
OUT FAULT# I
D
GND3 D3 Q2420
VBUS0_DSCHG
D
45 IN G G
45
IN VBUSOUT0_EN
NXP_NX5P3090UK_WLCSP_12P
100K_5%_2
100K_5%_2
S
1
1
PANJIT_2N7002KW_3P
R2433
R2424
FROM EC
S
2
2
P3V3_USB3 P5V0A
54.9K_1%_2
R2437 R2439
10K_1%_2 590K_1%_2
1
1
P5V0A PW_USB_TYPE_C_B
R2437
R2436
E E
10K_5%_2_DY
1
2
2
R2431
LOC0_PWR_MON
1
R2429
12.1K_1%_2
1
200K_1%_2
R2438
1000PF_50V_2_DY
C2429
R2439
2 1
C0_VMON
1000PF_50V_2
1
2
C2420
200K_1%_2
45
IN USB_OC#_0
1
R2430
2
1
10K_1%_2
R2432
IN DCP_EC_CTL
100K_5%_2
35
2
VBUS0_DSCHG
45 OUT C0_5V_IMON
R2435
1000PF_50V_2
100K_1%_2
GPIO9_UFP
1
45
P3V3_USB3 OUT VBUSOUT0_EN
45 OUT
R2434
C2424
26
27
29
28
22
20
21
U2421
IN USB3_TCL1_RX_IC_C_DP 1 R2448 2
750K_5%_1
2
D USB3_TCL1_RX_IC_C_DN 1 R2447 2 D
IN
VMON/MGPIO9
TXD/LOC_PWR/MGPIO10
GPIO8/I2C_SDA
IMON/MGPIO8
TXD/GPIO10/I2C_EN
TXD/GPIO9/I2C_INT
GPIO7/I2C_SCL
750K_5%_1
USB3_TCL1_TX_IC_C_DP 1 R2446 2 CC01

IN 46 45 IN CC02
750K_5%_1 46 45
IN
USB3_TCL1_TX_IC_C_DN 1 R2445 2
IN
220PF_50V_2
1
1
750K_5%_1
220PF_50V_2
17 CC01 45 46
CC1
CC02
OUT
C2422
C2421
CC2 19 OUT 45 46
C_TX2_1P/2N 9 TYPE_C0_TX2P C24251 20.1UF_6.3V_1 TYPE_C0_C_TX2P OUT 46
2
C_TX2_1N/2P 10 TYPE_C0_TX2N
C24261 20.1UF_6.3V_1 TYPE_C0_C_TX2N 46
OUT
44 OUT USB3_TCL1_RX_IC_DP C24321 2 0.1UF_6.3V_1 USB3_TCL1_RX_IC_C_DP 5 SSRX_1P/2N C_RX2_1P/2N 1 TYPE_C0_RX2P C2450 1 2
0.33UF_6.3V_1 TYPE_C0_C_RX2P IN 45 46
44
OUT
USB3_TCL1_RX_IC_DN C24331 2 0.1UF_6.3V_1 USB3_TCL1_RX_IC_C_DN 6 SSRX_1N/2P C_RX2_1N/2P
2 TYPE_C0_RX2N C2451 1 2
0.33UF_6.3V_1 TYPE_C0_C_RX2N IN 45 46
10Gbps 2:1 MUX
44 USB3_TCL1_TX_IC_DP C24341 2 0.1UF_6.3V_1 USB3_TCL1_TX_IC_C_DP 7 SSTX_1P/2N C_TX1_1P/2N 11 TYPE_C0_TX1P
C24271 20.1UF_6.3V_1 TYPE_C0_C_TX1P 46
IN OUT
44 IN USB3_TCL1_TX_IC_DN C24351 2 0.1UF_6.3V_1 USB3_TCL1_TX_IC_C_DN 8 SSTX_1N/2P C_TX1_1N/2P 12 TYPE_C0_TX1N C24281 20.1UF_6.3V_1 TYPE_C0_C_TX1N OUT 46
3 TYPE_C0_RX1P C2452 1 2
0.33UF_6.3V_1 TYPE_C0_C_RX1P 45 46
C_RX1_1P/2N
4 TYPE_C0_RX1N 1 2 TYPE_C0_C_RX1N
IN
C_RX1_1N/2P C2453 0.33UF_6.3V_1 IN 45 46
C USB_P1_DP 13 15 USB_TYPECP1_DP C
27 BI H_DP/MGPIO2
BC1.2 Switch
TXD/MGPIO0/C_DP BI 46
27 BI USB_P1_DN 14 H_DM/ MGPIO3 MGPIO1/C_DM 16 USB_TYPECP1_DN BI 46 TO TYPE C CONN TYPE_C0_C_RX2P OUT 45 46
TYPE_C0_C_RX2N OUT 45 46
FROM PCH TYPE_C0_C_RX1P
TYPE_C0_C_RX1N
OUT 45 46
32
OUT 45 46
45
OUT EC_SM_INT0_R
220K_5%_1
220K_5%_1
220K_5%_1
220K_5%_1
SM_INT/GPIO4/TXD
EC_SMB3_DATA_R 30
R2481 1
1
52 BI EC_SMB3_CLK_R
SM_SDA/GPIO6
Realtek
R2480
R2482
R2483
52 31 SM_SCL/GPIO5
IN
RTS5441P
CONNECT TO EC
2
23
VCON_IN
LDO_3V3
REXT
E-PAD
5V_IN
1
6.2K_1%_2
R2441
REALTEK_RTS5441P_GR_QFN_32P
VCON0_IN_DFP P5V0A
33
25
24
18
1 R2442
2
35 OUT EC_SM_INT0 2 0_5%_2 EC_SM_INT0_R IN 45 IN 45

Q2421
P3V3_USB3 P5V0A PM513BA
VCON0_IN_DFP
2
3 2
45 26 PCH_TYPEC_INT1# 1 R2443 0_5%_2_DY
2 EC_SM_INT0_R 45
45 OUT S D
OUT IN
0.1uF_16V_2
C2437
R2440 1
47K_5%_2
10UF_6.3V_3
G
1
1
P3V3_USB3
1
C2436
C2439
B B
C2440
1
4.7UF_6.3V_3
C2438
10K_5%_2_DY
1
2
GPIO9_UFP
R2444
0.1uF_16V_2
45 IN
2
10UF_6.3V_3
2
1
2
PCH_TYPEC_INT1# OUT 26 45
A A
INVENTEC
TITLE
A10
TPS5450

XXX 03-Oct-2019
A02 SHEET of 45 70
8 7 6 5 4 3 2 1
TYPE C CONNECTOR
F F
D2420
46 45 CC01 1 2
OUT 1 2
PESD5V0U1BB
D2421
46 45 CC02 1 1 2 2
OUT
PESD5V0U1BB
E D2422 E
46 USB_TYPECP1_L_DN 1 1 2 2
BI
PESD5V0U1BB
D2423
46 BI USB_TYPECP1_L_DP 1 1 2 2
PESD5V0U1BB
PW_USB_TYPE_C_B
1000PF_50V_2_DY
PW_USB_TYPE_C_B
10UF_25V_5
0.1UF_25V_2
C2444
C2443
C2441
4.7UF_25V_5_DY
1
2
C2442
D2425
2
1 2
D CN2420 D
A1 B12 PANJIT_P4FL5_0A
GND GND
46 BI USB_TYPECP1_L_DP
45 IN TYPE_C0_C_TX1P A2 SSTXp1 SSRXp1 B11 TYPE_C0_C_RX1P OUT 45
46 BI USB_TYPECP1_L_DN
45 TYPE_C0_C_TX1N A3 SSTXn1 SSRXn1 B10 TYPE_C0_C_RX1N 45
IN A4 B9
OUT
VBUS VBUS
46 45 OUT CC01 A5 CC1 RFU2 B8
45 USB_TYPECP1_DP 1 L2420 4 A6 B7 USB_TYPECP1_L_DN 46
BI USB_TYPECP1_DN 2 3 A7
Dp1 Dn2
B6 USB_TYPECP1_L_DP
BI
45 BI Dn1 Dp2 BI 46
A8 RFU1 CC2 B5 CC02 OUT 45 46
MCF12102G900-T A9 B4
VBUS VBUS
TYPE_C0_C_RX2N A10 B3 TYPE_C0_C_TX2N C2446
45 OUT TYPE_C0_C_RX2P A11
SSRXn2 SSTXn2
B2 TYPE_C0_C_TX2P
IN 45 1 2
45 SSRXp2 SSTXp2 45
OUT A12 B1
IN
GND GND 12PF_50V_2
G1 G1 G3
G3 C2445
G2 G2 G4 G4 1 2
12PF_50V_2
C2430
1 2
JAE_SJ116121_DX07B024XJ1A_24P
0.1UF_16V_2
C2431
1 2
0.1UF_16V_2
C DGND_USB1 C
DGND_USB1
SIT 0612
D2426
TYPE_C0_RX2N 1 2
OUT 1 2
D2424
AMAZING_AZ5B6S_01B_R7G_2P 1 10
TYPE_C0_TX2P Line-1 NC
D2427 IN TYPE_C0_TX2N 2 9
TYPE_C0_RX2P 1 2 Line-2 NC
OUT 1 2 IN 3 GND GND 8
TYPE_C0_TX1P 4 7
AMAZING_AZ5B6S_01B_R7G_2P IN TYPE_C0_TX1N
Line-3 NC
IN 5 Line-4 NC 6
D2428
TYPE_C0_RX1N 1 2 AMAZING_AZ1045_04F_R7G_10P
1 2
OUT
AMAZING_AZ5B6S_01B_R7G_2P
D2429
TYPE_C0_RX1P 1 1 2 2
OUT
AMAZING_AZ5B6S_01B_R7G_2P
B B
A A
INVENTEC
TITLE
A10
=======
XXX 03-Oct-2019
A02 SHEET of 46 70
8 7 6 I 5 4 3 2 1
U1300
WLAN & BT 1
2
3
UIM_POWER_SRC/GP
UIM_POWER_SNK
UIM_SWP
W_DISABLE2#
LED2#
LED1#
63
64
65
BTIFON IN 35
47 P3V3A
REFERENCE 1300 ~ 1349 8

9
ALERT#
I2C_CLK
2 R1301 1 BTIFON
IN 35 47
10 I2C_DATA USB_D- 69 USB_BT_DN 10K_5%_2_DY
BI 27
USB_D+ 70 USB_BT_DP BI 27
11 COEX_TXD
12 COEX_RXD
13 COEX3 A4WP_IRQ# A08
14 SYSCLK/GNSS0 A4WP_CLK A09
CLKREQ# PULL-UP ON PCH SIDE 15 TX_BLANKING/GNSS1 A4WP_DATA A10
R1328
IN
47
28 SUSCLK32_PCH 1 2 0_5%_1NI SUSCLK32_WLAN 27 SUSCLK(32KHZ)(3.3V)
47
35
IN WLON 28 W_DISABLE1# LNA_EN A15
D 30
OUT PCIE_WAKE# 29 PEWAKE#
28
OUT CLKREQ_WLAN# 30 CLKREQ# WT_CLKP A19 CNV_WT_CLK_DP IN 29 D
60 49 48 36 35 30 BUF_PLT_RST# 31 PERST# WT_CLKN A20 CNV_WT_CLK_DN 29
IN CLK_PCIE_WLAN_DN IN
28 IN 33 REFCLKN0
28 IN CLK_PCIE_WLAN_DP 34 REFCLKP0 WT_D0P A21 CNV_WT_D0_DP
PCIE9_WLAN_RX_DN 36 A22 CNV_WT_D0_DN IN 29
27 OUT PERN0 WT_D0N
IN 29
27 PCIE9_WLAN_RX_DP 37 PERP0
OUT PCIE9_WLAN_TX_C_DN 39 A23 CNV_WT_D1_DP
27 IN PETN0 WT_D1P
IN 29
27 IN PCIE9_WLAN_TX_C_DP 40 PETP0 WT_D1N A24 CNV_WT_D1_DN
IN 29 CNVI TX
24 CL_CLK1 42 CLINK_CLK C_P32K A25 SUSCLK32_PCH 28
47
IN CL_DATA1 43
IN
24 IN CLINK_DATA
24 CL_RST#1 44 CLINK_RESET WGR_CLKP A32 CNV_WGR_CLK_DP 29
IN A33 CNV_WGR_CLK_DN OUT
WGR_CLKN
OUT 29
45 SDIO_RESET#
46 SDIO_WAKE# WGR_D0P A34 CNV_WGR_D0_DP 29
OUT
47 SDIO_DATA3 WGR_D0N A35 CNV_WGR_D0_DN OUT 29 CNVI RX
48 SDIO_DATA2
49 SDIO_DATA1 WGR_D1P A36 CNV_WGR_D1_DP OUT 29
50 SDIO_DATA0 WGR_D1N A37 CNV_WGR_D1_DN OUT 29
51 SDIO_CMD
P3V3A 52 A38 CNV_BRI_DT_R
SDIO_CLK BRI_DT BI 25
BRI_RSP A39 CNV_BRI_RSP_R R1323 1 2 22_5%_1 I CNV_BRI_RSP BI 25
53 UART_WAKE# (3.3V) RGI_DT A40 CNV_RGI_DT_R BI 25
C 54 LPSS_UART_RTS/BRI_DT RGI_RSP A41 CNV_RGI_RSP_R 1 2 22_5%_1 CNV_RGI_RSP C
R1325 I BI 25
WLON R1300 1 55 LPSS_UART_RXD/BRI_RSP RF_RESET_B A42 CNV_RF_RST# IN 26
47 35 2
IN 56 LPSS_UART_TXD/RGI_DT CLKREQ0 A43 CNV_CLKREQ IN 26 47
10K_5%_2_DY
57 LPSS_UART_CTS/RGI_RSP REFCLK0 A44 CLKIN_XTAL OUT 28
NO CONNECT A45
58 PCM_SYNC/I2S_WS
R1303 59 PCM_OUT/I2S_SD_OUT
2 1 60 PCM_IN/I2S_SD_IN
10K_5%_2_DY 61 PCM_CLK/I2S_SCK
CNV_CLKREQ 1 R1305 2
47 26 IN
INTEL_WLAN_AC9560_MODULE_1216_S3_NON_VPRO_96P
71.5K_1%_2
BOM CHNAGE TO 6042B0578801(AX201D2WL HRP2)
P3V3A_Q_WLAN
P3V3A
Q1300
PM513BA
2 D S 3
0.047UF_16V_2
B B
1
0.01UF_50V_2
0.01UF_50V_2
1
0.1UF_16V_2
0.1UF_16V_2
10UF_6.3V_3
10UF_6.3V_3
1
1
1
G
2
C1307
2
C1302
C1308
C1309
C1313
C1314
C1311
C1312
CSC0402_DY
1
U1300
2
6 88
2
GND[1] GND[27]
1
2
2
2
17 GND[2] GND[28] 89
R1302 20 GND[3] GND[29] 90
1 2 CNVI_PWR_EN# 35
IN 23 GND[4] GND[30] 91
100K_5%_2
26 GND[5] GND[31] 92
CONTROL BY EC 32 GND[6] GND[32] 93
I 35 GND[7] GND[33] 94
38 GND[8] GND[34] 95
U1300 41 GND[9] GND[35] 96
62 GND[10] GND[36] G1
4 3.3V[1] RESERVED[1] 7 68 GND[11] GND[37] G2
A48 3.3V[5] RESERVED[5] 21 76 GND[15] GND[41] G6
A49 3.3V[6] RESERVED[6] 22 77 GND[16] GND[42] G7
RESERVED[7] 24 78 GND[17] GND[43] G8
A RESERVED[10] 67 81 GND[20] GND[46] G11 A
RESERVED[11] A11 82 GND[21] GND[47] G12
RESERVED[12] A12 83 GND[22] GND[48] A07
RESERVED[16] A17 87 GND[26]
RESERVED[17] A18
A27 INTEL_WLAN_AC9560_MODULE_1216_S3_NON_VPRO_96P
RESERVED[18]
INVENTEC
RESERVED[19] A28
RESERVED[20] A29
RESERVED[21] A30
RESERVED[22] A46
RESERVED[23] A47 TITLE
A10
Block Diagram
DOC.NUMBER REV
INTEL_WLAN_AC9560_MODULE_1216_S3_NON_VPRO_96P SIZE CODE
1310xxxxx-0-0 A02
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
NGFF SSD1(PCIE/SATA 4X) D
PCH AUTO SWAP DN/DP WHEN PCIE INTERFACE

P3V3S_SSD1 (1.5A) P3V3S
CN1949
1 GND_1 PAD1949
3 KEY M 2 2 1
GND_3 3.3VAUX_2
10UF_6.3V_2_DY
10UF_6.3V_2_DY
2 1
PCIE9_SSD_RX_DN 5 4
15UF_25V_DY
27 OUT PERn3 3.3VAUX_4 I
10UF_6.3V_2
0.1UF_16V_2
A
PCIE9_SSD_RX_DP POWERPAD1X1M
1
7 6
22UF_6.3V_3
1
1
27 OUT PERp3 NC_6
9 8
C1949
C1948
C1947
C1959
C1946
GND_9 NC_8
C1950
PCIE9_SSD_TX_DN
+
11 10
27 IN PETn3 DAS/DSS#
27 IN PCIE9_SSD_TX_DP 13 PETp3 3.3VAUX_12 12
15 GND_15 3.3VAUX_14 14
PCIE10_SSD_RX_DN 17 16 SIT 0513
2
27
2
OUT PERn2 3.3VAUX_16
27 OUT PCIE10_SSD_RX_DP 19 PERp2 3.3VAUX_18 18
21 GND_21 NC_20 20
27 PCIE10_SSD_TX_DN 23 22
IN PCIE10_SSD_TX_DP 25
PETn2 NC_22
24
27 IN PETp2 NC_24
27 GND_27 NC_26 26
27 PCIE11_SSD_RX_DN 29 28
OUT PCIE11_SSD_RX_DP 31
PERn1 NC_28
30
C 27 OUT PERp1 NC_30 C
33 GND_33 NC_32 32
27 PCIE11_SSD_TX_C_DN 35 34
IN PCIE11_SSD_TX_C_DP 37
PETn1 NC_34
36
27 IN PETp1 NC_36
R1949
39 GND_39 DEVSLP 38 1 2 DEVSLP_SSD1 27
PCIE12_SATA2_SSD_RX_DP 41 40
IN
27 OUT PERn0/SATA-B+ NC_40 SHORT_0402_5
27 PCIE12_SATA2_SSD_RX_DN 43 42
OUT 45
PERp0/SATA-B- NC_42
44
GND_45 NC_44
27 PCIE12_SATA2_SSD_TX_C_DN 47 46
IN PCIE12_SATA2_SSD_TX_C_DP 49
PETn0/SATA-A- NC_46
48
27 IN PETp0/SATA-A+ NC_48
51 GND_51 PERST#/NC_50 50 BUF_PLT_RST# IN 30 35 36 47 49 60
28 IN CLK_PCIE_SSD1_DN 53 REFCLKN CLKREQ#/NC_52 52 CLKREQ_SSD1# OUT 28
28 IN CLK_PCIE_SSD1_DP 55 REFCLKP PEWake#/NC_54 54
57 GND_57 NC_56 56
NC_58 58
CS KEY M PS
KEY M
KEY M
P3V3S_SSD1
B 67 NC_67 SUSCLK 68 B
M2_SSD1_DET# 1 R1951 2 69 70
27 OUT PEDET 3.3VAUX_70
0_5%_2 71 GND_71 3.3VAUX_72 72
0.1UF_16V_2
I
10UF_6.3V_2
BIOS--- A
1
73 74
1
GND_73 3.3VAUX_74
D
75
C1952
SATA : L GND_75
C1951
PCIE : H
D
G G
Q1949
2
GND_G1
GND_G2
2
S
PANJIT_2N7002KW_3P_DY
2
S
R1950 LOTES_APCI0146_P001H_75P
20K_5%_2_DY
G2
G1
1
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
NGFF SSD2(PCIE/SATA 2X) D
PCH AUTO SWAP DN/DP WHEN PCIE INTERFACE

P3V3S_SSD2 (1.5A) P3V3S
CN1951
1 GND_1 PAD1950
3 GND_3
KEY M 3.3VAUX_2 2 2 1
10UF_6.3V_2_DY
10UF_6.3V_2_DY
2 1
5 PERn3 3.3VAUX_4 4 I
10UF_6.3V_2
A
0.1UF_16V_2
7 6 POWERPAD1X1M
1
PERp3 NC_6
9 GND_9 NC_8 8
C1957
C1960
C1961
C1958
C1956
11 PETn3 DAS/DSS# 10
13 12 22UF_6.3V_3
PETp3 3.3VAUX_12
15 GND_15 3.3VAUX_14 14
17 16
2
PERn2 3.3VAUX_16
19 PERp2 3.3VAUX_18 18
21 GND_21 NC_20 20
23 22
25
PETn2
PETp2
NC_22
NC_24 24 SIT 0513
27 GND_27 NC_26 26
27 OUT PCIE7_SSD_RX_DN 29 PERn1 NC_28 28
27 OUT PCIE7_SSD_RX_DP 31 PERp1 NC_30 30
C 33 GND_33 NC_32 32 C
27 IN PCIE7_SSD_TX_DN 35 PETn1 NC_34 34
27 IN PCIE7_SSD_TX_DP 37 PETp1 NC_36 36
39 38 1 R1952 2 DEVSLP_SSD2
GND_39 DEVSLP IN 27
27 OUT PCIE8_SATA1_SSD_RX_DP 41 PERn0/SATA-B+ NC_40 40 SHORT_0402_5
27 OUT PCIE8_SATA1_SSD_RX_DN 43 PERp0/SATA-B- NC_42 42
45 GND_45 NC_44 44
27 IN PCIE8_SATA1_SSD_TX_C_DN 47 PETn0/SATA-A- NC_46 46
27 IN PCIE8_SATA1_SSD_TX_C_DP 49 PETp0/SATA-A+ NC_48 48
51 GND_51 PERST#/NC_50 50 BUF_PLT_RST# IN 30 35 36 47 48 60
28 IN CLK_PCIE_SSD2_DN 53 REFCLKN CLKREQ#/NC_52 52 CLKREQ_SSD2# OUT 28
28 IN CLK_PCIE_SSD2_DP 55 REFCLKP PEWake#/NC_54 54
57 GND_57 NC_56 56
NC_58 58
CS KEY M PS
KEY M
KEY M
P3V3S_SSD2
B 67 NC_67 SUSCLK 68 B
M2_SSD2_DET# 1 R1954 2 69 70
27 OUT PEDET 3.3VAUX_70
0_5%_2 71 GND_71 3.3VAUX_72 72 I
10UF_6.3V_2
A
73 74
1
1
BIOS--- GND_73 3.3VAUX_74
D
75 GND_75
C1955
SATA : L C1954
D
PCIE : H G G 0.1UF_16V_2
Q1950
GND_G1
GND_G2
2
2
S
PANJIT_2N7002KW_3P_DY
2
S
R1953 LOTES_ACPI0079_P005H_75P
20K_5%_2_DY
G2
G1
1
A A
M.2 CARD USES; SATA SIGNALING (LOW) OR PCIE SIGNALING (HIGH)
INVENTEC
TITLE
REFERENCE NUMBER:1950~1999 A10

Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DP REDRIVER
D
D
P3V3S
100K_5%_2
1
R2810
P3V3S
2
29 DP_AUX_DN C2800 1 20.1UF_6.3V_1 DP_AUX_RE_DP 52
IN 20.1UF_6.3V_1
OUT
DP_AUX_DP C2801 1 DP_AUX_RE_DN
2
29 IN OUT 52
10K_5%_2
R2806
100K_5%_2
R2811
1
2.2UF_6.3V_2
2
1
P3V3S
C2802
C C
C2812
2 1
36
35
34
33
32
31
30
29
28
27
26
25
0.1UF_16V_2
U2800
SCL_DDC
RST#
AUX_SNKP
VDD33
VDD33
VDD33
SDA_DDC
AUX_SRCN
PD#
AUX_SRCP
AUX_SNKN
GND
37 NC
0.1UF_6.3V_1 GND 24
29 IN DP_TX0_DP C2804 1 2 DDI1_TX0_C2_DP 38 IN0P
23 DP_TX0_RE_DP
DP_TX0_DN C2803 1 2 0.1UF_6.3V_1 DDI1_TX0_C2_DN 39 IN0N
OUT0P OUT 52
29 IN OUT0N 22 DP_TX0_RE_DN
OUT 52
50 IN DP_CFG1 40 CFG1
21
0.1UF_6.3V_1 NC
29 IN DP_TX1_DP C2806 1 2 DDI1_TX1_C2_DP 41 IN1P
20 DP_TX1_RE_DP
DP_TX1_DN C2805 1 2 0.1UF_6.3V_1 DDI1_TX1_C2_DN 42 IN1N
OUT1P OUT 52
29 IN OUT1N 19 DP_TX1_RE_DN
OUT 52
43 NC
GND 18
DP_TX2_DP C2807 1 2 0.1UF_6.3V_1 DDI1_TX2_C2_DP 44 IN2P
29 IN DP_TX2_DN C2810 1 2 0.1UF_6.3V_1 DDI1_TX2_C2_DN 45 OUT2P 17 DP_TX2_RE_DP
OUT 52
29 IN IN2N
16 DP_TX2_RE_DN
46 NC
OUT2N OUT 52
NC 15
DP_TX3_DP C2809 1 2 0.1UF_6.3V_1 DDI1_TX3_C2_DP 47
SDA_CTL_CFG0
29 IN IN3P
14
SCL_CTL_PEQ
OUT3P DP_TX3_RE_DP
29 DP_TX3_DN C2808 1 2 0.1UF_6.3V_1 DDI1_TX3_C2_DN 48 IN3N OUT 52
IN OUT3N 13 DP_TX3_RE_DN
OUT 52
I2C_ADDR
49
CAD_SRC
HPD_SRC
CAD_SNK
HPD_SNK
EPAD
VDD33
VDD33
VDD33
CEXT
REXT
P3V3S
B B
P3V3S
10
4
2
3
5
6
7
8
9
PARADE_PS8330BQFN48GTR2_A0_QFN_48P
12
11
1
4.7K_5%_2_DY
P3V3S
1
DP_RE_HPD P3V3S
IN 52
R2804
R2807 2 DP_HPD
1 PEQ10 OUT 29
4.7K_5%_2_DY
DP_CFG0
1
4.7K_5%_2_DY IN 50
R2808 2
2
R2801
DP_CFG1 OUT 50
0.1UF_16V_2
4.7K_5%_2_DY 2.2UF_6.3V_2
4.99K_1%_2
1
1
1
1
4.7K_5%_2_DY
1M_5%_2
2
1
C2813
R2803
R2802
DP_CFG0
C2811
50 OUT
R2805
4.7K_5%_2_DY
1
2
2
2
R2809
2
2
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
USB3 REDRIVER
REFERENCE 2600~2699(USB RESERVE)
D
D
P3V3S
R2616 2 P3V3S
1
4.7K_5%_2_DY
1 R2617 2
4.7K_5%_2_DY
0.1UF_16V_2
1
1 R2618 2
C2607
4.7K_5%_2_DY
1 R2619 2
C 4.7K_5%_2_DY
C
2
1 R2620 2
C2610
18
17
16
15
14
13
USB3_TYPEC_TX4_DP 1 2 4.7K_5%_2_DY
27 IN U2602
0.1UF_10V_1
TST/NC
A_DE0/SCL_CTL
VDD
A_EQ0/NC
A_EQ1/SDA_CTL
A_DE1/NC
C2612
27 USB3_TYPEC_TX4_DN 1 2
IN USB3_TYPEC_TX4_C_DP 19 A_INp A_OUTp 12 USB3_TCL_TX_IC_DP
OUT 52
0.1UF_10V_1 USB3_TYPEC_TX4_C_DN 20 11 USB3_TCL_TX_IC_DN
A_INn A_OUTn
OUT 52
21 GND GND 10
USB3_TYPEC_RX4_C_DP 22 9 USB3_TCL_RX_IC_DP 52
C2613 USB3_TYPEC_RX4_C_DN 23
B_OUTp B_INP
USB3_TCL_RX_IC_DN
IN
8
27 OUT USB3_TYPEC_RX4_DP 1 2 B_OUTN B_INn
IN 52
B_EQ1/I2C_ADDR1
B_DE0/I2C_ADDR0
24 I2C_EN REXT 7 1 2
0.1UF_10V_1
R2621 4.99K_1%_2
B_EQ0/NC
B_DE1/NC
25 TML
C2614
VDD
PD#
USB3_TYPEC_RX4_DN 1 2
27 OUT
0.1UF_10V_1
2
3
4
5
PARADE_PS8713BTQFN24GTR2_A3_TQFN_24P
6
1
B P3V3S B
P3V3S
1 R2622 2
10K_5%_2_DY
0.1UF_16V_2
P3V3S
1
C2609
1 R2623 2
4.7K_5%_2_DY
1 R2624 2
2
4.7K_5%_2_DY
1 R2626 2
4.7K_5%_2_DY
1 R2625 2
4.7K_5%_2
SIT2 0726
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
P5V0_SYS P5V0_SYS
P3V3A_TYPEC D2610
1 2
RSC_0402_DY
1
4.7K_5%_3
R2607
10UF_25V_5
10UF_25V_5
1
1
52
IN FAST_ON
PANJIT_PZ1AL5V6B_DY
R2608
C2670
C2601
PANJIT_PZ1AL3V9B_DY
1
R2614
2
F P3V3_TypeC P3V3AL PW_USB_TYPE_C_A RTS_FAST_ON 1 2 F
52
2
PW_USB_TYPE_C_A D2613 IN
2
U2611
D2611
0_5%_2
100K_5%_2
A1 B1 2 1
1
VIN1 VCP1 2 1
A2 VIN2 VCP2
B2 FAST TURN ON
R2609
R2611
D2604 C1
R2675
B4 EN
VCP3
SBA340AL H:ENABLE
2 1
100_5%_6
1
2 1
C2 L:DISABLE
2
10K_5%_2 10K_5%_2_DY VBUS3
R2601
FAST_ON C4 D1
2
52 FO VBUS1
IN
16.5K_1%_2
1
D2
0.47UF_25V
1
SS3040HE USB_OC#_3 VBUS2
R2697
A4
1
P5V0_SYS
1UF_6.3V_2
52 OUT nFLT
C2695
D2602 ILIM A3
C2697
U2695
D 2
D4 CAP GND2 C3 I
2 1
1000PF_50V_2
2 1
16.2K_1%_2
1 5 B3 D3
2
VIN VOUT GND1 GND3
2
2
100K_5%_2
GND
C2600
R2649
D
3 4
2
SS3040HE EN ADJ/NC NXP_NX5P3290UK_WLCSP_16P VBUS_DSCHG G
52
IN G Q2602
10K_1%_2
R2695
PANJIT_2N7002KW_3P
BCD_AP2204_SOT23_5P
R2696
S
I
100K_5%_2
1
2
1
1/4 W
R2610
VOUT=VREF X [1+R2697/R2696] SIT 0612
S
12
VBUSOUT_EN
0.1UF_25V_2_DY
52 IN
1
C2696
PD_VBUS_CTRL1=1(CONSUMER PATH ON)
VBUSOUT
2
47K_5%_2
P3V3_TypeC P5V0_SYS
R2612
H:ON PD_VBUS_CTRL1=0(CONSUMER PATH OFF)
2
L:OFF
10K_1%_2 RSC_0402_DY
115K_1%_2
I
1
PAD2600 A PVADPTR
2
R2605
R2674
E P3V3A_TYPEC PW_USB_TYPE_C_A 1 2 E
1 2
R2605
PW_USB_TYPE_C_A
10K_5%_2_DY
1
POWERPAD_2_0610
Q2604 Q2603
2
2
R2603
8 D S 1 1 S D 8
LOC_PWR_MON
7 2 2 7
10K_1%_2
R2671
0.47UF_25V_DY
1
200K_5%_2_DY
2.2_5%_6
200K_1%_2 6 3 3 6
R2606
R2678
1000PF_50V_2_DY
2
C2621
R2602
5 G 4 4 G 5
0.01UF_50V_2
2
C2628
PMOS_4D3S PMOS_4D3S
2
2 1
R2642
VMON
1000PF_50V_2
SYNNEX_SM3303PSQG_DY SYNNEX_SM3303PSQG_DY
I A C2632
1
2
1 2
C2622
R2606
2
SIT 0516
1
200K_1%_2
C2631
100K_5%_2_DY
2.2UF_25V_5
52 USB_OC#_3
1
IN
1
R2672
1
2
1
TP2602 10K_1%_2
R2692
10K_5%_2_DY
1
R2640
TP24
R2604 1
2
1
TP24
PD_VBUS_CTRL1 TP2601
52
OUT SIT2 0729
2
GPIO1_UFP
D 2
52 OUT VBUSOUT_EN
5V_IMON
OUT
1000PF_50V_2
P3V3_TypeC 52
100K_1%_2
1
1
2
27
28
30
29
23
21
22
R2643
R2693
C2691
D
52 PD_VBUS_CTRL1 1 2 G G Q2605
U2600 IN
R2659 2 PANJIT_2N7002KW_3P_DY
100K_5%_2_DY
IN USB3_TCL_TX_IC_C_DP 1 0_5%_2_DY
0.1UF_16V_2_DY
S
1
1
VMON/MGPIO9
TXD/LOC_PWR/MGPIO10
750K_5%_1
GPIO8/I2C_SDA
TXD/GPIO10/I2C_EN
IMON/MGPIO8
TXD/GPIO9/I2C_INT
GPIO7/I2C_SCL
R2641
D R2648 2 D
S
C2629
IN USB3_TCL_TX_IC_C_DN 1
750K_5%_1 DB_CFG
20 1 R2673 2
0_5%_2_DY 53 52 IN CC1
CC2
2
53 52
9 CC1 IN
CC1 OUT 52 53
CC2 11 CC2 OUT 52 53
220PF_50V_2
1
1
220PF_50V_2
C2623
C2624
51 OUT USB3_TCL_RX_IC_DP C2669 1 2 0.1UF_6.3V_1 USB3_TCL_RX_IC_C_DP 39 SSRX_1P/2N C_TX2_1P/2N 15 TYPE_C1_TX2P
C2648 1 2 0.1UF_25V_1 TYPE_C1_C_TX2P OUT 53
51
OUT
USB3_TCL_RX_IC_DN C2668 1 2 0.1UF_6.3V_1 USB3_TCL_RX_IC_C_DN 40 SSRX_1N/2P C_TX2_1N/2P
14 TYPE_C1_TX2N
C2649 1 20.1UF_25V_1 TYPE_C1_C_TX2N OUT 53
2
51 USB3_TCL_TX_IC_DP C2667 1 2 0.1UF_6.3V_1 USB3_TCL_TX_IC_C_DP 41 SSTX_1P/2N C_RX2_1P/2N 19 TYPE_C1_RX2P C2680 1 2 0.33UF_25V_1 TYPE_C1_C_RX2P 52 53
IN IN
51 IN USB3_TCL_TX_IC_DN C2666 1 2 0.1UF_6.3V_1 USB3_TCL_TX_IC_C_DN 42 SSTX_1N/2P C_RX2_1N/2P 18 TYPE_C1_RX2N C2681 1 2 0.33UF_25V_1 TYPE_C1_C_RX2N IN 52 53
50
IN
DP_TX0_RE_DP C2652 1 2 0.1UF_6.3V_1 DP_TBT0_TX0_C_DP35 DP0_1P/2N C_TX1_1P/2N
13 TYPE_C1_TX1P
C2646 1 20.1UF_25V_1 TYPE_C1_C_TX1P OUT 53
50 IN DP_TX0_RE_DN C2653 1 2 0.1UF_6.3V_1 DP_TBT0_TX0_C_DN36 DP0_1N/2P C_TX1_1N/2P 12 TYPE_C1_TX1N C2647 1 20.1UF_25V_1 TYPE_C1_C_TX1N OUT 53
10Gbps 3:2 MUX
50 IN DP_TX1_RE_DP C2658 1 2 0.1UF_6.3V_1 DP_TBT0_TX1_C_DP 43 DP1_1P/2N C_RX1_1P/2N 17 TYPE_C1_RX1P C2682 1 2 0.33UF_25V_1 TYPE_C1_C_RX1P IN 52 53
50 IN DP_TX1_RE_DN C2659 1 2 0.1UF_6.3V_1 DP_TBT0_TX1_C_DN 44 DP1_1N/2P C_RX1_1N/2P 16 TYPE_C1_RX1N C2683 1 2 0.33UF_25V_1 TYPE_C1_C_RX1N IN 52 53
50 IN DP_TX2_RE_DP C2656 1 2 0.1UF_6.3V_1 DP_TBT0_TX2_C_DP 45 DP2_1P/2N

50 DP_TX2_RE_DN C2657 1 2 0.1UF_6.3V_1 DP_TBT0_TX2_C_DN 46 DP2_1N/2P
IN
50 IN DP_TX3_RE_DP C2654 1 2 0.1UF_6.3V_1 DP_TBT0_TX3_C_DP37 DP3_1P/2N
50
IN
DP_TX3_RE_DN C2655 1 2 0.1UF_6.3V_1 DP_TBT0_TX3_C_DN38 DP3_1N/2P
TYPE_C1_C_RX2P
OUT
TYPE_C1_C_RX2N
52 53
OUT 52 53
C DP_AUX_RE_DP C2660 1 2 0.1UF_6.3V_1 TYPE_C1_C_RX1P
OUT 52 53 C
50 BI DP_TBT0_AUX_C_DP1 AUX_P/MGPIO4/TXD MGPIO6/SBU1 3 USB_SBU1 OUT 53
Low Speed MUX TYPE_C1_C_RX1N
OUT 52 53
50 BI DP_AUX_RE_DN C2661 1 2 0.1UF_6.3V_1 DP_TBT0_AUX_C_DN2 AUX_N/MGPIO5 MGPIO7/SBU2 4 USB_SBU2 OUT 53
220K_5%_1
220K_5%_1
220K_5%_1
220K_5%_1
1
R2682 1
R2683 1
R2680
R2681
50 IN DP_RE_HPD 34 HPD/GPIO3/TXD
25 DCI_DATA 5 H_DP/DCI_DATA/MGPIO2 TXD/MGPIO0/C_DP 7 RTS_FAST_ON 52

OUT BC1.2 Switch OUT
2
25 OUT DCI_CLK 6 H_DM/DCI_CLK/MGPIO3 MGPIO1/C_DM 8 VBUS_DSCHG
OUT 52
P3V3_TypeC
100K_5%_2
1
R2650
52 OUT EC_SM_INT_R 33 SM_INT/GPIO4/TXD Realtek

52 45 EC_SMB3_DATA_R 31
BI EC_SMB3_CLK_R 32
SM_SDA/GPIO6
2
DP_TBT0_AUX_C_DN
52 45 IN SM_SCL/GPIO5
REALTEK_RTS5450_GR_QFN_46P
IN DP_TBT0_AUX_C_DP
IN CONNECT TO EC
100K_5%_2
1
24 REXT NI
R2651
VCON_IN
LDO_3V3
1 R2667
1
6.2K_1%_2
E-PAD
2
5V_IN
R2670
0_5%_2_DY
I I P5V0_SYS
2
Q2601 Q2600
B DIODES_DMP1045U_7_SOT23 DIODES_DMP1045U_7_SOT23 B
2
47
26
25
10
VCON_IN_DFP D D S
S S S D
D
I
1000PF_50V_2
1
P3V3_TypeC
47K_5%_2
P3V3A_TYPEC
0.01UF_50V_2_DY
10UF_6.3V_3
2
1
R2613
R2600
C2602
C2630
1 2
C2608
R2652 2 0_5%_2
G
G
35 EC_SM_INT 1 EC_SM_INT_R 52
OUT IN 0_5%_3
1
EC_SMB3_DATA 1 R2653 2 0_5%_2 EC_SMB3_DATA_R

2
2
35 BI BI 45 52
2
1
1
C2606
R2654
2
C2605
EC_SMB3_CLK EC_SMB3_CLK_R
4.7UF_6.3V_3
1 2 0_5%_2
C2633
35 IN OUT 45 52 I
1
1K_5%_2
R2638
0.1uF_16V_2
R2655 2 0_5%_2_DY
10UF_6.3V_3
PCH_TYPEC_INT# 1 EC_SM_INT_R
2
26 OUT IN 52
GPIO1_UFP 1 R2647 2
52
1 R2656 52
2
25
BI PCH_I2C1_DATA 2 0_5%_2_DY EC_SMB3_DATA_R
BI 45 52 IN
0_5%_2_DY
PCH_I2C1_CLK 1 R2657 2 0_5%_2_DY EC_SMB3_CLK_R
12
25 IN OUT 45 52
V I
1
3.3V MODE 5V MODE D2607

ON_MMSZ4685T1G
R2600 V OPEN
2
I
2D
P3V3_TypeC P3V3_TypeC P3V3A_TYPEC

D
Q2607 G G
1
A PANJIT_2N7002KW_3P A
S
1 R2646 2 EC_SM_INT_R
IN 52
R2658
4.7K_5%_1
I
INVENTEC
S
1 R2645 2 EC_SMB3_DATA_R 2 R2639 1

10K_5%_2_DY IN 45 52
47K_5%_2
2
4.7K_5%_1 TITLE
PCH_TYPEC_INT# 1 R2644 2 EC_SMB3_CLK_R
OUT 26 52 IN 45 52 A10
4.7K_5%_1
TPS5450

XXX 03-Oct-2019
A02 SHEET of 52 70
8 7 6 5 4 3 2 1
F F
CC2
52 BI
52 CC1
BI
52 BI USB_SBU2
52 USB_SBU1
BI
15
14
13
12
11
P3V3A_TYPEC
U2601
SBU2
CC1
CC2
GND
SBU1
53 USB_P1_L_DP 16 10 R2615
BI USB_P1_L_DN 17
D4 VPWR
9 1 2
1UF_6.3V_2
53 BI 18
D3 FLT#
8
C2603
GND GND
19 7 100K_5%_2
D2 RPD_G1
20 D1 RPD_G2 6
C_SBU1
C_SBU2
C_CC1
C_CC2
VBIAS
21
2
TML
TI_TPD8S300_WQFN_20P
5
2
3
4
1
C_CC2 BI 53
C_CC1 53
BI
E C_SBU_DN BI 53 E
C_SBU_DP BI 53
0.1UF_25V_2
1
C2604
2
PW_USB_TYPE_C_A
PW_USB_TYPE_C_A
10UF_25V_5_DY
1000PF_50V_2_DY
C2615
0.1UF_25V_2
1
4.7UF_25V_5_DY
C2617
C2611
C2616
2
D2603
2
1 2
D CN2601
D
PANJIT_P6AF22A
53 BI USB_P1_L_DP A1 GND GND B12
53 BI USB_P1_L_DN 52 IN TYPE_C1_C_TX1P A2 SSTXp1 SSRXp1 B11 TYPE_C1_C_RX1P OUT 52
52 TYPE_C1_C_TX1N A3 B10 TYPE_C1_C_RX1N 52
IN A4
SSTXn1 SSRXn1
B9
OUT
VBUS VBUS
53 C_CC1 A5 CC1 RFU2 B8 C_SBU_DN 53
USB_TYPEC_DP 1 L2600
4
OUT A6 B7 USB_P1_L_DN
BI
27 BI USB_TYPEC_DN 2 3 A7
Dp1 Dn2
B6 USB_P1_L_DP
BI 53
27 BI C_SBU_DP A8
Dn1 Dp2
B5 C_CC2
BI 53
53 RFU1 CC2 53
MCF12102G900-T BI A9 B4
OUT
VBUS VBUS
52 OUT TYPE_C1_C_RX2N A10 SSRXn2 SSTXn2 B3 TYPE_C1_C_TX2N IN 52
52 TYPE_C1_C_RX2P A11 B2 TYPE_C1_C_TX2P 52
OUT A12
SSRXp2 SSTXp2
B1
IN
GND GND
G1 G1 G3 G3
G2 G2 G4 G4
JAE_SJ116121_DX07B024XJ1A_24P
DGND_USB1
C C
D2600 D2601
TYPE_C1_RX2P 1 10 TYPE_C1_TX2P 1 10
OUT TYPE_C1_RX2N 2
Line-1 NC
9 IN TYPE_C1_TX2N 2
Line-1 NC
9
OUT Line-2 NC
IN Line-2 NC
3 GND GND 8 3 GND GND 8
TYPE_C1_RX1P 4 7 TYPE_C1_TX1P 4 7
OUT TYPE_C1_RX1N
Line-3 NC IN TYPE_C1_TX1N
Line-3 NC
5 Line-4 NC 6 IN 5 Line-4 NC 6
OUT
AMAZING_AZ1045_04F_R7G_10P AMAZING_AZ1045_04F_R7G_10P
B B
A A
INVENTEC
TITLE
A10
=======
XXX 03-Oct-2019
A02 SHEET of 53 70
8 7 6 5 4 3 2 1
REFFERENCE 3000~3049(LCM)
EDP CONN
R3005
INV_PWM_3_CPU 1 2 INV_PWM_3
EC_BKLTEN 1 R3013 2 EDP_BKLTEN
29 IN OUT 54
35 IN OUT 54
1
100_5%_2 100_5%_2
D
1
2
C3008
D
R3008 C3007 R3006
680PF_50V_2
100K_5%_2 100K_5%_2
CSC0402_DY
2
1
2
EDP
CN3000
SIT 0611 30
54 EDP_TX3_DN 30
IN EDP_TX3_DP 29 29
1 R3004 2 54 IN 28
P3V3S 28
100_5%_2 EDP_TX2_DN 27 27 G
G5
I
54 IN 26 G
A 54 IN EDP_TX2_DP 26 G4
U3000 25 G
PAD3000 25 G3
5 1 24 G
IN OUT 1 1 2
2 54 IN EDP_TX1_DN 24 G2
2 23 G
2.2UF_6.3V_2 GND 54 IN EDP_TX1_DP 23 G1
4 3 22
POWERPAD1X1M 22
1
DIS EN
R3001 EDP_TX0_DN 21 21
1 2 LCM_VDDEN 29
54 IN
IN 20
C3000
NUVO_NCT3521U_SOT23_5P 54 IN EDP_TX0_DP 20
C 19 C
CSC0402_DY
19
1
0_5%_2 18
54 BI EDP_AUX_DP 18
17
C3003
EDP_AUX_DN 17
2
54 BI 16
16
15
P3V3S_LCDVDD2 15
14
14
2
SIT 0528 13 13
2.2UF_6.3V_2
0.1UF_16V_2
12
12
1
11
11
C3001
10
CPU_EDP_HPD
C3002
29 OUT 10
9
54 IN EDP_BKLTEN 9
8
54 IN INV_PWM_3 8
PVBAT 7 7
2
CPU_EDP_TX0_DP C3013 1 2 0.1UF_10V_1 EDP_TX0_DP 6
29 IN OUT 54 6
CPU_EDP_TX0_DNC3014 1 2 0.1UF_10V_1 EDP_TX0_DN I 5
29 IN OUT 54 A 5
4
PAD3001 R3000 4
3
29 CPU_EDP_TX1_DP C3017 1 2 0.1UF_10V_1 EDP_TX1_DP 54 1 2 1 2 3
IN CPU_EDP_TX1_DNC3016 1 2 0.1UF_10V_1 EDP_TX1_DN
OUT 1 2 2
29 IN OUT 54 0_5%_5_DY 2
1
4.7UF_25V_3
POWERPAD1X1M 1
0.1UF_25V_2
1
1
29 CPU_EDP_TX2_DP C3026 1 2 0.1UF_10V_1_DY EDP_TX2_DP 54 FUSE3000 ACES_50406_03001_Q01_30P
IN OUT
C3009
29 CPU_EDP_TX2_DNC3027 1 2 0.1UF_10V_1_DY EDP_TX2_DN 54 1 2
IN OUT
C3010
B 29 CPU_EDP_TX3_DP C3028 1 2 0.1UF_10V_1_DY EDP_TX3_DP SIT 0611 54 1.5A_24V B
IN CPU_EDP_TX3_DNC3029 1 2 0.1UF_10V_1_DY EDP_TX3_DN
OUT
29 IN OUT 54
2
29 CPU_EDP_AUX_DNC3019 1 2 0.1UF_10V_1 EDP_AUX_DN 54
BI CPU_EDP_AUX_DPC3020 1 2 0.1UF_10V_1 EDP_AUX_DP
BI
29 BI BI 54
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
WEBCAM
D P3V3S
D
C3004
1 2
U3001 0.1UF_16V_2
1 B VCC 5
38 DMIC_CLK 2 A
IN 3 4 DMIC_IC_CLK
GND Y
OUT 55
C C
WEBCAM
P3V3S
L3000 CN3001
LS_SHORT_0504 1 1
USB_CAM_DP USB_CAM_L_DP 2 2
27 BI
PAD3002 USB_CAM_DN 1 4 USB_CAM_L_DN 3 3
27 BI 2 3 4
1 1 2 2 P3V3S_CAMERA 4
55 IN DMIC_IC_CLK R3015 1 2 0_5%_2 DMIC_IC_CLK_R 5 5
POWERPAD1X1M 6 6 G G1
C3012 DMIC_DATA 1 2 7 G2
0.1UF_16V_2
1 2 38 BI 7 G
1
CSC0402_DY 1 2 R3011100_5%_2 8 8
C3018
C3011 I A 22PF_50V_2
ACES_50208_0080N_001_8P
2
B B
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 4300~4349(FAN)
REFERENCE 4411~4449(THERMAL )
P5V0S I
P5V0S I
PAD4300 P5V0S_FAN1 PAD4301

1 1 2
2 1 1 2
2 P5V0S_FAN2
4.7UF_6.3V_3
4.7UF_6.3V_3
0.1UF_16V_2
0.1UF_16V_2
1
1
POWERPAD1x1m POWERPAD1x1m
1
1
D
2 C4307
C4303
C4304
C4308
D
P3V3S P3V3S
2
2
10K_5%_2
10K_5%_2
10K_5%_2
10K_5%_2
1
1
1
1
R4300
R4305
R4302
R4301
CN4300 CN4301
1 1 1 1
2 2
2
2
2
2 2
FAN1_TACH 3 G1 FAN2_TACH 3 G1
35 IN 4
3 G
G2
35 IN 4
3 G
G2
35 IN FAN1_PWM 4 G 35 IN FAN2_PWM 4 G
220pF_50V_2
220pF_50V_2
CSC0402_DY
CSC0402_DY
1
1
1
ENTERY_3802K_Q04N_07L_4P ENTERY_3802K_Q04N_07L_4P
C4305
C4301
C4306
C4300
2
2
2
C C
FAN1 CN CPU FAN2 CN CPU

B B
30 16 12 PVCORE_PG THERM_SHUTDWN# 35
IN OUT
1
PVCCST
R4414
D
Q4411
2200PF_50V_2_DY 1K_5%_2_DY
1
2M_5%_2_DY
D
2
R4417
G G
S
C
D4410 Q4412 PANJIT_2N7002KW_3P_DY
1
NC
R4413
2
CPU_THERMTRIP# 3 1 1 2 B
S
26 B
C
IN
330_5%_2_DY
E
MMBT4401_DY C4412
CSC0402_DY
1
DIODE-BAT54-TAP-PHP_DY
2
C4413
2
A A
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
EFERENCE NUMBER:4411~4449 CHANGE by
PCB P/N
XXX DATE
PCB VER
A3 CS
SHEET of 56 70
<ENG>
60xxxxxxxxxx A02
03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
REFERENCE 3050~3099(HDMI)
HDMI REPEATER (4K2K)

P3V3S
C3201
1 2
0.01UF_50V_2
D
D
HDMI_ISET IN 57
29 BI HDMI_DDCCLK HDMI_CN_DDCDATA BI 58
29 BI HDMI_DDCDATA HDMI_CN_DDCCLK BI 58
P1V2S P1V2S
C3205 C3204
1 2 1 2
0.1UF_16V_2
0.01UF_50V_2
41
40
39
38
37
36
35
34
33
32
31
U3200
VDDTX
SDA_SNK
GND
ISET
VDDRX
SCL_SRC
EPAD
PD#
SCL_SNK
SDA_SRC
VDD33
58 HDMI_TX2_C_DP 1 30 HDMI_TX2_IC_DP 58
IN HDMI_TX2_C_DN 2
IN_D2p OUT_D2p
29
OUT
C 58 IN IN_D2n OUT_D2n HDMI_TX2_IC_DN
OUT 58 C
29 HDMI_HPDET 3 28 HDMI_HPD_CN 58
HDMI_HPDET : 3V 58
OUT HDMI_TX1_C_DP 4
HPD_SRC HPD_SNK
27 HDMI_TX1_IC_DP
IN
58
IN HDMI_TX1_C_DN 5
IN_D1p OUT_D1p
26 HDMI_TX1_IC_DN
OUT
58 IN IN_D1n OUT_D1n OUT 58
58 HDMI_TX0_C_DP 6 25 HDMI_TX0_IC_DP 58
IN HDMI_TX0_C_DN 7
IN_D0p OUT_D0p
24 HDMI_TX0_IC_DN
OUT
58 IN IN_D0n OUT_D0n
OUT 58
8 I2C_CTL_EN CFG/I2C_ADDR1 23 HDMI_CFG 57
HDMI_TXC_C_DP 9 22 HDMI_TXC_IC_DP
IN
58 IN IN_CKp OUT_CKp
OUT 58
HDMI_TXC_C_DN 10 21 HDMI_TXC_IC_DN
DCIN_EN/SCL_CTL
58 58
DDCBUF/SDA_CTL
IN IN_CKn OUT_CKn
OUT
EQ/I2C_ADDR0
PARADE_PS8407ATQFN40GTR2_A1_AU_TQFN_40P
VDDRX
VDDTX
VDDTA
VDD33
REXT
GND
PRE
P3V3S
P1V2S 0.1UF_16V_2
C3208 C3206
1 2 1 2
20
12
13
14
15
16
17
18
19
11
P1V2S
0.1UF_16V_2 C3207
1 2
P1V2S 0.1UF_16V_2
B C3200
B
C3209 1 2 PARADE_PS8407ATQFN40GTR2_A1_AU_TQFN_40P
1 2
0.1UF_16V_2
6019B1188401
0.01UF_50V_2
R3223
1 2
PARADE_PS8401ATQFN40GTR2_A0_TQFN_40P
4.99K_1%_2
P3V3S 6019B1058801
HDMI_DCIN_EN HDMI_EQ
57 IN IN 57
R3201
1 2 HDMI_ISET 57 57 HDMI_DDCBUF HDMI_PRE 57
OUT IN IN
4.7K_5%_2_DY
R3200
1 2
4.7K_5%_2_DY
P3V3S
P3V3S P3V3S
P3V3S R3220
A 1 2 HDMI_DCIN_EN A
OUT 57
R3221
1 2 HDMI_DDCBUF OUT R3218
57 1 2 HDMI_PRE R3215
OUT 57 4.7K_5%_2_DY
1 2 HDMI_EQ OUT 57
4.7K_5%_2
4.7K_5%_2_DY
4.7K_5%_2_DY
R3222
1 2 R3219
1 2 R3216
1 2
P3V3S
4.7K_5%_2_DY
4.7K_5%_2_DY
4.7K_5%_2_DY
1
R3217
2 HDMI_CFG
OUT 57 INVENTEC
4.7K_5%_2_DY TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D3102
1 Line-1 NC 10
2 Line-2 NC 9
3 GND GND 8
4 Line-3 NC 7
5 Line-4 NC 6
1 R3103 2
AMAZING_AZ1045_04F_R7G_10P_DY
200_1%_2_DY
57 IN HDMI_TX2_IC_DP
D HDMI_TX2_IC_DN
57 IN D
1 R3104 2
200_1%_2_DY
57 HDMI_TX1_IC_DP P5V0S_HDMI_CRT
IN HDMI_TX1_IC_DN
57 IN
D3101
1
5 6
1
Line-4 NC R3102 R3110
4 7
3
Line-3 NC
8 2.2K_5%_2
2.2K_5%_2
GND GND
2 9
2
1 R3105 2
2
Line-2 NC
1 10 CN3100
200_1%_2_DY Line-1 NC
1 TMDS Data2+
2 TMDS Data2 Shield
AMAZING_AZ1045_04F_R7G_10P_DY 3 TMDS Data2-
57 IN HDMI_TX0_IC_DP 4 TMDS Data1+
57 IN HDMI_TX0_IC_DN 5 TMDS Data1 Shield
C 6 TMDS Data1- C
1 R3112 2 7 TMDS Data0+
200_1%_2_DY 8 TMDS Data0 Shield
9 TMDS Data0-
57 HDMI_TXC_IC_DP 10 TMDS Clock+
IN HDMI_TXC_IC_DN 11
57 IN TMDS Clock Shield
12 TMDS Clock-
1 TP24 13 CEC G1 G1
TP3101 G2 G2
1 TP24 14 G3
P5V0S P5V0S_HDMI_CRT TP3100
Reserved G3
G4 G4
HDMI_CN_DDCCLK 15
U3100 1
58 57 BI DDC Clock
HDMI_CN_DDCDATA 16
3
GND 58 57 BI DDC Data
17
VIN DDC/CEC GND
VOUT 2 18 +5V Power
19 Hot Plug Detect
GMT_G5250Q1T73U_SOT23_3P
R3111
57 OUT HDMI_HPD_CN 1 2
2
58 ALLTOP_C128M3_K1939_L_19P
1
2
1K_5%_2
20K_5%_2
C3101
2
C3100
R3113
100PF_50V_2
22PF_50V_2_DY
D3100
DGND_USB2
2
CLOSE TO CONNECTOR
1
B B
1
58 C3110
HDMI_CN_DDCCLK 1 2
57 BI HDMI_CN_DDCDATA
BI
SFI_SFI0402ML120C_LF_SMD_2P_DY
57
58 12PF_50V_2
HDMI_TX2_DN C3103 1 20.1UF_16V_2 HDMI_TX2_C_DN
2
29 IN OUT 57
58 57 HDMI_HPD_CN C3113
OUT
PESD5V0U1BB_DY
PESD5V0U1BB_DY
29 IN HDMI_TX2_DP C3102 1 20.1UF_16V_2 HDMI_TX2_C_DP OUT 57
1 2
HDMI_TX1_DN C3107 1 20.1UF_16V_2 HDMI_TX1_C_DN
2
29 IN OUT 57
2
29 IN HDMI_TX1_DP C3106 1 20.1UF_16V_2 HDMI_TX1_C_DP OUT 57 12PF_50V_2
29 IN HDMI_TX0_DN C3108 1 20.1UF_16V_2 HDMI_TX0_C_DN OUT 57
D3103
D3104
2
HDMI_TX0_DP HDMI_TX0_C_DP C3111
29 IN C3105 1 20.1UF_16V_2
OUT 57 1 2
29 IN HDMI_TXC_DN C3109 1 20.1UF_16V_2 HDMI_TXC_C_DN OUT 57
1
29 IN HDMI_TXC_DP C3104 1 20.1UF_16V_2 HDMI_TXC_C_DP OUT 57 D3105 0.1UF_16V_2
1
1
C3112
1 2
1
0.1UF_16V_2
A A
DGND_USB2
INVENTEC
TITLE
A10
Block Diagram
DOC.NUMBER REV
XXX 03-Oct-2019
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
THIS DRAWING AND SPECIFICATIONS,HEREIN,ARE THE PROPERTY OF INVENTEC
CORPORATION AND SHALL NOT BE REPODUCED,COPIED,OR USED IN WHOLE OR NOTES:
IN PART AS THE BASIS FOR THE MANUFACTURE OR SALE OF ITEMS WITHOUT 1.HSF Property:Comply iSupplier system HSF property attribute up-to-date value.
WRITTEN PERMISSION,INVENTEC CORPORATION, ALL RIGHT RESERVED.
F F
E E
D
N17S-G2/G5 D
GDDR5 23X23
2019.12.11
C C
B B
A A
Chan, Shane
Huang, Vens
Shiu, Vivi
TITLE
INVENTEC
A10
DESIGN / DRAWER XXX DATE 03-Oct-2019
CHECK
03-Oct-2019 APPROVAL A01 SIZE CODE DOC.NUMBER REV
FILE NAME 3 1310xxxxx-0-0 A02
A CS
DATE CHANGE NO. REV PCB P/N 60xxxxxxxxxx
<ENG> PCB VER A02 SHEET of 59 70
8 7 6 5 4 3 2 1
GPU PART NUMBER:

P1V8S_AON1
Close to GPU 1 R5109 2

N17S-G2: 6019B1915901
N17S-G5: 6019B2009401
I
A
F F
SHORT_0402_15
1 2 I
A
C5348 0.1uF_16V_2
TO CPU PIN W4 U5100

26 DGPU_HOLD_RST# 1 5
IN BUF_PLT_RST# 2
B VCC
48 47 36 35 30 IN 3
A
4
49 GND Y PEG_RST# OUT 60 64
2
2
NI NI
TO PLT_RST# A A NXP_74LVC1G08GW_TSOT353_5P
I 1.8V
C5001 C5301 I
A
A
R5404
R5115
100pF_50V_2_DY
100K_5%_2 10K_5%_2
100pF_50V_2_DY
1
I
A
P1V8S_MAIN1 P1V8S_AON1
U5000
2
I
A
1/14 PCI_EXPRESS
P1V0S_DGPU
R5126
2
I
10K_5%_2 A
R5000 AB6 PEX_WAKE*
3.3V NEAR GPU
1G
10K_5%_2
1.8V UNDER GPU BTW GPU AND VR
Q5002 PEX_IOVDD_1
AA22 I I I I I I
PEG_RST# AC7 AB23 A A A A A A
1
1
1
CPU SIDE 64 60 IN
1
PEX_RST*
G
PEX_IOVDD_2 I
1UF_6.3V_2
AC24 A
E E
22UF_6.3V_3
PEX_DVDD PEX_IOVDD_3
4.7UF_6.3V_2
4.7UF_6.3V_2
4.7UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
OUT CLKREQ_GPU# D S CLKREQ_Q_GPU# OD AC6 AD25
C5204
C5035
C5036
C5203
C5205
C5038
C5039
28 D S PEX_CLKREQ* PEX_IOVDD_4
1 1 PEX_IOVDD_5 AE26
PJA138K TP5010 TP5012 AE8 AE27
28
IN CLK_PEG_DP TP24 TP24 PEX_REFCLK PEX_IOVDD_6
CLK_PEG_DN AD8
2
2
2
28 IN PEX_REFCLK*
PEG_RX0_C_DP C5016 2 1 PEG_RX0_DP AC9

27 OUT PEG_RX0_C_DN
0.22UF_16V_2
PEG_RX0_DN
PEX_TX0
P1V8S_MAIN1
27 C5017 2 1 0.22UF_16V_2 AB9 PEX_TX0*
OUT
IN PEG_TX0_C_DP AG6
27
27 PEG_TX0_C_DN AG7
PEX_RX0
PEX_RX0* AA10 UNDER GPU NEAR GPU BTW GPU AND VR
IN PEX_IOVDDQ_1
AA12 I I I I I I
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
PEX_IOVDDQ_2 A A A A A A
1
1
1
PEG_RX1_C_DP C5014 2 1 PEG_RX1_DP AB10 AA13 I I I I
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
27 0.22UF_16V_2 PEX_TX1 PEX_IOVDDQ_3
OUT A A A A
C5206
C5207
C5208
C5227
PEG_RX1_C_DN 2 1 PEG_RX1_DN AC10 AA16
4.7UF_6.3V_2
4.7UF_6.3V_2
27 C5015 0.22UF_16V_2 PEX_TX1* PEX_IOVDDQ_4
C5209
C5210
C5051
C5052
C5049
C5050
OUT AA18
PEX_IOVDDQ_5
27 IN PEG_TX1_C_DP AF7 PEX_RX1 PEX_IOVDDQ_6 AA19
27 PEG_TX1_C_DN AE7 AA20
IN PEX_RX1* PEX_IOVDDQ_7
2
2
2
PEX_HVDD PEX_IOVDDQ_8 AA21
27 PEG_RX2_C_DP C5012 2 1 0.22UF_16V_2 PEG_RX2_DP AD11 PEX_TX2 PEX_IOVDDQ_9 AB22
OUT PEG_RX2_C_DN 2 1 PEG_RX2_DN AC11 AC23
27 OUT C5013 0.22UF_16V_2 PEX_TX2* PEX_IOVDDQ_10
PEX_IOVDDQ_11 AD24
27 PEG_TX2_C_DP AE9 AE25
IN PEG_TX2_C_DN
PEX_RX2 PEX_IOVDDQ_12
27 IN AF9 PEX_RX2* PEX_IOVDDQ_13 AF26
PEX_IOVDDQ_14 AF27
PEG_RX3_C_DP C5010 2 1 PEG_RX3_DP AC12
27 OUT PEG_RX3_C_DN C5011
0.22UF_16V_2
PEG_RX3_DN
PEX_TX3
27 OUT 2 1 0.22UF_16V_2 AB12 PEX_TX3*
D 27 IN PEG_TX3_C_DP AG9 PEX_RX3 D

27 PEG_TX3_C_DN AG10 PEX_RX3*
IN
AB13 PEX_TX4
AC13 PEX_TX4*
AF10 PEX_RX4 P1V8S_MAIN1

AE10 PEX_RX4*
NC FOR GF119 PEX_PLL_HVDD
AD14 PEX_TX5
AC14 PEX_TX5*
AA8 NEAR GPU
PEX_PLL_HVDD_1
NC FOR GM108
AA9
1
PEX_PLL_HVDD_2 I
AE12 A
PEX_RX5
AF12 C5048
PEX_RX5*
TP5014 NC PEX_SVDD_3V3 AB8
66 64 DGPU_PSI 1
IN AC15 PEX_TX6
0.1uF_16V_2
TP24 AB15
2
PEX_TX6*
AG12 PEX_RX6
AG13 PEX_RX6*
AB16 PEX_TX7
AC16 PEX_TX7*
AF13 PEX_RX7
AE13 PEX_RX7*
C AD17 PEX_TX8 C
AC17 PEX_TX8*
PLACE NEAR GPU
AE15 TP5013
PEX_RX8 1
AF15 PEX_RX8*
TP24
AC18 F2 GPU_VCC_SENSE
PEX_TX9 VDD_SENSE OUT 66
AB18 PEX_TX9*
AG15 F1 GPU_VSS_SENSE NVVDD

PEX_RX9 GND_SENSE OUT 66
AG16 PEX_RX9*
TP5011
AB19 PEX_TX10 1
AC19 PEX_TX10* TP24
AF16 PEX_RX10
NC FOR GF117/GK208/GM108
AE16 PEX_RX10* PLACE NEAR GPU

AD20 PEX_TX11
AC20 PEX_TX11*
AE18 PEX_RX11
AF18 PEX_RX11*
PLACE NEAR U67000
AC21 PEX_TX12
AB21 PEX_TX12*
B AG18 AF22 B
AG19
PEX_RX12
PEX_RX12*
NCPEX_TSTCLK_OUT
PEX_TSTCLK_OUT* AE22
AD23 PEX_TX13
AE23 PEX_TX13*
AF19 PEX_RX13 PEX_PLLVDD_1 AA14

AE19 PEX_RX13*
NC PEX_PLLVDD_2
AA15
AF24 PEX_TX14
AE24 PEX_TX14*
AE21 PEX_RX14
AF21 PEX_RX14*
NVJTAG_SELTESTMODE AD9 NVJTAG_SEL
AG24
1
PEX_TX15
AG25 PEX_TX15* I
A
AG21 R5003
PEX_RX15
AG22 10K_5%_2
PEX_RX15*
2
PEX_TERMP
AF25
1
I
A
NVIDIA_N16S_GM_BGA_595P R5004
IC_BGA_NVDIO_2300_2300_195 2.49K_1%_2
A 6019B1375301
A
2
INVENTEC
TITLE
A10
GPU-1
XXX
<ENG> PCB VER 03-Oct-2019
A02 SHEET of 60 70
8 7 6 5 4 3 2 1
P1V35S_DGPU
I I
A A
1
10K_1%_2
10K_1%_2
R5007
R5008
F F
2
FBA_CMD30 61 65
FBA_CMD14
IN
61 65
IN
FBA_CMD13 IN 61 65
FBA_CMD29 IN 61 65
I I
A A
1
10K_1%_2
10K_1%_2
R5465
R5455
2
2
I
A
IC_BGA_NVDIO_2300_2300_195
U5000
2/14 FBA GNDS_SENSE
65 FBA_D<0> E18 FBA_D0 NC F3
BI FBA_D<1> F18
FB_CLAMP
65 BI FBA_D<2>
FBA_D1
E16
10K_5%_2_DY
65 FBA_D2 GF119
BI FBA_D<3> F17
1
65
BI FBA_D<4>
FBA_D3 NI
A
65 BI D20 FBA_D4
R5247
E 65 FBA_D<5> D21 FBA_D5 E
BI FBA_D<6> F20
65 BI FBA_D<7>
FBA_D6
65 E21 FBA_D7
BI FBA_D<8> E15
65
2
BI FBA_D<9>
FBA_D8
65 BI D15 FBA_D9
65 FBA_D<10> F15 FBA_D10
BI FBA_D<11> F13
65 BI FBA_D<12>
FBA_D11
65 C13 FBA_D12
BI FBA_D<13> B13
65
BI FBA_D<14>
FBA_D13
65 BI E13 FBA_D14
65 FBA_D<15> D13 FBA_D15
BI FBA_D<16> B15
65 BI FBA_D<17>
FBA_D16
65 C16 FBA_D17
BI FBA_D<18> A13
65 FBA_D18
BI FBA_D<19> A15
65 BI FBA_D<20>
FBA_D19
65 BI B18 FBA_D20
65 FBA_D<21> A18
BI FBA_D<22>
FBA_D21
65 BI A19 FBA_D22
65 FBA_D<23> C19 FBA_D23
BI FBA_D<24> B24
65 BI FBA_D<25>
FBA_D24
65 BI C23 FBA_D25
65 FBA_D<26> A25
BI FBA_D<27>
FBA_D26
65 BI A24 FBA_D27
65 FBA_D<28> A21 FBA_D28
BI FBA_D<29> B21
65 BI FBA_D<30>
FBA_D29
65 BI C20 FBA_D30
65 FBA_D<31> C21
BI FBA_D<32>
FBA_D31
D 65 BI R22 FBA_D32 D
65 FBA_D<33> R24 FBA_D33 FBA_CMD0 C27 FBA_CMD0 65
BI FBA_D<34> T22 C26 FBA_CMD1
OUT
65 BI FBA_D<35>
FBA_D34 FBA_CMD1
FBA_CMD2
OUT 65
65 BI R23 FBA_D35 FBA_CMD2 E24 OUT 65
65 FBA_D<36> N25 F24 FBA_CMD3 65
BI FBA_D<37>
FBA_D36 FBA_CMD3
FBA_CMD4
OUT
65 BI N26 FBA_D37 FBA_CMD4 D27 OUT 65
65 FBA_D<38> N23 FBA_D38 FBA_CMD5 D26 FBA_CMD5 65
BI FBA_D<39> N24 F25 FBA_CMD6
OUT
65 BI FBA_D<40>
FBA_D39 FBA_CMD6
FBA_CMD7
OUT 65
65 BI V23 FBA_D40 FBA_CMD7 F26 OUT 65
65 FBA_D<41> V22 FBA_D41 FBA_CMD8 F23 FBA_CMD8 65
BI FBA_D<42> T23 G22 FBA_CMD9
OUT
65 BI FBA_D<43>
FBA_D42 FBA_CMD9
FBA_CMD10
OUT 65
65 BI U22 FBA_D43 FBA_CMD10 G23 OUT 65
65 FBA_D<44> Y24 G24 FBA_CMD11 65
BI FBA_D<45> AA24
FBA_D44 FBA_CMD11
F27 FBA_CMD12
OUT
65 BI FBA_D<46>
FBA_D45 FBA_CMD12
FBA_CMD13
OUT 65
65 Y22 FBA_D46 FBA_CMD13 G25 61 65
BI FBA_D<47> AA23 G27 FBA_CMD14
OUT
65 BI FBA_D<48>
FBA_D47 FBA_CMD14
FBA_CMD15
OUT 61 65
65 BI AD27 FBA_D48 FBA_CMD15 G26 OUT 65
65 FBA_D<49> AB25 M24 FBA_CMD16 65
BI FBA_D<50> AD26
FBA_D49 FBA_CMD16
M23 FBA_CMD17
OUT
65 BI FBA_D<51>
FBA_D50 FBA_CMD17
FBA_CMD18
OUT 65
65 AC25 FBA_D51 FBA_CMD18 K24 65
BI FBA_D<52> AA27 K23 FBA_CMD19
OUT
65 BI FBA_D<53>
FBA_D52 FBA_CMD19
FBA_CMD20
OUT 65
65 BI AA26 FBA_D53 FBA_CMD20 M27 OUT 65
65 FBA_D<54> W26 M26 FBA_CMD21 65
BI FBA_D<55> Y25
FBA_D54 FBA_CMD21
M25 FBA_CMD22
OUT
65 BI FBA_D<56>
FBA_D55 FBA_CMD22
FBA_CMD23
OUT 65
65 R26 FBA_D56 FBA_CMD23 K26 65
BI FBA_D<57> T25 K22 FBA_CMD24
OUT
65 BI FBA_D<58>
FBA_D57 FBA_CMD24
FBA_CMD25
OUT 65
65 BI N27 FBA_D58 FBA_CMD25 J23 OUT 65
C 65 FBA_D<59> R27 J25 FBA_CMD26 65 C
BI FBA_D<60> V26
FBA_D59 FBA_CMD26
J24 FBA_CMD27
OUT
65 BI FBA_D<61>
FBA_D60 FBA_CMD27
FBA_CMD28
OUT 65
65 V27 FBA_D61 FBA_CMD28 K27 65
BI FBA_D<62> W27 K25 FBA_CMD29
OUT
65 BI FBA_D<63>
FBA_D62 FBA_CMD29
FBA_CMD30
OUT 61 65
65 BI W25 FBA_D63 FBA_CMD30 J27 OUT 61 65
FBA_CMD31 J26 FBA_CMD31 65
OUT
65 OUT FBA_DBI0 D19 FBA_DQM0
65 FBA_DBI1 D14
OUT FBA_DBI2 C17
FBA_DQM1
GF117/GF119
65 OUT FBA_DBI3
FBA_DQM2
65 C22 FBA_DQM3 GK208
OUT FBA_DBI4 P24
65 OUT FBA_DBI5
FBA_DQM4
NI
65 OUT W24 FBA_DQM5 NC NC_3 B19 A P1V35S_DGPU
65 FBA_DBI6 AA25 R5011
OUT FBA_DBI7 U25
FBA_DQM6
F22 FBA_DEBUG0 1 2 60.4_1%_2
65 OUT FBA_DQM7 FBA_DEBUG0 FBA_DEBUG0
FBA_DEBUG1 FBA_DEBUG1 J22 FBA_DEBUG1 1 2 60.4_1%_2
FBA_EDC0 E19 A R5012

65 OUT FBA_DQS_WP0 NI
65 FBA_EDC1 C15
OUT FBA_EDC2 B16
FBA_DQS_WP1
D24 FBA_CLK0
65 OUT FBA_EDC3
FBA_DQS_WP2 FBA_CLK0
FBA_CLK0#
OUT 65
65 B22 FBA_DQS_WP3 FBA_CLK0* D25 65
OUT FBA_EDC4 R25 N22 FBA_CLK1
OUT
65 OUT FBA_EDC5
FBA_DQS_WP4 FBA_CLK1
FBA_CLK1#
OUT 65
65 OUT W23 FBA_DQS_WP5 FBA_CLK1* M22 OUT 65
65 FBA_EDC6 AB26
OUT FBA_EDC7 T26
FBA_DQS_WP6
65 OUT FBA_DQS_WP7
B F19 FBA_DQS_RN0 FBA_WCK01 D18 FBA_WCKA01_DP OUT 65 B

C14 FBA_DQS_RN1 FBA_WCK01* C18 FBA_WCKA01_DN 65
A16 D17 FBA_WCKA23_DP
OUT
FBA_DQS_RN2 FBA_WCK23
FBA_WCKA23_DN
OUT 65
A22 FBA_DQS_RN3 FBA_WCK23* D16 OUT 65
P25 T24 FBA_WCKA45_DP 65
W22
FBA_DQS_RN4 FBA_WCK45
U24 FBA_WCKA45_DN
OUT
FBA_DQS_RN5 FBA_WCK45*
FBA_WCKA67_DP
OUT 65
AB27 FBA_DQS_RN6 FBA_WCK67 V24 65
T27 V25 FBA_WCKA67_DN
OUT
FBA_DQS_RN7 FBA_WCK67* OUT 65 P1V8S_MAIN1
GF119 PLACE NEAR GPU

FB_PLLAVDD_1 F16 UNDER GPU FB_PLL_AVDD 1 2 I
A
NC
1
I I L5001 FBMA_11_160808_300A25T
P22 I I A A
0.1uF_16V_2
0.1uF_16V_2
1
10UF_6.3V_2
10UF_6.3V_2
FB_PLLAVDD_2 A A
30OHM@100MHZ,0603, 1A
C5058
C5055
I
C5057
C5053
A
0.1UF_16V_2
1
FB_PLLAVDD FB_DLLAVDD
H22
C5002
GF117
FB_REFPLL_AVDD
2
TP5000 1 D23 FB_VREF_PROBE I

A
0.1UF_16V_2
1
TP24
C5214
A NVIDIA_N16S_GM_BGA_595P
A
6019B1375301 UNDER GPU

2
TITLE
A10
Block Diagram

CHANGE by DATE 03-Oct-2019 A3 1310xxxxx-0-0
CS 1310xxxxx-0-0 A02
XXX
8 7 6 5 4 3 2 1
I
A
IC_BGA_NVDIO_2300_2300_195
I
A
U5000 P1V8S_MAIN1
UNDER GPU 8*1UF
P1V35S_DGPU 12/14 FBVDDQ
IC_BGA_NVDIO_2300_2300_195
2*10UF U5000
14/14 XVDD/VDD33
B26
F I A
I I
A C25
FBVDDQ_01
FBVDDQ_02
VDD18 UNDER GPU NEAR GPU F
AD10 G8
10UF_6.3V_2
10UF_6.3V_2
1
1
A NC_1 VDD33_1
E23 64
OUT CORE_PLLVDD_GPU
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
I I I I I I I FBVDDQ_03 I
AD7 G9
1
A A A A A A A GM108 A I
E26 NC_2 VDD33_2
C5250
C5251
0.1uF_16V_2
0.1uF_16V_2
1UF_6.3V_2
A
FBVDDQ_04
2 C5244
C5245
C5246
C5247
C5248
C5249
C5065
C5201
3V3_AON G10 A
VDD33_3 I
F14 FBVDDQ_05 P1V8S_MAIN1
C5108
C5109
C5112
C5115
G12 A
4.7UF_6.3V_2
3V3_AON VDD33_4
F21 FBVDDQ_06
L5003
G13 FBVDDQ_07
1 2 I UNDER GPU F11 3V3AUX GPCPLL_AVDD
1V8_AON
2
G14 A
I
FBVDDQ_08
PVCORE_DGPU
2
G15 FBVDDQ_09
FBMA_11_160808_300A25T
I I I V5 NC_V5
G16 FBVDDQ_10 A A A
NEAR GPU V6
0.1UF_16V_2
1
1
NC_V6
G18
A
FBVDDQ_11
C5218
C5213
G19
10UF_6.3V_2
10UF_6.3V_2
FBVDDQ_12
2 C5217
4.7UF_6.3V_2
P1V8S_AON1
C5219
G20 FBVDDQ_13
G21 FBVDDQ_14
I
L22 FBVDDQ_19
2
CONFIGURABLE
2
L24 FBVDDQ_20 POWER CHANNELS
L26 FBVDDQ_21 PVCORE_DGPU UNDER GPU NEAR GPU
* nc on substrate
NEAR GPU M21 FBVDDQ_22 I
1
N21 A
A
FBVDDQ_23 I
G1
0.1uF_16V_2
1UF_6.3V_2
P1V35S_DGPU 1*10UF R21 FBVDDQ_24
NC_G1 I A
C5216
C5128
G2 A
4.7UF_6.3V_2
0.1UF_16V_2
NC_G2
C5125
C5126
T21
3*22UF FBVDDQ_25 G3
V21 FBVDDQ_26
NC_G3
G4
I
NC_G4
W21 FBVDDQ_27
G5
2
NC_G5
2
2
2
I I I I I I I
G6 NC_G6
A A A A A A A G7
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
GF117
1
1
NC_G7
GF119
10UF_6.3V_2
GK208
C5254
C5252
C5253
C5060
C5061
C5255
C5256
V1 NC_V1
H24 FBVDDQ
FBVDDQ_15 V2 NC_V2
H26 FBVDDQ_16 FBVDDQ
2
2
E J21 FBVDDQ_17 FBVDDQ E
K21 FBVDDQ_18 FBVDDQ
W1 NC_W1
W2 NC_W2
W3 NC_W3
W4 NC_W4
NVIDIA_N16S_GM_BGA_595P
6019B1375301
P1V35S_DGPU
FB_CAL_PD_VDDQFB_CAL_PD_VDDQ D22 FB_CAL_PD_VDDQ 1 2 IA

R5001 40.2_1%_2
FB_CAL_PU_GND FB_CAL_PU_GND C24 FB_CAL_PU_GND 1 2 I

A
R5020 40.2_1%_2
D D
B25 FB_CAL_TERM_GND 1 2 I
FB_CAL_TERM_GNDFB_CAL_TERM_GND A
R5021 60.4_1%_2
I
PVCORE_DGPU A
PVCORE_DGPU NVIDIA_N16S_GM_BGA_595P
IC_BGA_NVDIO_2300_2300_195
I PLACE CLOSE TO PIN
A U5000
UNDER GPU 3*1UF 6019B1375301 A2
13/14 GND
M13
IC_BGA_NVDIO_2300_2300_195 GND_001 GND_071
NVVDD CAP 8*4.7UF AB17 M15
U5000 PVCORE_DGPU 2*1UF GND_005 GND_072
AB20 GND_006 GND_073 M17
11/14 NVVDD
UNDER GPU 4*4.7UF AB24 N10
K10 GND_007 GND_074
VDD_001 AC2 GND_008 GND_075
N12
K12 VDD_002
AC22 N14
1
1
1
I I I GND_009 GND_076
K14
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
A A A AC26 N16
A
VDD_003
K16 VDD_004
I I GND_010 GND_077
C5080
C5081
C5082
C5093
C5092
2 C5105
2 C5106
C5086
2 C5087
C5088
C5089
A A AC5 N18
4.7UF_6.3V_2
4.7UF_6.3V_2
4.7UF_6.3V_2
4.7UF_6.3V_2
4.7UF_6.3V_2
4.7UF_6.3V_2
4.7UF_6.3V_2
4.7UF_6.3V_2
1
1UF_6.3V_2
1UF_6.3V_2
1
1
GND_011 GND_078
K18 VDD_005
AC8 P11
A
L11 GND_012 GND_079
C5233
C5234
VDD_006 AD12 P13
C5229
C5230
2 C5231
C5232
4.7UF_6.3V_2
4.7UF_6.3V_2
4.7UF_6.3V_2
4.7UF_6.3V_2
I
GND_013 GND_080
L13 VDD_007
AD13 P15
2
2
2
GND_014 GND_081
L15 VDD_008 A26 P17
L17
I
GND_002 GND_082
VDD_009
AD15 P2
2
2
2
GND_015 GND_083
M10 VDD_010
AD16 P23
M12 GND_016 GND_084
VDD_011 AD18 GND_017 GND_085
P26
M14 VDD_012
AD19 GND_018 GND_086 P5
M16 VDD_013 AD21 R10
M18 VDD_014
GND_019 GND_087
AD22 GND_020 GND_088 R12
N11 VDD_015
C NVVDDS CAP AE11 R14 C
N13 GND_021 GND_089
VDD_016 AE14 GND_022 GND_090
R16
N15 VDD_017
AE17 GND_023 GND_091 R18
N17 VDD_018 AE20 T11
P10 VDD_019
GND_024 GND_092
AB11 GND_003 GND_093 T13
P12 VDD_020
AF1 GND_025 GND_094 T15
P14 VDD_021 AF11 T17
I I I I I I I I P16 7*10UF GND_026 GND_095
1
A A A A A A A A VDD_022 PVCORE_DGPU AF14 U10

1
1
1
GND_027 GND_096
P18 VDD_023 NVVDDS CAP NEAR GPU 1*22UF AF17 U12
A
A
470UF_2V
330UF_2V_9MR_PANA_-35%_DY
C5099
R11 GND_028 GND_097

10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
4.7UF_6.3V_2
4.7UF_6.3V_2
4.7UF_6.3V_2
4.7UF_6.3V_2
VDD_024 AF20 U14

C5096
C5084
C5085
C5091
C5220
C5221
C5222
C5223
+
1*330UF GND_029 GND_098

C5224
C5225
C5226
R13 VDD_025
AF23 GND_030 GND_099 U16
R15 VDD_026 AF5 U18
R17
I
GND_031 GND_100
VDD_027
AF8 U2
2
2
2
I I I I I I I I I GND_032 GND_101
T10
2
VDD_028 A A A A A A A A A AG2 U23

10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
1
1
T12 GND_033 GND_102
VDD_029 AG26 GND_034 GND_103
U26
C5243
C5242
C5235
C5236
C5237
C5238
C5239
C5240
C5241
C5202
T14
10UF_6.3V_2
10UF_6.3V_2
VDD_030
4*4.7UF AB14 U5
+
GND_004 GND_104
T16 VDD_031 B1 V11
4*10UF T18 VDD_032
GND_035 GND_105
B11 GND_036 GND_106 V13
NEAR GPU U11 VDD_033
NVVDD CAP 3*22UF B14 V15
2
2
U13 GND_037 GND_107
VDD_034 B17 V17
1*330UF U15 VDD_035
B20
GND_038
GND_039
GND_108
GND_109 Y2
U17 VDD_036 B23 Y23
V10 VDD_037
GND_040 GND_110
B27 GND_041 GND_111 Y26
V12 VDD_038
B5 Y5
V14 GND_042 GND_112
VDD_039 B8 GND_043
V16 VDD_040
I I I E11 GND_044
A A A V18 VDD_041 E14
1
GND_045
B E17 GND_046 B
10UF_6.3V_2
10UF_6.3V_2
10UF_6.3V_2
E2 GND_047
C5212
C5211
C5200
NVIDIA_N16S_GM_BGA_595P E20 GND_048

E22 GND_049
E25
6019B1375301
2
GND_050
E5 GND_051
E8 GND_052
H2 GND_053
H23 GND_054
H25 GND_055
H5 GND_056
K11 GND_057
K13 GND_058
K15 GND_059
K17 GND_060
L10 GND_061
L12 GND_062
L14 GND_063
L16 GND_064
L18 GND_065
L2 GND_066
L23 GND_067
L25 GND_068
L5 GND_069 GND_F AA7
M11 GND_070 GND_H AB7
A A
6019B1375301 TITLE
A10
Block Diagram

CHANGE by DATE 03-Oct-2019 A3 1310xxxxx-0-0
CS 1310xxxxx-0-0 A02
XXX
8 7 6 5 4 3 2 1
F F
I
A
IC_BGA_NVDIO_2300_2300_195
I
A
U5000
IC_BGA_NVDIO_2300_2300_195
PVCORE_DGPU 6/14 IFPD

U5000
GF119/GK208
PVCORE_DGPU
4/14 IFPAB U6 IFPD_RSET
DVI/HDMI DP
IFPA_TXC*
AC4
IFPA_TXC
AC3 T7 IFPD_PLLVDD_2 I2CX_SDA IFPD_AUX_I2CX_SDA*
P4
P3
NC FOR GF117/GM108
I2CX_SCL IFPD_AUX_I2CX_SCL
AA6 IFPAB_RSET
R7 IFPD_PLLVDD_1
NC FOR GF117/GM108
IFPA_TXD0* Y3
IFPA_TXD0
Y4 TXC IFPD_L3*
R5
TXC IFPD_L3
R4
V7 IFPAB_PLLVDD_1
IFPA_TXD1*
AA2 TXD0 IFPD_L2*
T5
W7 IFPAB_PLLVDD_2 IFPA_TXD1
AA3 TXD0 IFPD_L2
T4
NC FOR GF117/GM108
TXD1
IFPD_L1*
U4
AA1 IFPD TXD1 U3
IFPA_TXD2* IFPD_L1
IFPA_TXD2
AB1
TXD2 IFPD_L0*
V4
TXD2 IFPD_L0 V3
E AA5 E
NC FOR GF117/GM108
IFPA_TXD3*
IFPA_TXD3 AA4
GF117
R6 IFPD_IOVDD NC GPIO17
D4
IFPB_TXC* AB4
IFPB_TXC
AB5
W6 IFPA_IOVDD IFPB_TXD4*
AB2
IFPB_TXD4 AB3
Y6 IFPB_IOVDD
IFPB_TXD5*
AD2
IFPB_TXD5
AD3
6019B1375301
IFPB_TXD6*
AD1
IFPB_TXD6 AE1
IFPB_TXD7* AD5
IFPB_TXD7
AD4
GF117
D B3 D
IFPAB NC GPIO14
NVIDIA_N16S_GM_BGA_595P I
A
IC_BGA_NVDIO_2300_2300_195
6019B1375301 U5000
7/14 IFPEF PVCORE_DGPU

GF119/GK208
PVCORE_DGPU
DVI-DL DVI-SL/HDMI DP
I2CY_SDA I2CY_SDA IFPE_AUX_I2CY_SDA*

J3
I2CY_SCL I2CY_SCL IFPE_AUX_I2CY_SCL J2
J7 IFPEF_PLLVDD_1
I
A J1
NC FOR GF117/GM108
IC_BGA_NVDIO_2300_2300_195 TXC TXC IFPE_L3*
TXC TXC IFPE_L3
K1
K7 IFPEF_PLLVDD_2
U5000 K3
PVCORE_DGPU TXD0 TXD0 IFPE_L2*
TXD0 TXD0 IFPE_L2 K2
5/14 IFPC
IFPC
NC FOR GF117/GK208/GM108
K6 IFPEF_RSET TXD1 TXD1 IFPE_L1*
M3
PVCORE_DGPU TXD1 TXD1 IFPE_L1 M2
C T6 IFPC_RSET
GF119/GK208 C
TXD2 TXD2 IFPE_L0* M1

Inventec A10 R15-6050A2940901-MB-A01 Rev A02 Schematic

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Inventec A10 R15-6050A2940901-MB-A01 Rev A02 Schematic

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8 7 6 5 4 3 2 1

THIS DRAWING AND SPECIFICATIONS,HEREIN,ARE THE PROPERTY OF INVENTEC

2 INDEX 24 CPU-LPC, SPI, SMBUS, CLINK 50 DP REDRIVER

17 SYSTEM POWER 39 AUDIO JACK 65 GDDR5 VRAM

EDP EDP CHA

NVIDIA GPU CHB

USB3 USB3 REDRIVER

P3V3AL P5V0A P5V0_SYS P3V3A P2V5

DCIN JACK 0.02 PVBAT U60100

U66610 VIN VO SLP_S3#_3R

NMOS_4D3S NMOS_4D3S NMOS_4D3S

C60017 SIT 0612

4.3K_5%_2 4.3K_5%_2 0.1UF_25V_3 0.1UF_25V_3

100PF_50V_2 100PF_50V_2 VRPCHG_HG R60015 C60015

C60024 R60012 10_5%_2

VRA5V0A_OUT 1 R60203 2 VRA5V0A_VOUT

POWERPAD_2_0610 0_5%_3 0.1UF_16V_2 VRB_VDD3

21 R60315 C60315 VRPVDDQ_VLDOIN

1K_1%_2 2200PF_50V_2 RENESAS_ISL95880HRTZ_TQFN_48P

VRAGT_ISUMN 1 R66454 2 SIT 0612

1K_1%_2 2200PF_50V_2 0.1UF_16V_2

2.2_5%_3 VRACPU_PWM31 FCCM_PS4# SW

1UF_6.3V_2 100K_1%_2 TP24

1 R66032 2 VRACPU_ISEN2 OUT 12 13

SIZE CODE 1310xxxxx-0-0 A02

PVCCGT BOM CHANGE TO OPEN

R7028 P1V05A SIT 0612 PVCORE

P1V8A P3V3A 1 A1 A2 2 PANJIT_2N7002KW_3P 100K_5%_2

EN_3V 1 R7030 2 BAT54C_30V_0_6A

IN P1V8A_PG P1V8A_PG OUT A10

1UF_6.3V_2 PVCCIO VCCSTG

R7014 IN1 OUT1 SHORT_0402_15_NSP

47K_5%_2 4 VBIAS GND 11 C7000 1000PF_50V_2

R7016 A IN2 OUT2

REFERENCE 0~49(PCB SCREW)

M_A_A_13 R4138 I 1 2 A C4134 1 21UF_6.3V_2

C4130 1 22.2UF_6.3V_2 C4262 2.2UF_6.3V_2

P1V2 C4131 1 22.2UF_6.3V_2

SIZE CODE DOC.NUMBER REV

23 20 19 IN M_CKE0 K2 CKE P9 M_A_ALERT# 23 23 20 19 IN M_CKE0 K2 CKE P9 M_A_ALERT# 23

SIZE CODE DOC.NUMBER REV

33_1%_1 R4201 OPEN 0OHM

R4206 0OHM OPEN M_B_A_2 R4217 I A 1 2 36_1%_2 I C4233 1 2 1UF_6.3V_1 A

M_B_A_5 R4220 I A 1 2 36_1%_2

1 2 AI 0_5%_1 I A 36_1%_2 2 1UF_6.3V_1

M_B_BG1 R4238 I A 1 2 36_1%_2 C4245 1 2 2.2UF_6.3V_2

C42111 2 1UF_6.3V_2 C4230 1 2

SIZE CODE DOC.NUMBER REV

23 22 21 IN M_CKE2 K2 CKE P9 M_B_ALERT# 23 23 22 21 IN M_CKE2 K2 CKE P9 M_B_ALERT# 23

R4251 OPEN 0OHM R4276 OPEN 0OHM

SIZE CODE DOC.NUMBER REV

19 M_A_DQ<16> J22 DDR1_DQ_0/DDR0_DQ_16 DDR1_CKN_0/DDR1_CKN_0 AF28 M_CLK_DDR2_DNOUT 21 22

M_B_DQ<39> DDR0_DQSN_7/DDR1_DQSN_5 BF34 BI 22 22 BI BG31 DDR1_DQ_56/DDR1_DQ_56

C 22 M_B_DQ<47> BG37 E36 C

P0V6S_DIMM1_VREF_DQ P0V6M_VREF_DQ P0V6S_DIMM0_VREF_CA P0V6M_VREF_H

SIZE CODE DOC.NUMBER REV

I GPP_D2/SPI1_MISO_IO1/BK2/SBK2 GPP_B23 1 R4644 2

PAD4550 R4565 2 CG23 CA29 10K_5%_2_DY

R4643 1 210K_5%_2_DY MB_ID1 OUT 25

A CNV STRAP R4645 1 210K_5%_2_DY MB_ID2 25 A