Assignment 6 Solution

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Indian Institute of Technology Kharagpur

Microprocessors And Microcontrollers


Assignment 6- Week 6
TYPE OF QUESTION: MCQ
Number of questions: 15 Total mark: 15 X 1 = 15

QUESTION 1:
INC and DEC will work as _____________ instructions?

a. Addition
b. Arithmetic
c. Logical
d. Transfer
Correct Answer: B

Detailed Solution:

QUESTION 2:
Which of the following instruction is equivalent to MOV A,#55h ?

a. MOV 0F0H,#55H

b. MOV 0E0H,#55H

c. MOV 0E0H,55H

d. MOV 0F0H,55H

Correct Answer: b

Detailed Solution:

The SFR ( Special Function Register ) can be accessed by their names or by their addresses

Register A address is 0E0H, so option B is correct


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QUESTION 3:
Which of the following RAM locations are bit addressable?
a) 20H-2FH
b) 00H-0FH
c) 70H-7FH
d) 10H-1FH

Correct Answer: a

Detailed Solution:

RAM locations from 20H-2FH are both bit addressable and byte addressable, so option a is
correct

QUESTION 4:
What is the contents of the accumulator after execution of following instructions

mov a,#54h

swap a

RL a

a) 6DH

b) A8H

c) ABH

d) 8AH
Correct Answer: d

Detailed Solution:
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mov a,#54h ; a = 54H

swap a ; a = 45H

RL a ; Rotate left contents of A , so A = 8AH

QUESTION 5:

Indicate which mode and which timer are selected for the following instruction.
MOV TMOD, #20H
a) mode 2 of timer 1 is selected
b) mode 2 of timer 0 is selected
c) mode 1 of timer 1 is selected
d) mode 1 of timer 0 is selected

Correct Answer: a

Detailed Solution:

QUESTION 6:

Identify the operation performed by the following program

CLR A

MOV R1,#60H

MOV R7,#16

AGAIN: MOV @R1,A

INC R1

DJNZ R7,AGAIN

a) Clear 16 ROM locations starting at ROM address 60H


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b) Clear 16 RAM locations starting at RAM address 60H

c) Increment the contents of memory locations (60H-6FH) by one

d) Increment the contents of memory locations (60H-75H) by one

Correct Answer: b

Detailed Solution:

CLR A ;A=0

MOV R1,#60H ;load pointer. R1=60H

MOV R7,#16 ;load counter, R7=16

AGAIN: MOV @R1,A ;clear RAM R1 points to

INC R1 ;increment R1 pointer

DJNZ R7,AGAIN ;loop until counter=zero

QUESTION 7:
Which of the following is not a valid 8051 instruction?

a) INC DTPR

b) INC A

c) DEC DTPR

d) DEC A
Correct Answer: c

Detailed Solution:

Decrement of data pointer is not allowed


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QUESTION 8:

If SUB A, R4 is executed, then actually what operation is being applied?


a. R4+A
b. R4-A
c. A-R4
d. A+R4
Correct Answer: C

Detailed Solution: SUB command subtracts with borrow the contents of an accumulator
with that of the register or some immediate value. So, A-R4 is being executed.

QUESTION 9:
Which of the following is a valid immediate addressing mode?
a) MOV A,R1
b) MOV 45h,A
c) MOV A, #42h
d) MOV DPTR,#68975h

Correct Answer: c

Detailed Solution:

In immediate addressing mode source operand is constant. But the value should be less than
FFFFH.
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QUESTION 10:
Which of the following statement is true after execution of MUL AB?
a) High-order byte of the result stored in B register when overflow flag is set to 1
b) carry flag is cleared to 0
c) Lower-order byte of the result stored in A
d) All of the above
Correct Answer: d

Detailed Solution:

QUESTION 11:
Which of the following comes under the indexed addressing mode?

a) MOVX A, @DPTR

b) MOVC @A+DPTR, A

c) MOV A, R0
d) MOV @R0, A
Correct Answer: b

Detailed Solution: Indexed addressing mode stands for that instruction where the bits of
the accumulator is also indexed with the 16-bit registers.

QUESTION 12:
What is the value of the bits 4-7 of R0 after the following set of instructions are executed?

MOV R0, #04H


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MOV A, #11H

XCH A, R0

a) 0H
b) 1H
c) 4H
d) 5H
Correct Answer: b

Detailed Solution:

XCH: Exchanges bits 0-3 of the Accumulator with bits 0-3 of the Internal RAM address pointed
to indirectly by R0. Bits 4-7 of each register are unaffected.

QUESTION 13:

The instruction, ADD A, #100 performs

a) 100(decimal) is added to contents of address register

b) 100(decimal) is subtracted from the accumulator

c) 100(decimal) is added to contents of an accumulator

d) none

Correct Answer: c

Detailed Solution:

QUESTION 14:
Which of the following flags are affected by the instruction DIV AB of an 8051 microcontroller?

a) OV,C,AC
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b) OV,AC

c) OV,C

d) C,AC
Correct Answer: C

Detailed Solution:

QUESTION 15:
1. Program Counter (PC) pushed to stack

2. Generate LCALL to ISR

3. Complete execution of instruction in progress

4. Clear the interrupt flag

5. Set interrupt in progress

Correct order of execution of action taken by 8051 micro-controllers when an interrupt occurs:

a) 3, 1, 4, 5, 2

b) 1, 2 , 4, 3, 5

c) 3, 4, 2, 5, 1

d) 1, 3 ,2 , 4, 5

Correct Answer: A

Detailed Solution:

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