ORDER NO.

CRT3582

CD MECHANISM MODULE(S10.5STD)

CX-3166
This service manual describes the operation of the CD mechanism module incorporated
in models listed in the table below.
When performing repairs use this manual together with the specific manual for model
under repair.
Model Service Manual CD Mechanism Module
DEH-1850/XN/ES CRT3552 CXK5701
DEH-1800R/XN/EW CRT3553 CXK5701
DEH-1820R/XN/EW

PIONEER CORPORATION 4-1, Meguro 1-chome, Meguro-ku, Tokyo 153-8654, Japan

PIONEER ELECTRONICS (USA) INC. P.O. Box 1760, Long Beach, CA 90801-1760, U.S.A.
PIONEER EUROPE NV Haven 1087, Keetberglaan 1, 9120 Melsele, Belgium
PIONEER ELECTRONICS ASIACENTRE PTE. LTD. 253 Alexandra Road, #04-01, Singapore 159936
PIONEER CORPORATION 2005
K-ZZA. OCT. 2005 Printed in Japan
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CONTENTS
1. CIRCUIT DESCRIPTIONS ............................................................................................................................... 3
2. MECHANISM DESCRIPTIONS...................................................................................................................... 20
A
3. DISASSEMBLY ............................................................................................................................................... 22

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1. CIRCUIT DESCRIPTIONS
The recent mainstay of the CD LSI is the LSI integrating the core DSP with DAC or RF amplifier, which are generally
employed as peripheral circuits, however, PE5497B, used in this product, is an LSI integrating the afore-mentioned LSI A
unit and microcomputer unit in one chip.

A-F Signal PE5497B

Data
Processor
RF-Amp
A/D
B
Converter 1-bit Audio
DAC
PWM Digital Sub-Q,
Output Servo CD-TEXT Post
filter
(SCF)
CPU Interface

CPU RAM

CPU for System Control Analog Output

Fig.1.0.1 Block diagram of PE5497B

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1.1 PREAMPLIFIER BLOCK (PE5497B: IC201)

A In the preamplifier block, the pickup output signals are processed to generate signals that are used in the subsequent
blocks: servo, demodulator, and control blocks. Signals from the pickup are I/V converted in the pickup with the
preamplifier with built-in photo detectors, and after added with the RF amplifier, they are used to produce such signals as
RF, FE, TE, and TE zero-cross signals. The preamplifier block is built in CD LSI PE5497B (IC201), whose parts are
described individually below. Incidentally, as this LSI employs a single power supply (+ 3.3 V) specification, the reference
voltages of this LSI and the pickup are the REFO (1.65 V) for both. The REFO is an output obtained from REFOUT in the
LSI via the buffer amplifier, and is output from the pin 93 of this LSI. All measurements will be performed with this REFO
as the reference.
Caution: Be careful not to short-circuit the REFO and GND when measuring.

B 1.1.1 APC (Automatic Power Control) circuit

Since laser diodes have extremely negative temperature characteristics in optical output when driven in constant current,
it is necessary to control the current with the monitor diodes in order to keep the output constant. This is the feature of the
APC circuit. The LD current is obtained by measuring the voltage between LD1 and VDD(+ 3.3 V), and divide the value by
7.5 (ohms), which becomes about 30 mA.

Pickup Unit CD CORE UNIT

C

MD 5 5
PD
2

REG 1.25V
VR 7 7
+ +
- -
6.5k
LD- 15 VDD(+ 3.3 V)
1k
15
2R4× 2

6.5k
100/16

+
LD+ 14 14
2R7

Vref
APN
D LD +
1
-
2SA1577

1k 100k

110k 100k

3p

LDS

PE5497B
E

Fig.1.1.1 APC

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1.1.2 RF and RFAGC amplifiers

The output from the photo-detector (A + C) and (B + D) is provided from the RFO terminal as the RF signal (which can be
used for eye-pattern check), after it is added, amplified, and equalized inside this LSI. The low frequency component of A
the voltage RFO is calculated as below.
RFO = (A + B + C + D) x 2
The RFO is used for the FOK generation circuit and RF offset adjustment circuit.
The RFO signal, output from the pin 82, is A/C-coupled externally, input to the pin 81, and amplified in the RFAGC
amplifier to obtain the RFAGC signal.
Also, this LSI is equipped with the RFAGC auto-adjustment function, explained below, which switches feedback gains of
the RFAGC amplifier so that the RFO output will be 1.5 V.
This RFO signal is also used for the EFM, DFCT, MIRR, and RFAGC auto-adjustment circuits.

CD CORE UNIT
PE5497B

81
82
RF-

AGCI
RFO
86
RF2- 4.7k
85
EQ2 1.2k 22p
83
4p
1.2k 56p
10k 10k 84
EQ1 5.6k
+ 7.05k
+
-
- - 79
15.2k + AGCO
15.2k 35k 20k 11.2k
To DEFECT/A3T detection
RFOFF setup
Pickup Unit
For RFOK generation C

VREF R2
P3 +
61.0k
P7 - +
A+C A +
13 13 89
- FEO
P9 95
10k 8.8k -
VREF 111k
FE A/D
P2 + 61.0k FE-
94
P4 -
B+C 6 B FEOFF setup
6 90
P8
10k 8.8k

VREF

Fig.1.1.2 RF/AGC/FE

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1.1.3 Focus error amplifier

The photo-detector outputs (A + C) and (B + D) are passed through the differential amplifier and the error amplifier, and (A
A + C - B - D) is provided from the pin 95 as the FE signal.The low frequency component of the voltage FE is calculated as
below.
FE = (A + C - B - D) x 8.8k / 10k x 111k / 61k x 160k / 72k
= (A + C - B - D) x 3.5

For the FE outputs, an S-shaped curve of 1.5 Vp-p is obtained with the REFO as the reference. The cutoff frequency for
the subsequent stage amplifiers is 14.6 kHz.

1.1.4 RFOK circuit

This circuit generates the RFOK signal, which indicates the timing to close the focus loop and focus-close status during
B the play mode, from the pin 62. As for the signal, "H" is output in closing the focus loop and during the play mode.
Additionally, the RFOK becomes "H" even in a non-pit area, since the DC level of the RFO signal is peak-held in the
subsequent digital block and compared at a certain threshold level to generate the RFOK signal. Therefore, the focus is
closed even on a mirror-surface area of a disc. This signal is also supplied to the microcomputer via the low-pass filer as
the FOK signal, which is used for protection and gain switching of the RF amplifier.

1.1.5 Tracking error amplifier

The photo-detector outputs E and F are passed through the differential amplifier and the error amplifier to obtain (E - F),
and then provided from the pin 98 as the TE signal. The low frequency component of the voltage TE is calculated as
below.
C
TEO = (E - F) x 63k / 112k x 160k / 160k x 181k / 45.4k x 160k / 80k
= (E - F) x 4.48
For the TE output, TE waveform of about 1.3 Vp-p with the REFO as the reference. The cutoff frequency in the
subsequent is 21.1 kHz.

PE5497B
CD CORE UNIT
TE A/D
+ TEO
TEOFF setup 98
-
D Pickup Unit
+ 47p
-
80k 160k
+ TE-
97
- 45.36k 161k
P5
E E
11 11 92
P10
VREF 112k 63k +
+ TE2
- 99
45.36k -
+
10000p
- 160k 160k
P1
F 9 F 20k 60k
9 91
P6
112k 63k TEC
100

-
VREF +
Inside TEC

Fig.1.1.3 TE

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1.1.6 Tracking zero-cross amplifier

The tracking zero-cross signal (hereinafter referred to as TEC signal) is obtained by amplifying the TE signal by fourfold,
and used to detect the tracking-error zero-cross point. As the purpose of detecting the zero-cross point, the following two A
points can be named:
1. To use for track-counting in the carriage move and track jump modes
2. To use for detecting the direction in which the lens moves in tracking close. (Used in the tracking brake circuit to be
explained later.)
The frequency range of the TEC signal is from 300 Hz to 20 kHz, and
TEC voltage = TE level x 4
The TEC level can be calculated at 4.62V, which, at this level, exceeds the D range of the operational amplifier, and clips
the signal, but, because the CD LSI only uses the signal at the zero-cross point, it poses no particular problem.

1.1.7 EFM circuit B

The EFM circuit converts the RF signal into digital signals of 0 and 1. The AGCO signal output from the pin 79 is A/C-
coupled externally, input to the pin 78, and supplied to the EFM circuit.
Missing RF signal due to scratches and stains on the disc, and asymmetry of the upper and lower parts of the RF, caused
by variation in disc production, cannot be entirely eliminated in AC coupling process, the reference voltage ASY of the
EFM comparator is controlled, using the probability that 0 and 1 occur at 50%. Thus, the comparator level will always stay
around the center of the RFO signal. This reference voltage ASY is generated by passing the EFM comparator output
through the low-pass filter. The EFM signal is output from the pin 73.

Vdd

PE5497B ASY
74

EFM signal
RFI
78 + EFM
73
- 2k
Vdd
D

+
40k -
+
- 1.5k 7.5k
40k

Fig.1.1.4 EFM

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1.2 SERVO BLOCK (PE5497B: IC201)

A The servo block performs servo control such as error signal equalizing, in-focus, track jump and carriage move. The DSP
block is the signal-processing unit, where data decoding, error correction, and compensation are performed. The FE and
TE signals, generated in the preamplifier stage, are A/D-converted, and output drive signals for the focus, tracking, and
carriage systems via the servo block. Also, the EFM signal is decoded in the signal-processing unit, and ends up in
outputting D/A-converted audio signals through the D/A converter. Furthermore, in this decoding process, the spindle
servo error signal is generated, supplied to the spindle servo block, and used to output the spindle drive signal.
Each drive signal for focus, tracking, carriage, and spindle servos (FD, TD, SD, and MD) are output as PWM3 data, and
then converted to analog data through the LPF. These drive signals, after changed to analog form, can be monitored with
the FIN, TIN, CIN, and SIN signals, respectively. Subsequently, the signals are amplified and supplied to the actuator and
motor for each signal.
B

1.2.1 Focus servo system

The main equalizer of the focus servo consists of the digital equalizer block. The figure 1.2.1 shows the block diagram of
the focus servo system.
In the focus servo system, it is necessary to move the lens within the in-focus range in order to close the focus loop. For
that purpose, the in-focus point is looked for by moving the lens up and down with the focus search voltage of triangular
signal. During this time, the rotation of the spindle motor is retained at a certain set speed by kicking the spindle motor.
The servo LSI monitors the FE and RFOK signals and automatically performs the focus-close operations at an
appropriate timing. The focus-close operation is performed when the following three conditions are satisfied at the same
time:
C
1) The lens moves toward the disc surface.
2) RFOK = "H"
3) The FE signal is zero-crossed.
Consequently, the FE converges to "0" (= REFO).
When the above-mentioned conditions are met and the focus loop is closed, the FSS bit is shifted from "H" to "L," and
then, in 10 ms, the CPU unit of the LSI starts monitoring the RFOK signal obtained through the low-pass filter.
If the RFOK signal is determined to be "L," the CPU unit of the LSI takes several actions including protection.
Fig.1.2.2 shows a series of actions concerning the focus close operations. (It shows a case where the focus loop cannot
be closed.)
D With the focus mode selector displaying 01 in the test mode, pressing the focus close button, allows to check the S-
shaped curve, search voltage, and actual lens behavior.

IC201 PE5497B IC301 BA5839FP

A+C
89
FE DIG.
B+D AMP A/D EQ
90 FOP
12
PWM FD LENS
E CONTROL 66 5
FOM
FOCUS SEARCH 11
TRIANGULAR
WAVE GENERATOR

Fig.1.2.1 Block diagram of the focus servo system

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Search start

A
Output from FD terminal

A blind period The broken line in the figure is assumed in the

case without focus servo.

FE controlling signals

You can ignore this for blind periods.

B
FSS bit of SRVSTS1 resistor

RFOK signals
The status of focus close is judged from the statuses
of FSS and RFOK after about 10 mS.

Fig.1.2.2 Timing chart for focus close operations

1.2.2 Tracking servo system

The main equalizer of the tracking servo consists of the digital equalizer block. The figure 1.2.3 shows the block diagram
of the focus servo system.

IC201 PE5497B IC301 BA5839FP

E D
92
TE DIG.
F AMP A/D EQ
91 TOP
14 LENS
PWM TD
CONTROL 67 2
TOM
13
JUMP
PARAMETERS

Fig.1.2.3 Block diagram of the tracking servo system E

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(a) The track jump operation is automatically performed by the auto-sequence function inside the LSI with a command
from the CPU unit of the LSI. For the track jumps used in the search mode, a single-track jump and four to 100 multi-track
A jump are available in this system. In the test mode, out of these track jumps, 1, 32, and 32 * 3 track jumps, as well as
carriage move can be performed and checked in mode selection. In a track jump, the CPU unit of the LSI sets about half
the number of the total tracks to jump (about five tracks for a 10-track jump), and the set number of tracks are counted
using the TEC signal. By outputting the brake pulse for a certain period of time (set by the CPU unit of the LSI) from the
time the set number is counted, and stopping the lens, the tracking loop can be closed so that the normal play can be
continued.
Also, in order to facilitate closing of the tracking loop in a track jump, the brake circuit is kept ON for 50msec, after the
brake pulse is stopped, for increasing the tracking servo gain. The FF/REW action in the normal operation mode is
realized by performing single jumps consecutively. The speed is approximately 10 times faster than in the normal mode.
B (b) Brake circuit
Since the servo loop is not closed very well in the setup mode and track jump mode, the brake circuit is used for
stabilizing the servo-loop close operation. The brake circuit detects the direction in which the lens moves, and outputs
only the drive signal for the direction opposite to the movement to slow down the lens, thereby stabilizing the tracking
servo-loop close operation. Additionally, the off-track direction is determined from the TEC and MIRR signals, as well as
their phase relation.

BRAKE
C
t2
TD
t1
KICK

TEC

ON
T. BRAKE
OFF

D GAIN UP
EQUALIZER GAIN NORMAL
NORMAL

OPEN
T. SERVO
CLOSED

Fig.1.2.4 Single-track jump

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TD t1 A
t2

TEC
(10 TRACK)

GAIN UP
EQUALIZER 50 mS
NORMAL
ON
T. BRAKE
OFF
OPEN B
SERVO
CLOSED

SD
t
2.9mS (4.10 TRACK JUMP)
5.8mS (32 TRACK JUMP)

Fig.1.2.5 Multi-track jump

LENS MOVING FORWARDS LENS MOVING BACKWARDS

(INNER TRACK TO OUTER)

TEC

TZC
(TEC "SQUARED UP" )
(INTERNAL SIGNAL ) D

MIRR

MIRR LATCHED AT
TZC EDGES
=

SWITCHING PULSE

EQUALIZER OUTPUT
(SWITCHED)
E

DRIVE DIRECTION REVERSE FORWARD

Time

Note : Equalizer output assumed to hava same phase as TEC.

Fig.1.2.6 Track brake F

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1.2.3 Carriage servo system

The carriage servo system inputs the output of the low frequency component from the tracking equalizer (information on
A the lens position) to the carriage equalizer, and, after the gain is increased to a certain level, outputs the drive signal from
the CD block of the LSI. This signal is applied to the carriage motor via the driver IC.
Specifically, since it is necessary to move the whole pickup to the FORWARD direction when the lens offset reaches a
certain level during the play mode, the equalizer gain is set to output higher voltage than the carriage motor starting
voltage at this time. In actual operations, a certain threshold level is preset in the servo LSI for the equalizer output, and
only when it exceeds the threshold level, the drive voltage will be output. This can reduce the power consumption. Also,
before the whole pickup starts moving, the equalizer output voltage may exceed the threshold level a few times, due to
such causes as eccentricity of discs. In this case, the output waveform of the drive voltage from the CD block of the LSI
assumes a pulse-like form.

IC201 PE5497B IC301 BA5839FP

From DIG.
TRACK EQ. EQ LCOP
18
PWM SD
CONTROL 68 24 M
LCOM
17
KICK, BRAKE
REGISTERS CARRIAGE
MOTOR
C

Fig.1.2.7 Block diagram for the carriage servo block

TRACKING DRIVE
(LOW FREQUENCY)
D

LENS POSITION

DRIVE ON/OFF THRESHOLD

CRG DRIVE
(INSIDE UPD63711GC)

E
CRG MOTOR VOLTAGE

CARRIAGE MOVED AT THESE POINTS

Fig.1.2.8 Waveforms of the carriage signal

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1.2.4 Spindle servo system

In the spindle servo system, the following modes are available:
1) Kick A
Used to accelerate the disc rotation in the setup mode.
2) Offset
a. Used in the setup mode after the kick mode, until the TBAL adjustment is completed.
b. Used during the play mode when the focus loop is unlocked, until it is locked again.
In both cases, the mode is used to keep the disc rotation approximately normal.
3) Applicable servo
CLV servo mode, used in the normal operation.
In the EFM demodulation block, by WFCK/16 sampling whether the frame sync signal and the internal frame counter
output are synchronized, a signal is created to show if they are "in-sync" or "non-sync." The status is not recognized as
asynchronous until the signal is "non-sync" for eight consecutive times; otherwise it is recognized as synchronous. In the B

applicable servo mode, the leading-in servo mode is automatically selected in the asynchronous status, and the normal
servo mode in the synchronous status.
4) Brake
Used to stop the spindle motor.
In accordance with the CPU unit of the LSI, the brake voltage is sent out from the servo LSI. At this time, the EFM
waveform is monitored in the CD block of the LSI, and when the longest EFM pattern exceeds a certain interval (or the
rotation slows down enough), a flag is set inside the CD block of the LSI, and the CPU unit of the LSI switches off the
brake voltage. If a flag is not set within a certain period, the CPU unit of the LSI shifts the mode from the brake mode to
the stop mode, and retains the mode for a certain period of time. If the mode switches to this stop mode in the eject
C
operation, the disc will be ejected after the period of time mentioned above elapses.
5) Stop
Used when the power is turned on and during the eject operation. In the stop mode, the voltage in both ends of the
spindle motor is 0V.
6) Rough servo
Used in carriage feed (carriage move mode such as long search).
By obtaining the linear velocity from the EFM waveform, the "H" or "L" level is input to the spindle equalizer. In the test
mode, this mode is also used for grating confirmation.

IC201 PE5497B IC301 BA5839FP

SPEED ERROR SIGNAL

SOP
MD 16
EFM DSP DIG. PWM
BLOCK EQ
69 26 M
SIGNAL SOM
15
SPINDLE
MOTOR
PHASE ERROR SIGNAL E

Fig.1.2.9 Block diagram of the spindle servo system

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1.3 AUTOMATIC ADJUSTMENT FUNCTION

A In this system, all the circuit adjustments are automated in the CD block of the LSI.
All adjustments are performed whenever a disc is inserted or the CD mode is selected by pressing the source key.
Details of each adjustment will be explained below.

1.3.1 TE, FE, and RF offset auto-adjustment

In this adjustment the TE, FE, and RF amplifier offsets of the preamplifier block in POWER ON are adjusted to the
respective target values with the REFO as reference. (The target values for TE, FE, and RF offsets are 0V, 0V, and - 0.8
V, respectively.)
Adjusting procedure
1) The CPU unit of the LSI respective offsets through the CD block of the LSI, when they are in LDOFF status.
B 2) The CPU unit of the LSI calculates the voltages for correction from the values read in 1), and substitutes the corrected
values to prescribed places to adjust.

1.3.2 Tracking balance (T.BAL) auto-adjustment

This adjustment is to equalize the pickup output offsets for E-ch and F-ch by changing the amplifier gain in the CD block
of the LSI. In actual operation, adjustment is performed so that the TE waveform becomes symmetrical on each side of
the REFO.
Adjusting procedure
1) After closing the focus loop,
2) Kick the lens in the radial direction to ensure the generation of the TE waveform.
C
3) The CPU unit of the LSI reads the TE offset calculated in the LSI through the CD block of the LSI.
4) The CPU unit of the LSI determines the offset amount is 0, positive, or negative.
- When the offset amount is 0, the adjustment is completed.
- When the offset amount is positive or negative, the amp gains for E-ch and F-ch should be changed, following a certain
rule.
Then, steps 2) to 4) are repeated until the offset amount becomes 0 or the repetition reaches the limit number of times.

1.3.3 FE bias auto-adjustment

This adjustment is to maximizes the RFO level by optimizing the focus point during the play mode, utilizing the phase
D difference between the 3T level waveform of the RF waveform and that of when focus error disturbance is input. This
adjustment is performed at the same timing as the auto-gain control, which will be described later, since disturbance is
input to the focus loop.
Adjusting procedure
1) The CPU unit of the LSI issues the command to introduce disturbance to the focus loop (CD block of the servo LSI).
2) The waver of the 3T component of the RF signal is detected in the CD block of the LSI.
3) The relation between the 3T component above and the disturbance is processed in the CD block of the LSI to detect
the volume and direction of the focus offset.
4) The CPU unit of the LSI issues a command and reads out the detected results from the CD block of the LSI.
5) The CPU unit of the LSI calculates the necessary correction and substitutes the result to the bias adjustment term
E
inside the CD block of the LSI.
Additionally, in this adjusting, a series of steps are repeated for better adjustment accuracy, the same as in the auto-gain
control.

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1.3.4 Focus and tracking AGC

1.3.4 Focus and tracking AGC
This adjustment is to automatically adjust the focus and tracking servo loop gains. A
Adjusting procedure
1) Introduce disturbance to the servo loop.
2) The error signals (FE and TE) when disturbance is introduced are extracted through the band pass filter, to obtain the
G1 and G2 signals.
3) The CPU unit of the LSI reads G1 and G2 signals via the CD block of the LSI.
4) The CPU unit of the LSI calculates the necessary correction and performs the loop gain adjustment inside the CD block
of the LSI.
For increased adjustment accuracy, the same adjustment process is repeated a few times.

1.3.5 RF level auto-adjustment (RFAGC) B

This adjustment is to adjust the dispersion of the RF level (RFO), which may be caused by mechanism or disc-related
factors, to a steady value for reliable signal transmission. The adjustment is performed by changing the amp gain between
RFO and RFAGC.
Adjusting procedure
1) The CPU unit of the LSI issues a command and reads out the output from the RF level detection circuit in the CD block
of the LSI.
2) From the read values, the CPU unit of the LSI calculates the amp gain to change the RFAGC level to the target.
3) The CPU unit of the LSI sends a command to the CD block of the LSI to adjust the amp gain to the level calculated in
2).
C
This adjustment is performed
1) when only the focus close operation is completed during the setup mode, and
2) immediately before the setup is completed (or when the play mode is about to start).

1.3.6 Adjustment of gains in preamplifier stage

In this adjustment, when reflected beams from the disc surface are extremely weak, such as when the lens is dirty, or a
CD-RW is played, gains in the whole RFAMP block (FE, TE, and RF amplifiers) are increased by + 6 dB or + 12 dB,
depending on the situation.
Adjusting procedure
When the system determines that the reflected beams from the disc surface are extremely weak during the setup mode, D
the whole RFAMP gains will be increased by + 6 dB or + 12 dB.

1.3.7 Initial values in adjustment

All automatic adjustments immediately after inserting a disc are performed based
on the initial values. Automatic adjustments by source change or ACC ON are basically performed using the previous
adjustment values as the initial values.

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1.3.8 Coefficient display of adjustment results

For some of the adjustments (FE and RF offset, FZD cancel, F and T gains, and RFAGC), the adjustment results can be
A displayed and confirmed in the test mode.
The coefficient display in each auto adjustment is as follows:
1) FE and RF offset
Reference value = 32 (coefficient of 32 indicates that no adjustment is required)
The value is displayed in the unit of approximately 32 mV.
Ex. When the FE offset coefficient is 35,
35 - 32 = 3 x 32 mV = 96 mV
The correction is about + 96 mV, which means the FE offset before adjustment is - 96 mV.
2) F and T gain adjustment
Reference value for focus and tracking = 20
B The displayed coefficient / the reference value indicates the adjusted gain.
Ex. When the AGC coefficient is 40,
adjustment of 40/20 = 2 times (+ 6 dB) has been performed.
(It means that the original loop gain was half the target, and the whole gain was doubled to obtain the target value.)
3) RF level adjustment (RFAGC)
Reference value = 8
The coefficient of 9 to 15 indicates to increase the RF level
(for more gains).
The coefficient of 7 to 10 indicates to decrease the RF level
(for less gains).
C
When the coefficient changes by 1, the gain changes by 0.7 to 1 dB.
When the coefficient is 15, the gain is the maximum at TYP + 7.9 dB.
When the coefficient is 0, the gain is the minimum at TYP - 4.6 dB.

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1.4 POWER SUPPLY AND LOADING BLOCK

For the power supply for this system, the VD (7.5 ± 0.5 V) and the VDD (3.3 ± 0.165 V), which are supplied from the A
motherboard, are used. The power supply used in the system, the two power supplies mentioned above, VD (for the drive
system), and VDD (LSI power supply: 3.3 V), are used.

The CPU unit of the LSI controls ON/OFF with "CONT", except for Load/Eject of the CD driver. For ON/OFF of the
Loading drive, no particular control terminals are available, but the input signal "LOEJ", assumes an equivalent role. Also,
the LCO output switches LOADING MODE and CARRIAGE MODE with "CLCONT".

CN702
B
17
PGND 18 LCOP
18 29 IC301 LOADING
BA5839FP M MOTOR
LCOM
17
10 9
19 22

CONT
LOEJ
VD
1 28 21
2 CLCONT
40 41 39 C

IC201

PE5497B

18 D
GND
12
56 38 37 36
DSCSNS

VDCONT 12EJ
8EJ

9
VDD 3.3VDD
11

S903 S905 S904

E

Fig.1.4.1 Power supply/loading system circuit block

CLCONT

Loading Mode Carriage Mode Loading Mode

F
Fig.1.4.2 Loading/carriage mode shift

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The load/eject operation is controlled with the status changes of the HOME switch (also used for clamp detection) on the
mechanism unit and the three switches on the control unit. The ON/OFF statuses of these switches are respectively
A detected at the input port of the microcomputer.
Using the detection results in the microcomputer, each status (A to E) is determined. The disc size detection (8 or 12 cm)
is also performed through this status change. Each status is shown in Fig.1.4.3 and the status change in Fig.1.4.4.

Status A B C D E
DSCSNS SW1(S903) OFF ON ON ON ON
8SW SW2(S905) ON ON OFF OFF ON
12SW SW3(S904) ON ON ON OFF ON
HOME SW4(S901) OFF OFF OFF OFF ON
Mechanism state With no disc Clamp state
B

Fig.1.4.3 DSCSNS status

LOADING
12cm
SW_ON
12EJ
SW_OFF
SW CHANGES

C
8EJ

DSCSNS

HOME

CLCONT
CONTROL

LOEJ

D MOTOR STOP LOAD STOP

It changes Load/Carriage
8cm

12EJ
SW CHANGES

8EJ

DSCSNS

HOME
E

CLCONT
CONTROL

LOEJ

MOTOR STOP LOAD STOP

Dead zone

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EJECT
A
12cm

12EJ

SW CHANGES
8EJ

DSCSNS

HOME

CONTROL CLCONT
B

LOEJ

MOTOR STOP EJECT STOP

8cm

12EJ
SW CHANGES

8EJ
C
DSCSNS

HOME

CLCONT
CONTROL

LOEJ

MOTOR STOP EJECT STOP

Dead zone
D

Fig.1.4.4 Status change in LOAD and EJECT modes

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2. MECHANISM DESCRIPTIONS
- Loading actions
A 1. When a disc is inserted, SW Arm L and R rotate and SW1 is switched from ON to OFF.
When SW1 is switched from ON to OFF, the Load Carriage Motor is started and the rubber roller rotates.
2. If the disc is a 12cm-disc, SW3 is turned ON with SW Arm, and the microcomputer determines that the disc is a 12cm-
disc.
3. In case of an 8cm-disc, SW3 is not turned ON, a clamp action is triggered, and the microcomputer determines that the
disc is an 8cm-disc.
(The left and right of SW Arm are coupled, and when only one side is pushed, the coupled joint will lock, and the arms
will not open more than a certain width (SW3 will not be turned ON).)

B Load Carriage Motor Pickup Unit

SW3
C

SW2

Rubber Roller SW1

DISC
SW Arm L SW Arm R

- Disc centering mechanism

1. 8cm-disc is centered by the Guide Pins and the Centering Pins.
2. 12cm-disc passes under the Guide Pins and the Centering Pins, and centered in the back position of the mechanism.

Centering Pin
Centering Pin 8cm-Disc

Guide Pin Guide Pin

Guide Pin Centering Pin

12cm-Disc

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- Clamp actions mechanism

1. With an 8 or 12cm-disc centered on the spindle, the Detection Arm is moved.
2. The movement of the Detection Arm engages the Loading Rack with the 2-Stage Gear.
3. The Clamp Lever slides and lowers the Clamp Arm (the disc is clamped). A
At the same time, the Roller Up Arm is rotated, and the Rubber Roller is separated from the disc.
Also the arm slides the Mechanical Lock Lever, turns the Mechanical Lock Arm, and releases the mechanical lock,
completing the clamp operation.
4. When the clamp action is completed, the Clamp Lever rotates the Gear Lock Arm.
When the arm is rotated, the Planet Gear is separated from the 2-Stage Gear and engaged with the gear of the pickup
feed screw, and the carriage operation will start

Detection Arm Clamp Arm Feed Screw's Gear Clamp Lever

Loading Rack
1 3
1
B
2 2-Stage Gear

8 Gear Lock Arm

Planet Gear
4
Roller Up Arm
5 C

Rubber Roller 6 Mech Lock Lever

Mech Lock Arm

- Eject actions
1. When the Load Carriage Motor is rotated backward, and the pickup is fed to the inner periphery passing the home SW
ON point, the eject action will start in the reverse order of the procedure mentioned earlier.
2. For a 12cm-disc, Eject is completed when SW3 is switched OFF, ON, and OFF again. D
3. For an 8cm-disc, Eject is completed when SW2 is switched OFF, ON, and OFF again.

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3. DISASSEMBLY

A
- How to hold the Mechanism Unit
1. Hold the Upper and Lower Frames.
2. Do not hold the front portion of the Upper
Frame, because it is not very solid.

Do not squeeze this area.

- Removing the Upper and Lower Frames

1. With a disc inserted and clamped in the a
B
mechanism, remove the two Springs (A), Upper Frame
C the six Springs (B), and the four Screws. B
2. Turn the Upper Frame using the part "a" as
a pivot, and remove the Upper Frame.
3. While lifting the Carriage Mechanism,
B
remove it from the three Dampers.
Caution: When assembling, be sure to apply
some alcohol to the Dampers and assemble B
the mechanism in a clamped state.

B
B
D
A
Damper
Damper
A
Carriage Mechanism Lower Frame

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- Removing the Guide Arm Assy

1. Remove the Upper and Lower Frames and
set the mechanism to the eject mode. A
2. Remove the two Screws and Bevel Gear Bevel Gear Bracket
Bracket. (Note that the gears will come off.)
3. Remove the two Springs from the left and 1
right sides.
4. Slide the Guide Arm Assy to the left, and
turn it upward.
5. When it is turned about 45 degrees, slide it
to the right and remove.
Caution: When assembling, assemble with the
Bevel Gear Bracket moved to the
direction of the arrow (1).
B

C
Spring

2 1

Guide Arm Assy

Spring D

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- How to remove the CD Core Unit

1. Apply Shorting Solder to the flexible cable of Shorting Solder
the Pickup, and disconnect it from the
connector.
A
2. Unsolder the four leads, and loosen the
Screw.
3. Remove the CD Core Unit.
Caution: When assembling the CD Core Unit,
assemble it with the SW in a clamped state
so as not to damage it.

Screw

B CD Core Unit

Solder

- How to remove the Roller Arm Assy

1. Remove the Guide Arm Assy.
2. Remove the CD Core Unit. (If the Spring can be removed, the unit need not be removed, depending on the type of CD
Core Unit.)
3. Remove the Spring.
C 4. Slide the Roller Arm Assy to the left.

Spring

Spring
Roller Arm Assy

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- How to remove the Pickup Unit

1. Make the system in the carriage mechanism mode, and have it clamped.
2. Remove the CD Core Unit and remove the leads from the Inner Holder.
3. Remove the Poly Washer, Change Arm, and Pickup Lock Arm. A
4. While releasing from the hook of the Inner Holder, lift the end of the Feed Screw.
Caution: When assembling, move the Planet Gear to the load/eject position before setting the Feed Screw in the Inner
Holder.
Assemble the sub unit side of the Pickup, taking the plate (Chassis) in-between. When treating the leads of the Load
Carriage Motor Assy, do not make them loose over the Feed Screw.

Poly Washer Change Arm

Pickup Lock Arm

Inner Holder
Feed Screw
B

Planet Gear
Pickup Rack

Chassis
C

Pickup

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- How to remove the Load Carriage Motor Assy Gear Bracket

1. Make the system in the carriage mechanism Screw B Screw A
mode, and have it clamped.
Bevel Gear Bracket
2. Release the leads (orange and purple) of Load
A
Carriage Motor Assy from the CD Core Unit and
remove the holder. Poly Washer
3. Remove the Poly Washer, Change Arm, and Change Arm
Pickup Lock Arm.
Pickup Lock Arm
4. Remove the two Screws (A) and the Bevel Gear
Bracket (Note that the gears will come off).
5. Remove the two Screws (B) and the Gear
Bracket (remove the CD Core Unit, if necessary),
and remove all the gears.
6. Remove the two Screws (C) and the Load
Carriage Motor Assy.
B Caution: When assembling the Load Carriage
Motor Assy, move it to the direction shown
in the illustration (1).
When treating the leads of the Load
Carriage Motor Assy, do not make them
loose over the Feed Screw.

Load Carriage Motor Assy

Screw C

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- How to remove the Clamp Arm Assy

1. Make the system in the carriage mechanism mode, and set the mechanism to the eject mode.
2. Remove the three Springs.
3. While pressing the position A, turn the Clamp Arm Assy upward, slide it to the left, and remove.
A
Caution: When assembling, place the boss of the Detection Pin in the cam unit of the Loading Rack.

Spring

place the boss

Clamp Arm Assy in the cam
Spring
Detection Pin A Detection Pin
Spring

C
- How to remove the Spindle Motor Assy
1. Make the system in the carriage mechanism
mode, and have it clamped.
2. Remove the CD Core Unit and remove the leads
from the Inner Holder.
3. Set the mechanism to the eject mode and
remove the Clamp Arm Assy.
4. Set the mechanism to the clamped and move the
Pickup to circumference.
5. Remove the two Screws, and remove the Spindle
Motor Assy. Screw
D

Spindle Motor Assy

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