Acer V5-452G DA0ZRIMB8E0 REV E Schematic Diagram

5 4 3 2 1
ZRI/ZQI Block Diagram

PCB STACK UP
D VRAM P22, 23 LAYER 1 : TOP D
Channel A LAYER 2 : GND

DDRIII-SODIMM Channel A(1600 MHZ)
APU PEG0~8(PCI-E x 8) GPU
DDR GFX LAYER 3 : IN1
P12 Mars XT(25W) Channel B
LAYER 4 : IN2
DRAM 29mm X 29mm
Richland APU VRAM DDR3-128MB*8 = 1GB LAYER 5 : SVCC
DP2 eDP PANEL P14~21
(35W) P25 VRAM DDR3-256MB*8 = 2GB
X'TAL LAYER 6 : IN3
Channel B 27.0MHz
27mm X 31mm LAYER 6 : GND
DP1 HDMI CONN
FP2 827pin BGA P26 LAYER 8 : BOT
P13,14
256Mb*16*8pcs/8 = 4GB
P3, 4, 5, 6 TXP/N,0/1
DP0
UMI
TXP/N,2/3 TXP/N,2/3
USB3-1 SW USB3 MINI DP CONN
UMI LINK USB2-11
HD3SS2521 USB2
2.5GT /s
P25 P25
C C
UMI(x4)
SATA0
SATA - HDD USB3-0
P31 USB3.0 USB3.0 Con.
USB2-10
SATA (charger) P34
SATA1
SATA - SSD
P31
USB2-7
USB Con. USB2-0 MINI CARD
P33
PCIE-0 WLAN+BT
FCH P30
Charger (BQ24737RGRR)
PCIE
D/B USB2-3
USB Con. P38
LAN & CR RJ45 Conn.
P33
USB2.0
Bolton M3 PCIE-1 QCA8175 P28 SYSTEM 5V/3V (TPS51225RUKR)
USB2-6 24.5mm X 24.5mm 10/100/1G P39

CCD Card Reader Conn.
P26 P28 +1.5VSUS(TPS51216)
X'TAL P29
B P8 B
RTC 25MHz
P40
X'TAL
USB2-8 25MHz
Touch Panel
+1.2V(TPS51211) / +2.5V
P26 BATTERY X'TAL
P8 32.768KHz P8 P41
1.1V_DUAL(TPS51211)
P7, 8, 9, 10, 11
P42
HDAUDIO
SPIROM
BIOSROM
LPC P9
+VDD_CORE (ISL62771)
P43
+VGPU_CORE(TPS51728)
P44
+PCIE_VDDC_GFX(TPS51211)
Audio Codec
EC 985L P45
ALC3225 P32 P37 +1.8V_GFX(TPS54318RTER)

P46
A A
Discharge /Thermal
INT. MIC HP/MIC AMP APU FAN GPU FAN HALL Sensor K/B Touch Pad TPM Conn.
P47
P32 P32 ALC1001 P35 P35 P33 P35 P35 P31
P32
D/B
Quanta Computer Inc.

Seaker Conn. PROJECT :ZRI/ZQI
www.vinafix.vn
P32 Size Document Number Rev
BLOCK DIAGRAM A1A
Date: Wednesday, April 24, 2013 Sheet 1 of 50

5 4 3 2 1
5 4 3 2 1
BOM Option
Power Sequence
ITEM DESCRIPTION MARK
1 LVDS Panel Sku LVDS@

AC IN
Hudson M3
2
3V/5VPCU SMBUS
eDP Panel Sku eDP@
FCH SMBUS Pin NO. SMBUS Function Define
3 VGA Sku EV@ NBSWON#
D
PCLK_SMB AD26 D
4 VGA Thames Sku EV_T@ DDR / WLAN
DNBSWON# PDAT_SMB AD25
5 VGA Mars Sku EV_M@ (+3V)
S5_ON/S5
VGA Sku for Thames and Mars stuff SCLK1 T7
6 different value parts EV_SP@ Touch Pad
SDATA1 R7
RSMRST#
(+3V_S5)
7 GPU 128bit Sku EV_128@
SMB_EC_CLK (SCLK2) H19
GPU 128bit Sku of Special part PCIE_WAKE# EC
8 value change EV_128SP@ SMB_EC_DAT (SDATA2) G19
(+3V_S5)
SUSC
9 USB Charge Functions Sku CH@
SCLK3 G22
Not used
10 No USB Charge Functions Sku NCH@ SUSB SDATA3 G21
(+3VPCU)
11 USB3.0 Re-Driver Sku RD@
SUSON
SCL4 J19
12 No USB3.0 Re-Driver Sku NRD@ Not used
SDATA4 K19
MAINON
13 Always connect functions Sku AC@ (+3V_S5)
14 No Always connect functions Sku NAC@ VR_ON

C C
Special part value change or modify

15 for different BOM sku SP@ CPU_CORE
EC
16 Key Board Back light Sku KBL@ VRM_PWRGD
SMBUS
KBC SMBUS Pin NO. SMBUS Function Define
17 SSD Sku SSD@
HWPG
18 Touch panel Sku TP@ MBCLK 70
ECPWROK MBDATA 69 Battery, FCH
(+3VPCU)
Page 9 GPIO strap pin SB_PWRGD_IN
APU_SIC_EC 67
ITEM DESCRIPTION MARK CPU RESET APU_SID_EC 68 APU
(+3V_S5)
1 Synaptics touch pad SYNP@ CPU POWER OK
GPUT_CLK 119
2 ELAN touch pad ELAN@
GPUT_DATA 120 GPU
3 For UMA Sku UMA@ (+3V_GFX)
B 4 ELPIDA on board DRAM ELP@ B

TPCLK 72
5 HYNIX on board DRAM HYN@ TPDATA 71 Touch Pad
(+3V)
EC FCH Device I2C_Device(S)
I2Ce_1(M) I2Cf_2(M) Charger Battery ALL/S5
I2Ce_2(M) APU ALL
I2Ce_3(M)
I2Cf_3(M) APU S5
I2Cf_1(M) S5
A
I2Cf_0(M) DDR WLAN/3G Image Sensor S0 A
EC will Conflict with FCH.

Do not mount

PROJECT : ZRI/ZQI
Size Document Number Rev
www.vinafix.vn
SYSTEM INFORMATION A1A

5 4 3 2 1
5 4 3 2 1
U48A
[15] PEG_RXP0 AP1 AN1 PEG_TXP0_C C695 [email protected]/10V_4 PEG_TXP0 [15]

P_GFX_RXP[0] P_GFX_TXP[0] PEG_TXN0_C C696 [email protected]/10V_4
[15] PEG_RXN0 AP2 P_GFX_RXN[0] P_GFX_TXN[0] AN2 PEG_TXN0 [15]
[15] PEG_RXP1 AM1 AM4 PEG_TXP1_C C693 [email protected]/10V_4 PEG_TXP1 [15]
[15] PEG_RXN1 AM2 P_GFX_RXN[1] P_GFX_TXN[1] AM3 PEG_TXN1 [15]
[15] PEG_RXP2 AK3 AK2 PEG_TXP2_C C692 [email protected]/10V_4 PEG_TXP2 [15]
P_GFX_RXP[2] P_GFX_TXP[2]
PEG X 8
PEG X 8
D AK4 AK1 PEG_TXN2_C C691 [email protected]/10V_4 D
[15] PEG_RXN2 P_GFX_RXN[2] P_GFX_TXN[2] PEG_TXN2 [15]
[15] PEG_RXP3 AJ1 AH1 PEG_TXP3_C C690 [email protected]/10V_4 PEG_TXP3 [15]
[15] PEG_RXN3 AJ2 P_GFX_RXN[3] P_GFX_TXN[3] AH2 PEG_TXN3 [15]
[15] PEG_RXP4 AH4 AF3 PEG_TXP4_C C688 [email protected]/10V_4 PEG_TXP4 [15]
[15] PEG_RXN4 AH3 P_GFX_RXN[4] P_GFX_TXN[4] AF4 PEG_TXN4 [15]
[15] PEG_RXP5 AF2 AE1 PEG_TXP5_C C686 [email protected]/10V_4 PEG_TXP5 [15]
[15] PEG_RXN5 AF1 P_GFX_RXN[5] P_GFX_TXN[5] AE2 PEG_TXN5 [15]
[15] PEG_RXP6 AD1 AD4 PEG_TXP6_C C683 [email protected]/10V_4 PEG_TXP6 [15]
[15] PEG_RXN6 AD2 P_GFX_RXN[6] P_GFX_TXN[6] AD3 PEG_TXN6 [15]
PEG_TXP7_C C681 [email protected]/10V_4
GRAPHICS
[15] PEG_RXP7 AB3 P_GFX_RXP[7] P_GFX_TXP[7] AB2 PEG_TXP7 [15]
[15] PEG_RXN7 AB4 AB1 PEG_TXN7_C C682 [email protected]/10V_4 PEG_TXN7 [15]
P_GFX_RXN[7] P_GFX_TXN[7]
AA1 P_GFX_RXP[8] P_GFX_TXP[8] Y1
FP2 only support PEG X 8 AA2 P_GFX_RXN[8] P_GFX_TXN[8] Y2 FP2 only support PEG X 8
Y4 P_GFX_RXP[9] P_GFX_TXP[9] V3
Y3 P_GFX_RXN[9] P_GFX_TXN[9] V4
V2 P_GFX_RXP[10] P_GFX_TXP[10] U1
V1 U2
T1
P_GFX_RXN[10]
P_GFX_RXP[11]
P_GFX_TXN[10]
P_GFX_TXP[11] T4 A10 AJ05757RT01
T2 P_GFX_RXN[11] P_GFX_TXN[11] T3
P3 P2
P4
P_GFX_RXP[12]
P_GFX_RXN[12]
P_GFX_TXP[12]
P_GFX_TXN[12] P1 A8 AJ05557UT01
N1 P_GFX_RXP[13] P_GFX_TXP[13] M1
N2 M2
M4
P_GFX_RXN[13]
P_GFX_RXP[14]
P_GFX_TXN[13]
P_GFX_TXP[14] K3 A6 AJ053578T01
M3 P_GFX_RXN[14] P_GFX_TXN[14] K4
K2 P_GFX_RXP[15] P_GFX_TXP[15] J1
K1 P_GFX_RXN[15] P_GFX_TXN[15] J2
AH5 P_GPP_RXP[0] P_GPP_TXP[0] AG7

AH6 P_GPP_RXN[0] P_GPP_TXN[0] AG8
C AG5 AE7 C
P_GPP_RXP[1] P_GPP_TXP[1]
AG6 P_GPP_RXN[1] P_GPP_TXN[1] AE8
AE6 P_GPP_RXP[2] P_GPP_TXP[2] AD7
AE5 P_GPP_RXN[2] P_GPP_TXN[2] AD8
AD6 P_GPP_RXP[3] P_GPP_TXP[3] AB6
AD5 AB5
GPP
P_GPP_RXN[3] P_GPP_TXN[3]
[8] UMI_RXP0 AM10 AN6 UMI_TXP0_C C709 0.1u/10V_4 UMI_TXP0 [8]

P_UMI_RXP[0] P_UMI_TXP[0] UMI_TXN0_C C708 0.1u/10V_4
[8] UMI_RXN0 AN10 P_UMI_RXN[0] P_UMI_TXN[0] AM6 UMI_TXN0 [8]
[8] UMI_RXP1 AN8 AP6 UMI_TXP1_C C710 0.1u/10V_4 UMI_TXP1 [8]
[8] UMI_RXN1 AM8 P_UMI_RXN[1] P_UMI_TXN[1] AR6 UMI_TXN1 [8]
[8] UMI_RXP2 AP8 AP4 UMI_TXP2_C C705 0.1u/10V_4 UMI_TXP2 [8]
[8] UMI_RXN2 AR8 P_UMI_RXN[2] P_UMI_TXN[2] AR4 UMI_TXN2 [8]
[8] UMI_RXP3 AR7 AP3 UMI_TXP3_C C702 0.1u/10V_4 UMI_TXP3 [8]
[8] UMI_RXN3 AP7 P_UMI_RXN[3] P_UMI_TXN[3] AR3 UMI_TXN3 [8]
UMI
+1.2V_VDDP R576 196/F_6 P_ZVDDP AR11 AP11 P_ZVSS

P_ZVDDP P_ZVSS
RICHLAND_APU_BGA813
R570
196/F_6
B B
HDT+ Connector for Debug only

+1.5V
R545 R552
+1.5VSUS *1K_4 *1K_4
J1
U44
1 2 APU_TCK 1 6 APU_RST_L_BUF
CPU_VDDIO1 CPU_TCK APU_TCK [5] [5,8] APU_RST# A1 Y1
3 4 APU_TMS
GND1 CPU_TMS APU_TMS [5]
5 6 APU_TDI 2 5 +3V
GND2 CPU_TDI APU_TDI [5] GND VCC
7 8 APU_TDO
GND3 CPU_TDO APU_TDO [5]
APU_TRST# 9 10 APU_PWROK_BUF 3 4 APU_PWROK_BUF
[5] APU_TRST# CPU_TRST_L CPU_PWROK_BUF [5,8] APU_PWRGD_R A2 Y2
R549 *10K_4 11 12 APU_RST_L_BUF
R540 *10K_4 CPU_DBRDY3 CPU_RST_L_BUF
13 CPU_DBRDY2 CPU_DBRDY0 14 APU_DBRDY [5]
R530 *10K_4 15 16 APU_DBREQ# C703 *74LVC2G07
CPU_DBRDY1 CPU_DBREQ_L APU_DBREQ# [5]
17 GND4 CPU_PLLTEST0 18 APU_TEST19_PLLTEST0 [5]
19 20 *0.1u/10V_4
CPU_VDDIO2 CPU_PLLTEST1 APU_TEST18_PLLTEST1 [5]
*HDT+ HEADER
A A
+1.5VSUS
Close by HDT+ Conector
APU_TDI
APU_TCK
R558
R565
1K_4
1K_4
APU_TMS R563 1K_4
APU_TRST# R551 1K_4 PROJECT : ZRI/ZQI
APU_DBREQ# R533 1K_4 Size Document Number Rev
www.vinafix.vn
A1A
APU 1/4(PCIE/UMI/GPP/HDT)
5 4 3 2 1
5 4 3 2 1
Soldermask openings for all bottom side vias/TPs under FS1
M_B_DQ[0..63] [13,14]
U48B M_A_DQ[0..63] [12] [13,14] M_B_A[15:0] U48C
[12] M_A_A[15:0]
M_A_A0 AA28 F15 M_A_DQ0 M_B_A0 Y33 C16 M_B_DQ0
M_A_A1 MA_ADD[0] MA_DATA[0] M_A_DQ1 M_B_A1 MB_ADD[0] MB_DATA[0] M_B_DQ1
R29 MA_ADD[1] MA_DATA[1] E15 R32 MB_ADD[1] MB_DATA[1] B17
M_A_A2 T30 H19 M_A_DQ2 M_B_A2 T31 B20 M_B_DQ2
R28 MA_ADD[3] MA_DATA[3] F19 P33 MB_ADD[3] MB_DATA[3] C20
M_A_A4 R26 E14 M_A_DQ4 M_B_A4 P32 A16 M_B_DQ4
D M_A_A5 MA_ADD[4] MA_DATA[4] M_A_DQ5 M_B_A5 MB_ADD[4] MB_DATA[4] M_B_DQ5 D
P26 MA_ADD[5] MA_DATA[5] H15 P31 MB_ADD[5] MB_DATA[5] B16
M_A_A6 P27 E17 M_A_DQ6 M_B_A6 N32 B19 M_B_DQ6
P30 MA_ADD[7] MA_DATA[7] D18 M33 MB_ADD[7] MB_DATA[7] A20
M_A_A8 P29 M_B_A8 M32
M_A_A9 MA_ADD[8] M_A_DQ8 M_B_A9 MB_ADD[8] M_B_DQ8
M28 MA_ADD[9] MA_DATA[8] G20 L32 MB_ADD[9] MB_DATA[8] B22
M_A_A10 AB26 E20 M_A_DQ9 M_B_A10 AB31 C22 M_B_DQ9
M26 MA_ADD[11] MA_DATA[10] H23 M31 MB_ADD[11] MB_DATA[10] A26
M_A_A12 M29 G23 M_A_DQ11 M_B_A12 K32 B26 M_B_DQ11
AE27 MA_ADD[13] MA_DATA[12] E19 AF33 MB_ADD[13] MB_DATA[12] B21
M_A_A14 L26 H20 M_A_DQ13 M_B_A14 K33 A22 M_B_DQ13
[12] M_A_BS#[2..0] L27 MA_ADD[15] MA_DATA[14] E22 [13,14] M_B_BS#[2..0] J32 MB_ADD[15] MB_DATA[14] C24
D22 M_A_DQ15 B25 M_B_DQ15
M_A_BS#0 MA_DATA[15] M_B_BS#0 MB_DATA[15]
AB27 MA_BANK[0] AB33 MB_BANK[0]
M_A_BS#1 AA29 H25 M_A_DQ16 M_B_BS#1 AA32 A28 M_B_DQ16
M_A_BS#2 MA_BANK[1] MA_DATA[16] M_A_DQ17 M_B_BS#2 MB_BANK[1] MB_DATA[16] M_B_DQ17
[12] M_A_DM[7..0] M30 MA_BANK[2] MA_DATA[17] F25 K31 MB_BANK[2] MB_DATA[17] B28
D28 M_A_DQ18 B31 M_B_DQ18
M_A_DM0 MA_DATA[18] M_A_DQ19 MB_DATA[18] M_B_DQ19
D16 MA_DM[0] MA_DATA[19] D29 [13,14] M_B_DM0 C18 MB_DM[0] MB_DATA[19] A32
M_A_DM1 D20 E23 M_A_DQ20 B23 C26 M_B_DQ20
MA_DM[1] MA_DATA[20] [13,14] M_B_DM1 MB_DM[1] MB_DATA[20]
M_A_DM2 E25 D24 M_A_DQ21 C28 B27 M_B_DQ21
M_A_DM3 F30 D26 M_A_DQ22 D31 A30 M_B_DQ22
M_A_DM4 AK29 D27 M_A_DQ23 AM31 C30 M_B_DQ23
M_A_DM5 AL25 AN30
MA_DM[5] [13,14] M_B_DM5 MB_DM[5]
M_A_DM6 AM20 G28 M_A_DQ24 AR24 B33 M_B_DQ24
M_A_DM7 AM16 G29 M_A_DQ25 AN18 C32 M_B_DQ25
H27 M_A_DQ26 F33 M_B_DQ26
MA_DATA[26] M_A_DQ27 MB_DATA[26] M_B_DQ27
[12] M_A_DQSP0 G17 MA_DQS_H[0] MA_DATA[27] J29 [13,14] M_B_DQSP0 B18 MB_DQS_H[0] MB_DATA[27] F32
H17 E28 M_A_DQ28 A18 B32 M_B_DQ28
[12] M_A_DQSN0 MA_DQS_L[0] MA_DATA[28] [13,14] M_B_DQSN0 MB_DQS_L[0] MB_DATA[28]
F22 F27 M_A_DQ29 B24 C31 M_B_DQ29
[12] M_A_DQSP1 MA_DQS_H[1] MA_DATA[29] [13,14] M_B_DQSP1 MB_DQS_H[1] MB_DATA[29]
G22 H29 M_A_DQ30 A24 E32 M_B_DQ30
[12] M_A_DQSN1 MA_DQS_L[1] MA_DATA[30] [13,14] M_B_DQSN1 MB_DQS_L[1] MB_DATA[30]
E26 H28 M_A_DQ31 B30 F31 M_B_DQ31
C [12] M_A_DQSP2 MA_DQS_H[2] MA_DATA[31] [13,14] M_B_DQSP2 MB_DQS_H[2] MB_DATA[31] C
[12] M_A_DQSN2 F26 MA_DQS_L[2] [13,14] M_B_DQSN2 B29 MB_DQS_L[2]
[12] M_A_DQSP3 H30 MA_DQS_H[3] MA_DATA[32] AH29 M_A_DQ32 [13,14] M_B_DQSP3 D32 MB_DQS_H[3] MB_DATA[32] AK32 M_B_DQ32
[12] M_A_DQSN3 G30 MA_DQS_L[3] MA_DATA[33] AJ30 M_A_DQ33 [13,14] M_B_DQSN3 D33 MB_DQS_L[3] MB_DATA[33] AL32 M_B_DQ33
[12] M_A_DQSP4 AL29 MA_DQS_H[4] MA_DATA[34] AM28 M_A_DQ34 [13,14] M_B_DQSP4 AM32 MB_DQS_H[4] MB_DATA[34] AP32 M_B_DQ34
[12] M_A_DQSN4 AL30 MA_DQS_L[4] MA_DATA[35] AM27 M_A_DQ35 [13,14] M_B_DQSN4 AM33 MB_DQS_L[4] MB_DATA[35] AN31 M_B_DQ35
[12] M_A_DQSP5 AH25 MA_DQS_H[5] MA_DATA[36] AH27 M_A_DQ36 [13,14] M_B_DQSP5 AN28 MB_DQS_H[5] MB_DATA[36] AK31 M_B_DQ36
[12] M_A_DQSN5 AJ25 MA_DQS_L[5] MA_DATA[37] AH28 M_A_DQ37 [13,14] M_B_DQSN5 AP29 MB_DQS_L[5] MB_DATA[37] AK33 M_B_DQ37
[12] M_A_DQSP6 AK20 MA_DQS_H[6] MA_DATA[38] AJ29 M_A_DQ38 [13,14] M_B_DQSP6 AP23 MB_DQS_H[6] MB_DATA[38] AN32 M_B_DQ38
[12] M_A_DQSN6 AL20 MA_DQS_L[6] MA_DATA[39] AK27 M_A_DQ39 [13,14] M_B_DQSN6 AP24 MB_DQS_L[6] MB_DATA[39] AP33 M_B_DQ39
[12] M_A_DQSP7 AK15 MA_DQS_H[7] [13,14] M_B_DQSP7 AR18 MB_DQS_H[7]
[12] M_A_DQSN7 AL15 MA_DQS_L[7] MA_DATA[40] AK26 M_A_DQ40 [13,14] M_B_DQSN7 AP18 MB_DQS_L[7] MB_DATA[40] AP30 M_B_DQ40
MA_DATA[41] AJ26 M_A_DQ41 MB_DATA[41] AR30 M_B_DQ41
[12] M_A_CLKP0 W29 MA_CLK_H[0] MA_DATA[42] AK23 M_A_DQ42 [13] M_B_CLKP0 W32 MB_CLK_H[0] MB_DATA[42] AP27 M_B_DQ42
[12] M_A_CLKN0 Y30 MA_CLK_L[0] MA_DATA[43] AJ23 M_A_DQ43 [13] M_B_CLKN0 Y32 MB_CLK_L[0] MB_DATA[43] AN26 M_B_DQ43
[12] M_A_CLKP1 W26 MA_CLK_H[1] MA_DATA[44] AM26 M_A_DQ44 [14] M_B_CLKP1 V33 MB_CLK_H[1] MB_DATA[44] AR32 M_B_DQ44
[12] M_A_CLKN1 W27 MA_CLK_L[1] MA_DATA[45] AL26 M_A_DQ45 [14] M_B_CLKN1 V32 MB_CLK_L[1] MB_DATA[45] AP31 M_B_DQ45
U29 MA_CLK_H[2] MA_DATA[46] AM24 M_A_DQ46 U32 MB_CLK_H[2] MB_DATA[46] AR28 M_B_DQ46
V30 MA_CLK_L[2] MA_DATA[47] AL23 M_A_DQ47 V31 MB_CLK_L[2] MB_DATA[47] AP28 M_B_DQ47
U26 MA_CLK_H[3] T33 MB_CLK_H[3]
U27 MA_CLK_L[3] MA_DATA[48] AK22 M_A_DQ48 T32 MB_CLK_L[3] MB_DATA[48] AP25 M_B_DQ48
MA_DATA[49] AH22 M_A_DQ49 MB_DATA[49] AN24 M_B_DQ49
[12] M_A_CKE0 L29 MA_CKE[0] MA_DATA[50] AK19 M_A_DQ50 [13] M_B_CKE0 H32 MB_CKE[0] MB_DATA[50] AR22 M_B_DQ50
[12] M_A_CKE1 K30 MA_CKE[1] MA_DATA[51] AH19 M_A_DQ51 [14] M_B_CKE1 H33 MB_CKE[1] MB_DATA[51] AP21 M_B_DQ51
MA_DATA[52] AM22 M_A_DQ52 MB_DATA[52] AP26 M_B_DQ52
[12] M_A_ODT0 AD30 MA0_ODT[0] MA_DATA[53] AL22 M_A_DQ53 [13] M_B_ODT0 AF31 MB0_ODT[0] MB_DATA[53] AR26 M_B_DQ53
[12] M_A_ODT1 AG28 MA0_ODT[1] MA_DATA[54] AJ20 M_A_DQ54 [14] M_B_ODT1 AH31 MB0_ODT[1] MB_DATA[54] AN22 M_B_DQ54
AE26 MA1_ODT[0] MA_DATA[55] AL19 M_A_DQ55 AE32 MB1_ODT[0] MB_DATA[55] AP22 M_B_DQ55
AG29 MA1_ODT[1] AH33 MB1_ODT[1]
MA_DATA[56] AK17 M_A_DQ56 MB_DATA[56] AR20 M_B_DQ56
[12] M_A_CS#0 AD26 MA0_CS_L[0] MA_DATA[57] AJ17 M_A_DQ57 [13] M_B_CS#0 AD31 MB0_CS_L[0] MB_DATA[57] AP19 M_B_DQ57
B AE29 AK14 M_A_DQ58 AF32 AP16 M_B_DQ58 B
[12] M_A_CS#1 MA0_CS_L[1] MA_DATA[58] [14] M_B_CS#1 MB0_CS_L[1] MB_DATA[58]
AB30 MA1_CS_L[0] MA_DATA[59] AH14 M_A_DQ59 AC32 MB1_CS_L[0] MB_DATA[59] AR16 M_B_DQ59
AF30 MA1_CS_L[1] MA_DATA[60] AM18 M_A_DQ60 AG32 MB1_CS_L[1] MB_DATA[60] AN20 M_B_DQ60
MA_DATA[61] AL17 M_A_DQ61 MB_DATA[61] AP20 M_B_DQ61
[12] M_A_RAS# AB29 MA_RAS_L MA_DATA[62] AH15 M_A_DQ62 [13,14] M_B_RAS# AB32 MB_RAS_L MB_DATA[62] AP17 M_B_DQ62
[12] M_A_CAS# AD29 MA_CAS_L MA_DATA[63] AL14 M_A_DQ63 [13,14] M_B_CAS# AD32 MB_CAS_L MB_DATA[63] AN16 M_B_DQ63
[12] M_A_WE# AD28 MA_WE_L [13,14] M_B_WE# AD33 MB_WE_L
[12] M_A_RST# J28 MA_RESET_L [13,14] M_B_RST# H31 MB_RESET_L

[12] M_A_EVENT# AA26 MA_EVENT_L TP34 Y31 MB_EVENT_L
+MEMVREF_CPU G32 M_VREF RICHLAND_APU_BGA813
+1.5VSUS R594 39.2/F_4 +M_ZVDDIO AJ32 M_ZVDDIO

Place close to APU within 1" RICHLAND_APU_BGA813
+1.5VSUS
R227
A10 AJ05757RT01
1K/F_4 +MEMVREF_CPU
A A8 AJ05557UT01 A
R222 *short_4
A6 AJ053578T01
R225
C333 C330 C327
1K/F_4 0.47u/6.3V_4 0.1u/10V_4 1000p/50V_4
PROJECT : ZRI/ZQI
A1A
APU 2/4(DDR3 MEM I/F)
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
A10 AJ05757RT01
U48D
[25] MINI_DP_TXP0 H2 DP0_TXP[0] DP0_AUXP M5 MINI_DP_AUXP [25]

A8 AJ05557UT01
[25] MINI_DP_TXN0 H1 DP0_TXN[0] DP0_AUXN M6 MINI_DP_AUXN [25]
H3 L5 INT_HDMI_AUXP A6 AJ053578T01
DISPLAY PORT 0
[25] MINI_DP_TXP1 DP0_TXP[1] DP1_AUXP INT_HDMI_AUXP [27]
INT_HDMI_AUXN
DP0 [25] MINI_DP_TXN1 H4 DP0_TXN[1] DP1_AUXN L6 INT_HDMI_AUXN [27]
INT_EDP_AUXP_C C157 0.1u/10V_4 INT_EDP_AUXP_C R171 1.8K_4
MINI DP [25] MINI_DP_TXP2 F4
F3
DP0_TXP[2] DP2_AUXP J5
J6 INT_EDP_AUXN_C C169 0.1u/10V_4
eDP_AUXP [26]
INT_EDP_AUXN_C R175 1.8K_4
eDP
[25] MINI_DP_TXN2 DP0_TXN[2] DP2_AUXN eDP_AUXN [26]
[25] MINI_DP_TXP3 F1 DP0_TXP[3] DP3_AUXP P5

[25] MINI_DP_TXN3 F2 DP0_TXN[3] DP3_AUXN P6
D D
DISPLAY PORT MISC.

C680 0.1u/10V_4 INT_HDMI_TXDP2_C E2 R5 +3V
[27] INT_HDMI_TXDP2 DP1_TXP[0] DP4_AUXP
C679 0.1u/10V_4 INT_HDMI_TXDN2_C E1 R6
[27] INT_HDMI_TXDN2 DP1_TXN[0] DP4_AUXN
C678 0.1u/10V_4 INT_HDMI_TXDP1_C D4 U5
DISPLAY PORT 1
[27] INT_HDMI_TXDP1 DP1_TXP[1] DP5_AUXP
C677 0.1u/10V_4 INT_HDMI_TXDN1_C D3
DP1 [27] INT_HDMI_TXDN1 DP1_TXN[1] DP5_AUXN U6
R146
C676 0.1u/10V_4 INT_HDMI_TXDP0_C D1 eDP@10K_4
HDMI [27] INT_HDMI_TXDP0
C675 0.1u/10V_4 INT_HDMI_TXDN0_C D2 DP1_TXP[2] DP0_HPD M7
L7
INT_MINI_HPD_Q [25]
[27] INT_HDMI_TXDN0 DP1_TXN[2] DP1_HPD INT_HDMI_HPD [27]
DP2_HPD J7 INT_eDP_HPD [26]
C674 0.1u/10V_4 INT_HDMI_TXCP_C C1 P7 R143
[27] INT_HDMI_TXCP DP1_TXP[3] DP3_HPD EDP_BRIGHT [26]
C673 0.1u/10V_4 INT_HDMI_TXCN_C C2 R7 R569 100K_4 eDP@10K_4
[27] INT_HDMI_TXCN DP1_TXN[3] DP4_HPD
3
DP5_HPD U7
C711 0.1u/10V_4 INT_EDP_TXP0_C B2
[26] EDP_TXP0 DP2_TXP[0]
C714 0.1u/10V_4 INT_EDP_TXN0_C A2 C6 eDP_BL_EN
[26] EDP_TXN0 DP2_TXN[0] DP_BLON eDP_BL_EN [26]
D7 APU_DIGON 2 Q15
C715 0.1u/10V_4 INT_EDP_TXP1_C DP_DIGON APU_VARY_BL eDP@2N7002D
DP2 B3 A6
DISPLAY PORT 2
[26] EDP_TXP1 DP2_TXP[1] DP_VARY_BL
C717 0.1u/10V_4 INT_EDP_TXN1_C A3
[26] EDP_TXN1 DP2_TXN[1]
3
DP_AUX_ZVSS R573 150/F_4 To AMD HDT
eDP C718 0.1u/10V_4 INT_EDP_TXP2_C B4
DP_AUX_ZVSS B6
[26] EDP_TXP2
1
C724 0.1u/10V_4 INT_EDP_TXN2_C DP2_TXP[2] APU_VARY_BL
[26] EDP_TXN2 A4 DP2_TXN[2] TEST6 AL6 2
Y23 APU_TEST9
TEST9 TP28
C725 0.1u/10V_4 INT_EDP_TXP3_C B5 V23 APU_TEST10
[26] EDP_TXP3 DP2_TXP[3] TEST10 TP29
C727 0.1u/10V_4 INT_EDP_TXN3_C A5 G9 APU_TEST14_BP0 R204 1K_4 R123 Q10
[26] EDP_TXN3 TP26
1
DP2_TXN[3] TEST14 APU_TEST15_BP1 R202 1K_4 *eDP@100K_4 eDP@PDTC143TT
TEST15 F9 TP27
AL9 E9 APU_TEST16_BP2
[8] CLK_APU_HCLKP CLKIN_H TEST16 TP25
Note: CLK_APU_HCLKP/N is 100MHZ SSC AK9 G8 APU_TEST17_BP3
[8] CLK_APU_HCLKN CLKIN_L TEST17 TP23
APU_TEST18_PLLTEST1
TEST
TEST18 F12 APU_TEST18_PLLTEST1 [3]
AL7 E12 APU_TEST19_PLLTEST0
CLK
[8] CLK_DP_NSSCP DISP_CLKIN_H TEST19 APU_TEST19_PLLTEST0 [3]
Note: CLK_DP_NSSCP/N is 100MHZ non-SSC AK7 F14 APU_TEST20_SCANCLK2 R210 1K_4
[8] CLK_DP_NSSCN DISP_CLKIN_L TEST20
G12 APU_TEST24_SCANCLK1 R207 1K_4
SVC TEST24 APU_TEST25_H R174 510/F_4
E5 SVC TEST25_H AJ8
SVD E6 AH8 APU_TEST25_L R177 510/F_4 +1.2V_VDDP
SVD TEST25_L
TEST28_H G14
SER.
R546 *short_4 APU_SVT_R D6 H14
C [43] APU_SVT SVT TEST28_L C
+1.5V R534 *1K_4 V25 APU_TEST30_H
TEST30_H TP36
APU_SIC AJ11 Y25 APU_TEST30_L
SIC TEST30_L TP32
APU_SID AH11 AH32 M_TEST DMAACTIVE_L controls
R163 300_4 C190 150P/50V_4 SID TEST31 APU_TEST32_H
+1.5VSUS TEST32_H R25 TP33 entry and exit from the
EC [3,8] APU_RST#
APU_PWRGD_R
AK11
AH9
RESET_L TEST32_L T25
AL5
APU_TEST32_L
APU_TEST35
TP35 sleep and power states +3V
[3,8] APU_PWRGD_R PWROK TEST35
FCH +1.5VSUS R155
R180
300_4
1K_4
C178 150P/50V_4
H_PROCHOT#
R577 1K_4 +1.5VSUS
CTRL
+1.5VSUS AL12 PROCHOT_L DMAACTIVE_L AP10 DMAACTIVE_L [8]
APU_THERMTRIP#_C AK5
[8,37] H_PROCHOT# THERMTRIP_L
R181 *short_4 APU_ALERT AR10 T23 CPU_THERMDA
ALERT_L TEST4 TP30
R23 CPU_THERMDC R145
TEST5 TP31
E11 eDP@10K_4
[3] APU_TDI TDI
+1.5V 10K_4 R211 G11
[3] APU_TDO TDO
[3] APU_TCK H12 TCK
2
R133
JTAG
[3] APU_TMS F11 TMS RSVD L8 eDP_DIGON [26]
H11 P8 eDP@10K_4
[3] APU_TRST# TRST_L RSVD
3
[43] CORE_PWM_PROCHOT# 1 3 [3] APU_DBRDY E8 DBRDY RSVD AH12
Q22 METR3904-G_200MA
RSVD
[3] APU_DBREQ# E7 DBREQ_L RSVD AJ12
RSVD AK12
G6 2 Q16
[43] APU_VDD_RUN_FB_L VSS_SENSE
APU Core Power TP17 H6
H5
VDDP_SENSE
+1.5VSUS +1.5VSUS eDP@2N7002D
[43] APU_VDDNB_RUN_FB_H VDDNB_SENSE
3
G7
SENSE
TP18 VDDIO_SENSE
[43] APU_VDD_RUN_FB_H G5
1
VDD_SENSE APU_DIGON
TP20 H7 VDDR_SENSE 2
RICHLAND_APU_BGA813 R593 R149

*39.2/F_4 300_4 R136 Q14
1
eDP@100K_4 eDP@PDTC143TT
M_TEST APU_TEST35
+1.5VSUS
M_TEST CONNECTION TBD 7/8 For Comal.
R592 R153
3
B 39.2/F_4 *300_4 B
Q19
TEST35 PU FOR INTERNAL
2 TEST35 PD FOR CUSTOMER
[7,11] FCH_PWRGD
+1.5VSUS FDV301N_200MA
1
R157 100K_4
R152 R148 R151

10K_4 1K_4 1K_4
Q17 BOOT VOLTAGE

METR3904-G_200MA
2
SVC SVD VFIX_+VDD VFIX_+VDD

3 1 APU_THERMTRIP#_C 1 3 SYS_SHDN# =VCC/GND =OPEN
[7] APU_THERMTRIP# SYS_SHDN# [16,37,39,44,47]
METR3904-G_200MA Q18
0 0 1.1 1.1
0 1 1.0 1.2
+1.5VSUS +1.5VSUS +1.5V
1 0 0.9 1.0
R165 R164 R169 R168 +1.5VSUS 1 1 0.8 0.8 R529 R528 R150
2K/F_4 2K/F_4 1K_4 1K_4 *1K_4 *1K_4 *2.2K_4
R571 1K_4 APU_ALERT SVC R548 Rd *short_4 APU_SVC APU_SVC [43]

2
A A
SVD R547 Re *short_4 APU_SVD APU_SVD [43]
3 1 APU_SIC
[37] APU_SIC_EC Rf
APU_PWRGD_R R156 *short_4 APU_PWRGD_SVID_REG APU_PWRGD_SVID_REG [43]
FDV301N_200MA
Q21 for normal operation
R536 R535 R154
open Ra , Rb,Rc
2
*220_4 *220_4 *220_4 C136
APU_SID
Ra Rb Rc *0.1u/10V_4 Quanta Computer Inc.
[37] APU_SID_EC 3 1
PROJECT : ZRI/ZQI
FDV301N_200MA Size Document Number Rev
A1A
Q20 APU 3/4(Display/Misc)
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
U48F
A17 VSS VSS Y11
A19 VSS VSS Y12
+VDD_CORE +VDD_CORE 22A A21
A23
VSS VSS Y14
Y15
VSS VSS
U48E Maximum IDDspike 35A A25
A27
VSS VSS Y17
Y19
VSS VSS
J12 VDD VDD V17 A29 VSS VSS Y20
22A J14
J15
VDD VDD V19
V20
A31
B1
VSS VSS Y22
AA4
+VDDNB_CORE VDD VDD C258 C239 C218 C161 C184 C167 C224 C162 VSS VSS
Maximum IDDNBspike 33A J17
J19
VDD VDD V22
W8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8
C3
C4
VSS VSS AA5
AB7
VDD VDD VSS VSS
J20 VDD VDD AA8 C33 VSS VSS AB8
D J22 AA9 D5 AC1 D
VDD VDD VSS VSS
M11 VDD VDD AA11 D9 VSS VSS AC2
C198 C197 C235 C236 M12 AA12 D11 AC4
22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 VDD VDD VSS VSS
M15 AA15 C242 C205 C238 C257 C194 C321 C279 D15 AC11
VDD VDD 22u/6.3V_8 22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 VSS VSS
R8 VDD VDD AD9 D25 VSS VSS AC19
C731 C739 C741 C730 C740 R9 AD11 D30 AC20
0.22u/10V_4 0.22u/10V_4 39p/50V_4 39p/50V_4 180p/50V_4 VDD VDD VSS VSS
R11 VDD VDD AD12 E4 VSS VSS AC22
R12 AD14 C202 C225 C177 C163 C249 C278 C181 C227 C244 E27 AC23
VDD VDD 0.22u/10V_4 0.22u/10V_4 *0.22u/10V_4 39p/50V_4 *0.01u/25V_4 0.01u/25V_4 39p/50V_4 0.01u/25V_4 0.01u/25V_4 VSS VSS
R14 VDD VDD AD15 E29 VSS VSS AC25
R15 VDD VDD AD17 E30 VSS VSS AE4
For EMI R17
R19
VDD VDD AD19
AD20
E33
F5
VSS VSS AF9
AF11
VDD VDD VSS VSS
R20 VDD VDD AD22 F6 VSS VSS AF12
R22 VDD VDD AG12 F7 VSS VSS AF14
C208 C256 C223 C182
U8
V9
VDD VDD AG14
AG15 *180p/50V_4 180p/50V_4 180p/50V_4 180p/50V_4 For EMI F8
F17
VSS VSS AF15
AF17
VDD VDD VSS VSS
V11 VDD VDD AG17 F20 VSS VSS AF19
+VDDNB_CAP V15 AG22 F29 AF23
+VDDNB_CORE VDD VDD +VDDNB_CORE VSS VSS
G1 VSS VSS AF25
G2 VSS VSS AG1
A7 VDDNB VDDNB B11 G4 VSS VSS AG2
C209 C165 C166 C203 C204

A8 VDDNB VDDNB B12 APU POWER TABLE G15 VSS VSS AG4
C 180p/50V_4 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 A10 B14 PIN NAME NET NAME VOLTAGE G25 AG11 C
VDDNB VDDNB VSS VSS
A12 C8 VDD +VDD_CORE 1.0V ~ 1.3V G27 AH7
VDDNB VDDNB VSS VSS
A13 VDDNB VDDNB C10 G33 VSS VSS AH17
A14 C12 VDDNB +VDDNB_CORE 1.05V ~ 1.325V H8 AH20
VDDNB VDDNB VSS VSS
A15 VDDNB VDDNB C14 H9 VSS VSS AH23
B7 D8 VDDIO +1.5VSUS 1.5V H22 AH26
VDDNB VDDNB VSS VSS
B8 VDDNB VDDNB D10 H26 VSS VSS AH30
B9 D12 VDDP +1.2V_VDDP +1.2V J4 AJ4
VDDNB VDDNB +VDDNB_CAP VSS VSS
B10 VDDNB VDDNB D14 J8 VSS VSS AJ5
VDDR +1.2V_VDDR +1.2V J9 AJ6
VSS VSS
VDDNB_CAP M9 J11 VSS VSS AJ7
+1.5VSUS N9 VDDA +2.5V_VDDA +2.5V J23 AJ9
VDDNB_CAP VSS VSS
2.3A Up to DDR3-1333 @ 1.5V VDDIO J25 VSS VSS AJ14
J33 VDDIO VDDIO W33 J26 VSS VSS AJ15
K23 AA23 +1.5VSUS J27 AJ19
VDDIO VDDIO VSS VSS
K25 VDDIO VDDIO AA25 J30 VSS VSS AJ22
C319 C305 C320 C322 C395 C326 L28 AA27 K9 AJ27
0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 VDDIO VDDIO VSS VSS
L30 VDDIO VDDIO AA30 K11 VSS VSS AJ28
L33 VDDIO VDDIO AA33 K12 VSS VSS AJ33
M27 AB28 C401 C299 C281 C275 C300 C297 K14 AK6
VDDIO VDDIO 22u/6.3V_8 22u/6.3V_8 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 VSS VSS
N23 VDDIO VDDIO AC30 K15 VSS VSS AK8
N25 VDDIO VDDIO AC33 K17 VSS VSS AK25
N30 VDDIO VDDIO AD23 K19 VSS VSS AK28
C411 C328 N33 AD25 K20 AK30
0.22u/10V_4 0.22u/10V_4 VDDIO VDDIO VSS VSS
P28 VDDIO VDDIO AD27 K22 VSS VSS AL1
R27 VDDIO VDDIO AE28 L1 VSS VSS AL2
R30 AE30 C277 C301 C280 C284
R33
VDDIO VDDIO
AE33 180p/50V_4 180p/50V_4 180p/50V_4 180p/50V_4 For EMI L2
L4
VSS VSS AL4
AL8
+1.2V_VDDP VDDIO VDDIO VSS VSS
U28 VDDIO VDDIO AG23 M8 VSS VSS AL11
B B
R578 *short_8
VDDP = 3.5A U30 VDDIO VDDIO AG25 M23 VSS VSS AL27
+1.2V U33 VDDIO VDDIO AG27 M25 VSS VSS AL28
W28 VDDIO VDDIO AG30 N4 VSS VSS AL33
+1.2V_VDDR +1.2V
C737 C221 C220 C201
W30 VDDIO VDDIO AG33 VDDR = 3.2A ( Up to DDR3-1333 @ 1.5V ) N11 VSS VSS AM5
N12 VSS VSS AM7
22u/6.3V_8 22u/6.3V_8 *22u/6.3V_8 0.22u/10V_4 AM12 AN14 R581 *short_8 N14 AM9
VDDP VDDR VSS VSS
AN12 VDDP VDDR AP14 N15 VSS VSS AM11
AP12 VDDP VDDR AP15 N17 VSS VSS AM15
AP13 AR14 C274 C252 C743 C273 C745 C747 C748 N19 AM17
VDDP VDDR 0.22u/10V_4 0.22u/10V_4 1000p/50V_4 39p/50V_4 180p/50V_4 4.7u/6.3V_6 180p/50V_4 VSS VSS
AR12 VDDP VDDR AR15 N20 VSS VSS AM19
AR13 VDDP N22 VSS VSS AM21
R1 VSS VSS AM23
C729 C226 C736 C185 C215 AA6 R2 AM25
180p/50V_4 180p/50V_4 39p/50V_4 1000p/50V_4 0.22u/10V_4 +VDDP_CAP VDDP_CAP VSS VSS
AA7 VDDP_CAP R4 VSS VSS AM29
T9 VSS VSS AM30
AM13 VDDA T11 VSS VSS AN3
AM14 VDDA T12 VSS VSS AN4
C251 C250 T14 AN33
180p/50V_4 180p/50V_4 VSS VSS
RICHLAND_APU_BGA813 T15 VSS VSS AP5
C152 C151 T17 AP9
*22u/6.3V_8 22u/6.3V_8 VSS VSS
T19 VSS VSS AR2
T20 VSS VSS AR5
T22 VSS VSS AR9
U4 VSS VSS AR17
+2.5V_VDDA
VDDA= 0.75A W1 VSS VSS AR19
+2.5V L19 DECOUPLING between PROCESSOR and DIMMs W2

W4
VSS VSS AR21
AR23
HCB1608KF-221T20_2A VSS VSS
W5 VSS VSS AR25
+1.5VSUS
C206 C187 C186 C188 Across VDDIO and VSS split W6
W7
VSS VSS AR27
AR29
A 4.7u/6.3V_6 0.22u/10V_4 3300p/50V_4 39p/50V_4 VSS VSS A
Y9 VSS VSS AR31
RICHLAND_APU_BGA813
C404 C304 C405 C396 C397 C318 C325 C398 C324 C399
4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 39p/50V_4 39p/50V_4
A10 AJ05757RT01 Quanta Computer Inc.

If the VSS plane is cut to create a VDDIO plane,
A8 AJ05557UT01 ceramic capacitors are connected across PROJECT : ZRI/ZQI
the VDDIO and VSS plane split as follows Size Document Number Rev
A1A
A6 AJ053578T01 APU 4/4(POWER/GND)
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
+3V_S5
NC,no install by default C830 150p/50V_4
R388 *2.2K_4 FCH_TEST0
[28,30,37] FCH_PCIE_RST#
R387 *2.2K_4 FCH_TEST1 1 2 R686 33_4 U53A
[8,30,31,37] PLTRST#
D24 RB500V-40_100MA PCIE_RST2# AB6 G8
PCIE_RST2#/GEVENT4# USBCLK/14M_25M_48M_OSC
[37] EC_WLAN_WAKE# R2 RI#/GEVENT22#
R389 *2.2K_4 FCH_TEST2 W7 B9 USB_RCOMP_SB R652 11.8K/F_6
D SUSB# SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP D
T3 SLP_S3#
[37] SUSC# W2 H1 TP73
MISC
SLP_S5# USB_FSD1P/GPIO186
USB
remove pull hi ( chip internal have pull hi ) R717 *short_4 PWR_BTN# J4 H3
[37] DNBSWON# PWR_BTN# USB_FSD1N TP72
[5,11] FCH_PWRGD N7 PWR_GOOD HUDSON-M3 USB_FSD0P/GPIO185 H6 TP74
FCH_TEST0 T9 Part 4 of 5 H5
+3V TEST0 USB_FSD0N TP70
FCH_TEST1 T10
USB
FCH_TEST2 TEST1/TMS
1.1
ACPI / WAKE UP
V9 TEST2 USB_HSD13P H10
R287 2.2K_4 PCLK_SMB AE22 G10
[37] SIO_A20GATE GA20IN/GEVENT0# USB_HSD13N
[37] SIO_RCIN# AG19 KBRST#/GEVENT1#
R293 2.2K_4 PDAT_SMB +3V_S5 R9 K10
EVENTS
[37] SIO_EXT_SCI# PME#/GEVENT3# USB_HSD12P
[37] SIO_EXT_SMI# C26 LPC_SMI#/GEVENT23# USB_HSD12N J12
R292 *10K_4 GPIO65 T5
[31] FCH_LPC_PD#
SYS_RST# U4
LPC_PD#/GEVENT5#
SYS_RESET#/GEVENT19# USB_HSD11P G12 USBP11+ [25]
HUB3
PCIE_WAKE# K1 F12 USBP11- [25] MINI DP
[28] PCIE_WAKE# WAKE#/GEVENT8# USB_HSD11N
R428 GEVENT20# V7
TP52 IR_RX1/GEVENT20#
22K/F_4 APU_THERMTRIP# R10 K12 USBP10+ [34]
[5] APU_THERMTRIP# THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD10P
+3V R302 10K/F_4 WD_PWRGD AF19 K13 USBP10- [34] USB2.0 co-lay USB3.0 port
+3V_S5 WD_PWRGD USB_HSD10N
RSMRST# U2 B11
R427 2.2K_4 SCLK1 R688 *10K_4 RSMRST# USB_HSD9P
USB_HSD9N D11
AG24 CLK_REQ4#/SATA_IS0#/GPIO64
R426 2.2K_4 SDATA1 C582 AE24 E10 USBP8+ [26]
[28] PCIE_REQ_LAN# CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD8P
2.2u/10V_4 [9] BOARD_ID8 AE26 F10 USBP8- [26] Touch Panel
SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD8N
[9,26] BOARD_ID9 AF22 CLK_REQ0#/SATA_IS3#/GPIO60
AH17 SATA_IS4#/FANOUT3/GPIO55 USB_HSD7P C10 USBP7+ [30]
R689 *10K_4 SYS_RST# AG18 A10 WLAN
[32] SPKR AF24
SATA_IS5#/FANIN3/GPIO59
SPKR/GPIO66
USB_HSD7N USBP7- [30] HUB2
1 2 PCLK_SMB AD26 H9 USBP6+ [26]
[37] PCH_RSMRST# [12,13,25] PCLK_SMB SCL0/GPIO43 USB_HSD6P
D23 RB500V-40_100MA PDAT_SMB AD25 G9 USBP6- [26] CCD on eDP
[12,13,25] PDAT_SMB
USB
SCLK1 SDA0/GPIO47 USB_HSD6N
2.0
[30,35] SCLK1 T7 SCL1/GPIO227
SDATA1 R7 A8
C +3V_S5 [30,35] SDATA1 SDA1/GPIO228 USB_HSD5P C
AG25 CLK_REQ2#/FANIN4/GPIO62 USB_HSD5N C8
AG22
GPIO
[30] PCIE_REQ_WLAN# CLK_REQ1#/FANOUT4/GPIO61
R425 *10K_4 APU_THERMTRIP# J2 F8
R381 10K_4 OC_1# IR_LED#/LLB#/GPIO184 USB_HSD4P
TP41 AG26 SMARTVOLT2/SHUTDOWN#/GPIO51 USB_HSD4N E8
R423 10K_4 OC_0# VGA_PD V8
TP51 DDR3_RST#/GEVENT7#/VGA_PD
W8 GBE_LED0/GPIO183 USB_HSD3P C6 USBP3+ [33]
[9] SPI_HOLD# Y6 SPI_HOLD#/GBE_LED1/GEVENT9# USB_HSD3N A6 USBP3- [33] USB2.0 D/B
V10 GBE_LED2/GEVENT10#
AA8 C5
[16] PCIE_REQ_GPU#
R291 *EV@0_4 GPIO65 AF25
GBE_STAT0/GEVENT11#
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#
USB_HSD2P
USB_HSD2N A5 HUB1
USB_HSD1P C1
FCH_BLINK M7 C3
TP53 BLINK/USB_OC7#/GEVENT18# USB_HSD1N
SMBALERT#_R R8
+3V_S5 GEVENT17# USB_OC6#/IR_TX1/GEVENT6#
TP68 T1 USB_OC5#/IR_TX0/GEVENT17# USB_HSD0P E1 USBP0+ [33]
P6 USB_OC4#/IR_RX0/GEVENT16# USB_HSD0N E3 USBP0- [33] USB2.0
FCH_JTAG_TDO F5
TP55 USB_OC3#/AC_PRES/TDO/GEVENT15#
R703 *10K_4 FCH_PCIE_RST# FCH_JTAG_TCK P5 C16 USBSS_CALRP R644 1K/F_4
TP54 USB_OC2#/TCK/GEVENT14#
USB
R715 10K_4 PCIE_WAKE# R375 *short_4 FCH_JTAG_TDI USBSS_CALRP USBSS_CALRN R640 1K/F_4
OC
[33] OC_1# J7 USB_OC1#/TDI/GEVENT13# USBSS_CALRN A16 +FCH_VDD_11_SSUSB_S
R716 10K_4 PWR_BTN# [34] OC_0# R424 *short_4 FCH_JTAG_RST# T8
R285 *10K_4 PCIE_REQ_LAN# USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
USB_SS_TX3P A14
GEVENT12# ~18# USB_SS_TX3N C14
are +3V_S5
ACZ_BCLK_R AB3 C12
Note:LLB#, WAKE# and PWR_BTN need pull up to +3VPCU only if S5+ mode is supported ACZ_SDOUT_R AZ_BITCLK USB_SS_RX3P
AB1 AZ_SDOUT USB_SS_RX3N A12
HDaudio 5 6 ACZ_SDIN0 AA2
ACZ_SDIN1 AZ_SDIN0/GPIO167
interface 4 7 Y5 AZ_SDIN1/GPIO168 USB_SS_TX2P D15
3 8 ACZ_SDIN2 Y3 B15
are ACZ_SDIN3 AZ_SDIN2/GPIO169 USB_SS_TX2N
2 9 Y1 AZ_SDIN3/GPIO170
+3V_S5 1 10 ACZ_SYNC_R AD6 E14
ACZ_RST#_R AZ_SYNC USB_SS_RX2P
AE4 F14
To Azalia R711 *10KX8
+3V_S5
AZ_RST# USB_SS_RX2N
USB
B F15 B
USB3_TXP1 [33]
AUDIO
3.0
USB_SS_TX1P
TP45 K19 PS2_DAT/SDA4/GPIO187 USB_SS_TX1N G15 USB3_TXN1 [33]
HD
ACZ_SDOUT_R R704 33_4 ACZ_SDOUT J19 MINI DP
ACZ_SDOUT_AUDIO [32] TP46 PS2_CLK/CEC/SCL4/GPIO188
J21 SPI_CS2#/GBE_STAT2/GPIO166 USB_SS_RX1P H13 USB3_RXP1 [33]
ACZ_SYNC_R R702 33_4 ACZ_SYNC G13 USB3_RXN1 [33]
ACZ_SYNC_AUDIO [32] USB_SS_RX1N
R628 R630
ACZ_BCLK_R R687 33_4 ACZ_BITCLK *EV@10K_4 *EV@10K_4 D21 J16 USB3_TXP0 [34]
ACZ_BITCLK_AUDIO [32] PS2KB_DAT/GPIO189 USB_SS_TX0P
C20 PS2KB_CLK/GPIO190 USB_SS_TX0N H16 USB3_TXN0 [34]
[15] DGPU_RST_L D23 PS2M_DAT/GPIO191 USB3.0
C836 *33P/50V_4 C22 J15 USB3_RXP0 [34]
PS2M_CLK/GPIO192 USB_SS_RX0P
[37] SUSB# 1 2 USB_SS_RX0N K15 USB3_RXN0 [34]
D6 *RB500V-40_100MA
ACZ_RST#_R R685 33_4 ACZ_RST# F21
ACZ_RESET#_AUDIO [32] +3V KSO_0/GPIO209
E20 H19 SMB_EC_CLK
ACZ_SDIN0 KSO_1/GPIO210 SCL2/GPIO193 SMB_EC_DAT
ACZ_SDIN0 [32] F20 KSO_2/GPIO211 SDA2/GPIO194 G19 GPIO193 ~196 are +3V_S5
A22 KSO_3/GPIO212 SCL3_LV/GPIO195 G22
2
E18 KSO_4/GPIO213 SDA3_LV/GPIO196 G21

Q53 A20 E22
KSO_5/GPIO214 EC_PWM0/EC_TIMER0/GPIO197
[44,45,46] DGPU_PWREN 1 3 J18 KSO_6/GPIO215 EC_PWM1/EC_TIMER1/GPIO198 H22
H18 KSO_7/GPIO216 EC_PWM2/EC_TIMER2/WOL_EN/GPIO199 J22 EC_PWM2 [11]
EV@2N7002K G18 H21
KSO_8/GPIO217 EC_PWM3/EC_TIMER3/GPIO200
B21 KSO_9/GPIO218
K18 KSO_10/GPIO219 KSI_0/GPIO201 K21
D19 EMBEDDED K22
KSO_11/GPIO220 CTRL KSI_1/GPIO202
A18 KSO_12/GPIO221 KSI_2/GPIO203 F22
C18 KSO_13/GPIO222 KSI_3/GPIO204 F24
+3V_S5 B19 E24
KSO_14/XDB0/GPIO223 KSI_4/GPIO205
B17 KSO_15/XDB1/GPIO224 KSI_5/GPIO206 B23
A24 KSO_16/XDB2/GPIO225 KSI_6/GPIO207 C24
D17 KSO_17/XDB3/GPIO226 KSI_7/GPIO208 F18
R636 R633
A *10K_4 *10K_4 A
Q50
5 BOLTON-M3
+3V
SMB_EC_CLK 4 3 MBCLK
MBCLK [37,38]
R421 2
*10K_4 Quanta Computer Inc.
2
SMB_EC_DAT 1 6 MBDATA
MBDATA [37,38]
Q32
1 3 SMBALERT#_R PROJECT : ZRI/ZQI
[35] SMBALERT#
*2N7002DW Size Document Number Rev
*2N7002K A1A
FCH 1/5(GPIO/USB/AZ)
5 4 3 2 1
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5 4 3 2 1
U53E
C835 150p/50V_4
[15] PCIE_RST# R684 33_4 PCIE_RST#_R AE2 PCIE_RST#

HUDSON-M3 PCICLK0 AF3
A_RST#_R AD5 Part 1 of 5 AF1 PCI_CLK1 [11]
A_RST# PCICLK1/GPO36
D PCICLK2/GPO37 AF5 D
[3] UMI_RXP0 C762 0.1u/10V_4 UMI_RXP0_C AE30 AG2 PCI_CLK3 [11]
C761 0.1u/10V_4 UMI_RXN0_C UMI_TX0P PCICLK3/GPO38
[3] UMI_RXN0 AE32 UMI_TX0N PCICLK4/14M_OSC/GPO39 AF6 PCI_CLK4 [11]
[3] UMI_RXP1 C764 0.1u/10V_4 UMI_RXP1_C AD33
CLKS
C763 0.1u/10V_4 UMI_RXN1_C UMI_TX1P
[3] UMI_RXN1 AD31 AB5
PCI
UMI_TX1N PCIRST# TP69
[3] UMI_RXP2 C766 0.1u/10V_4 UMI_RXP2_C AD28
C765 0.1u/10V_4 UMI_RXN2_C UMI_TX2P
[3] UMI_RXN2 AD29 UMI_TX2N
[3] UMI_RXP3 C768 0.1u/10V_4 UMI_RXP3_C AC30 AJ3
UMI_TX3P AD0/GPIO0 SYS_COM_REQ [25]
C767 0.1u/10V_4 UMI_RXN3_C AC32 AL5
[3] UMI_RXN3 UMI_TX3N AD1/GPIO1
AD2/GPIO2 AG4 RTC Circuitry(RTC)
[3] UMI_TXP0 AB33 UMI_RX0P AD3/GPIO3 AL6
[3] UMI_TXN0 AB31 UMI_RX0N AD4/GPIO4 AH3
[3] UMI_TXP1 AB28 AJ5 R400 *SHORT_6
UMI_RX1P AD5/GPIO5 +3VPCU
[3] UMI_TXN1 AB29 UMI_RX1N AD6/GPIO6 AL1
[3] UMI_TXP2 Y33 AN5 D17
UMI_RX2P AD7/GPIO7
[3] UMI_TXN2 Y31 UMI_RX2N AD8/GPIO8 AN6
[3] UMI_TXP3 Y28 UMI_RX3P AD9/GPIO9 AJ1
Y29 AL8 +3V_RTC +VCCRTC_2
[3] UMI_TXN3 UMI_RX3N AD10/GPIO10
PCI EXPRESS
INTERFACES
AD11/GPIO11 AL3
R271 590/F_4 PCIE_CALRP AF29 AM7 BAT54C-7-F_200MA
R272 2K/F_4 PCIE_CALRN PCIE_CALRP AD12/GPIO12
+1.1V_PCIE_VDDR AF31 PCIE_CALRN AD13/GPIO13 AJ6
AK7 20MIL R378 510/F_4 +3VRTC
C769 0.1u/10V_4 PCIE_FCH_TXP0_C AD14/GPIO14
[28] PCIE_FCH_TXP0_LAN V33 GPP_TX0P AD15/GPIO15 AN8
TO LAN C770 0.1u/10V_4 PCIE_FCH_TXN0_C C555
[28] PCIE_FCH_TXN0_LAN
C420 0.1u/10V_4 PCIE_FCH_TXP1_C
V31 GPP_TX0N AD16/GPIO16 AG9
20MIL
TO WLAN
[30]
[30]
PCIE_FCH_TXP1_WLAN
PCIE_FCH_TXN1_WLAN C400 0.1u/10V_4 PCIE_FCH_TXN1_C
W30
W32
GPP_TX1P AD17/GPIO17 AM11
AJ10 1u/10V_4 20MIL
GPP_TX1N AD18/GPIO18
AB26 GPP_TX2P AD19/GPIO19 AL12
AB27 GPP_TX2N AD20/GPIO20 AK11
AA24 AN12 R394
GPP_TX3P AD21/GPIO21
AA23 GPP_TX3N AD22/GPIO22 AG12
AE12 PCI_AD23 [11] 1K/F_4
AD23/GPIO23
[28] PCIE_FCH_RXP0_LAN AA27 GPP_RX0P AD24/GPIO24 AC12 PCI_AD24 [11]
TO LAN AA26 AE13 PCI_AD25 [11] +5V_S5
[28] PCIE_FCH_RXN0_LAN GPP_RX0N AD25/GPIO25
[30] PCIE_FCH_RXP1_WLAN W27 GPP_RX1P AD26/GPIO26 AF13 PCI_AD26 [11]
TO WLAN V27 AH13 PCI_AD27 [11] 4.7K/J_4 R671 VCCRTC_3 4.7K/J_4 R670 VCCRTC_2 3 1
[30] PCIE_FCH_RXN1_WLAN GPP_RX1N AD27/GPIO27
INTERFACE
V26 GPP_RX2P AD28/GPIO28 AH14 PE_PWRGD [44]
W26 AD15 HUDSON_MEMHOT# R332 *2.2K_4 +3V Q51
GPP_RX2N AD29/GPIO29 MMBT3904-7-F_200MA
C W24 AC15
20MIL C
2
GPP_RX3P AD30/GPIO30 R677
W23 AE16
PCI
GPP_RX3N AD31/GPIO31 68.1K/F_4
CBE0# AN3
+VBAT
CBE1# AJ8
CBE2# AN10
+1.1V_CKVDD R294 2K/F_4 CLK_CALRN F27 CLK_CALRN CBE3# AD12 Net GPIO I/O Power Well DOS
FRAME# AG10
DEVSEL# AK9
G30 PCIE_RCLKP IRDY# AL10 PE_PWRGD GPIO51 DGPU_PWRGD I +3.3V "0->1" R678
G28 AF10 150K/F_4
PCIE_RCLKN TRDY#
1
PAR AE10
[5] CLK_DP_NSSCP 4 3 INT_CLK_DP_NSSCP R26 DISP_CLKP STOP# AH1 PE_GPIO0 GPIO191 DGPU_RST# O +3.3V "0->1" CN21
CLK_DP_NSSCP/N is 100MHZ non-SSC [5] CLK_DP_NSSCN 2 1 INT_CLK_DP_NSSCN T26 AM9 RTC_ML2032
RP3 *shortX2 DISP_CLKN PERR#
SERR# AH8
H33 DISP2_CLKP REQ0# AG15 PE_GPIO1 GPIO192 DGPU_PWREN O +3.3V "0->1"
H31 DISP2_CLKN REQ1#/GPIO40 AG13
AF15
2
INT_CLK_APU_HCLKP REQ2#/CLK_REQ8#/GPIO41
[5] CLK_APU_HCLKP 2 1 T24 APU_CLKP REQ3#/CLK_REQ5#/GPIO42 AM17 TP65
CLK_APU_HCLKP/N is 100MHZ SSC [5] CLK_APU_HCLKN 4 3 INT_CLK_APU_HCLKN T23 AD16
RP5 *shortX2 APU_CLKN GNT0#
GNT1#/GPO44 AD13
[15] CLK_PCIE_VGAP 4 3 INT_CLK_PCIE_VGAP J30 AD21
INT_CLK_PCIE_VGAN SLT_GFX_CLKP GNT2#/SD_LED/GPO45
CLK_PCIE_VGAP/N is 100MHZ SSC [15] CLK_PCIE_VGAN 2 1 K29 SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46 AK17 TP_INT_FCH [26]
RP2 *shortX2 AD19
CLKRUN# CLKRUN# [31,37]
H27 GPP_CLK0P LOCK# AH9
H28 GPP_CLK0N
INTE#/GPIO32 AF18
[30] CLK_PCIE_WLANP 4 3 INT_CLK_PCIE_WLANP J27 AE18
INT_CLK_PCIE_WLANN GPP_CLK1P INTF#/GPIO33
GPP_CLK1P/N is 100MHZ SSC capable [30] CLK_PCIE_WLANN 2 1 K26 GPP_CLK1N INTG#/GPIO34 AC16
RP4 *shortX2 AD18
INTH#/GPIO35
F33 GPP_CLK2P
F31 GPP_CLK2N CLK_PCI_EC [11,37]
R616 22_4
PCLK_DEBUG [30]
[28] CLK_PCIE_LANP 4 3 INT_CLK_PCIE_LANP E33 GPP_CLK3P
GPP_CLK3P/N is 100MHZ SSC capable [28] CLK_PCIE_LANN
RP1
2 1 INT_CLK_PCIE_LANN
*shortX2
E31 GPP_CLK3N LPCCLK0
LPCCLK1
B25
D25
LPC_CLK0_R
LPC_CLK1_R
R621
R618
22_4
22_4
LPC_CLK0 [11,37]
LPC_CLK1 [11,31]
For EMI
M23 GPP_CLK4P LAD0 D27 LPC_LAD0 [30,31,37]
M24 GPP_CLK4N LAD1 C28 LPC_LAD1 [30,31,37]
LPC
GENERATOR
B A26 LPC_LAD2 [30,31,37] LPC_CLK1 C786 *15p/50V_4 B
LAD2
M27 GPP_CLK5P LAD3 A29 LPC_LAD3 [30,31,37]
M26 A31 CLK_PCI_EC C788 *15p/50V_4
CLOCK
GPP_CLK5N LFRAME# LPC_LFRAME# [30,31,37]

B27 LDRQ#0
LDRQ0# TP61
N25 AE27 LDRQ#1
GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49 TP43
N26 GPP_CLK6N SERIRQ/GPIO48 AE19 IRQ_SERIRQ [31,37]
R23 32K_X1 C831 18p/50V_4
GPP_CLK7P
R24 GPP_CLK7N
1
DMA_ACTIVE# G25 DMAACTIVE_L [5]
N27 GPP_CLK8P PROCHOT# E28 H_PROCHOT# [5,37]
R27 E26
APU
GPP_CLK8N APU_PG APU_PWRGD_R [3,5]

G26 R679 Y4
LDT_STP# APU_RST# 20M_4 32.768KHZ
APU_RST# F26 APU_RST# [3,5]
TP44 J26 14M_25M_48M_OSC C428 *0.1u/10V_4
2
G2 32K_X1 32K_X2 C832 18p/50V_4
C776 10p/50V_4 32K_X1
25M_X1 C31 G4 32K_X2 USE GROUND GUARD FOR 32K_X1 AND 32K_X2
25M_X1 32K_X2
4
3
H7 S5_CORE_EN S5_CORE_EN is necessary to connect enable pin of

S5_CORE_EN TP71 +3VPCU/+5VPCU regulator for S5+ mode implementation
R612 F1 RTC_CLK [11]
Y3 25M_X2 RTCCLK INTRUDER_ALERT# R386 *1M/F_4
C33 25M_X2 INTRUDER_ALERT# F3 +3V_RTC
25MHz_XTAL 1M/F_4 E6 INTRUDER_ALERT# Left not connected
PLUS
VDDBT_RTC_G
(FCH has 50-kohm internal pull-up to
2
1
S5
C775 10p/50V_4 20MIL C556

VBAT).
BOLTON-M3 R366 0.1u/10V_4

33_4
1
G2
+3V_S5
2 *SHORT_PAD
C839 *0.1u/10V_4
A U55 A
5
*TC7SH08FU
2 A_RST#_R
[7,30,31,37] PLTRST# R701 33_4 A_RST# 4
1
C838
3
150p/50V_4
R683 *short_4 Quanta Computer Inc.

PROJECT :ZRI/ZQI
A1A
FCH 2/5(ACPI/PCI/CLK)
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
U53B
[31] SATA_TXP0_C AK19 SATA_TX0P

HUDSON-M3 Part 2 of 5
SD_CLK/SCLK_2/GPIO73 AL14
[31] SATA_TXN0_C AM19 SATA_TX0N SD_CMD/SLOAD_2/GPIO74 AN14
SATA0 HDD AL20
SD_CD#/GPIO75 AJ12
AH12
[31] SATA_RXN0_R SATA_RX0N SD_WP/GPIO76
[31] SATA_RXP0_R AN20 SATA_RX0P SD_DATA0/SDATI_2/GPIO77 AK13
D SD_DATA1/SDATO_2/GPIO78 AM13 D
[31] SATA_TXP1 AN22 SATA_TX1P SD_DATA2/GPIO79 AH15
AL22 AJ14
CARD
[31] SATA_TXN1 SATA_TX1N SD_DATA3/GPIO80
SATA1 SSD
SD
[31] SATA_RXN1 AH20 SATA_RX1N GBE_COL AC4
[31] SATA_RXP1 AJ20 SATA_RX1P GBE_CRS AD3
GBE_MDCK AD9
AJ22 SATA_TX2P GBE_MDIO W10
AH22 SATA_TX2N GBE_RXCLK AB8
GBE_RXD3 AH7
AM23 SATA_RX2N GBE_RXD2 AF7
AK23 SATA_RX2P GBE_RXD1 AE7
GBE_RXD0 AD7
AH24 SATA_TX3P GBE_RXCTL/RXDV AG8
AJ24 AD1
GBE
SATA_TX3N GBE_RXERR
LAN
GBE_TXCLK AB7
AN24 SATA_RX3N GBE_TXD3 AF9
AL24 SATA_RX3P GBE_TXD2 AG6
GBE_TXD1 AE8
AL26 AD8 +3V_S5 +3V_S5
SATA_TX4P GBE_TXD0
AN26 SATA_TX4N GBE_TXCTL/TXEN AB9
GBE_PHY_PD AC2
AJ26 SATA_RX4N GBE_PHY_RST# AA7
AH26 W9 GBE_PHY_INTR R361 10K_4 +3V_S5 R391
SATA_RX4P GBE_PHY_INTR
SERIAL
10K_4
AN29
ATA
SATA_TX5P FCH_SPI_SI U31 R397
AL28 SATA_TX5N SPI_DI/GPIO164 V6
V5 FCH_SPI_SO FCH_SPI_CS0# R377 *short_4 1 8 10K_4
SPI_DO/GPIO163 FCH_SPI_CLK FCH_SPI_CLK R403 *short_4 CE# VDD
AK27 SATA_RX5N SPI_CLK/GPIO162 V3 6 SCK
AM27 T6 FCH_SPI_CS0# FCH_SPI_SO R417 *short_4 5
SATA_RX5P SPI_CS1#/GPIO165 FCH_SPI_WP FCH_SPI_SI R405 *short_4 R401 33_4 FCH_SPI1_SI_R 2 SI
V1 7
ROM
ROM_RST#/SPI_WP#/GPIO161 SO HOLD# SPI_HOLD# [7]
SPI
AL29 NC6
AN31 +3V_S5 3 4
NC7 [37] SPI_CS C574 WP# VSS
VGA_RED L30 [37] SPI_SCK
AL31 *22p/50V_4 W25Q32BVSSIG(SOIC)
NC8 [37] SPI_SDO
PLACE SATA_CAL RES VERY AL33 L32 [37] SPI_SDI C559
NC9 VGA_GREEN R409 0.1u/10V_4
C
CLOSE TO BALL OF AH33 M29 10K_4 C
NC10 VGA_BLUE
HUDSON-M2/M3 AH31 NC11
AJ33 M28 FCH_SPI_WP
NC12 VGA_HSYNC/GPO68
AJ31 NC13 VGA_VSYNC/GPO69 N30
VGA
DAC
VGA_DDC_SDA/GPO70 M33
VGA_DDC_SCL/GPO71 N32
R278 1K/F_4 SATA_CALRP AF28
R284 931/F_4 SATA_CALRN SATA_CALRP
+1.1V_AVDD_SATA AF27 SATA_CALRN VGA_DAC_RSET K31
AUX_VGA_CH_P V28
+3V R303 *10K_4 SATA_LED# AD22 V29
SATA_ACT#/GPIO67 AUX_VGA_CH_N
AUXCAL U28
AF21 SATA_X1
ML_VGA_L0P T31
Integrated Clock Mode: SATA_X1, SATA_X2 leave unconnected. ML_VGA_L0N T33
ML_VGA_L1P T29
ML_VGA_L1N T28
ML_VGA_L2P R32
+3V AG21 R30
SATA_X2 ML_VGA_L2N
ML_VGA_L3P P29
P28
MAINLINK
ML_VGA_L3N
R646 Remove Zero Power ODD funciton C29
ML_VGA_HPD/GPIO229 TP60
*10K_4
BOARD_ID1 VGA VIN0
AH16 N2 R706 10K_4
FANOUT0/GPIO52 VIN0/GPIO175 VIN1 R713 10K_4
AM15 FANOUT1/GPIO53 VIN1/GPIO176 M3
FCH_PROCHOT#_C AJ16 L2 VIN2 R714 10K_4
FANOUT2/GPIO54 HW VIN2/SDATI_1/GPIO177 VIN3 R712 10K_4
VIN3/SDATO_1/GPIO178 N4
BOARD_ID2 AK15 MONITOR P1 VIN4 R705 10K_4
[35] BOARD_ID2 FANIN0/GPIO56 VIN4/SLOAD_1/GPIO179
BOARD_ID3 AN16 P3 VIN5 R690 10K_4
BOARD_ID4 FANIN1/GPIO57 VIN5/SCLK_1/GPIO180 VIN6 R707 10K_4
AL16 FANIN2/GPIO58 VIN6/GBE_STAT3/GPIO181 M1
Initial BIOS set internal pull down M5 VIN7 R691 10K_4
BOARD_ID5 VIN7/GBE_LED3/GPIO182
K6 TEMPIN0/GPIO171
BOARD_ID6 K5 AG16
R651 CH@1K_4 BOARD_ID1 R649 *NCH@10K_4 BOARD_ID7 TEMPIN1/GPIO172 NC1
B +3V K3 TEMPIN2/GPIO173 NC2 AH10 B
R661 1K_4 BOARD_ID2 R654 *10K_4 TEMPIN3 M6 A28
R641 EV@1K_4 BOARD_ID3 R638 UMA@10K_4 TEMPIN3/TALERT#/GPIO174 NC3
NC4 G27
R635 AC@1K_4 BOARD_ID4 R632 NAC@10K_4 L4
R282 ELP16@1K_4 BOARD_ID8 R283 ELP13@10K_4 NC5
R299 1K_4 BOARD_ID9 R298 *10K_4 R692
10K_4
[7] BOARD_ID8 BOLTON-M3
[7,26] BOARD_ID9
+3V_S5 R708 EV@1K_4 BOARD_ID5 R693 *EV@10K_4

R710 *1K_4 BOARD_ID6 R695 10K_4
R709 ELP@10K_4 BOARD_ID7 R694 HYN16@10K_4
BOARD ID SETTING
Board ID ID1 ID2 ID3 ID4 ID5 ID9
USB Charge
No USB Charge
H
L
OnBorad RAM SETTING
Reserved H ID6 ID7 ID8
VGA SKU H
UMA SKU L 0 0 1 HYNIX DDR3L 1600 4GB H5TC4G63AFR-PBA
AC H
No AC L 0 1 0 ELPIDA DDR3L 1333 4GB EDJ4216EBBG-DJ-F
A A
VRAM 2G H
VRAM 4G L 0 1 1 ELPIDA DDR3L 1600 4GB EDJ4216EFBG-GNL-F
Non Touch Panel H
Touch Panel L <= PD by cable 1 0 0 Disable OnBorad RAM

PROJECT :ZRI/ZQI
A1A
FCH 3/5(SATA/VGA/GND/SPI)
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
PLACE ALL THE DECOUPLING CAPS ON

U53D
THIS SHEET CLOSE TO SB AS POSSIBLE.
+3.3V_FCH_R
A3
HUDSON-M3 T25
U53C +1.1V_VCC_FCH_R VSS_1 Part 5 of 5 VSS_65
VDDQ--3.3V I/O power 102mA VDD-- S/B CORE power A33 VSS_2 VSS_66 T27
R353 *short_8 1007mA TRACE WIDTH >=100mil
+3V
AB17 HUDSON-M3
VDDIO_33_PCIGP_1
Part 3 of 5
VDDCR_11_1 T14 R336 *short_8 +1.1V
B7
B13
VSS_3
VSS_4
VSS_67
VSS_68
U6
U14
AB18 VDDIO_33_PCIGP_2 VDDCR_11_2 T17 D9 VSS_5 VSS_69 U17
D C521 C488 C490 C482 AE9 T20 D13 U20 D
22u/6.3V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 VDDIO_33_PCIGP_3 VDDCR_11_3 C480 C465 C481 C487 C495 VSS_6 VSS_70
AD10 VDDIO_33_PCIGP_4 VDDCR_11_4 U16 E5 VSS_7 VSS_71 U21
PCI/GPIO I/O
AG7 U18 0.1u/10V_4 0.1u/10V_4 1u/10V_4 1u/10V_4 10u/6.3V_8 E12 U30
VDDIO_33_PCIGP_5 VDDCR_11_5 VSS_8 VSS_72
CORE
AC13 VDDIO_33_PCIGP_6 VDDCR_11_6 V14 E16 VSS_9 VSS_73 U32
L28 TRACE WIDTH >=15mil AB12 V17 E29 V11
S0
+3V VDDIO_33_PCIGP_7 VDDCR_11_7 VSS_10 VSS_74
HCB1608KF-221T20_2A AB13 V20 F7 V16
VDDIO_33_PCIGP_8 VDDCR_11_8 VSS_11 VSS_75
AB14 VDDIO_33_PCIGP_9 VDDCR_11_9 Y17 F9 VSS_12 VSS_76 V18
C406 C426 AB16 +1.1V_CKVDD F11 W4
2.2u/6.3V_4 VDDIO_33_PCIGP_10 VSS_13 VSS_77
*0.1u/10V_4 340mA CKVDD_1.1V-- Internal clock Generator I/O power F13 W6
47mA H24 H26 TRACE WIDTH >=30mil F16
VSS_14 VSS_78
W25
+VDDPL_3.3V VDDPL_33_SYS VDDAN_11_CLK_1 VSS_15 VSS_79
20mA V22 VDDPL_33_DAC VDDAN_11_CLK_2 J25 L35 +1.1V F17 VSS_16 VSS_80 W28
12mA U22 VDDPL_33_ML VDDAN_11_CLK_3 K24 HCB1608KF-181T15_1.5A F19 VSS_17 VSS_81 Y14
L29 TRACE WIDTH >=15mil 200mA T22 VDDAN_33_DAC VDDAN_11_CLK_4 L22 F23 VSS_18 VSS_82 Y16
HCB1608KF-221T20_2A +FCH_VDDPL_33_SSUSB_S 11mA L18 VDDPL_33_SSUSB_S VDDAN_11_CLK_5 M22 C439 C438 C453 C454 C441
Check +1.1V_CKVDD leakage issues F25 VSS_19 VSS_83 Y18
CLKGEN
+FCH_VDDPL_33_SUSB_S 14mA D7 VDDPL_33_USB_S VDDAN_11_CLK_6 N21 0.1u/10V_4 0.1u/10V_4 1u/10V_4 1u/10V_4 22u/6.3V_8 F29 VSS_20 VSS_84 AA6
C427 C407 +FCH_VDDPL_33_PCIE 11mA AH29 N22 G6 AA12
+FCH_VDDPL_33_SATA VDDPL_33_PCIE VDDAN_11_CLK_7 VSS_21 VSS_85
2.2u/6.3V_4 *0.1u/10V_4 12mA AG28 P22 G16 AA13
I/O
VDDPL_33_SATA VDDAN_11_CLK_8 +1.1V_PCIE_VDDR VSS_22 VSS_86
G32 VSS_23 VSS_87 AA14
+1.5V R605 *0_4 1088mA TRACE WIDTH >=100mil PCIE_VDDR--PCIE I/O power H12 AA16
C771 *2.2u/6.3V_6 LDO_CAP L34 VSS_24 VSS_88
M31 LDO_CAP VDDAN_11_PCIE_1 AB24 +1.1V H15 VSS_25 VSS_89 AA17
Y21 HCB1608KF-181T15_1.5A H29 AA25
VDDAN_11_PCIE_2 VSS_26 VSS_90
7mA V21 VDDPL_11_DAC VDDAN_11_PCIE_3 AE25 J6 VSS_27 VSS_91 AA28
GROUND
AD24 C444 C451 C434 C440 C433 J9 AA30
226mA VDDAN_11_PCIE_4 1u/10V_4 *1u/10V_4 22u/6.3V_8 VSS_28 VSS_92
EXPRESS
Y22 VDDAN_11_ML_1 VDDAN_11_PCIE_5 AB23 *0.1u/10V_4 0.1u/10V_4 J10 VSS_29 VSS_93 AA32
V23 VDDAN_11_ML_2 VDDAN_11_PCIE_6 AA22 J13 VSS_30 VSS_94 AB25
V24 VDDAN_11_ML_3 VDDAN_11_PCIE_7 AF26 J28 VSS_31 VSS_95 AC6
PCI
MAIN
LINK
V25 VDDAN_11_ML_4 VDDAN_11_PCIE_8 AG27 J32 VSS_32 VSS_96 AC18
+1.1V_AVDD_SATA K7 AC28
TRACE WIDTH >=50mil VSS_33 VSS_97
1337mA AVDD_SATA--SATA phy power K16 VSS_34 VSS_98 AD27
AB10 AA21 L37 +1.1V K27 AE6
VDDIO_33_GBE_S VDDAN_11_SATA_1 HCB1608KF-181T15_1.5A VSS_35 VSS_99
VDDAN_11_SATA_4 Y20 K28 VSS_36 VSS_100 AE15
GBE
AB21 L6 AE21
LAN
C VDDAN_11_SATA_2 C469 C467 C468 C456 C457 VSS_37 VSS_101 C
VDDAN_11_SATA_3 AB22 L12 VSS_38 VSS_102 AE28
+3V_S5 +FCH_VDDPL_33_SSUSB_S +FCH_VDDPL_33_SUSB_S AB11 AC22 *0.1u/10V_4 0.1u/10V_4 1u/10V_4 1u/10V_4 22u/6.3V_8 L13 AF8
VDDCR_11_GBE_S_1 VDDAN_11_SATA_5 VSS_39 VSS_103
AA11 AC21 L15 AF12
SERIAL
L38 L43 VDDCR_11_GBE_S_2 VDDAN_11_SATA_6 VSS_40 VSS_104
VDDAN_11_SATA_7 AA20 L16 VSS_41 VSS_105 AF16
ATA
HCB1608KF-221T20_2A HCB1608KF-221T20_2A AA18 L21 AF33
VDDAN_11_SATA_8 VSS_42 VSS_106
AA9 VDDIO_GBE_S_1 VDDAN_11_SATA_9 AB20 M13 VSS_43 VSS_107 AG30
C460 C459 C535 C545 AA10 AC19 M16 AG32
2.2u/6.3V_6 2.2u/6.3V_6 1u/10V_4 VDDIO_GBE_S_2 VDDAN_11_SATA_10 VSS_44 VSS_108
0.1u/10V_4 M21 VSS_45 VSS_109 AH5
M25 VSS_46 VSS_110 AH11
N6 AH18
S5 plus mode N11
VSS_47
VSS_48
VSS_111
VSS_112 AH19
+VDDIO_33_S N13 AH21
TRACE WIDTH >=20mil VSS_49 VSS_113
59mA S5_3.3--3.3v standby power N23 VSS_50 VSS_114 AH23
G7 N18 R355 +3V_S5 N24 AH25
+3V_AVDD_USB VDDAN_33_USB_S_1 VDDIO_33_S_1 *SHORT_6 VSS_51 VSS_115
H8 VDDAN_33_USB_S_2 VDDIO_33_S_2 L19 P12 VSS_52 VSS_116 AH27
TRACE WIDTH >=50mil 470mA J8 M18 P18 AJ18
L44 VDDAN_33_USB_S_3 VDDIO_33_S_3 C503 C504 C519 VSS_53 VSS_117
+3V_S5 K8 VDDAN_33_USB_S_4 VDDIO_33_S_4 V12 P20 VSS_54 VSS_118 AJ28
3.3V_S5 I/O
HCB1608KF-221T20_2A K9 V13 1u/10V_4 1u/10V_4 2.2u/6.3V_6 P21 AJ29
VDDAN_33_USB_S_5 VDDIO_33_S_5 VSS_55 VSS_119
M9 VDDAN_33_USB_S_6 VDDIO_33_S_6 Y12 P31 VSS_56 VSS_120 AK21
C514 C515 C518 C531 C508 M10 Y13 P33 AK25
10u/6.3V_8 10u/6.3V_8 1u/10V_4 1u/10V_4 VDDAN_33_USB_S_7 VDDIO_33_S_7 VSS_57 VSS_121
0.1u/10V_4 N9 VDDAN_33_USB_S_8 VDDIO_33_S_8 W11 R4 VSS_58 VSS_122 AL18
N10 +VDDXL_3.3V R11 AM21
USB
EMI VDDAN_33_USB_S_9 TRACE WIDTH >=15mil VSS_59 VSS_123
M12 VDDAN_33_USB_S_10 5mA L58
R25 VSS_60 VSS_124 AM25
N12 VDDAN_33_USB_S_11 VDDXL_33_S G24 +3V_S5 R28 VSS_61 VSS_125 AN1
+1.1V_DUAL L42 +FCH_VDDAN_11_USB_S M11 HCB1608KF-221T20_2A T11 AN18
HCB1608KF-221T20_2A C523 2.2u/6.3V_6 VDDAN_33_USB_S_12 +VDDCR_1.1V VSS_62 VSS_126
C522 0.1u/10V_4 TRACE WIDTH >=20mil U12
113mA TRACE WIDTH >=15mil C791 C792
T16 VSS_63 VSS_127 AN28
VDDAN_11_USB_S_1 VDDCR_11_S_1 N20 T18 VSS_64 VSS_128 AN33
C506 0.1u/10V_4 140mA U13 M20 R319 +1.1V_DUAL *0.1u/10V_4 2.2u/6.3V_6
VDDAN_11_USB_S_2 VDDCR_11_S_2 *SHORT_6
L41 +FCH_VDDCR_11_USB_S
70mA N8 VSSAN_HWM VSSPL_DAC T21
T12 VDDCR_11_USB_S_1 VDDPL_11_SYS_S J24 VSSAN_DAC L28
HCB1608KF-221T20_2A TRACE WIDTH >=15mil T13 C484 C483 K25 K33
VDDCR_11_USB_S_2 1u/10V_4 1u/10V_4 VSSXL VSSANQ_DAC
B C507 C513 C499
42mA 12mA VSSIO_DAC N28
B
VDDAN_33_HWM_S M8 H25 VSSPL_SYS
0.1u/10V_4 0.1u/10V_4 10u/6.3V_8 P16 S5_1.1V--1.1V standby power R6
+1.1V_DUAL +FCH_VDD_11_SSUSB_S VDDAN_11_SSUSB_S_1 EFUSE
M14 VDDAN_11_SSUSB_S_2 26mA
N14 VDDAN_11_SSUSB_S_3 VDDIO_AZ_S AA4
L40 R333 *short_8 +FCH_VDDAN_11_SSUSB_S

282mA P13 VDDAN_11_SSUSB_S_4 Trace width >=20 mil
P14 VDDAN_11_SSUSB_S_5
HCB1608KF-221T20_2A BOLTON-M3
N16
USB +VDDPL_1.1V +1.1V_DUAL
VDDCR_11_SSUSB_S_1 SS
R320 *short_8 +FCH_VDDCR_11_SSUSB_S
424mA N17 VDDCR_11_SSUSB_S_2 L39
P17 VDDCR_11_SSUSB_S_3
M17 HCB1608KF-221T20_2A
VDDCR_11_SSUSB_S_4
C471 C470 C476 C477 C461 C462
10u/6.3V_8 1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 2.2u/6.3V_6
C501 C491 C489
1u/10V_4 0.1u/10V_4 0.1u/10V_4 POWER
+VDDAN_3.3V_HWM +3V_S5
BOLTON-M3
L45
HCB1608KF-221T20_2A
C542 C543
+3V +VDDPL_3.3V 0.1u/10V_4 2.2u/6.3V_6
L36
HCB1608KF-221T20
Check to connect +3.3V A-test
C448 C445 +VDDIO_AZ
2.2u/6.3V_6 0.1u/10V_4
R369 *0_8 +3V_S5
A A
R368 *short_8 +3V
C546 C544
*0.1u/10V_4 2.2u/6.3V_6 R367 *0_8 +1.5V

PROJECT :ZRI/ZQI
A1A
FCH 4/5(POWER)
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
OVERLAP COMMON PADS WHERE

POSSIBLE FOR DUAL-OP RESISTORS.
+3V +3V +3V +3V_S5 +3V_S5 +3V_S5 +3V_S5
STRAPS PINS
D D
R700 R698 R699 R624 R619 R625 R672
10K_4 *10K_4 *10K_4 *10K_4 10K_4 *10K_4 10K_4 FCH PWRGD CKT
[8] PCI_CLK1 PCI_CLK1
+3V
PCI_CLK3 +3V
[8] PCI_CLK3
[8] PCI_CLK4 PCI_CLK4

R399
[8,37] LPC_CLK0 LPC_CLK0 10K_4
C576
[8,31] LPC_CLK1 LPC_CLK1 *0.1u/10V_4
[7] EC_PWM2 EC_PWM2
5
U32
[8] RTC_CLK RTC_CLK 1 2 2
[43] VRM_PWRGD
D20 RB500V-40_100MA 4 R422 *0_4
FCH_PWRGD [5,7]
1 *SN74LVC1G17DCKR
C564
*2.2u/6.3V_6
3
R682 R680 R681 R622 R620 R626 R669
*10K_4 10K_4 10K_4 10K_4 *10K_4 2.2K_4 *2.2K_4 EC_PWM2-->
SPI ROM: 2.2-KΩ 5% pull-down
LPC ROM: Pull-up to 3.3V_S5. 1 2
External pull-up resistor is not required as FCH has [37] PWROK_EC
D21 RB500V-40_100MA R411 0_4
integrated 10-KΩ pull-up to 3.3V_S5.
C C
Remove PCI_CLK2 function
-------- PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 EC_PWM2 RTC_CLK

REQUIRED
STRAPS PULL ALLOW USE non_Fusion EC CLKGEN LPC ROM S5 PLUS MODE
HIGH PCIE Gen2 DEBUG CLOCK MODE ENABLED ENABLED DISABLED
-------- --------
DEFAULT STRAP DEFAULT DEFAULT
PULL FORCE IGNORE FUSION EC CLKGEN SPI ROM S5 PLUS MODE

LOW -------- PCIE Gen1 DEBUG CLOCK MODE DISABLED DISABLED ENABLED
--------
STRAP DEFAULT DEFAULT DEFAULT
DEFAULT
B B
DEBUG STRAPS
FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]
PCI_AD27
[8] PCI_AD27
PCI_AD26
[8] PCI_AD26
PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
PCI_AD25
[8] PCI_AD25
PCI_AD24 PULL USE PCI DISABLE ILA USE FC USE DEFAULT DISABLE PCI
[8] PCI_AD24
PCI_AD23 HIGH PLL AUTORUN PLL PCIE STRAPS MEM BOOT
[8] PCI_AD23
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
R348 R349 R342 R341 R662

*2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 PULL BYPASS ENABLE ILA BYPASS FC USE EEPROM ENABLE PCI
LOW PCI PLL AUTORUN PLL PCIE STRAPS MEM BOOT
A A

PROJECT :ZRI/ZQI
A1A
FCH 5/5(STRAP & PWRGD)
5 4 3 2 1
www.vinafix.vn
1 2 3 4 5 6 7 8
DDR3 DIMM-A +1.5VSUS [3,4,5,6,13,14,40,46]
+0.75V_DDR_VTT [13,14,40,47]
+3V [3,5,7,8,9,10,11,13,25,26,27,30,31,32,33,35,36,37,39,40,41,42,43,44,45,46,47]
CN11A M_A_DQ[63:0] [4]

[4] M_A_A[15:0]
M_A_A0 98 5 M_A_DQ5
M_A_A1 A0 DQ0 M_A_DQ4 +1.5VSUS
97 A1 DQ1 7
M_A_A2 96 15 M_A_DQ3
M_A_A3 A2 DQ2 M_A_DQ2 CN11B
95 A3 DQ3 17
A M_A_A4 92 4 M_A_DQ1 75 44 A
M_A_A5 A4 DQ4 M_A_DQ0 VDD1 VSS16
91 A5 DQ5 6 76 VDD2 VSS17 48
M_A_A6 90 16 M_A_DQ7 81 49
86 A7 DQ7 18 82 VDD4 VSS19 54
M_A_A8 89 21 M_A_DQ13 87 55
85 A9 DQ9 23 88 VDD6 VSS21 60
M_A_A10 107 33 M_A_DQ14 93 61
M_A_A11 A10/AP DQ10 M_A_DQ15 VDD7 VSS22
84 A11 DQ11 35 94 VDD8 VSS23 65
M_A_A12 83 22 M_A_DQ12 99 66
M_A_A13 A12/BC# DQ12 M_A_DQ9 VDD9 VSS24
119 A13 DQ13 24 100 VDD10 VSS25 71
M_A_A14 80 34 M_A_DQ10 105 72
A14 DQ14 VDD11 VSS26
PC2100 DDR3 SDRAM SO-DIMM

M_A_A15 78 36 M_A_DQ11 106 127
A15 DQ15 VDD12 VSS27
PC2100 DDR3 SDRAM SO-DIMM

[4] M_A_BS#[2:0] 39 M_A_DQ20 111 128
M_A_BS#0 DQ16 M_A_DQ16 VDD13 VSS28
109 BA0 DQ17 41 112 VDD14 VSS29 133
M_A_BS#1 108 51 M_A_DQ22 117 134
M_A_BS#2 BA1 DQ18 M_A_DQ23 VDD15 VSS30
79 BA2 DQ19 53 118 VDD16 VSS31 138
[4] M_A_CS#0 M_A_CS#0 114 40 M_A_DQ21 123 139
M_A_CS#1 S0# DQ20 M_A_DQ17 +1.5VSUS VDD17 VSS32
[4] M_A_CS#1 121 S1# DQ21 42 124 VDD18 VSS33 144
[4] M_A_CLKP0 M_A_CLKP0 101 50 M_A_DQ18 145
M_A_CLKN0 CK0 DQ22 M_A_DQ19 R602 *short_8 +3V_JM9000 199 VSS34
[4] M_A_CLKN0 103 CK0# DQ23 52 +3V VDDSPD VSS35 150
[4] M_A_CLKP1 M_A_CLKP1 102 57 M_A_DQ28 151
M_A_CLKN1 CK1 DQ24 M_A_DQ26 R268 VSS36
[4] M_A_CLKN1 104 CK1# DQ25 59 77 NC1 VSS37 155
[4] M_A_CKE0 M_A_CKE0 73 67 M_A_DQ25 1K_4 122 156
M_A_CKE1 CKE0 DQ26 M_A_DQ31 NC2 VSS38
[4] M_A_CKE1 74 CKE1 DQ27 69 125 NCTEST VSS39 161
[4] M_A_CAS# M_A_CAS# 115 56 M_A_DQ29 162
M_A_RAS# CAS# DQ28 M_A_DQ24 VSS40
[4] M_A_RAS# 110 RAS# DQ29 58 [4] M_A_EVENT# 198 EVENT# VSS41 167
[4] M_A_WE# M_A_WE# 113 68 M_A_DQ30 [4] M_A_RST# 30 168
R238 10K_4 DIMM0_SA0 WE# DQ30 M_A_DQ27 RESET# VSS42
197 SA0 DQ31 70 VSS43 172
R241 10K_4 DIMM0_SA1 201 129 M_A_DQ37 173
PCLK_SMB SA1 DQ32 M_A_DQ32 +DDR_VREF2 VSS44
[7,13,25] PCLK_SMB 202 SCL DQ33 131 1 VREF_DQ VSS45 178
B PDAT_SMB 200 141 M_A_DQ39 +DDR_VREF 126 179 B
[7,13,25] PDAT_SMB SDA DQ34 VREF_CA VSS46
143 M_A_DQ38 184
M_A_ODT0 DQ35 M_A_DQ36 VSS47
[4] M_A_ODT0 116 ODT0 DQ36 130 VSS48 185
[4] M_A_ODT1 M_A_ODT1 120 132 M_A_DQ33 2 189
ODT1 DQ37 M_A_DQ34 VSS1 VSS49
[4] M_A_DM[7:0] DQ38 140 3 VSS2 VSS50 190
M_A_DM0 11 142 M_A_DQ35 8 195
(204P)
DM0 DQ39 C368 C364 C387 C386 VSS3 VSS51
M_A_DM1 28 147 M_A_DQ45 9 196
M_A_DM2 DM1 DQ40 M_A_DQ40 VSS4 VSS52
46 149 13
(204P)
DM2 DQ41 0.1u/10V_4 1000p/50V_4 0.1u/10V_4 1000p/50V_4 VSS5
M_A_DM3 63 157 M_A_DQ47 14
M_A_DM4 DM3 DQ42 M_A_DQ46 VSS6
136 DM4 DQ43 159 19 VSS7
M_A_DM5 153 146 M_A_DQ41 20 600mA
M_A_DM6 DM5 DQ44 M_A_DQ44 VSS8
170 DM6 DQ45 148 25 VSS9
M_A_DM7 187 158 M_A_DQ43 26 203 +0.75V_DDR_VTT_A R269 *short_8 +0.75V_DDR_VTT
DM7 DQ46 M_A_DQ42 VSS10 VTT1
[4] M_A_DQSP[7:0] DQ47 160 31 VSS11 VTT2 204
M_A_DQSP0 12 163 M_A_DQ52 32 C388 C371 C367
M_A_DQSP1 DQS0 DQ48 M_A_DQ49 VSS12
29 DQS1 DQ49 165 37 VSS13 GND 205
M_A_DQSP2 47 175 M_A_DQ54 38 206 4.7u/6.3V_6 4.7u/6.3V_6 0.1u/10V_4
M_A_DQSP3 DQS2 DQ50 M_A_DQ51 VSS14 GND
64 DQS3 DQ51 177 43 VSS15
M_A_DQSP4 137 164 M_A_DQ53
M_A_DQSP5 DQS4 DQ52 M_A_DQ48
154 DQS5 DQ53 166
M_A_DQSP6 171 174 M_A_DQ55 DDR3-DIMMA_H=5.2_STD
M_A_DQSP7 DQS6 DQ54 M_A_DQ50
[4] M_A_DQSN[7:0] 188 DQS7 DQ55 176
M_A_DQSN0 10 181 M_A_DQ56
M_A_DQSN1 DQS#0 DQ56 M_A_DQ57
27 DQS#1 DQ57 183
M_A_DQSN2 45 191 M_A_DQ59
62 DQS#3 DQ59 193
M_A_DQSN4 135 180 M_A_DQ60
SM_MEM BUS ADDRESS 152 DQS#5 DQ61 182
M_A_DQSN6 169 192 M_A_DQ63 +1.5VSUS
C
SO-DIMM0 1010 000 186 DQS#7 DQ63 194
C
SO-DIMM1 1010 001

R266
DDR3-DIMMA_H=5.2_STD 1K/F_4
Place these Caps near So-Dimm A +SMDDR_VREF R267 *0_6 +DDR_VREF
3mA
R265
+1.5VSUS +1.5VSUS 1K/F_4
C346 C376 C350 C349 C384 C380 C345 C385 C351 C355 C377 C352
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 4.7u/6.3V_6 4.7u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
+1.5VSUS
R258
1K/F_4
R263 *0_6 +DDR_VREF2
+1.5VSUS
3mA
R257
+1.5VSUS
1K/F_4
D D
C348 C381 C379 C383 C353
C347 C382 C354
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 C378
0.1u/10V_4 180P/50V_4 0.1u/10V_4 0.1u/10V_4

PROJECT : ZRI/ZQI
DDR3 SO-DIMM A A1A
1 2 3 4 5 6 7 8
www.vinafix.vn
1 2 3 4 5 6 7 8
<DDR> [4,14] M_B_DQSP[7:0] BYTE0_0-7 BYTE4_32-39 BYTE6_48-55

[4,14] M_B_DQSN[7:0]
[4,14] M_B_DQ[63:0]
BYTE2_16-23
+SMDDR_VREF_DIMM BYTE1_8-15 BYTE5_40-47 BYTE7_56-63
[14] +SMDDR_VREF_DIMM
[14] SMDDR_VREF_DQ1 SMDDR_VREF_DQ1 U24 U25 BYTE3_24-31 U26 U27
+SMDDR_VREF_DIMM M8 E3 M_B_DQ0 +SMDDR_VREF_DIMM M8 E3 M_B_DQ20 +SMDDR_VREF_DIMM M8 E3 M_B_DQ40 +SMDDR_VREF_DIMM M8 E3 M_B_DQ56

SMDDR_VREF_DQ1 VREFCA DQL0 M_B_DQ2 SMDDR_VREF_DQ1 VREFCA DQL0 M_B_DQ18 SMDDR_VREF_DQ1 VREFCA DQL0 M_B_DQ44 SMDDR_VREF_DQ1 H1 VREFCA DQL0 M_B_DQ61
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 VREFDQ DQL1 F7
[4,14] M_B_A[15:0] F2 M_B_DQ1 F2 M_B_DQ16 F2 M_B_DQ41 F2 M_B_DQ57
M_B_A0 DQL2 M_B_DQ3 M_B_A0 DQL2 M_B_DQ19 M_B_A0 DQL2 M_B_DQ45 M_B_A0 DQL2 M_B_DQ60
N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
M_B_A1 P7 H3 M_B_DQ5 M_B_A1 P7 H3 M_B_DQ21 M_B_A1 P7 H3 M_B_DQ46 M_B_A1 P7 H3 M_B_DQ62
M_B_A2 A1 DQL4 M_B_DQ6 M_B_A2 A1 DQL4 M_B_DQ23 M_B_A2 A1 DQL4 M_B_DQ42 M_B_A2 A1 DQL4 M_B_DQ63
P3 A2 DQL5 H8 P3 A2 DQL5 H8 P3 A2 DQL5 H8 P3 A2 DQL5 H8
M_B_A3 N2 G2 M_B_DQ4 M_B_A3 N2 G2 M_B_DQ17 M_B_A3 N2 G2 M_B_DQ47 M_B_A3 N2 G2 M_B_DQ59
M_B_A5 P2 M_B_A5 P2 M_B_A5 P2 M_B_A5 P2
M_B_A6 A5 M_B_A6 A5 M_B_A6 A5 M_B_A6 A5
R8 A6 R8 A6 R8 A6 R8 A6
SO-DIMMB SPD Address is 0XA4 M_B_A7 R2 A7 DQU0 D7 M_B_DQ11 M_B_A7 R2 A7 DQU0 D7 M_B_DQ30 M_B_A7 R2 A7 DQU0 D7 M_B_DQ39 M_B_A7 R2 A7 DQU0 D7 M_B_DQ50
A SO-DIMMB TS Address is 0X34 M_B_A8 T8 C3 M_B_DQ8 M_B_A8 T8 C3 M_B_DQ29 M_B_A8 T8 C3 M_B_DQ36 M_B_A8 T8 C3 M_B_DQ49 A
M_B_A9 A8 DQU1 M_B_DQ10 M_B_A9 A8 DQU1 M_B_DQ27 M_B_A9 A8 DQU1 M_B_DQ35 M_B_A9 A8 DQU1 M_B_DQ54
R3 A9 DQU2 C8 R3 A9 DQU2 C8 R3 A9 DQU2 C8 R3 A9 DQU2 C8
M_B_A10 L7 C2 M_B_DQ12 M_B_A10 L7 C2 M_B_DQ24 M_B_A10 L7 C2 M_B_DQ33 M_B_A10 L7 C2 M_B_DQ48
M_B_A11 A10/AP DQU3 M_B_DQ14 M_B_A11 A10/AP DQU3 M_B_DQ31 M_B_A11 A10/AP DQU3 M_B_DQ34 M_B_A11 A10/AP DQU3 M_B_DQ55
R7 A11 DQU4 A7 R7 A11 DQU4 A7 R7 A11 DQU4 A7 R7 A11 DQU4 A7
M_B_A12 N7 A2 M_B_DQ9 M_B_A12 N7 A2 M_B_DQ28 M_B_A12 N7 A2 M_B_DQ37 M_B_A12 N7 A2 M_B_DQ52
M_B_A13 A12/BC DQU5 M_B_DQ15 M_B_A13 A12/BC DQU5 M_B_DQ26 M_B_A13 A12/BC DQU5 M_B_DQ38 M_B_A13 A12/BC DQU5 M_B_DQ51
T3 A13 DQU6 B8 T3 A13 DQU6 B8 T3 A13 DQU6 B8 T3 A13 DQU6 B8
M_B_A14 T7 A3 M_B_DQ13 M_B_A14 T7 A3 M_B_DQ25 M_B_A14 T7 A3 M_B_DQ32 M_B_A14 T7 A3 M_B_DQ53
M_B_A15 A14 DQU7 M_B_A15 A14 DQU7 M_B_A15 A14 DQU7 M_B_A15 A14 DQU7
M7 A15 M7 A15 M7 A15 M7 A15
+1.5VSUS +1.5VSUS +1.5VSUS +1.5VSUS
[4,14] M_B_BS#[2:0]
M_B_BS#0 M2 B2 M_B_BS#0 M2 B2 M_B_BS#0 M2 B2 M_B_BS#0 M2 B2
M_B_BS#1 BA0 VDD#B2 M_B_BS#1 BA0 VDD#B2 M_B_BS#1 BA0 VDD#B2 M_B_BS#1 BA0 VDD#B2
N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9
M_B_BS#2 M3 G7 M_B_BS#2 M3 G7 M_B_BS#2 M3 G7 M_B_BS#2 M3 G7
BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K2 K2 VDD#K2 K2 VDD#K2 K2
VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
[4] M_B_CLKP0 J7 N9 M_B_CLKP0 J7 N9 M_B_CLKP0 J7 N9 M_B_CLKP0 J7 N9
CK VDD#N9 M_B_CLKN0 CK VDD#N9 M_B_CLKN0 CK VDD#N9 M_B_CLKN0 CK VDD#N9
[4] M_B_CLKN0 K7 CK VDD#R1 R1 K7 CK VDD#R1 R1 K7 CK VDD#R1 R1 K7 CK VDD#R1 R1
[4] M_B_CKE0 K9 R9 M_B_CKE0 K9 R9 M_B_CKE0 K9 R9 M_B_CKE0 K9 R9
CKE VDD#R9 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9
[4] M_B_ODT0 K1 A1 M_B_ODT0 K1 A1 M_B_ODT0 K1 A1 M_B_ODT0 K1 A1

ODT VDDQ#A1 M_B_CS#0 ODT VDDQ#A1 M_B_CS#0 ODT VDDQ#A1 M_B_CS#0 ODT VDDQ#A1
[4] M_B_CS#0 L2 CS VDDQ#A8 A8 L2 CS VDDQ#A8 A8 L2 CS VDDQ#A8 A8 L2 CS VDDQ#A8 A8
[4,14] M_B_RAS# J3 C1 M_B_RAS# J3 C1 M_B_RAS# J3 C1 M_B_RAS# J3 C1
RAS VDDQ#C1 M_B_CAS# RAS VDDQ#C1 M_B_CAS# RAS VDDQ#C1 M_B_CAS# RAS VDDQ#C1
[4,14] M_B_CAS# K3 CAS VDDQ#C9 C9 K3 CAS VDDQ#C9 C9 K3 CAS VDDQ#C9 C9 K3 CAS VDDQ#C9 C9
[4,14] M_B_WE# L3 D2 M_B_WE# L3 D2 M_B_WE# L3 D2 M_B_WE# L3 D2
WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
M_B_DQSP0 F3 H2 M_B_DQSP2 F3 H2 M_B_DQSP5 F3 H2 M_B_DQSP7 F3 H2
M_B_DQSP1 DQSL VDDQ#H2 M_B_DQSP3 DQSL VDDQ#H2 M_B_DQSP4 DQSL VDDQ#H2 M_B_DQSP6 DQSL VDDQ#H2
C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9
[4,14] M_B_DM0 E7 DML VSS#A9 A9 [4,14] M_B_DM2 E7 DML VSS#A9 A9 [4,14] M_B_DM5 E7 DML VSS#A9 A9 [4,14] M_B_DM7 E7 DML VSS#A9 A9
[4,14] M_B_DM1 D3 DMU VSS#B3 B3 [4,14] M_B_DM3 D3 DMU VSS#B3 B3 [4,14] M_B_DM4 D3 DMU VSS#B3 B3 [4,14] M_B_DM6 D3 DMU VSS#B3 B3
VSS#E1 E1 VSS#E1 E1 VSS#E1 E1 VSS#E1 E1
VSS#G8 G8 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8
M_B_DQSN0 G3 J2 M_B_DQSN2 G3 J2 M_B_DQSN5 G3 J2 M_B_DQSN7 G3 J2
M_B_DQSN1 DQSL VSS#J2 M_B_DQSN3 DQSL VSS#J2 M_B_DQSN4 DQSL VSS#J2 M_B_DQSN6 DQSL VSS#J2
B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8
B
VSS#M1 M1 VSS#M1 M1 VSS#M1 M1 VSS#M1 M1 B
VSS#M9 M9 VSS#M9 M9 VSS#M9 M9 VSS#M9 M9
VSS#P1 P1 VSS#P1 P1 VSS#P1 P1 VSS#P1 P1
[4,14] M_B_RST# T2 P9 M_B_RST# T2 P9 M_B_RST# T2 P9 M_B_RST# T2 P9
RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
VSS#T1 T1 VSS#T1 T1 VSS#T1 T1 VSS#T1 T1
M_B_ZQ1 L8 T9 M_B_ZQ2 L8 T9 M_B_ZQ3 L8 T9 M_B_ZQ4 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
Should be 243
Ohms +-1% Should be 243 Should be 243 Should be 243
VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1
2
2
VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9
R357 D1 R321 D1 R273 D1 R329 D1
VSSQ#D1 VSSQ#D1 VSSQ#D1 VSSQ#D1
243/F_4 VSSQ#D8 D8 243/F_4 VSSQ#D8 D8 243/F_4 VSSQ#D8 D8 243/F_4 VSSQ#D8 D8
VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2
J1 E8 J1 E8 J1 E8 J1 E8
1
1
NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8
L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9
J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9
100-BALL 100-BALL 100-BALL 100-BALL

SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
RAM_DDR3 RAM_DDR3 RAM_DDR3 RAM_DDR3
1333 AKD5JGST400
1600 AKD5JGST407 +3V
U54
PCLK_SMB 6 1
[7,12,25] PCLK_SMB SCL A0
PDAT_SMB 5 2
[7,12,25] PDAT_SMB SDA A1
A2 3
7 8 C824
WP VCC
GND 4 *0.1u/10V_4
*M24C02-WMN6TP
C C
address:A2
WP =1 : WRITE DISABLE
Place these Caps near Memory Down

+0.75V_DDR_VTT
+1.5VSUS +1.5VSUS +1.5VSUS
M_B_WE# R343 36/F_4

M_B_CAS# R338 36/F_4
M_B_RAS# R337 36/F_4 R322
C540 C541 C413 C412 C536 C410 C502 C512 C520 C524 C533 M_B_BS#0 R650 36/F_4 1K/F_4
0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 M_B_BS#1 R359 36/F_4 +SMDDR_VREF
M_B_BS#2 R347 36/F_4
M_B_CKE0 R323 36/F_4 +SMDDR_VREF_DIMM R312 *0_6
M_B_ODT0 R316 36/F_4
+0.75V_DDR_VTT M_B_CS#0 R330 36/F_4
M_B_A0 R354 36/F_4 R657
M_B_A1 R659 36/F_4 1K/F_4 C805 C794 C807 C479
+1.5VSUS +0.75V_DDR_VTT M_B_A2 R653 36/F_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
M_B_A3 R371 36/F_4
M_B_A4 R372 36/F_4
M_B_A5 R667 36/F_4
M_B_A6 R666 36/F_4
C529 C415 C414 C538 C409 C528 C547 C553 C548 C549 C550 M_B_A7 R374 36/F_4
0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 M_B_A8 R373 36/F_4
M_B_A9 R370 36/F_4
M_B_A10 R645 36/F_4 +1.5VSUS
M_B_A11 R663 36/F_4
D M_B_A12 R352 36/F_4 D
M_B_A13 R665 36/F_4 R629
M_B_A14 R664 36/F_4 1K/F_4
M_B_A15 R648 36/F_4 +SMDDR_VREF
+1.5VSUS
SMDDR_VREF_DQ1 R310 *0_6
R358 C446 C464 C534 C450

C530 C526 C539 C417 C416 C525 M_B_CLKP0 R309 36/F_4 1K/F_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4
C455 0.1u/10V_4 +1.5VSUS Quanta Computer Inc.
M_B_CLKN0 R311 36/F_4
PROJECT : ZRI/ZQI
A1A
DDR3 MEMORY DOWNx16 B-1
1 2 3 4 5 6 7 8
www.vinafix.vn
1 2 3 4 5 6 7 8
<DDR>
[4,13] M_B_DQSP[7:0]
[4,13] M_B_DQSN[7:0]
[4,13] M_B_DQ[63:0]
BYTE0_0-7 BYTE5_40-47 BYTE7_56-63
[13] +SMDDR_VREF_DIMM +SMDDR_VREF_DIMM BYTE2_16-23
SMDDR_VREF_DQ1
[13] SMDDR_VREF_DQ1 BYTE1_8-15 BYTE4_32-39 BYTE6_48-55
U49 U50 BYTE3_24-31 U51 U52
+SMDDR_VREF_DIMM M8 E3 M_B_DQ2 +SMDDR_VREF_DIMM M8 E3 M_B_DQ18 +SMDDR_VREF_DIMM M8 E3 M_B_DQ44 +SMDDR_VREF_DIMM M8 E3 M_B_DQ61

SMDDR_VREF_DQ1 VREFCA DQL0 M_B_DQ0 SMDDR_VREF_DQ1 VREFCA DQL0 M_B_DQ20 SMDDR_VREF_DQ1 VREFCA DQL0 M_B_DQ40 SMDDR_VREF_DQ1 H1 VREFCA DQL0 M_B_DQ56
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 VREFDQ DQL1 F7
[4,13] M_B_A[15:0] F2 M_B_DQ3 F2 M_B_DQ19 F2 M_B_DQ45 F2 M_B_DQ60
A
M_B_A0 DQL2 M_B_DQ1 M_B_A0 DQL2 M_B_DQ16 M_B_A0 DQL2 M_B_DQ41 M_B_A0 DQL2 M_B_DQ57 A
N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
M_B_A1 P7 H3 M_B_DQ7 M_B_A1 P7 H3 M_B_DQ22 M_B_A1 P7 H3 M_B_DQ43 M_B_A1 P7 H3 M_B_DQ58
M_B_A3 N2 G2 M_B_DQ6 M_B_A3 N2 G2 M_B_DQ23 M_B_A3 N2 G2 M_B_DQ42 M_B_A3 N2 G2 M_B_DQ63
M_B_A5 P2 M_B_A5 P2 M_B_A5 P2 M_B_A5 P2
M_B_A6 A5 M_B_A6 A5 M_B_A6 A5 M_B_A6 A5
R8 A6 R8 A6 R8 A6 R8 A6
SO-DIMMB SPD Address is 0XA4 M_B_A7 R2 A7 DQU0 D7 M_B_DQ8 M_B_A7 R2 A7 DQU0 D7 M_B_DQ29 M_B_A7 R2 A7 DQU0 D7 M_B_DQ36 M_B_A7 R2 A7 DQU0 D7 M_B_DQ49
SO-DIMMB TS Address is 0X34 M_B_A8 T8 C3 M_B_DQ11 M_B_A8 T8 C3 M_B_DQ30 M_B_A8 T8 C3 M_B_DQ39 M_B_A8 T8 C3 M_B_DQ50
M_B_A9 A8 DQU1 M_B_DQ12 M_B_A9 A8 DQU1 M_B_DQ24 M_B_A9 A8 DQU1 M_B_DQ33 M_B_A9 A8 DQU1 M_B_DQ48
R3 A9 DQU2 C8 R3 A9 DQU2 C8 R3 A9 DQU2 C8 R3 A9 DQU2 C8
M_B_A10 L7 C2 M_B_DQ10 M_B_A10 L7 C2 M_B_DQ27 M_B_A10 L7 C2 M_B_DQ35 M_B_A10 L7 C2 M_B_DQ54
M_B_A11 A10/AP DQU3 M_B_DQ13 M_B_A11 A10/AP DQU3 M_B_DQ25 M_B_A11 A10/AP DQU3 M_B_DQ32 M_B_A11 A10/AP DQU3 M_B_DQ53
R7 A11 DQU4 A7 R7 A11 DQU4 A7 R7 A11 DQU4 A7 R7 A11 DQU4 A7
M_B_A12 N7 A2 M_B_DQ15 M_B_A12 N7 A2 M_B_DQ26 M_B_A12 N7 A2 M_B_DQ38 M_B_A12 N7 A2 M_B_DQ51
M_B_A13 A12/BC DQU5 M_B_DQ9 M_B_A13 A12/BC DQU5 M_B_DQ28 M_B_A13 A12/BC DQU5 M_B_DQ37 M_B_A13 A12/BC DQU5 M_B_DQ52
T3 A13 DQU6 B8 T3 A13 DQU6 B8 T3 A13 DQU6 B8 T3 A13 DQU6 B8
M_B_A14 T7 A3 M_B_DQ14 M_B_A14 T7 A3 M_B_DQ31 M_B_A14 T7 A3 M_B_DQ34 M_B_A14 T7 A3 M_B_DQ55
M_B_A15 A14 DQU7 M_B_A15 A14 DQU7 M_B_A15 A14 DQU7 M_B_A15 A14 DQU7
M7 A15 M7 A15 M7 A15 M7 A15
+1.5VSUS +1.5VSUS +1.5VSUS +1.5VSUS
[4,13] M_B_BS#[2:0]
M_B_BS#0 M2 B2 M_B_BS#0 M2 B2 M_B_BS#0 M2 B2 M_B_BS#0 M2 B2
M_B_BS#1 BA0 VDD#B2 M_B_BS#1 BA0 VDD#B2 M_B_BS#1 BA0 VDD#B2 M_B_BS#1 BA0 VDD#B2
N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9
M_B_BS#2 M3 G7 M_B_BS#2 M3 G7 M_B_BS#2 M3 G7 M_B_BS#2 M3 G7
BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
[4] M_B_CLKP1 J7 N9 M_B_CLKP1 J7 N9 M_B_CLKP1 J7 N9 M_B_CLKP1 J7 N9
CK VDD#N9 M_B_CLKN1 CK VDD#N9 M_B_CLKN1 CK VDD#N9 M_B_CLKN1 CK VDD#N9
[4] M_B_CLKN1 K7 CK VDD#R1 R1 K7 CK VDD#R1 R1 K7 CK VDD#R1 R1 K7 CK VDD#R1 R1
[4] M_B_CKE1 K9 R9 M_B_CKE1 K9 R9 M_B_CKE1 K9 R9 M_B_CKE1 K9 R9
CKE VDD#R9 CKE VDD#R9 CKE VDD#R9 CKE VDD#R9
[4] M_B_ODT1 K1 A1 M_B_ODT1 K1 A1 M_B_ODT1 K1 A1 M_B_ODT1 K1 A1

ODT VDDQ#A1 M_B_CS#1 ODT VDDQ#A1 M_B_CS#1 ODT VDDQ#A1 M_B_CS#1 ODT VDDQ#A1
[4] M_B_CS#1 L2 CS VDDQ#A8 A8 L2 CS VDDQ#A8 A8 L2 CS VDDQ#A8 A8 L2 CS VDDQ#A8 A8
[4,13] M_B_RAS# J3 C1 M_B_RAS# J3 C1 M_B_RAS# J3 C1 M_B_RAS# J3 C1
RAS VDDQ#C1 M_B_CAS# RAS VDDQ#C1 M_B_CAS# RAS VDDQ#C1 M_B_CAS# RAS VDDQ#C1
[4,13] M_B_CAS# K3 CAS VDDQ#C9 C9 K3 CAS VDDQ#C9 C9 K3 CAS VDDQ#C9 C9 K3 CAS VDDQ#C9 C9
[4,13] M_B_WE# L3 D2 M_B_WE# L3 D2 M_B_WE# L3 D2 M_B_WE# L3 D2
WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
M_B_DQSP0 F3 H2 M_B_DQSP2 F3 H2 M_B_DQSP5 F3 H2 M_B_DQSP7 F3 H2
M_B_DQSP1 DQSL VDDQ#H2 M_B_DQSP3 DQSL VDDQ#H2 M_B_DQSP4 DQSL VDDQ#H2 M_B_DQSP6 DQSL VDDQ#H2
B C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 B
[4,13] M_B_DM0 E7 DML VSS#A9 A9 [4,13] M_B_DM2 E7 DML VSS#A9 A9 [4,13] M_B_DM5 E7 DML VSS#A9 A9 [4,13] M_B_DM7 E7 DML VSS#A9 A9
[4,13] M_B_DM1 D3 DMU VSS#B3 B3 [4,13] M_B_DM3 D3 DMU VSS#B3 B3 [4,13] M_B_DM4 D3 DMU VSS#B3 B3 [4,13] M_B_DM6 D3 DMU VSS#B3 B3
M_B_DQSN0 G3 J2 M_B_DQSN2 G3 J2 M_B_DQSN5 G3 J2 M_B_DQSN7 G3 J2
M_B_DQSN1 DQSL VSS#J2 M_B_DQSN3 DQSL VSS#J2 M_B_DQSN4 DQSL VSS#J2 M_B_DQSN6 DQSL VSS#J2
[4,13] M_B_RST# T2 P9 M_B_RST# T2 P9 M_B_RST# T2 P9 M_B_RST# T2 P9
RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
M_B_ZQ5 L8 T9 M_B_ZQ6 L8 T9 M_B_ZQ7 L8 T9 M_B_ZQ8 L8 T9
Should be 243
Ohms +-1% Should be 243 Should be 243 Should be 243
VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1 Ohms +-1% VSSQ#B1 B1
2
2
R305 D1 R658 D1 R631 D1 R660 D1
VSSQ#D1 VSSQ#D1 VSSQ#D1 VSSQ#D1
243/F_4 VSSQ#D8 D8 243/F_4 VSSQ#D8 D8 243/F_4 VSSQ#D8 D8 243/F_4 VSSQ#D8 D8
J1 E8 J1 E8 J1 E8 J1 E8
1
1
NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8

RAM_DDR3 RAM_DDR3 RAM_DDR3 RAM_DDR3
1333 AKD5JGST400
1600 AKD5JGST407
C C
Place these Caps near Memory Down +0.75V_DDR_VTT
+1.5VSUS +1.5VSUS
M_B_CKE1 R324 36/F_4

M_B_ODT1 R315 36/F_4
M_B_CS#1 R331 36/F_4
C781 C782 C803 C809 C784 C783 C796 C795 C806 C798 C799
0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4
+0.75V_DDR_VTT
+1.5VSUS
+1.5VSUS +0.75V_DDR_VTT
C431
0.1u/10V_4
M_B_CLKP1 R290 36/F_4
C780 C779 C801 C811 C802 C804 C818 C817 C816 C815 C823
0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 M_B_CLKN1 R296 36/F_4
D D
+1.5VSUS
C778 C777 C808 C813 C810 C537

0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4
PROJECT : ZRI/ZQI
A1A
DDR3 MEMORY DOWNx16 B-2
1 2 3 4 5 6 7 8
www.vinafix.vn
U45A
PART 1 0F 9
[3] PEG_TXP0 AA38 PCIE_RX0P PCIE_TX0P Y33 PEG_RXP0_C C266 [email protected]/10V_4

PEG_RXP0 [3]
Y37 Y32 PEG_RXN0_C C265 [email protected]/10V_4
[3] PEG_TXN0 PCIE_RX0N PCIE_TX0N
PEG_RXN0 [3]
Thames(Pro,XT) and Mars Power-on sequence
[3]
[3]
PEG_TXP1
PEG_TXN1
Y35
W36
PCIE_RX1P
PCIE_RX1N
PCIE_TX1P
PCIE_TX1N
W33 PEG_RXP1_C
W32 PEG_RXN1_C
C294
C293
[email protected]/10V_4
PEG_RXP1 [3]
PEG_RXN1 [3]
PX5.0(no BACO)
[3] PEG_TXP2 W38 PCIE_RX2P PCIE_TX2P U33 PEG_RXP2_C C264 [email protected]/10V_4
PEG_RXP2 [3]
[3] PEG_TXN2 V37 PCIE_RX2N PCIE_TX2N U32 PEG_RXN2_C C263 [email protected]/10V_4
PEG_RXN2 [3] DGPU_PWREN
[3] PEG_TXP3 V35 PCIE_RX3P PCIE_TX3P U30 PEG_RXP3_C C291 [email protected]/10V_4

PEG_RXP3 [3] VDDC/VDDCI/1.8V_IO
[3] PEG_TXN3 U36 PCIE_RX3N PCIE_TX3N U29 PEG_RXN3_C C292 [email protected]/10V_4
PEG_RXN3 [3] MVDDQ/+PCIE_VDDC
PEG_RXP4_C C260 [email protected]/10V_4
VDDR3
[3] PEG_TXP4 U38 PCIE_RX4P PCIE_TX4P T33 PEG_RXP4 [3]
T37 PCIE_RX4N PCIE_TX4N T32 PEG_RXN4_C C259 [email protected]/10V_4 20ms max
[3] PEG_TXN4 PEG_RXN4 [3]
T35 PCIE_RX5P PCIE_TX5P T30 PEG_RXP5_C C261 [email protected]/10V_4 PE_PWRGD

[3] PEG_TXP5 PEG_RXP5 [3]
R36 PCIE_RX5N PCIE_TX5N T29 PEG_RXN5_C C262 [email protected]/10V_4
[3] PEG_TXN5 PEG_RXN5 [3]
[3] PEG_TXP6 R38 PCIE_RX6P PCIE_TX6P P33 PEG_RXP6_C C290 [email protected]/10V_4

PEG_RXP6 [3]
[3] PEG_TXN6 P37 PCIE_RX6N PCIE_TX6N P32 PEG_RXN6_C C289 [email protected]/10V_4
PEG_RXN6 [3] PWRGOOD
100ms
[3] PEG_TXP7 P35 PCIE_RX7P PCIE_TX7P P30 PEG_RXP7_C C288 [email protected]/10V_4
PEG_RXP7 [3]
[3] PEG_TXN7 N36 PCIE_RX7N PCIE_TX7N P29 PEG_RXN7_C C287 [email protected]/10V_4
PEG_RXN7 [3]
PCIE_RST#
N38 PCIE_RX8P PCIE_TX8P N33
M37 PCIE_RX8N PCIE_TX8N N32
PCIE Clock
PCI EXPRESS INTERFACE
M35 PCIE_RX9P PCIE_TX9P N30

L36 PCIE_RX9N PCIE_TX9N N29
L38 PCIE_RX10P PCIE_TX10P L33

K37 PCIE_RX10N PCIE_TX10N L32
+3V_GFX
K35 PCIE_RX11P PCIE_TX11P L30
J36 PCIE_RX11N PCIE_TX11N L29
C723 [email protected]/10V_4
J38 PCIE_RX12P PCIE_TX12P K33
5
H37 PCIE_RX12N PCIE_TX12N K32 U46
[7] DGPU_RST_L 2
4 PERST#_BUF
H35 PCIE_RX13P PCIE_TX13P J33 [8] PCIE_RST# 1
G36 PCIE_RX13N PCIE_TX13N J32
EV@TC7SH08FU(F) R574
3
G38 PCIE_RX14P PCIE_TX14P K30 *EV@100K_4
F37 PCIE_RX14N PCIE_TX14N K29
F35 PCIE_RX15P PCIE_TX15P H33

E37 PCIE_RX15N PCIE_TX15N H32
CLOCK
[8] CLK_PCIE_VGAP AB35 PCIE_REFCLKP
[8] CLK_PCIE_VGAN AA36 PCIE_REFCLKN
CALIBRATION
PCIE_CALR_TX Y30 PCIE_CALR_TX R183 [email protected]/F_4
R142 EV@1K_4 TEST_PG AH16 TEST_PG PCIE_CALR_RX Y29 PCIE_CALR_RX R179 EV@1K/F_4 +PCIE_VDDC_GFX
PERST#_BUF AA30 PERSTB

EV@GPU_M2
PROJECT : ZRI/ZQI
A1A
Thames_M2/ PEG*16
www.vinafix.vn
U45B
PART 2 0F 9
MUTI GFX
GENLK_CLK AD29 GENLK_CLK TXCAP_DPA3P AU24 +3V_GFX
TP19
GENLK_VSYNC AC29 GENLK_VSYNC TXCAM_DPA3N AV23
TP21
TX0P_DPA2P AT25
AJ21 SWAPLOCKA TX0M_DPA2N AR24 R161 [email protected]_4 GPU_SMBCLK
DPA
AK21 SWAPLOCKB
TX1P_DPA1P AU26
TX1M_DPA1N AV25 R162 [email protected]_4 GPU_SMBDAT
AR8 DVPCNTL_MVP_0 TX2P_DPA0P AT27

AU8 DVPCNTL_MVP_1 TX2M_DPA0N AR26
AP8 DVPCNTL_0
AW8 DVPCNTL_1 TXCBP_DPB3P AR30
AR3 DVPCNTL_2 TXCBM_DPB3N AT29
AR1 DVPCLK
AU1 DVPDATA_0 TX3P_DPB2P AV31
AU3 DVPDATA_1
DPB
TX3M_DPB2N AU30
AW3 DVPDATA_2
AP6 DVPDATA_3 TX4P_DPB1P AR32
AW5 AT31
AU5
DVPDATA_4
DVPDATA_5
TX4M_DPB1N
Mars Thermal
AR6 DVPDATA_6 TX5P_DPB0P AT33
1.8V GPIO AW6 DVPDATA_7 TX5M_DPB0N AU32
AU6 DVPDATA_8 +3V_GFX +3V_GFX
AT7 DVPDATA_9 TXCCP_DPC3P AU14
AV7 DVPDATA_10 TXCCM_DPC3N AV13
AN7 DVPDATA_11
AV9 DVPDATA_12 TX0P_DPC2P AT15 R568
AT9 DVPDATA_13 TX0M_DPC2N AR14 EV@10K_4
AR10 DVPDATA_14 C143
DPC
AW10 DVPDATA_15 TX1P_DPC1P AU16 [email protected]/10V_4
AU10 DVPDATA_16 TX1M_DPC1N AV15 U15
AP10 DVPDATA_17
AV11 DVPDATA_18 TX2P_DPC0P AT17 [37] GPUT_CLK GPUT_CLK 8 1 GPU_D+
SCLK VCC
AT11 DVPDATA_19 TX2M_DPC0N AR16
AR12 DVPDATA_20
[37] GPUT_DATA GPUT_DATA 7 2
SDA DXP C175
AW12 DVPDATA_21 TXCDP_DPD3P AU20
AU12 DVPDATA_22 TXCDM_DPD3N AT19 ALT#_GPIO17 6 3
ALERT# DXN EV@2200p/50V_4
AP12 DVPDATA_23
+3V_GFX TX3P_DPD2P AT21 4 5
OVERT# GND GPU_D-
TX3M_DPD2N AR20
R538 *EV@10K_4 PCIE_REQ_GPU#
DPD
GPU_SMBCLK AJ23 SMBCLK TX4P_DPD1P AU22 EV@G780P81U
SMBus
R537 *EV@100_4 GPU_SMBDAT AH23 SMBDATA TX4M_DPD1N AV21
2/5 add
TX5P_DPD0P AT23
TX5M_DPD0N AR22
+3V_GFX R166 *[email protected]_4 GPU_SCL AK26 SCL
+3V_GFX I2C
R167 *[email protected]_4 GPU_SDA AJ26 SDA
R147 *EV@0_4 R AD39

[44] GPU_DPRSLPVR
GENERAL PURPOSE I/O AVSSN#1 AD37
GPU_GPIO0 AH20 GPIO_0
TP12
R228 GPU_GPIO1 AH18 GPIO_1 G AE36
TP13
EV@10K_4 GPU_GPIO2 AN16 GPIO_2 AVSSN#2 AD35
TP10
2
B AF37
3 1 GPU_AC_DC# AH17 GPIO_5_AC_BATT AVSSN#3 AE38
[37] DGPU_AC_DC#
AJ17 GPIO_6
DAC1
R144 *EV@10K_4 AK17 GPIO_7_BLON HSYNC AC36 GPU_HSYNC_COM [18]
EV@2N7002K
Q54
TP6
TP11
GPU_GPIO8
GPU_GPIO9
AJ13
AH15
GPIO_8_ROMSO
GPIO_9_ROMSI
VSYNC AC38 GPU_VSYNC_COM [18] Check need or not
GPU_GPIO10 AJ16 GPIO_10_ROMSCK +1.8V_GFX
TP7
GPU_GPIO11 AK16 GPIO_11 RSET AB34 R583 EV@499/F_4 +1.8V_AVDD
TP8
GPU_GPIO12 AL16 GPIO_12 DAC1 Analog Power : 1.8V@18mA
TP9
PWRCNTRL5 AM16 GPIO_13 AVDD AD34 L23
[44] PWRCNTRL5
TP5 AM14 GPIO_14_HPD2 AVSSQ AE34 EV@BLM15BD121SN1D_300MA
37,39,44,47] SYS_SHDN#
[44] PWRCNTRL0 AM13 GPIO_15_PWRCNTL_0
3
R141 *short_4 AK14 GPIO_16 VDD1DI AC33 C229 C222 C245

[44] PWRCNTRL2
ALT#_GPIO17 AG30 GPIO_17_THERMAL_INT VSS1DI AC34 [email protected]/10V_4 EV@1u/6.3V_4 EV@10u/6.3V_6
Q4 AN14 GPIO_18_HPD3
2 GPIO_19_CTF AM17 GPIO_19_CTF
[44] PWRCNTRL1 AL13 GPIO_20_PWRCNTL_1 NC#1 V13

GPU_GPIO21 AJ14 GPIO_21 NC#2 U13
TP3
*EV@ME2N7002E_200MA R555 GPU_GPIO22 AK13 GPIO_22_ROMCSB NC#3 AC31
TP4
*EV@10K_4 PCIE_REQ_GPU# AN13 CLKREQB NC#4 AD30 +1.8V_VDD1DI
[7] PCIE_REQ_GPU#
1
NC#5 AC32 DAC1 Digital Power : 1.8V@117mA

NC#6 AD32 L26
R587 *short_4 AG32 GPIO_29 NC#7 AF32 EV@BLM15BD121SN1D_300MA
[44] PWRCNTRL3
R586 *short_4 AG33 GPIO_30 NC#8 AA29
[44] PWRCNTRL4
NC#9 AG21 C200 C295 C302
AJ19 GENERICA [email protected]/10V_4 EV@1u/6.3V_4 EV@10u/6.3V_6
AK19 GENERICB
GPU_GENERICC AJ20 GENERICC
TP14
AK20 GENERICD
AJ24 GENERICE_HPD4 NC_TSVSSQ AF33
AH26 GENERICF_HPD5
AH24 GENERICG_HPD6
PS_0 AM34 R191 *short_4 PS_0 VDDC_CT VDDC_CT VDDC_CT

+1.8V_GFX
TP24 AC30 CEC_1
Place close to Chip TP15 AK24 HPD1 PS_1 AD31 PS_1 R_pu R193 R_pu R209 R_pu R186
MLPS
R122 [email protected]/F_4 *EV@0_4 *EV@0_4
EV@499/F_4
PS_0 PS_1 PS_2
GPU_VREFG AH13 VREFG PS_2 AG31 PS_2
R_pd R_pd R_pd
Ca C237 R192 Ca C298 R208 Ca C213 R185
R518 C657 BACO EV@82n/16V_4 EV@2K/F_4 *[email protected]/10V_4 [email protected]/F_4 EV@680n/6.3V_4 [email protected]/F_4
EV@249/F_4 R559 *[email protected]_4 AL21 PX_EN PS_3 AD33 PS_3 [18]
DEBUG DDC/AUX
DDC1CLK AM26
MLPS
DDC1DATA AN26
R190 EV@1K_4 TESTEN AD28 TESTEN R_pu R_pd Bits [3:1] Ra P/N MLPS Bit Bits [5:1] Ca Bits [5:4] P/N
AUX1P AM27
+3V_GFX R200 *[email protected]/F_4 AUX1N AL27
NC 4.75K 000 2K CS22002FB19 PS_0 01001 680nF 00 CH4681K9B00
R158 *EV@10K_4 AM23 JTAG_TRSTB DDC2CLK AM19
R564 *EV@10K_4 AN23 JTAG_TDI DDC2DATA AL19
R160 *EV@10K_4 AK23 JTAG_TCK 8.45K 2K 001 3.24K CS23242FB09 PS_1 11000 82nF 01 CH3823K1B00
R159 *EV@10K_4 AL24 JTAG_TMS AUX2P AN20
TP16 AM24 JTAG_TDO AUX2N AM20
4.53K 2K 010 3.4K CS23402FB08 PS_2 00000 10nF 10 CH31003KB11
DDCCLK_AUX3P AL30
DDCDATA_AUX3N AM30
THERMAL
6.98K 4.99K 011 4.53K CS24532FB08 PS_3 00XXX NC 11
DDCCLK_AUX4P AL29
GPU_D+ AF29 DPLUS DDCDATA_AUX4N AM29
GPU_D- AG29 DMINUS 4.53K 4.99K 100 4.75K CS24752FB12
DDCCLK_AUX5P AN21
DDCDATA_AUX5N AM21
PU:Disable MLPS R184 EV@10K_4 GPU_GPIO28 AK32 GPIO_28_FDO 3.24K 5.62K 101 4.99K CS24992FB26
DDCCLK_AUX6P AK30
PD:Enable MLPS AL31 TS_A DDCDATA_AUX6N AK29
3.4K 1M 110 5.62K CS25622FB18
on-die thermal sensor power : 1.8V@8mA DDCVGACLK AJ30
+1.8V_GFX L21 +1.8V_TSVDD AJ32 TSVDD DDCVGADATA AJ31
EV@BLM15BD121SN1D_300MA AJ33 4.75K NC 111 6.98K CS26982FB01
C267
C270 C269
TSVSS
EV@10u/6.3V_6 EV@1u/6.3V_4 [email protected]/10V_4 8.45K CS28452FB12
EV@GPU_M2
PROJECT : ZRI/ZQI
www.vinafix.vn
1M CS51002FB11 A1A
02_Thames_M2/ GPIO_DP_CRT_I2C
237mA
+1.8V_GFX L20 EV@PBY160808T-501Y-N_1.2A DPLL_PVDD
U45G
C211 C212
C231
U45I PART 7 0F 9
EV@10u/6.3V_6 EV@1u/6.3V_4 [email protected]/10V_4
VARY_BL AK27 R170 *EV@10K_4

PART 9 0F 9
LVDS CONTROL DIGON AJ27 R178 *EV@10K_4
AM32 DPLL_PVDD XTALIN AV33 GPU_XTALIN C214 [email protected]/50V_4 TXCLK_UP_DPF3P AK35

280mA TXCLK_UN_DPF3N AL36
3
4
+PCIE_VDDC_GFX L18 EV@PBY160808T-501Y-N_1.2A DPLL_VDDC AN31 DPLL_VDDC
R188 Y1 TXOUT_U0P_DPF2P AJ38
C191 C192 EV@1M/F_4 TXOUT_U0N_DPF2N AK37
C195 AN32 DPLL_PVSS EV@27MHz_XTAL
EV@10u/6.3V_6 EV@1u/6.3V_4 [email protected]/10V_4 TXOUT_U1P_DPF1P AH35
1
2
XTALOUT AU34 GPU_XTALOUT C232 [email protected]/50V_4 TXOUT_U1N_DPF1N AJ36
TXOUT_U2P_DPF0P AG38
TXOUT_U2N_DPF0N AH37
H7 MPLL_PVDD
H8 MPLL_PVDD TXOUT_U3P AF35
150mA TXOUT_U3N AG36
LVTMDP
+1.8V_GFX L3 EV@PBY160808T-501Y-N_1.2A MPLL_PVDD XO_IN AW34 TP57
C71 C29 AM10 SPLL_PVDD
PLLS/XTAL
C31
EV@10u/6.3V_6 EV@1u/6.3V_4 [email protected]/10V_4 TXCLK_LP_DPE3P AP34
TXCLK_LN_DPE3N AR34
AN9 SPLL_VDDC XO_IN2 AW35 TP56
TXOUT_L0P_DPE2P AW37
TXOUT_L0N_DPE2N AU35
AN10 SPLL_PVSS TXOUT_L1P_DPE1P AR37

TXOUT_L1N_DPE1N AU39
75mA
+1.8V_GFX L13 EV@BLM15BD121SN1D_300MA SPLL_PVDD TXOUT_L2P_DPE0P AP35
CLKTESTA AK10 CLKTESTA TXOUT_L2N_DPE0N AR35
C100 C101 AF30 NC_XTAL_PVDD CLKTESTB AL10 CLKTESTB
C95 AF31 NC_XTAL_PVSS TXOUT_L3P AN36
EV@10u/6.3V_6 EV@1u/6.3V_4 [email protected]/10V_4 TXOUT_L3N AP37
C73 C85
*[email protected]/10V_4 *[email protected]/10V_4
EV@GPU_M2
EV@GPU_M2
100mA R118 R124
+PCIE_VDDC_GFX L9 EV@PBY160808T-501Y-N_1.2A SPLL_VDDC *[email protected]/F_4 *[email protected]/F_4
C69 C68
C64
EV@10u/6.3V_6 EV@1u/6.3V_4 [email protected]/10V_4
DPLL_PVDD R189 *EV@0_4
R187 *EV@0_4

PROJECT : ZRI/ZQI
A1A
Thames_M2/ XTAL_LVDS
www.vinafix.vn
Mars USE CONFIGURATION STRAPS -- SEE EACH DATABOOK FOR STRAP DETAILS
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
Vendor Vendor P/N STN B/S P/N Size MLPS Default Setting
STRAPS MLPS GPIO PIN DESCRIPTION OF DEFAULT SETTINGS
H5TQ2G63DFR-11C MLPS_DISABLE NA GPIO_28_FDO Enable MLPS, NA for Thames/Whistler/Seymour X

AKD5MGWTW17 * 8 2GB
(128M*16) 000 0: Enable MLPS, disable GPIO PINSTRAP
1: Disable MLPS, enable GPIO PINSTRAP
Hynix H5TC2G63FFR-11C TX_PWRS_ENB PS_1[4] GPIO0 Transmitter Power Savings Enable

AKD5MZDTW05 * 8 2GB
(128M*16) 001 0: 50% Tx output swing
1: Full Tx output swing
X
TX_DEEMPH_EN PS_1[5] GPIO1 PCIE Transmitter De-emphasis Enable X

0: Tx de-emphasis disabled
1: Tx de-emphasis enabled
BIF_GEN3_EN_A PS_1[1] GPIO2 PCIE Gen3 Enable (NOTE: RESERVED for Thames/Whistler/Seymour) 1
0: GEN3 not supported at power-on
MT41K256M16HA-107G 1: GEN3 supported at power-on
Micron AKD5PGSTL05 *8 4GB
(256M*16) 011 BIF_VGA DIS PS_2[4] GPIO9 VGA Control 0
0: VGA controller capacity enabled
1: VGA controller capacity disabled (for multi-GPU)
ROMIDCFG[2:0] PS_0[3..1] GPIO[13:11] Serial ROM type or Memory Aperture Size Select
If GPIO22 = 0, defines memory aperture size XXX

If GPIO22 = 1, defines ROM type
100 - 512Kbit M25P05A (ST)
101 - 1Mbit M25P10A (ST)
101 - 2Mbit M25P20 (ST)
101 - 4Mbit M25P40 (ST)
101 - 8Mbit M25P80 (ST)
100 - 512Kbit Pm25LV512 (Chingis)
101 - 1Mbit Pm25LV010 (Chingis)
BIOS_ROM_EN PS_2[3] GPIO22 Enable external BIOS ROM device X

0: Disabled
1: Enabled
AUD[1] NA HSYNC 00 - No audio function XX

AUD[0] NA VSYNC 01 - Audio for DP only
10 - Audio for DP and HDMI if dongle is detected
11 - Audio for both DP and HDMI
HDMI must only be enabled on systems that are legally entitled. It is the
responsibility of the system designer to ensure that the system is entitled to
support this feature.
SP : Mars DDR3 Memory TYPE Set CEC_DIS PS_0[4] GENLK_VSYNC Enable CEC function. Reserved for Thames/Whistler/Seymour
0: Disabled
X
1: Enabled
VDDC_CT
R_pu R203 NOTE: ALLOW FOR PULLUP PADS FOR THE RESERVED STRAPS BUT DO NOT INSTALL RESISTOR
EV_SP@0_4 IF THESE GPIOS ARE USEED, THEY MUST KEEP LOW AND NOT CONFLICT DURING RESET
[16] PS_3 RESERVED PS_1[3] GENLK_CLK Reserved 0

RESERVED PS_1[2] GPIO8 Reserved 0
R_pd RESERVED NA GPIO21 Reserved 0
Ca C254 R201 RESERVED NA GENERICC Reserved (for Thames/Whistler/Seymour only) 0
EV@680n/6.3V_4 EV_SP@0_4
AUD_PORT_CONN_PINSTRAP[2] PS_3[5] NA STRAPS TO INDICATE THE NUMBER OF AUDIO CAPABLE DISPLAY OUTPUTS XXX
AUD_PORT_CONN_PINSTRAP[1] PS_3[4] NA 111 = 0 usable endpoints
NA 110 = 1 usable endpoints
AUD_PORT_CONN_PINSTRAP[0] PS_0[5] 101 = 2 usable endpoints
100 = 3 usable endpoints
MLPS Bit Bits [5:1] 011 = 4 usable endpoints
PS_3 00XXX 000 = all endpoints are usable
System Memory Aperture size

MLPS GPIO9 GPIO11 GPIO12 GPIO13
BIOSROM ROMIDCFG0 ROMIDCFG1 ROMIDCFG2
R_pu R_pd Bits [3:1] Ra P/N Ca Bits [5:4] P/N
D
0 128M 0 0 0
NC 4.75K 000 2K CS22002FB19 680nF 00 CH4681K9B00
F
0 256M 1 0 0
8.45K 2K 001 3.24K CS23242FB09 82nF 01 CH3823K1B00
B
0 64M 0 1 0
4.53K 2K 010 3.4K CS23402FB08 10nF 10 CH31003KB11
0 32M 1 1 0 +3V_GFX
6.98K 4.99K 011 4.53K CS24532FB08 NC 11
4.53K 4.99K 100 4.75K CS24752FB12

R589 *EV@10K_4
[16] GPU_HSYNC_COM
3.24K 5.62K 101 4.99K CS24992FB26
R582 *EV@10K_4
[16] GPU_VSYNC_COM
3.4K 1M 110 5.62K CS25622FB18
4.75K NC 111 6.98K CS26982FB01
8.45K CS28452FB12
1M CS51002FB11

PROJECT : ZRI/ZQI
www.vinafix.vn
A1A
Thames_M2/ STRAPS_Thermal
U45E
PART 5 0F 9 +1.8V_GFX
+1.5V_GFX
(2.2A) MEM I/O (440mA)
AC7 VDDR1 NC_PCIE_VDDR AA31 PCIE_VDDR L22 EV@HCB1608KF-181T15_1.5A
AD11 VDDR1 NC_PCIE_VDDR AA32
AF7 VDDR1 NC_PCIE_VDDR AA33
C752 C40 C121 C16 C24 AG10 VDDR1 NC_PCIE_VDDR AA34 C207 C247 C199 C233 C271
[email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 EV@10u/6.3V_6 EV@10u/6.3V_6 AJ7 VDDR1 NC_PCIE_VDDR W30 [email protected]/10V_4 [email protected]/10V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 [email protected]/6.3V_6
AK8 VDDR1 NC_PCIE_VDDR Y31
AL9 VDDR1 NC_BIF_VDDC V28
G11 VDDR1 NC_BIF_VDDC W29
G14 VDDR1 PCIE_PVDD AB37
PCIE
G17 VDDR1
G20 VDDR1 PCIE_VDDC G30
C77 C140 C80 C75 C62 C164 C96 G23 VDDR1 PCIE_VDDC G31 +PCIE_VDDC_GFX
EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 G26 VDDR1 PCIE_VDDC H29 (1.88A)
G29 VDDR1 PCIE_VDDC H30
H10 VDDR1 PCIE_VDDC J29
J7 VDDR1 PCIE_VDDC J30
J9 VDDR1 PCIE_VDDC L28 C171 C170 C172 C193 C168 C285 C296
K11 VDDR1 PCIE_VDDC M28 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 [email protected]/6.3V_6 [email protected]/6.3V_6
K13 VDDR1 PCIE_VDDC N28
C89 C98 C76 C78 K8 VDDR1 PCIE_VDDC R28
[email protected]/10V_4 [email protected]/10V_4 [email protected]/10V_4 [email protected]/10V_4 L12 VDDR1 PCIE_VDDC T28
L16 VDDR1 PCIE_VDDC U28
L21 VDDR1
L23 VDDR1
L26 VDDR1 BIF_VDDC N27 R206 *short_8 +PCIE_VDDC_GFX
BACO
L7 VDDR1 BIF_VDDC T27
+ M11 VDDR1
C67 C97 C90 C189 C138 N11 VDDR1 C286 C155 C156
[email protected]/10V_4 [email protected]/10V_4 [email protected]/10V_4 [email protected]/10V_4 EV@100u/6.3V_3528 P7 VDDR1 VDDC AA15 EV@1u/6.3V_4 [email protected]/6.3V_6 *[email protected]/6.3V_6
CORE
R11 VDDR1 VDDC AA17
U11 VDDR1 VDDC AA20
U7 VDDR1 VDDC AA22
Y11 VDDR1 VDDC AA24
Y7 VDDR1 VDDC AA27
VDDC AB16 +VGPU_CORE
VDDC AB18 (30A)
VDDC AB21
Level translation between core and I/O, VDDC AB23
excluding memory receivers. VDDC_CT LEVEL VDDC AB26
(17mA) TRANSLATION VDDC AB28 C132 C126 C179 C128 C124 C135 C148
+1.8V_GFX L25 VDDC_CT AF26 VDD_CT VDDC AC17 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4
EV@BLM15BD121SN1D_300MA AF27 VDD_CT VDDC AC20
AG26 VDD_CT VDDC AC22
C255 C248 C174 C173 AG27 VDD_CT VDDC AC24
[email protected]/6.3V_6 EV@1u/6.3V_4 EV@1u/6.3V_4 [email protected]/10V_4 VDDC AC27
VDDC AD18
I/O power for 3.3-V pins, such as GPIOs. I/O VDDC AD21
(60mA) AF23 VDDR3 VDDC AD23
+3V_GFX L17 VDDR3 AF24 VDDR3 VDDC AD26
EV@FCM1005KF-221T03_300MA AG23 VDDR3 VDDC AF17 C123 C159 C125 C146 C130 C133 C142 C131 C158 C129
AG24 VDDR3 VDDC AF20 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4
C150 C149 C154 C153 VDDC AF22
[email protected]/6.3V_6 *[email protected]/6.3V_6 EV@1u/6.3V_4 EV@1u/6.3V_4 DVP VDDC AG16
AD12 VDDR4 VDDC AG18
AF11 VDDR4
AF12 VDDR4 VDDC AH22
Power for all DVP pins; DVPDATA_[23:0]—DVO or GPIO. AF13 VDDR4 VDDC AH27
(300mA) VDDC AH28
+1.8V_GFX L53 VDDR4 VDDC M26
EV@FCM1005KF-221T03_300MA AF15 VDDR4 VDDC N24 C176 C137 C145 C122 C144 C116 C120 C139 C141 C147
AG11 VDDR4 VDDC R18 EV@10u/6.3V_6 EV@10u/6.3V_6 EV@10u/6.3V_6 EV@10u/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6
C668 C94 C108 AG13 VDDR4 VDDC R21
[email protected]/6.3V_6 EV@1u/6.3V_4 [email protected]/10V_4 AG15 VDDR4 VDDC R23
VDDC R26
VDDC T17
VDDC T20
VDDC T22
VDDC T24 SP: Thames XT stuff L21,L26 for +VGPU_CORE
VDDC U16 Thames Pro and Mars stuff L3,L4 for +VDDCI_GFX
VDDC U18
C667 VDDC U21
[email protected]/6.3V_6 VDDC U23
VDDC U26
VDDC V17
VDDC V20
VDDC V22
VDDC V24
VDDC V27
VDDC Y16
VDDC Y18
VDDC Y21
VDDC Y23
VDDC Y26 L15 EV@HCB1608KF-121T30_3A +VGPU_CORE
VDDC Y28 L16 EV@HCB1608KF-121T30_3A
(8.8A)
VDDCI AA13 VDDCI
VDDCI AB13
VDDCI AC12
VDDCI AC15 C110 C115 C107 C106
VDDCI AD13 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4
VDDCI AD16
VDDCI M15
VDDCI M16
GPUVDDC/GPUVSS route a differtial pair. VOLTAGE
VDDCI M18
VDDCI M23
SENESE
CORE I/O
VDDCI N13
ISOLATED
R585 *short_4 AF28 FB_VDDC VDDCI N15

[44] GPUVDDC_SENSE
VDDCI N17 C112 C127
VDDCI N20 [email protected]/6.3V_6 [email protected]/6.3V_6
TP22 AG28 FB_VDDCI VDDCI N22
VDDCI R12
VDDCI R13
R584 *short_4 AH29 R16
[44] GPUVSS_SENSE FB_GND VDDCI
VDDCI T12 Quanta Computer Inc.
VDDCI T15
VDDCI V15 PROJECT : ZRI/ZQI
VDDCI Y13
A1A
EV@GPU_M2
Thames_M2/ MainPower
www.vinafix.vn
U45H
PART 8 0F 9
(330mA)
DPAB_VDD10 L54 +PCIE_VDDC_GFX
DP_VDDR DP_VDDC
EV@PBY160808T-501Y-N_1.2A
DP_VDDC AP31 C719 C720 C721
DP_VDDC AP32
DP_VDDC AN33 [email protected]/6.3V_6 EV@1u/6.3V_4 [email protected]/10V_4
DP_VDDC AP33
AN24 DP_VDDR
AP24 DP_VDDR DP_VDDC AP13 (330mA)
AP25 DP_VDDR DP_VDDC AT13 DPCD_VDD10 L14
AP26 DP_VDDR DP_VDDC AP14 EV@PBY160808T-501Y-N_1.2A
AU28 DP_VDDR DP_VDDC AP15 C111 C113 C114
AV29 DP_VDDR
DP_VDDC AL33 [email protected]/6.3V_6 EV@1u/6.3V_4 [email protected]/10V_4
DP_VDDC AM33
AP20 DP_VDDR DP_VDDC AK33
AP21 DP_VDDR DP_VDDC AK34
AP22 DP_VDDR
AP23 DP_VDDR
AU18 DP_VDDR
AV19 DP_VDDR
DP GND
+1.8V_GFX
DP_VSSR AN27
AH34 DP_VDDR DP_VSSR AP27
AJ34 DP_VDDR DP_VSSR AP28
AF34 DP_VDDR DP_VSSR AW24
AG34 DP_VDDR DP_VSSR AW26
(330mA) AM37 DP_VDDR DP_VSSR AN29
L24 EV@PBY160808T-501Y-N_1.2A DPEF_VDD18 AL38 DP_VDDR DP_VSSR AP29
DP_VSSR AP30
DP_VSSR AW30
C272 C230 C246 DP_VSSR AW32
[email protected]/6.3V_6 EV@1u/6.3V_4 [email protected]/10V_4 DP_VSSR AN17
DP_VSSR AP16
DP_VSSR AP17
DP_VSSR AW14
DP_VSSR AW16
DP_VSSR AN19
DP_VSSR AP18
DP_VSSR AP19
CALIBRATION
DP_VSSR AW20
DP_VSSR AW22
DP_VSSR AN34
DP_VSSR AP39
AW28 DPAB_CALR DP_VSSR AR39
DP_VSSR AU37
DP_VSSR AF39
DP_VSSR AH39
AW18 DPCD_CALR DP_VSSR AK39
DP_VSSR AL34
DP_VSSR AV27
DP_VSSR AR28
R588 EV@150/F_4 AM39 DPEF_CALR DP_VSSR AV17
DP_VSSR AR18
DP_VSSR AN38
DP_VSSR AM35
EV@GPU_M2

PROJECT : ZRI/ZQI
A1A
Thames_M2/ DP_Powers
www.vinafix.vn
<VGA>
U45F
PART 6 0F 9
AB39 PCIE_VSS GND A3

E39 PCIE_VSS GND A37
F34 PCIE_VSS GND AA16
F39 PCIE_VSS GND AA18
G33 PCIE_VSS GND AA2
G34 PCIE_VSS GND AA21
H31 PCIE_VSS GND AA23
J31 PCIE_VSS GND AA6
J34 PCIE_VSS GND AB12
K31 PCIE_VSS GND AB15
L31 PCIE_VSS GND AB22
L34 PCIE_VSS GND AB24
M34 PCIE_VSS GND AB27
M39 PCIE_VSS GND AC11
N31 PCIE_VSS GND AC13
N34 PCIE_VSS GND AC16
P31 PCIE_VSS GND AC18
R34 PCIE_VSS GND AC23
T31 PCIE_VSS GND AC26
U31 PCIE_VSS GND AD15
U34 PCIE_VSS GND AD17
V34 PCIE_VSS GND AD20
V39 PCIE_VSS GND AD22
W31 PCIE_VSS GND AD24
W34 PCIE_VSS GND AD27
Y34 PCIE_VSS GND AD9
Y39 PCIE_VSS GND AE2
GND AE6
GND AF10
GND AF16
GND AF18
GND GND AF21
GND AG17
F15 GND GND AG2
F17 GND GND AG20
F19 GND GND AG22
F21 GND GND AG6
F23 GND GND AG9
F25 GND GND AH21
F27 GND GND AJ10
F29 GND GND AJ11
F31 GND GND AJ2
F33 GND GND AJ28
F7 GND GND AJ6
F9 GND GND AK11
G2 GND GND AK31
G6 GND GND AK7
H9 GND GND AL11
J2 GND GND AL14
J27 GND GND AL17
J6 GND GND AL2
J8 GND GND AL20
K14 GND
K7 GND GND AL23
L11 GND GND AL26
L17 GND GND AL32
L2 GND GND AL6
L22 GND GND AL8
L24 GND GND AM11
L6 GND GND AM31
M17 GND GND AM9
M22 GND GND AN11
M24 GND GND AN2
N16 GND GND AN30
N18 GND GND AN6
N2 GND GND AN8
N21 GND GND AP11
N23 GND GND AP7
N26 GND GND AP9
N6 GND GND AR5
R15 GND GND B11
R17 GND GND B13
R2 GND GND B15
R20 GND GND B17
R22 GND GND B19
R24 GND GND B21
R27 GND GND B23
R6 GND GND B25
T11 GND GND B27
T13 GND GND B29
T16 GND GND B31
T18 GND GND B33
T21 GND GND B7
T23 GND GND B9
T26 GND GND C1
U15 GND GND C39
U17 GND GND E35
U2 GND GND E5
U20 GND GND F11
U22 GND GND F13
U24 GND
U27 GND
U6 GND
V11 GND
V16 GND
V18 GND
V21 GND
V23 GND
V26 GND
W2 GND
W6 GND
Y15 GND
Y17 GND
Y20 GND
Y22 GND VSS_MECH A39
Y24 GND VSS_MECH AW1
Y27 GND VSS_MECH AW39
EV@GPU_M2

PROJECT : ZRI/ZQI
A1A
Thames_M2/ GND
www.vinafix.vn
<VGA>
VMB_DQ[63..0]
[24] VMB_DQ[63..0]
VMB_DM[7..0]
[24] VMB_DM[7..0] U45D
U45C
VMB_RDQS[7..0]
[24] VMB_RDQS[7..0] PART 4 0F 9
PART 3 0F 9 VMB_WDQS[7..0]
VMA_DQ[63..0] [24] VMB_WDQS[7..0] GDDR5/DDR3
GDDR5/DDR3 VMB_DQ0 C5 DQB0_0 MAB0_0/MAB_0 P8 VMB_MA0
[23] VMA_DQ[63..0] VMB_MA[15..0]
VMA_DQ0 C37 DQA0_0 MAA0_0/MAA_0 G24 VMA_MA0 VMB_DQ1 C3 DQB0_1 MAB0_1/MAB_1 T9 VMB_MA1
VMA_DM[7..0] [24] VMB_MA[15..0]
VMA_DQ1 C35 DQA0_1 MAA0_1/MAA_1 J23 VMA_MA1 VMB_DQ2 E3 DQB0_2 MAB0_2/MAB_2 P9 VMB_MA2
[23] VMA_DM[7..0]
VMA_DQ2 A35 DQA0_2 MAA0_2/MAA_2 H24 VMA_MA2 VMB_DQ3 E1 DQB0_3 MAB0_3/MAB_3 N7 VMB_MA3
VMA_RDQS[7..0] VMA_DQ3 E34 DQA0_3 MAA0_3/MAA_3 J24 VMA_MA3 VMB_DQ4 F1 DQB0_4 MAB0_4/MAB_4 N8 VMB_MA4
[23] VMA_RDQS[7..0]
VMA_DQ4 G32 DQA0_4 MAA0_4/MAA_4 H26 VMA_MA4 VMB_BA0 VMB_DQ5 F3 DQB0_5 MAB0_5/MAB_5 N9 VMB_MA5
VMA_WDQS[7..0] [24] VMB_BA0
VMA_DQ5 D33 DQA0_5 MAA0_5/MAA_5 J26 VMA_MA5 VMB_BA1 VMB_DQ6 F5 DQB0_6 MAB0_6/MAB_6 U9 VMB_MA6
[23] VMA_WDQS[7..0] [24] VMB_BA1
VMA_DQ6 F32 DQA0_6 MAA0_6/MAA_6 H21 VMA_MA6 VMB_BA2 VMB_DQ7 G4 DQB0_7 MAB0_7/MAB_7 U8 VMB_MA7
[24] VMB_BA2
VMA_DQ7 E32 DQA0_7 MAA0_7/MAA_7 G21 VMA_MA7 VMB_DQ8 H5 DQB0_8 MAB1_0/MAB_8 Y9 VMB_MA8
MEMORY INTERFACE A
VMA_DQ8 D31 DQA0_8 MAA1_0/MAA_8 H19 VMA_MA8 VMB_DQ9 H6 DQB0_9 MAB1_1/MAB_9 W9 VMB_MA9
VMA_MA[15..0] VMA_DQ9 F30 DQA0_9 MAA1_1/MAA_9 H20 VMA_MA9 VMB_DQ10 J4 DQB0_10 MAB1_2/MAB_10 AC8 VMB_MA10
[23] VMA_MA[15..0]
VMA_DQ10 C30 DQA0_10 MAA1_2/MAA_10 L13 VMA_MA10 VMB_DQ11 K6 DQB0_11 MAB1_3/MAB_11 AC9 VMB_MA11
VMA_DQ11 A30 DQA0_11 MAA1_3/MAA_11 G16 VMA_MA11 VMB_DQ12 K5 DQB0_12 MAB1_4/MAB_12 AA7 VMB_MA12
VMA_BA0 VMA_DQ12 F28 DQA0_12 MAA1_4/MAA_12 J16 VMA_MA12 VMB_DQ13 L4 DQB0_13 MAB1_5/BA2 AA8 VMB_BA2
[23] VMA_BA0
VMA_BA1 VMA_DQ13 C28 DQA0_13 MAA1_5/MAA_BA2 H16 VMA_BA2 VMB_DQ14 M6 DQB0_14 MAB1_6/BA0 Y8 VMB_BA0
[23] VMA_BA1
VMA_BA2 VMA_DQ14 A28 DQA0_14 MAA1_6/MAA_BA0 J17 VMA_BA0 VMB_DQ15 M1 DQB0_15 MAB1_7/BA1 AA9 VMB_BA1
[23] VMA_BA2
VMA_DQ15 E28 DQA0_15 MAA1_7/MAA_BA1 H17 VMA_BA1 VMB_DQ16 M3 DQB0_16
MEMORY INTERFACE B
VMA_DQ16 D27 DQA0_16 VMB_DQ17 M5 DQB0_17 WCKB0_0/DQMB_0 H3 VMB_DM0
VMA_DQ17 F26 DQA0_17 WCKA0_0/DQMA_0 A32 VMA_DM0 VMB_DQ18 N4 DQB0_18 WCKB0B_0/DQMB_1 H1 VMB_DM1
VMA_DQ18 C26 DQA0_18 WCKA0B_0/DQMA_1 C32 VMA_DM1 VMB_DQ19 P6 DQB0_19 WCKB0_1/DQMB_2 T3 VMB_DM2
VMA_DQ19 A26 DQA0_19 WCKA0_1/DQMA_2 D23 VMA_DM2 VMB_DQ20 P5 DQB0_20 WCKB0B_1/DQMB_3 T5 VMB_DM3
VMA_DQ20 F24 DQA0_20 WCKA0B_1/DQMA_3 E22 VMA_DM3 VMB_DQ21 R4 DQB0_21 WCKB1_0/DQMB_4 AE4 VMB_DM4
VMA_DQ21 C24 DQA0_21 WCKA1_0/DQMA_4 C14 VMA_DM4 VMB_DQ22 T6 DQB0_22 WCKB1B_0/DQMB_5 AF5 VMB_DM5
VMA_DQ22 A24 DQA0_22 WCKA1B_0/DQMA_5 A14 VMA_DM5 VMB_DQ23 T1 DQB0_23 WCKB1_1/DQMB_6 AK6 VMB_DM6
VMA_DQ23 E24 DQA0_23 WCKA1_1/DQMA_6 E10 VMA_DM6 VMB_DQ24 U4 DQB0_24 WCKB1B_1/DQMB_7 AK5 VMB_DM7
VMA_DQ24 C22 DQA0_24 WCKA1B_1/DQMA_7 D9 VMA_DM7 VMB_DQ25 V6 DQB0_25
VMA_DQ25 A22 DQA0_25 VMB_DQ26 V1 DQB0_26 EDCB0_0/QSB_0 F6 VMB_RDQS0
VMA_DQ26 F22 DQA0_26 EDCA0_0/QSA_0 C34 VMA_RDQS0 VMB_DQ27 V3 DQB0_27 EDCB0_1/QSB_1 K3 VMB_RDQS1
VMA_DQ27 D21 DQA0_27 EDCA0_1/QSA_1 D29 VMA_RDQS1 VMB_DQ28 Y6 DQB0_28 EDCB0_2/QSB_2 P3 VMB_RDQS2
VMA_DQ28 A20 DQA0_28 EDCA0_2/QSA_2 D25 VMA_RDQS2 VMB_DQ29 Y1 DQB0_29 EDCB0_3/QSB_3 V5 VMB_RDQS3
VMA_DQ29 F20 DQA0_29 EDCA0_3/QSA_3 E20 VMA_RDQS3 VMB_DQ30 Y3 DQB0_30 EDCB1_0/QSB_4 AB5 VMB_RDQS4
VMA_DQ30 D19 DQA0_30 EDCA1_0/QSA_4 E16 VMA_RDQS4 VMB_DQ31 Y5 DQB0_31 EDCB1_1/QSB_5 AH1 VMB_RDQS5
VMA_DQ31 E18 DQA0_31 EDCA1_1/QSA_5 E12 VMA_RDQS5 VMB_DQ32 AA4 DQB1_0 EDCB1_2/QSB_6 AJ9 VMB_RDQS6
VMA_DQ32 C18 DQA1_0 EDCA1_2/QSA_6 J10 VMA_RDQS6 VMB_DQ33 AB6 DQB1_1 EDCB1_3/QSB_7 AM5 VMB_RDQS7
VMA_DQ33 A18 DQA1_1 EDCA1_3/QSA_7 D7 VMA_RDQS7 VMB_DQ34 AB1 DQB1_2
VMA_DQ34 F18 DQA1_2 VMB_DQ35 AB3 DQB1_3 DDBIB0_0/QSB_0B G7 VMB_WDQS0
VMA_DQ35 D17 DQA1_3 DDBIA0_0/QSA_0B A34 VMA_WDQS0 VMB_DQ36 AD6 DQB1_4 DDBIB0_1/QSB_1B K1 VMB_WDQS1
VMA_DQ36 A16 DQA1_4 DDBIA0_1/QSA_1B E30 VMA_WDQS1 VMB_DQ37 AD1 DQB1_5 DDBIB0_2/QSB_2B P1 VMB_WDQS2
VMA_DQ37 F16 DQA1_5 DDBIA0_2/QSA_2B E26 VMA_WDQS2 VMB_DQ38 AD3 DQB1_6 DDBIB0_3/QSB_3B W4 VMB_WDQS3
VMA_DQ38 D15 DQA1_6 DDBIA0_3/QSA_3B C20 VMA_WDQS3 VMB_DQ39 AD5 DQB1_7 DDBIB1_0/QSB_4B AC4 VMB_WDQS4
VMA_DQ39 E14 DQA1_7 DDBIA1_0/QSA_4B C16 VMA_WDQS4 VMB_DQ40 AF1 DQB1_8 DDBIB1_1/QSB_5B AH3 VMB_WDQS5
VMA_DQ40 F14 DQA1_8 DDBIA1_1/QSA_5B C12 VMA_WDQS5 VMB_DQ41 AF3 DQB1_9 DDBIB1_2/QSB_6B AJ8 VMB_WDQS6
VMA_DQ41 D13 DQA1_9 DDBIA1_2/QSA_6B J11 VMA_WDQS6 VMB_DQ42 AF6 DQB1_10 DDBIB1_3/QSB_7B AM3 VMB_WDQS7
VMA_DQ42 F12 DQA1_10 DDBIA1_3/QSA_7B F8 VMA_WDQS7 VMB_DQ43 AG4 DQB1_11
VMA_DQ43 A12 DQA1_11 VMB_DQ44 AH5 DQB1_12 ADBIB0/ODTB0 T7 VMB_ODT0 [24]
VMA_DQ44 D11 DQA1_12 ADBIA0/ODTA0 J21 VMB_DQ45 AH6 DQB1_13 ADBIB1/ODTB1 W7
VMA_ODT0 [23] VMB_ODT1 [24]
VMA_DQ45 F10 DQA1_13 ADBIA1/ODTA1 G19 VMB_DQ46 AJ4 DQB1_14
VMA_ODT1 [23]
VMA_DQ46 A10 DQA1_14 VMB_DQ47 AK3 DQB1_15 CLKB0 L9 VMB_CLK0
VMB_CLK0 [24]
VMA_DQ47 C10 DQA1_15 CLKA0 H27 VMA_CLK0 VMB_DQ48 AF8 DQB1_16 CLKB0B L8 VMB_CLK0#
VMA_CLK0 [23] VMB_CLK0# [24]
VMA_DQ48 G13 DQA1_16 CLKA0B G27 VMA_CLK0# VMB_DQ49 AF9 DQB1_17
VMA_CLK0# [23]
VMA_DQ49 H13 DQA1_17 VMB_DQ50 AG8 DQB1_18 CLKB1 AD8 VMB_CLK1 VMB_CLK1 [24]
VMA_DQ50 J13 DQA1_18 CLKA1 J14 VMA_CLK1 VMB_DQ51 AG7 DQB1_19 CLKB1B AD7 VMB_CLK1#
VMA_CLK1 [23] VMB_CLK1# [24]
VMA_DQ51 H11 DQA1_19 CLKA1B H14 VMA_CLK1# VMB_DQ52 AK9 DQB1_20
VMA_CLK1# [23]
VMA_DQ52 G10 DQA1_20 VMB_DQ53 AL7 DQB1_21 RASB0B T10 VMB_RAS0# VMB_RAS0# [24]
Place MVREF dividers and Caps close to ASIC VMA_DQ53 G8 DQA1_21 RASA0B K23 VMA_RAS0# SP : Thames Pro 64bit sku not stuff VMB_DQ54 AM8 DQB1_22 RASB1B Y10 VMB_RAS1#
VMA_RAS0# [23] VMB_RAS1# [24]
VMA_DQ54 K9 DQA1_22 RASA1B K19 VMA_RAS1# VMB_DQ55 AM7 DQB1_23
VMA_RAS1# [23]
VMA_DQ55 K10 DQA1_23 VMB_DQ56 AK1 DQB1_24 CASB0B W10 VMB_CAS0# VMB_CAS0# [24]
VMA_DQ56 G9 DQA1_24 CASA0B K20 VMA_CAS0# VMB_DQ57 AL4 DQB1_25 CASB1B AA10 VMB_CAS1#
VMA_CAS0# [23] VMB_CAS1# [24]
+1.5V_GFX VMA_DQ57 A8 DQA1_25 CASA1B K17 VMA_CAS1# +1.5V_GFX VMB_DQ58 AM6 DQB1_26
VMA_CAS1# [23]
VMA_DQ58 C8 DQA1_26 VMB_DQ59 AM1 DQB1_27 CSB0B_0 P10 VMB_CS0# VMB_CS0# [24]
(0.7*VDDR1) VMA_DQ59 E8 DQA1_27 CSA0B_0 K24 VMA_CS0# (0.7*VDDR1) VMB_DQ60 AN4 DQB1_28 CSB0B_1 L10
VMA_CS0# [23]
VMA_DQ60 A6 DQA1_28 CSA0B_1 K27 VMB_DQ61 AP3 DQB1_29
VMA_DQ61 C6 DQA1_29 VMB_DQ62 AP1 DQB1_30 CSB1B_0 AD10 VMB_CS1# VMB_CS1# [24]
R199 VMA_DQ62 E6 DQA1_30 CSA1B_0 M13 VMA_CS1# R74 VMB_DQ63 AP5 DQB1_31 CSB1B_1 AC10
VMA_CS1# [23]
[email protected]/F_4 VMA_DQ63 A5 DQA1_31 CSA1B_1 K16 [email protected]/F_4
CKEB0 U10 VMB_CKE0 VMB_CKE0 [24]
MVREFDA L18 MVREFDA CKEA0 K21 VMA_CKE0 MVREFDB Y12 MVREFDB CKEB1 AA11 VMB_CKE1
VMA_CKE0 [23] VMB_CKE1 [24]
MVREFSA L20 MVREFSA CKEA1 J20 VMA_CKE1 MVREFSB AA12 MVREFSB
VMA_CKE1 [23]
WEB0B N10 VMB_WE0# VMB_WE0# [24]
L27 NC_MEM_CALRN0 WEA0B K26 VMA_WE0# VMA_WE0# [23] WEB1B AB11 VMB_WE1# VMB_WE1# [24]
R197 C241 N12 NC_MEM_CALRN1 WEA1B L15 VMA_WE1# VMA_WE1# [23]
R86 C105
EV@100/F_4 EV@1u/6.3V_4 AG12 NC_MEM_CALRN2 EV_128@100/F_4 EV_128@1u/6.3V_4
MAB0_8/MAB_13 T8 VMB_MA13
M12 NC_MEM_CALRP1 MAA0_8/MAA_13 H23 VMA_MA13 MAB1_8/MAB_14 W8 VMB_MA14
R182 EV_SP@120/F_4 M27 MEM_CALRP0 MAA1_8/MAA_14 J19 VMA_MA14 MAB0_9/MAB_15 U12 VMB_MA15
AH12 MEM_CALRP2 MAA0_9/MAA_15 M21 VMA_MA15 MAB1_9/RSVD V12
MAA1_9/RSVD M20
+1.5V_GFX +1.5V_GFX DRAM_RST AH11 GPU_DRAM_RST
(0.7*VDDR1) (0.7*VDDR1)
EV@GPU_M2
R198 R80
[email protected]/F_4 EV@GPU_M2 [email protected]/F_4
SP : Thames Pro,XT R=240ohm(CS12402FB03)
Mars R=120ohm(CS11202FB11)
R196 C240
Ball Name Thames Mars R98 C104
EV@100/F_4 EV@1u/6.3V_4 EV_128@100/F_4 EV_128@1u/6.3V_4
MEM_CALRN0 240ohm X
MEM_CALRN1 X X
25mm (max) 5mm (max) 25mm (max)
MEM_CALRN2 240ohm X Place MVREF dividers and Caps close to ASIC

GPU_DRAM_RST R96 EV@10/F_4 R97 EV@51/F_4
MEM_RST# [23,24]
MEM_CALRP0 240ohm 120ohm
C56
MEM_CALRP1 X X R95
[email protected]/F_4 EV@120p/50V_4
MEM_CALRP2 240ohm X
Place all these componets very close to GPU (within 25mm)

and keep all components close to each other
** This basic topology should be used for DRAM_RAT for DDR3/GDDR5
These Capacitors and Resistor values arre an example only

The series R and || cap values will depend on the DRAM loads
and will have to be calculated for differrent Memory, DRAM loads and board
to pass Reset Signal Spec

PROJECT : ZRI/ZQI
www.vinafix.vn
A1A
Thames_M2/ MEM Interface
5 4 3 2 1
[22] VMA_DQ[63..0]
[22] VMA_DM[7..0]
VMA_DQ[63..0]
VMA_DM[7..0]
CHANNEL A: 512MB DDR3 (64M*16*4pcs)
VMA_RDQS[7..0] QSA[7..0]
[22] VMA_RDQS[7..0]
VMA_WDQS[7..0] QSA#[7..0]
[22] VMA_WDQS[7..0]
U41 U11
VMA_MA[15..0] U16 U47
[22] VMA_MA[15..0]
VREFC_VMA3 M8 E3 VMA_DQ49 VREFC_VMA4 M8 E3 VMA_DQ60
VREFC_VMA1 M8 VMA_DQ14 VREFC_VMA2 VMA_DQ3 VREFD_VMA3 VREFCA DQL0 VMA_DQ53 VREFD_VMA4 VREFCA DQL0 VMA_DQ56
VREFCA DQL0 E3 M8 VREFCA DQL0 E3 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
VREFD_VMA1 H1 F7 VMA_DQ10 VREFD_VMA2 H1 F7 VMA_DQ5 F2 VMA_DQ51 F2 VMA_DQ63
VREFDQ DQL1 VMA_DQ13 VREFDQ DQL1 VMA_DQ2 VMA_MA0 DQL2 VMA_DQ55 VMA_MA0 DQL2 VMA_DQ59
DQL2 F2 DQL2 F2 N3 A0 DQL3 F8 N3 A0 DQL3 F8
VMA_MA0 N3 F8 VMA_DQ8 VMA_MA0 N3 F8 VMA_DQ7 VMA_MA1 P7 H3 VMA_DQ50 VMA_MA1 P7 H3 VMA_DQ62
[22] VMA_MA0 A0 DQL3 A0 DQL3 A1 DQL4 A1 DQL4
VMA_MA1 P7 H3 VMA_DQ12 VMA_MA1 P7 H3 VMA_DQ1 VMA_MA2 P3 H8 VMA_DQ54 VMA_MA2 P3 H8 VMA_DQ57
VMA_MA2 P3 H8 VMA_DQ9 VMA_MA2 P3 H8 VMA_DQ4 VMA_MA3 N2 G2 VMA_DQ48 VMA_MA3 N2 G2 VMA_DQ61
VMA_MA3 N2 G2 VMA_DQ15 VMA_MA3 N2 G2 VMA_DQ0 VMA_MA4 P8 H7 VMA_DQ52 VMA_MA4 P8 H7 VMA_DQ58
D [22] VMA_MA3 A3 DQL6 A3 DQL6 A4 DQL7 A4 DQL7 D
VMA_MA4 P8 H7 VMA_DQ11 VMA_MA4 P8 H7 VMA_DQ6 VMA_MA5 P2 VMA_MA5 P2
[22] VMA_MA4 A4 DQL7 A4 DQL7 A5 A5
VMA_MA5 P2 VMA_MA5 P2 VMA_MA6 R8 VMA_MA6 R8
[22] VMA_MA5 A5 A5 A6 A6
VMA_MA6 R8 VMA_MA6 R8 VMA_MA7 R2 D7 VMA_DQ37 VMA_MA7 R2 D7 VMA_DQ40
[22] VMA_MA6 A6 A6 A7 DQU0 A7 DQU0
VMA_MA7 R2 D7 VMA_DQ24 VMA_MA7 R2 D7 VMA_DQ20 VMA_MA8 T8 C3 VMA_DQ32 VMA_MA8 T8 C3 VMA_DQ46
[22] VMA_MA7 A7 DQU0 A7 DQU0 A8 DQU1 A8 DQU1
VMA_MA8 T8 C3 VMA_DQ29 VMA_MA8 T8 C3 VMA_DQ19 VMA_MA9 R3 C8 VMA_DQ39 VMA_MA9 R3 C8 VMA_DQ42
VMA_MA9 R3 C8 VMA_DQ26 VMA_MA9 R3 C8 VMA_DQ23 VMA_MA10 L7 C2 VMA_DQ34 VMA_MA10 L7 C2 VMA_DQ44
[22] VMA_MA9 A9 DQU2 A9 DQU2 A10/AP DQU3 A10/AP DQU3
VMA_MA10 L7 C2 VMA_DQ31 VMA_MA10 L7 C2 VMA_DQ17 VMA_MA11 R7 A7 VMA_DQ36 VMA_MA11 R7 A7 VMA_DQ43
[22] VMA_MA10 A10/AP DQU3 A10/AP DQU3 A11 DQU4 A11 DQU4
VMA_MA11 R7 A7 VMA_DQ25 VMA_MA11 R7 A7 VMA_DQ22 VMA_MA12 N7 A2 VMA_DQ33 VMA_MA12 N7 A2 VMA_DQ45
[22] VMA_MA11 A11 DQU4 A11 DQU4 A12/BC DQU5 A12/BC DQU5
VMA_MA12 N7 A2 VMA_DQ30 VMA_MA12 N7 A2 VMA_DQ16 VMA_MA13 T3 B8 VMA_DQ38 VMA_MA13 T3 B8 VMA_DQ41
[22] VMA_MA12 A12/BC DQU5 A12/BC DQU5 A13 DQU6 A13 DQU6
VMA_MA13 T3 B8 VMA_DQ27 VMA_MA13 T3 B8 VMA_DQ21 VMA_MA14 T7 A3 VMA_DQ35 VMA_MA14 T7 A3 VMA_DQ47
VMA_MA14 T7 A3 VMA_DQ28 VMA_MA14 T7 A3 VMA_DQ18 VMA_MA15 M7 VMA_MA15 M7
[22] VMA_MA14 A14 DQU7 A14 DQU7 A15 A15
VMA_MA15 M7 VMA_MA15 M7 +1.5V_GFX +1.5V_GFX
[22] VMA_MA15 A15 A15
+1.5V_GFX +1.5V_GFX
VMA_BA0 M2 B2 VMA_BA0 M2 B2
VMA_BA0 VMA_BA0 VMA_BA1 BA0 VDD#B2 VMA_BA1 BA0 VDD#B2
[22] VMA_BA0 M2 BA0 VDD#B2 B2 M2 BA0 VDD#B2 B2 N8 BA1 VDD#D9 D9 N8 BA1 VDD#D9 D9
VMA_BA1 N8 D9 VMA_BA1 N8 D9 VMA_BA2 M3 G7 VMA_BA2 M3 G7
[22] VMA_BA1 BA1 VDD#D9 BA1 VDD#D9 BA2 VDD#G7 BA2 VDD#G7
VMA_BA2 M3 G7 VMA_BA2 M3 G7 K2 K2
[22] VMA_BA2 BA2 VDD#G7 BA2 VDD#G7 VDD#K2 VDD#K2
VDD#K8 K8 VDD#K8 K8 VDD#N1 N1 VDD#N1 N1
N1 N1 VMA_CLK1 J7 N9 VMA_CLK1 J7 N9
VDD#N1 VDD#N1 [22] VMA_CLK1 CK VDD#N9 CK VDD#N9
VMA_CLK0 J7 N9 VMA_CLK0 J7 N9 VMA_CLK1# K7 R1 VMA_CLK1# K7 R1
[22] VMA_CLK0 CK VDD#N9 CK VDD#N9 [22] VMA_CLK1# CK VDD#R1 CK VDD#R1
VMA_CLK0# K7 R1 VMA_CLK0# K7 R1 VMA_CKE1 K9 R9 VMA_CKE1 K9 R9
[22] VMA_CLK0# CK VDD#R1 CK VDD#R1 [22] VMA_CKE1 CKE VDD#R9 CKE VDD#R9
VMA_CKE0 K9 R9 VMA_CKE0 K9 R9 +1.5V_GFX +1.5V_GFX
[22] VMA_CKE0 CKE VDD#R9 CKE VDD#R9
+1.5V_GFX +1.5V_GFX
VMA_ODT1 K1 A1 VMA_ODT1 K1 A1
[22] VMA_ODT1 ODT VDDQ#A1 ODT VDDQ#A1
VMA_ODT0 K1 A1 VMA_ODT0 K1 A1 VMA_CS1# L2 A8 VMA_CS1# L2 A8
[22] VMA_ODT0 ODT VDDQ#A1 ODT VDDQ#A1 [22] VMA_CS1# CS VDDQ#A8 CS VDDQ#A8
VMA_CS0# L2 A8 VMA_CS0# L2 A8 VMA_RAS1# J3 C1 VMA_RAS1# J3 C1
[22] VMA_CS0# CS VDDQ#A8 CS VDDQ#A8 [22] VMA_RAS1# RAS VDDQ#C1 RAS VDDQ#C1
VMA_RAS0# J3 C1 VMA_RAS0# J3 C1 VMA_CAS1# K3 C9 VMA_CAS1# K3 C9
[22] VMA_RAS0# RAS VDDQ#C1 RAS VDDQ#C1 [22] VMA_CAS1# CAS VDDQ#C9 CAS VDDQ#C9
VMA_CAS0# K3 C9 VMA_CAS0# K3 C9 VMA_WE1# L3 D2 VMA_WE1# L3 D2
[22] VMA_CAS0# CAS VDDQ#C9 CAS VDDQ#C9 [22] VMA_WE1# WE VDDQ#D2 WE VDDQ#D2
VMA_WE0# L3 D2 VMA_WE0# L3 D2 E9 E9
[22] VMA_WE0# WE VDDQ#D2 WE VDDQ#D2 VDDQ#E9 VDDQ#E9
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#F1 F1 VDDQ#F1 F1
F1 F1 VMA_RDQS6 F3 H2 VMA_RDQS7 F3 H2
VMA_RDQS1 VDDQ#F1 VMA_RDQS0 VDDQ#F1 VMA_RDQS4 DQSL VDDQ#H2 VMA_RDQS5 DQSL VDDQ#H2
F3 DQSL VDDQ#H2 H2 F3 DQSL VDDQ#H2 H2 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9
VMA_RDQS3 C7 H9 VMA_RDQS2 C7 H9
DQSU VDDQ#H9 DQSU VDDQ#H9
VMA_DM6 E7 A9 VMA_DM7 E7 A9
VMA_DM1 VMA_DM0 VMA_DM4 DML VSS#A9 VMA_DM5 DML VSS#A9
E7 DML VSS#A9 A9 E7 DML VSS#A9 A9 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3
C VMA_DM3 D3 B3 VMA_DM2 D3 B3 E1 E1 C
DMU VSS#B3 DMU VSS#B3 VSS#E1 VSS#E1
VSS#E1 E1 VSS#E1 E1 VSS#G8 G8 VSS#G8 G8
G8 G8 VMA_WDQS6 G3 J2 VMA_WDQS7 G3 J2
VMA_WDQS1 VSS#G8 VMA_WDQS0 VSS#G8 VMA_WDQS4 DQSL VSS#J2 VMA_WDQS5 DQSL VSS#J2
G3 DQSL VSS#J2 J2 G3 DQSL VSS#J2 J2 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8
VMA_WDQS3 B7 J8 VMA_WDQS2 B7 J8 M1 M1
DQSU VSS#J8 DQSU VSS#J8 VSS#M1 VSS#M1
VSS#M9 M9 VSS#M9 M9 VSS#P1 P1 VSS#P1 P1
P1 P1 MEM_RST# T2 P9 MEM_RST# T2 P9
MEM_RST# VSS#P1 MEM_RST# VSS#P1 RESET VSS#P9 RESET VSS#P9
[22,24] MEM_RST# T2 RESET VSS#P9 P9 T2 RESET VSS#P9 P9 VSS#T1 T1 VSS#T1 T1
T1 T1 VMA_ZQ3 L8 T9 VMA_ZQ4 L8 T9
VMA_ZQ1 VSS#T1 VMA_ZQ2 VSS#T1 ZQ VSS#T9 ZQ VSS#T9
L8 ZQ VSS#T9 T9 L8 ZQ VSS#T9 T9
VSSQ#B1 B1 VSSQ#B1 B1
B9 B9 R523 D1 R539 D1
R176 VSSQ#B9 R557 VSSQ#B9 EV@243/F_4 VSSQ#D1 EV@243/F_4 VSSQ#D1
VSSQ#D1 D1 VSSQ#D1 D1 VSSQ#D8 D8 VSSQ#D8 D8
EV@243/F_4 D8 EV@243/F_4 D8 E2 E2
VSSQ#D8 VSSQ#D8 VSSQ#E2 VSSQ#E2
VSSQ#E2 E2 VSSQ#E2 E2 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8
J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9
L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9
100-BALL 100-BALL
100-BALL 100-BALL SDRAM DDR3 SDRAM DDR3
SDRAM DDR3 SDRAM DDR3 EV@VRAM _DDR3 EV@VRAM _DDR3
EV@VRAM _DDR3 EV@VRAM _DDR3
D AKD5MGWTW17 D AKD5MGWTW17
F AKD5MZDTW05 F AKD5MZDTW05
Group-A0 VREF Group-A1 VREF

+1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX
B B
R172 R566 R561 R579

[email protected]/F_4 [email protected]/F_4 [email protected]/F_4 [email protected]/F_4 R526 R560 R553 R130
[email protected]/F_4 [email protected]/F_4 [email protected]/F_4 [email protected]/F_4
VREFC_VMA1 VREFD_VMA1 VREFC_VMA2 VREFD_VMA2

VREFC_VMA3 VREFD_VMA3 VREFC_VMA4 VREFD_VMA4
R173 C160 R567 C712 R562 C706 R580 C734

R527 C670 R556 C700 R554 C701 R128 C79
[email protected]/F_4 [email protected]/10V_4 [email protected]/F_4 [email protected]/10V_4 [email protected]/F_4 [email protected]/10V_4 [email protected]/F_4 [email protected]/10V_4
Group-A0 decoupling CAP Group-A1 decoupling CAP

MEM_A0 CLK
MEM_A1 CLK
+1.5V_GFX +1.5V_GFX
VMA_CLK0 VMA_CLK1
VMA_CLK0# VMA_CLK1#
C726 C243 C654 C228 C219 C744 C751 C742 C643 C699 C117 C53 C42 C72 C630 C639
EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4
R572 R575
[email protected]/F_4 [email protected]/F_4 R520 R517
[email protected]/F_4 [email protected]/F_4
+1.5V_GFX +1.5V_GFX
C728
[email protected]/25V_4 C722 C210 C738 C183 C653 C750 C253 C196 C633 C636 C697 C46 C268 C118 C70 C635 C662
A EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 EV@1u/6.3V_4 [email protected]/25V_4 A
+1.5V_GFX +1.5V_GFX EV_SP@ : Thames Pro,XT R=56ohm(CS05602FB15)

EV_SP@ : Thames Pro,XT R=56ohm(CS05602FB15) Mars R=40.2ohm(CS04022FB28)
Mars R=40.2ohm(CS04022FB28)
C716 C746 C282 C671 C749 C651 C645 C640 C60 C51
[email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 Quanta Computer Inc.
PROJECT : ZRI/ZQI
A1A
Thames_M2/VRAM_A
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
[22] VMB_DQ[63..0]
VMB_DQ[63..0] CHANNEL B: 512MB DDR3 (64M*16*4pcs)
VMB_DM[7..0]
[22] VMB_DM[7..0]
[22] VMB_RDQS[7..0]
VMB_RDQS[7..0] QSA[7..0] EV_128@ and EV_128SP@ : Thames Pro(64bit) sku not stuff
VMB_WDQS[7..0] QSA#[7..0]
[22] VMB_WDQS[7..0]
U33 U1 U2 U34
VMB_MA[15..0]
[22] VMB_MA[15..0]
VREFC_VMB1 M8 E3 VMB_DQ3 VREFC_VMB2 M8 E3 VMB_DQ11 VREFC_VMB3 M8 E3 VMB_DQ53 VREFC_VMB4 M8 E3 VMB_DQ59
VREFD_VMB1 VREFCA DQL0 VMB_DQ5 VREFD_VMB2 VREFCA DQL0 VMB_DQ12 VREFD_VMB3 VREFCA DQL0 VMB_DQ49 VREFD_VMB4 VREFCA DQL0 VMB_DQ61
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 VMB_DQ1 F2 VMB_DQ15 F2 VMB_DQ54 F2 VMB_DQ58
VMB_MA0 DQL2 VMB_DQ4 VMB_MA0 DQL2 VMB_DQ8 VMB_MA0 DQL2 VMB_DQ50 VMB_MA0 DQL2 VMB_DQ60
[22] VMB_MA0 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
VMB_MA1 P7 H3 VMB_DQ2 VMB_MA1 P7 H3 VMB_DQ14 VMB_MA1 P7 H3 VMB_DQ55 VMB_MA1 P7 H3 VMB_DQ57
[22] VMB_MA1 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
VMB_MA3 N2 G2 VMB_DQ0 VMB_MA3 N2 G2 VMB_DQ13 VMB_MA3 N2 G2 VMB_DQ52 VMB_MA3 N2 G2 VMB_DQ56
D [22] VMB_MA3 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6 D
VMB_MA5 P2 VMB_MA5 P2 VMB_MA5 P2 VMB_MA5 P2
[22] VMB_MA5 A5 A5 A5 A5
VMB_MA6 R8 VMB_MA6 R8 VMB_MA6 R8 VMB_MA6 R8
[22] VMB_MA6 A6 A6 A6 A6
VMB_MA7 R2 D7 VMB_DQ22 VMB_MA7 R2 D7 VMB_DQ28 VMB_MA7 R2 D7 VMB_DQ42 VMB_MA7 R2 D7 VMB_DQ38
[22] VMB_MA7 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
VMB_MA8 T8 C3 VMB_DQ18 VMB_MA8 T8 C3 VMB_DQ30 VMB_MA8 T8 C3 VMB_DQ46 VMB_MA8 T8 C3 VMB_DQ32
VMB_MA9 R3 C8 VMB_DQ23 VMB_MA9 R3 C8 VMB_DQ25 VMB_MA9 R3 C8 VMB_DQ43 VMB_MA9 R3 C8 VMB_DQ36
VMB_MA10 L7 C2 VMB_DQ19 VMB_MA10 L7 C2 VMB_DQ29 VMB_MA10 L7 C2 VMB_DQ44 VMB_MA10 L7 C2 VMB_DQ33
[22] VMB_MA10 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
VMB_MA11 R7 A7 VMB_DQ20 VMB_MA11 R7 A7 VMB_DQ31 VMB_MA11 R7 A7 VMB_DQ40 VMB_MA11 R7 A7 VMB_DQ37
VMB_MA12 N7 A2 VMB_DQ17 VMB_MA12 N7 A2 VMB_DQ27 VMB_MA12 N7 A2 VMB_DQ45 VMB_MA12 N7 A2 VMB_DQ35
[22] VMB_MA12 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
VMB_MA13 T3 B8 VMB_DQ21 VMB_MA13 T3 B8 VMB_DQ24 VMB_MA13 T3 B8 VMB_DQ41 VMB_MA13 T3 B8 VMB_DQ39
VMB_MA14 T7 A3 VMB_DQ16 VMB_MA14 T7 A3 VMB_DQ26 VMB_MA14 T7 A3 VMB_DQ47 VMB_MA14 T7 A3 VMB_DQ34
VMB_MA15 M7 VMB_MA15 M7 VMB_MA15 M7 VMB_MA15 M7
[22] VMB_MA15 A15 A15 A15 A15
VMB_BA0 M2 B2 VMB_BA0 M2 B2 VMB_BA0 M2 B2 VMB_BA0 M2 B2

[22] VMB_BA0 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
VMB_BA1 N8 D9 VMB_BA1 N8 D9 VMB_BA1 N8 D9 VMB_BA1 N8 D9
[22] VMB_BA1 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
VMB_BA2 M3 G7 VMB_BA2 M3 G7 VMB_BA2 M3 G7 VMB_BA2 M3 G7
[22] VMB_BA2 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VMB_CLK0 J7 N9 VMB_CLK0 J7 N9 VMB_CLK1 J7 N9 VMB_CLK1 J7 N9
[22] VMB_CLK0 CK VDD#N9 CK VDD#N9 [22] VMB_CLK1 CK VDD#N9 CK VDD#N9
VMB_CLK0# K7 R1 VMB_CLK0# K7 R1 VMB_CLK1# K7 R1 VMB_CLK1# K7 R1
[22] VMB_CLK0# CK VDD#R1 CK VDD#R1 [22] VMB_CLK1# CK VDD#R1 CK VDD#R1
VMB_CKE0 K9 R9 VMB_CKE0 K9 R9 VMB_CKE1 K9 R9 VMB_CKE1 K9 R9
[22] VMB_CKE0 CKE VDD#R9 CKE VDD#R9 [22] VMB_CKE1 CKE VDD#R9 CKE VDD#R9
VMB_ODT0 K1 A1 VMB_ODT0 K1 A1 VMB_ODT1 K1 A1 VMB_ODT1 K1 A1

[22] VMB_ODT0 ODT VDDQ#A1 ODT VDDQ#A1 [22] VMB_ODT1 ODT VDDQ#A1 ODT VDDQ#A1
VMB_CS0# L2 A8 VMB_CS0# L2 A8 VMB_CS1# L2 A8 VMB_CS1# L2 A8
[22] VMB_CS0# CS VDDQ#A8 CS VDDQ#A8 [22] VMB_CS1# CS VDDQ#A8 CS VDDQ#A8
VMB_RAS0# J3 C1 VMB_RAS0# J3 C1 VMB_RAS1# J3 C1 VMB_RAS1# J3 C1
[22] VMB_RAS0# RAS VDDQ#C1 RAS VDDQ#C1 [22] VMB_RAS1# RAS VDDQ#C1 RAS VDDQ#C1
VMB_CAS0# K3 C9 VMB_CAS0# K3 C9 VMB_CAS1# K3 C9 VMB_CAS1# K3 C9
[22] VMB_CAS0# CAS VDDQ#C9 CAS VDDQ#C9 [22] VMB_CAS1# CAS VDDQ#C9 CAS VDDQ#C9
VMB_WE0# L3 D2 VMB_WE0# L3 D2 VMB_WE1# L3 D2 VMB_WE1# L3 D2
[22] VMB_WE0# WE VDDQ#D2 WE VDDQ#D2 [22] VMB_WE1# WE VDDQ#D2 WE VDDQ#D2
VMB_RDQS0 F3 H2 VMB_RDQS1 F3 H2 VMB_RDQS6 F3 H2 VMB_RDQS7 F3 H2
VMB_RDQS2 DQSL VDDQ#H2 VMB_RDQS3 DQSL VDDQ#H2 VMB_RDQS5 DQSL VDDQ#H2 VMB_RDQS4 DQSL VDDQ#H2
C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9
VMB_DM0 E7 A9 VMB_DM1 E7 A9 VMB_DM6 E7 A9 VMB_DM7 E7 A9

VMB_DM2 DML VSS#A9 VMB_DM3 DML VSS#A9 VMB_DM5 DML VSS#A9 VMB_DM4 DML VSS#A9
C D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 C

VMB_WDQS0 G3 J2 VMB_WDQS1 G3 J2 VMB_WDQS6 G3 J2 VMB_WDQS7 G3 J2
VMB_WDQS2 DQSL VSS#J2 VMB_WDQS3 DQSL VSS#J2 VMB_WDQS5 DQSL VSS#J2 VMB_WDQS4 DQSL VSS#J2
MEM_RST# T2 P9 MEM_RST# T2 P9 MEM_RST# T2 P9 MEM_RST# T2 P9
[22,23] MEM_RST# RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
VMB_ZQ1 L8 T9 VMB_ZQ2 L8 T9 VMB_ZQ3 L8 T9 VMB_ZQ4 L8 T9

R446 D1 R1 D1 R69 D1 R449 D1
EV_128@243/F_4 VSSQ#D1 EV_128@243/F_4 VSSQ#D1 EV_128@243/F_4 VSSQ#D1 EV_128@243/F_4 VSSQ#D1
VSSQ#D8 D8 VSSQ#D8 D8 VSSQ#D8 D8 VSSQ#D8 D8
J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8

EV_128@VRAM _DDR3 EV_128@VRAM _DDR3 EV_128@VRAM _DDR3 EV_128@VRAM _DDR3
BOT Down D AKD5MGWTW17

TOP Down TOP Up
D AKD5MGWTW17
BOT Up
F AKD5MZDTW05 F AKD5MZDTW05
Group-B1 VREF
Group-B0 VREF
B B
R9 R11 R447 R7
R68 R442 R2 R4 [email protected]/F_4 [email protected]/F_4 [email protected]/F_4 [email protected]/F_4
[email protected]/F_4 [email protected]/F_4 [email protected]/F_4 [email protected]/F_4
VREFC_VMB3 VREFD_VMB3 VREFC_VMB4 VREFD_VMB4

VREFC_VMB1 VREFD_VMB1 VREFC_VMB2 VREFD_VMB2
R8 C9 R10 C11 R448 C606 R6 C7

R70 C41 R443 C598 R3 C2 R5 C4
[email protected]/[email protected]/10V_4 [email protected]/[email protected]/10V_4 [email protected]/[email protected]/10V_4 [email protected]/[email protected]/10V_4
Group-B0 decoupling CAP Group-B1 decoupling CAP

MEM_B0 CLK MEM_B1 CLK
+1.5V_GFX +1.5V_GFX
VMB_CLK1
VMB_CLK0 C600 C8 C21 C1 C603 C30 C601 C14 C3 C616 C617 C10 C12 C609 C614 VMB_CLK1#
VMB_CLK0# EV_128@1u/6.3V_4 EV_128@1u/6.3V_4 EV_128@1u/6.3V_4 EV_128@1u/6.3V_4 EV_128@1u/6.3V_4 EV_128@1u/6.3V_4 EV_128@1u/6.3V_4 EV_128@1u/6.3V_4EV_128@1u/6.3V_4 EV_128@1u/6.3V_4EV_128@1u/6.3V_4EV_128@1u/6.3V_4 EV_128@1u/6.3V_4EV_128@1u/6.3V_4 EV_128@1u/6.3V_4
R450 R451
[email protected]/F_4 [email protected]/F_4
R445 R444
[email protected]/F_4 [email protected]/F_4 +1.5V_GFX +1.5V_GFX
A C20 C620 C6 C109 C623 C604 C22 C597 C5 C13 C605 C611 C608 C610 C602 A
C607
C599 EV_128@1u/6.3V_4 EV_128@1u/6.3V_4 EV_128@1u/6.3V_4 EV_128@1u/6.3V_4 EV_128@1u/6.3V_4 EV_128@1u/6.3V_4 EV_128@1u/6.3V_4 EV_128@1u/6.3V_4 EV_128@1u/6.3V_4EV_128@1u/6.3V_4 EV_128@1u/6.3V_4EV_128@1u/6.3V_4EV_128@1u/6.3V_4 EV_128@1u/6.3V_4EV_128@1u/6.3V_4 [email protected]/25V_4
EV_128SP@ : Thames Pro,XT R=56ohm(CS05602FB15)

+1.5V_GFX +1.5V_GFX
Mars R=40.2ohm(CS04022FB28)
EV_128SP@ : Thames Pro,XT R=56ohm(CS05602FB15) C15 C63 C618 C615 C625 C613 C17 C18 C612 C621 Quanta Computer Inc.
Mars R=40.2ohm(CS04022FB28) [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6 [email protected]/6.3V_6
PROJECT : ZRI/ZQI
www.vinafix.vn
A1A
Thames_M2/VRAM_B
5 4 3 2 1
5 4 3 2 1
mini DP ML (DPP)
Layout Notes:
+5V Place near Pin13 and Pin14 +3V
R99
SEL/OE# polarity Control *SHORT_6
C61 C66 C47 C647 C91 C646 C650 C52

R480 R481 +3V SW@10u/6.3V_6 [email protected]/10V_4 [email protected]/10V_4 [email protected]/10V_4 [email protected]/10V_4 [email protected]/10V_4 [email protected]/10V_4 [email protected]/10V_4
SW@1M/J_4 SW@1M/J_4
R65 *100K/F_4 USB2_SEL
14
13
52
40
4
1
Q12 R82 SW@10K/J_4 U10
R516 SW@10K/J_4 5
VCC
VCC
VCC
VCC
VCC/NC
VCC/NC
D D
CONFIG_1P 3 4
+3V
[5] MINI_DP_TXP2
C666
C665
0.1u/10V_4
0.1u/10V_4
DP_TXP2_C
DP_TXN2_C
48 B0P
DP HPD (DPP)
2 [5] MINI_DP_TXN2 47 B0N
R64 *100K/F_4 USB3_SEL 2 INT_DPTX2P +5V
R521 *short_4 6 R81 SW@10K/J_4 C93 [email protected]/10V_4 USB30_TX3+_C A0P INT_DPTX2N
[7,12,13] PDAT_SMB 1 [33] USB3_TXP1_2 44 C0P A0N 3
C92 [email protected]/10V_4 USB30_TX3-_C 43
[33] USB3_TXN1_2 C0N
2
SYS_COM_REQ
SW@2N7002DW
C644 R524 C664 0.1u/10V_4 DP_TXP3_C 46 1 3 R67 *short_4DP_HPD
[5] MINI_DP_TXP3 B1P
R92 SW@1u/6.3V_4 SW@100K/F_4 +3V C663 0.1u/10V_4 DP_TXN3_C 45 5 INT_DPTX3P
[5] MINI_DP_TXN3 B1N A1P
SW@10K/J_4 6 INT_DPTX3N Q45
R77 *100K/F_4 USB2_MUX_DIS A1N SW@BSS138P R73
[33] USB3_RXP1_2 42 C1P
Q9 R76 SW@10K/J_4 41 2 1 100K/J_4
[33] USB3_RXN1_2 C1N
R490 SW@10K/J_4 5 R87 *0/J_4
USB3_SEL 7 SS_SEL_IN SS_SEL
CONFIG_2P 3 4 10 CONFIG_2CNN
CONFIG_1P ADM CONFIG_1CNN DP_HPD_D
35 BDP ADP 11
5
R91 R718 [email protected]/J_4 +3V CONFIG_2P 36 BDM +3V

SW@100K/F_4 2
R89 *100K/F_4 USB3_MUX_DIS R131 *short_4 FCH_USB2_P0_R 37 +3V
[7] USBP11+ CDP
R506 *short_4 6 1 R88 SW@10K/J_4 R132 *short_4 FCH_USB2_N0_R 38 15 R83 SW@10K/J_4
[7,12,13] PCLK_SMB [7] USBP11- CDM MODE_LED
16 DP_HPD_C
HPD_IN
1
Q8
SW@2N7002DW SW@2N7002DW USB2_SEL 12 HS_SEL 18 DP_AUXN_R R23 SW@100K/J_4 DP_AUXN
R501 HS_SEL_IN AUX_N
4
SW@100K/F_4 CONFIG_PU 2
USB2_MUX_DIS 9 HS_OE#_IN
USB3_MUX_DIS 8 SS_OE#_IN/NC HS_SEL_OUT 19 USB2_SEL Connect to HS_SEL_IN(pin12)
SS_SEL_OUT 20 USB3_SEL Connect to SS_SEL_IN(pin7) Q48 +3V
32 SW@AO3409
3
HS_OE#_OUT
1
34 28 CONFIG_2P R514 [email protected]/J_4
SS_OE#_OUT CONFIG_2 CONFIG_1P R513 [email protected]/J_4
CONFIG_1 29
LB_CHARGE_OFF 21 26 CONFIG_PU CONFIG_PU 2

ESD Protect (EMC) R46 NSW@1K_4
R100 *short_4 LB_CHG_DELAY1# 22
CHRG_OFF
CHRG_DELAY
CONFIG_1_PU
CONFIG_2_PU 27 Dongle_POWEREN#
C +3V TP1 23 SLEEP C
25 R111 *short_4 Q47
SYS_COM_REQ SYS_COM_REQ [8]
U3 [5] INT_MINI_HPD_Q R66 *short_4 DP_HPD_OUT 17 SW@AO3409
3
INT_DPTX2N INT_DPTX2N HPD_OUT
1 1 10 10 Q55
INT_DPTX2P 2 9 INT_DPTX2P 30 R134 SW@47K/J_4 +3V
2 9 DP_HPD_D RST
3 GND_3/8 5 57 PAD TEST 31 TP2
INT_DPTX3P 4 7 INT_DPTX3P
GND
GND
GND
NC6
NC5
NC4
NC3
NC2
NC1
NC0
INT_DPTX3N 4 7 INT_DPTX3N R479 NSW@10K/F_4 C87
5 6 3 4
5
*RClamp0524P
6 +3V
SW@(X)HD3SS2521_NB
SW@2200p/50V_4 MINI DP connector (DPP)
56
55
54
51
50
49
24
53
39
33
2 CN4
add 3/25
U36 INT_MINI_HPD_Q 6 1 1
DP_AUXN DP_AUXN DP_HPD GND
1 1 10 10 2 HPD
DP_AUXP 2 9 DP_AUXP INT_DPTX0P_R 3
2 9 CONFIG_1CNN LANE0_P
3 GND_3/8 NSW@2N7002DW 4 CONFIG1
CONFIG_2CNN 4 7 CONFIG_2CNN CONFIG_1P R84 NSW@0_4 CONFIG_1CNN INT_DPTX0N_R 5
CONFIG_1CNN 4 7 CONFIG_1CNN CONFIG_2CNN LANE0_N
5 5 6 6 6 CONFIG2
R17 *short_4 CONFIG_2CNN R85 [email protected]/J_4 7
*RClamp0524P GND
8 GND
Del 3/27 LB_PWR_CNN +3V INT_DPTX1P_R 9
INT_DPTX0N INT_DPTX0N_R INT_DPTX3P LANE1_P
10 LANE3_P
INT_DPTX0P INT_DPTX0P_R LB_PWR_RTN R37 NSW@1M/J_4 INT_DPTX1N_R 11
U5 INT_DPTX3N LANE1_N
12 LANE3_N
C36 0.1u/10V_4 INT_DPTX0P 1 10 INT_DPTX0P 13
[5] MINI_DP_TXP0 1 10 GND
C37 0.1u/10V_4 INT_DPTX0N 2 9 INT_DPTX0N R16 *short_4 DP_TXP2_C R512 NSW@0_4 DP_TXP2_CR R488 NSW@0_4 INT_DPTX2P 14
[5] MINI_DP_TXN0 2 9 GND
3 DP_TXN2_C R511 NSW@0_4 DP_TXN2_CR R487 NSW@0_4 INT_DPTX2N R719 INT_DPTX2P 15
C38 0.1u/10V_4 INT_DPTX1P GND_3/8 INT_DPTX1P NSW@0_6 DP_AUXP LANE2_P
[5] MINI_DP_TXP1 4 4 7 7 16 AUX_CH_P
C39 0.1u/10V_4 INT_DPTX1N 5 6 INT_DPTX1N R19 *short_4 DP_TXP3_C R510 NSW@0_4 DP_TXP3_CR R486 NSW@0_4 INT_DPTX3P INT_DPTX2N 17 21
[5] MINI_DP_TXN1 5 6 LANE2_N SHELL1
DP_TXN3_C R509 NSW@0_4 DP_TXN3_CR R485 NSW@0_4 INT_DPTX3N DP_AUXN 18 22
*RClamp0524P Q52 LB_PWR_RTN AUX_CH_N SHELL2
1A/30V 19 GND SHELL3 23
INT_DPTX1N INT_DPTX1N_R 3 1 LB_PWR_CNN_Q 20 24
INT_DPTX1P INT_DPTX1P_R FCH_USB2_N0_R C656 SW@2200p/50V_4 CONFIG_2CNN_C C649 SW@2200p/50V_4 CONFIG_2CNN IN OUT DP_PWR SHELL4
Layout Notes: Close to DP connector GND 2
C627 C632 C23 C25
Place decoupling CAPs close to Connector R18 *short_4
FCH_USB2_P0_R C655 SW@2200p/50V_4 CONFIG_1CNN_C C648 SW@2200p/50V_4 CONFIG_1CNN AP2331SA-7 0.1u/10V_4 10u/6.3V_6 SW@10u/6.3V_6 mDP
B B
mDP AUX (DPP)
Q5 LB_PWR_CNN +3V
DP_AUX_EN 5 +5V
LB_PWR_RTN
R61 1.8K_4 3 4 +5V Q13
[5] MINI_DP_AUXN
2
Dongle_POWEREN# 5
5
5 R458
5
2 R476 3 4 LB_PWR_RTN SW@100K/J_4
1
R477 10K/F_4 D28 4 4

[5] MINI_DP_AUXP R60 1.8K_4 6 1 10K/F_4 4 4 SW@SMAJ20A
Q42
1
2
DP_AUX_EN 5 D1 Q44
2N7002DW SW@SMAJ20A 6 1 Q43 SW@FDMC4435BZ
2
DP_AUX_EN_O 3 4 Q6 Q7 SW@FDMC4435BZ
1
2
3
3
2
1
SW@FDMC4435BZ SW@FDMC4435BZ
1
2
3
3
2
1
Q40 C641 SW@2N7002DW LB_PWR_CNN_M
DP_AUX_EN_O 5 CONFIG_1P 2 LB_PWR_RTN_M
0.1u/10V_4 R120 *SW@100K/F_4
3 4 6 1
+3V R500
C33 R469 R109 SW@20K/F_4
2 1M/F_4 SW@20K/J_4
0.1u/10V_4 2N7002DW
DP_AUXN 6 1 +3V R489 R508 SW@2K/F_4
3
+3V SW@10K/F_4
+3V R36 *100K/F_4 2N7002DW

A R117 LB_CHARGE_OFF 2 A
Q39 SW@2K/F_4
5 C669 C102 [email protected]/10V_4 R127
[email protected]/10V_4 SW@100K/F_4 Q46
3 4 U42 SW@ME2N7002E
1
3
DP_CAD Behavior Q11 5 1

5
C32 SW@ME2N7002E 2 Dongle_POWEREN#

2 Low DP signal (AC couple) 2 4 3
0.1u/10V_4 2 4
DP_AUXP 6 1 High TMDS signal (DC couple) 1 LB_CHARGE_OFF SW@SN74LVC1G04DBVR
R35 *100K/F_4 Quanta Computer Inc.

3
2N7002DW R116 U13

1
SW@100K/F_4 SW@TC7SH08FU
PROJECT : ZRI/ZQI
A1A
Mini DP
5 4 3 2 1
www.vinafix.vn
1 2 3 4 5 6 7 8
eDP(LDS) LCD PW(LDS)

+3V
CCD_PWR TP_PWR VIN
C283 LCDVCC
C312 C315 C316 C313 C309 C308 1u/6.3V_4 U19
*10p/50V_4 1000p/50V_4 *10p/50V_4 1000p/50V_4 4.7u/25V_8 1000p/50V_4 6 1 LCDVCC_R R212 *short_8 40mil
IN OUT
4 2 C306 C311 C314 C303
A IN GND A
3 5 1u/6.3V_4 *0.1u/10V_4 0.01u/16V_4 10u/6.3V_8

[5] eDP_DIGON ON/OFF GND
IC(5P)-G5243T11U
CN8 R205
G_5
VIN R219 *SHORT_6LCD_VIN *100K_4
R217 *SHORT_6 40
39
38
LCDVCC 37
LCDVCC 36
35
R214 CCD_PWR 34
+3V 33
*SHORT_6
R215 TP_PWR 32
+5V 31 G_4
*SHORT_6
30
29 Backlight Control(LDS)
EDP_BRIGHT 28
[5] EDP_BRIGHT 27
BL_ON
26 +3V
[5] INT_eDP_HPD 25 +3VPCU
24
[5] EDP_TXP3 23
[5] EDP_TXN3 22
1
21
[5] EDP_TXP2 20 R216
[5] EDP_TXN2 R194 R213
19 *100K_4
B B
18 D5
eDP [5] EDP_TXP1 10K_4 10K_4
2
17 BL_ON
[5] EDP_TXN1 16 LID591# [33,37]
15
[5] EDP_TXP0 14 RB500V-40
[5] EDP_TXN0 13
3
12
3
[5] eDP_AUXP 11
[5] eDP_AUXN 10 G_1 BL# 2 2
9 EC_FPBACK# [37]
USBP6+_R
USBP6-_R 8 Q23 Q25
7
3
R596 *short_4 PDTC143TT 2N7002K DTC144EUA
1
USBP8+_R 6
1
USBP8-_R 5
4 [5] eDP_BL_EN 2
TP_GND
[7] USBP6+ 3
CCD [7] TP_INT
USBP6- 2 Q24
1
1
G_0
R195
R597 *short_4 R218
*SHORT_6 100K_4
LVDS CONN
R598 *short_4
[7] USBP8+
Touch Panel [7] USBP8-
C [7,9] BOARD_ID9 C
R599 *short_4
Add for leakage
+3V_S5 +3V +3V
R601 R595
*TP@10K_4 *TP@10K_4
2
3 1 TP_INT
[8] TP_INT_FCH
Q49 *TP@BSN20
R600 0_4
D D

PROJECT : ZRI/ZQI
www.vinafix.vn
LVDS&CCD&CRT DB&LID A1A

1 2 3 4 5 6 7 8
5 4 3 2 1
HDMI INT_HDMI_TXDP2 C365 1.6p/50V_4

INT_HDMI_TXDN2 C366 1.6p/50V_4
INT_HDMI_TXDP1 C437 1.6p/50V_4
INT_HDMI_TXDN1 C447 1.6p/50V_4
ESD1 INT_HDMI_TXDP0 C452 1.6p/50V_4
1 10 INT_HDMI_TXDP2 INT_HDMI_TXDN0 C458 1.6p/50V_4 CN2
[5] INT_HDMI_TXDP2 1 10
2 9 INT_HDMI_TXDN2 INT_HDMI_TXCP C466 1.6p/50V_4 20
[5] INT_HDMI_TXDN2 2 9 SHELL1
3 INT_HDMI_TXCN C756 1.6p/50V_4 22
D GND_3/8 INT_HDMI_TXDP1 INT_HDMI_TXDP2 SHELL3 D
[5] INT_HDMI_TXDP1 4 4 7 7 1 D2+
5 6 INT_HDMI_TXDN1 2
[5] INT_HDMI_TXDN1 5 6 D2 Shield
INT_HDMI_TXDN2 3
*HM@RClamp0524P INT_HDMI_TXDP1 D2-
4 D1+
5 D1 Shield
ESD2 INT_HDMI_TXDN1 6
INT_HDMI_TXDP0 INT_HDMI_TXDP0 D1-
[5] INT_HDMI_TXDP0 1 1 10 10 7 D0+
INT_HDMI_TXDN0
ESD [5] INT_HDMI_TXDN0 2
3
2 9 9
INT_HDMI_TXDN0
8
9
D0 Shield
GND_3/8 INT_HDMI_TXCP INT_HDMI_TXCP D0-
[5] INT_HDMI_TXCP 4 4 7 7 10 CK+
5 6 INT_HDMI_TXCN 11
[5] INT_HDMI_TXCN 5 6 CK Shield
INT_HDMI_TXCN 12
*HM@RClamp0524P CK-
13 CE Remote
14 NC
ESD3 HDMI_DDCCLK 15
HDMI_DDCCLK HDMI_DDCCLK +5V HDMI_DDCDATA DDC CLK
1 1 10 10 16 DDC DATA
HDMI_DDCDATA 2 9 HDMI_DDCDATA 17
2 9 +5V_HDMI GND
3 GND_3/8 18 +5V
HDMI_DET 4 7 HDMI_DET HDMI_DET 19
+5V_HDMI 4 7 +5V_HDMI HP DET
5 5 6 6 SHELL4 23
1
SHELL2 21
*HM@RClamp0524P Q37 RV1
3 1 *EGA_4 ABA-HDM-022-P05
IN OUT
2
2
GND
AP2331SA-7 D25
C C
C626 *EGA_4 C19 C624
*220p/50V_4
HDMI_PL_MOS R38 604/F_4 INT_HDMI_TXDP2 *1000p/50V_4 *1000p/50V_4
R39 604/F_4 INT_HDMI_TXDN2

3
+5V R40 604/F_4 INT_HDMI_TXDP1

Q1
2N7002K R41 604/F_4 INT_HDMI_TXDN1
2
R42 604/F_4 INT_HDMI_TXDP0
R43 604/F_4 INT_HDMI_TXDN0

1
R44 604/F_4 INT_HDMI_TXCP

R20
R45 604/F_4 INT_HDMI_TXCN
100K_4
EMI reserve for HDMI(EMC)
Close connector
B B
HDMI SDVO I2C Control HDMI HPD SENSE INT_HDMI_TXDP2
+5V +3V R24

*100/F_4
INT_HDMI_TXDN2
2
D26 R72 INT_HDMI_TXDP1

RB501V-40 10K_4
+3V +3V R25
*100/F_4
1
INT_HDMI_TXDN1
R454 Q38 R456 INT_HDMI_TXDP0

2
3
2.2K_4 BSN20 2.2K_4 +3V
R26
1 3 HDMI_DDCCLK *100/F_4
[5] INT_HDMI_AUXP
2 HDMI_DET INT_HDMI_TXDN0
R75
+5V 1K_4 Q3 INT_HDMI_TXCP
2N7002K R34
100K_4 R27
1
2
*100/F_4
[5] INT_HDMI_HPD
D29 INT_HDMI_TXCN
3
RB501V-40
A +3V +3V A
1
2 HDMI_HPD_EC# [37]
Q41
R460 R459 Q2
2
2.2K_4 BSN20 2.2K_4 2N7002K

1
HDMI_DDCDATA
[5] INT_HDMI_AUXN 1 3 PROJECT : ZRI/ZQI
HDMI A1A
www.vinafix.vn
5 4 3 2 1
5 4 3 2 1
LAN/Card reader (LAN) Below power trace should be > 30 mils Transformer (LAN)
VDD33
AVDD33
VDD_CR U9
+3V_S5 VDD33
VDD33 Pin LX to L1 MDI3+ RJ45-TX3+
1 TD1+ MX1+ 24
VDD33 R260 AVDD33
*SHORT_6 Below power trace should be > 20 mils MDI3- 2 TD1- MX1- 23 RJ45-TX3-
R226 *short_8 C335 C391 C337 C336 C338
AVDDH 3 TCT1 MCT1 22
10u/6.3V_6 10u/6.3V_6 1u/10V_4 0.1u/10V_4 *1n/50V_4 VDDIO_CR
D AVDDL D
4 TCT2 MCT2 21
DVDDL MDI1+ RJ45-TX1+
5 TD2+ MX2+ 20
MDI1- 6 19 RJ45-TX1-
TD2- MX2-
MDI0+ 7 18 RJ45-TX0+
TD3+ MX3+
DVDDL AVDDVCO MDI0- 8 17 RJ45-TX0-
TD3- MX3-
For SWR mode 9 16
C359 TCT3 MCT3
C370 C372 C390
0.1u/10V_4
L33 4.7uH/1A_2X2 LX 0.1u/10V_4 *1u/6.3V_4 *4.7u/6.3V_6 10 15
TCT4 MCT4
C363 C358 C429 MDI2+ 11 14 RJ45-TX2+
TD4+ MX4+
Place connect to Pin47 Place connect to Pin44
*1n/50V_4 0.1u/10V_4 10u/6.3V_8 MDI2- 12 13 RJ45-TX2-
TD4- MX4-
DVDDL TERM0
R232 NA69R LF
10K_4 PCIE_FCH_TXN0_LAN [8]
PCIE_FCH_TXP0_LAN [8] C35
CLK_PCIE_LANP [8]
CLK_PCIE_LANN [8] 0.01u/25V_4
L30 L32
AVDDVCO AVDDL DVDDL
BLM18AG601SN1D BLM18AG601SN1D PCIE_RXP0_C C419 0.1u/10V_4 R55
PCIE_FCH_RXP0_LAN [8]
PCIE_RXN0_C C418 0.1u/10V_4 75/F_8
PCIE_FCH_RXN0_LAN [8]
LED_ACTn
C C
AVDDVCO
Layout Notes:
DVDDL
VDD33
Place decoupling CAPs close to LAN Chip VDDIO_CR
LX
TERM9
2
53
52
51
50
49
48
47
46
45
44
43
42
41
40
U21 C423 C403 C659 *6.8P/50V_4 MDI3+ R465
C658 *6.8P/50V_4 MDI3- D2
GND
VDD33
LX
LED[1]/PPS
LED[2]/PPS
LED[0]/PPS
DVDDL_REG
RX_N
RX_P
AVDDL
REFCLK_P
REFCLK_N
TX_P
TX_N
0.1u/10V_4 1u/10V_4 C661 *6.8P/50V_4 MDI2+ C631
C660 *6.8P/50V_4 MDI2- *SUG@BS201N
C82 *6.8P/50V_4 MDI1+ *SUG@1M_8 220p/3KV_1808
1
Place connect to Pin32 C81 *6.8P/50V_4 MDI1-
AVDDH C84 *6.8P/50V_4 MDI0+
C83 *6.8P/50V_4 MDI0-
R231 10K_4 CRIO14/SPI_CS 1 CRIO14/SPI_CS CRIO6 39 SD_WP [29] Reserver for EMI
2 CRIO13/SPI_CLK/PPS CRIO12 38 SD_CD# [29]
R230 10K_4 CRIO7/SPI_DO 3 37 CRIO4_R R277 22_4
CRIO7/SPI_DO CRIO4 SD_CMD [29]
4 36 CRIO0_R R280 22_4
xD_CDn/SPI_DI CRIO0 SD_DATA0 [29]
5 35 CRIO1_R R279 22_4
[7,30,37] FCH_PCIE_RST# PERSTn CRIO1 SD_DATA1 [29]
6 34 CRIO2_R R276 22_4
[7] PCIE_WAKE#
[7] PCIE_REQ_LAN#
R229 10K_4 xD_CEn
7
8
WAKEn
CLKREQn Atheros CRIO2
CRIO3 33
32
CRIO3_R R275
VDDIO_CR
22_4
SD_DATA2 [29]
SD_DATA3 [29]
AVDDH
AVDDL
LAN_XTAL1
9
xD_CEn
AVDDL_REG QCA8175
VDDIO_CR_REG
CRIO5 31 CRIO5_R R274 22_4
SD_CLK [29] RJ45 CONNECTOR (LAN)
10 XTLO CRIO8 30
C758 LAN_XTAL2 11 29
AVDDH XTLI CRIO9 C430 CN1
12 AVDDH_REG CRIO10 28
0.1u/10V_4 RBIAS 13 27 10p/50V_4
RBIAS CRIO11
9 9
AVDDH
R603 10
RJ45-TX0+ 10
2.37K/F_4 1 0+
RJ45-TX0- 2 0-
VDD_CR
AVDD33
B C357 C356 RJ45-TX1+ 3 B

AVDDL
TRXN0
TRXN1
TRXN2
TRXN3
TRXP0
TRXP1
TRXP2
TRXP3
VDD33
LED[3]
RJ45-TX2+ 1+
4 2+
1u/10V_4 0.1u/10V_4 RJ45-TX2- 5
RJ45-TX1- 2-
6 1-
52PIN-QFN RJ45-TX3+ 7
14
15
16
17
18
19
20
21
22
23
24
25
26
RJ45-TX3- 3+
8 3-
AVDD33
AVDDL
VDD33
11
+VDD_CR
11
MDI0+
MDI1+
MDI2+
MDI3+
MDI0-
MDI1-
MDI2-
MDI3-
12 12
RJ45
LAN_XTAL2 C342 15P/50_4

4
3
Y2
25MHz_XTAL
SURGE (LAN)
2
1
LAN_XTAL1 C343 15P/50_4 AVDD33 AVDDL VDD33 +VDD_CR

U14 U4
MDI1- 1 8 RJ45-TX1- 1 8
C755 C754 C344 C341 C374 C375 C392 C422 MDI1+ 1 8 RJ45-TX1+ 1 8
2 2 7 7 2 2 7 7
MDI3- 3 6 RJ45-TX0- 3 6
0.1u/10V_4 1u/10V_4 0.1u/10V_4 1u/10V_4 0.1u/10V_4 1u/10V_4 0.1u/10V_4 10u/6.3V_8 MDI3+ 3 6 RJ45-TX0+ 3 6
4 4 5 5 4 4 5 5
*[email protected] *[email protected]
Place connect to Pin18 Place connect to Pin21 Place connect to Pin24 Place connect to Pin25
A A
U43 U35
MDI0+ 1 8 RJ45-TX3- 1 8
MDI0- 1 8 RJ45-TX3+ 1 8
2 2 7 7 2 2 7 7
MDI2+ 3 6 RJ45-TX2- 3 6
MDI2- 3 6 RJ45-TX2+ 3 6
4 4 5 5 4 4 5 5
*[email protected] *[email protected]
PROJECT : ZRI/ZQI
A1A
LAN-RTL8411/CARD READER
5 4 3 2 1
www.vinafix.vn
A B C D E
CARD READER CONNECTOR (MMC)
SD/MMC CARD READER (MMC)

4 4
CN13
R220 *short_4 SD_CD#_R 11
[28] SD_CD# R623 *short_4 SD_WP_R CARD/DET
[28] SD_WP 10 W/P
R221 *short_4 SD_DATA2_R 9
[28] SD_DATA2 R617 *short_4 SD_DATA1_R DATA2
[28] SD_DATA1 8 DATA1
R615 *short_4 SD_DATA0_R 7
[28] SD_DATA0 DATA0
6 VSS2
R610 *short_4 SD_CLK_R 5
[28] SD_CLK CLK
+VDDCR 4 VDD
3 VSS1
R224 *short_4 SD_CMD_R 2
GND
GND
GND
GND
[28] SD_CMD R223 *short_4 SD_DATA3_R CMD
[28] SD_DATA3 1 CD/DATA3
SD-CARD
12
13
14
15
3 EMI 3
SD_CMD_R
SD_DATA0_R
SD_DATA1_R
SD_DATA2_R
SD_DATA3_R
C334 C785 C787 C331 C332

+VDD_CR +VDDCR
*56P/50V_4 *56P/50V_4 *56P/50V_4 *56P/50V_4 *56P/50V_4
R609 *SHORT_6
VDD33
R606 *0_6
2 2
C772
Place close to connector 1u/10V_4
1
Quanta Computer Inc. 1
PROJECT : ZRI/ZQI
A1A
CARD READER CONNECTOR
A B
www.vinafix.vn C
Date: Wednesday, April 24, 2013
D
Sheet 29
E
of 50
1 2 3 4 5 6 7 8
MINI-CARD WLAN&BT(MPC) +3V +WL_VDD
+3.3V: 1000mA R325 NAC@0_8
+3.3Vaux:330mA
+1.5V:500mA C485 C511 C759 C442
10u/10V_8 0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4
+3VPCU
Q31
A 1 3 A
AC@AO3413
+WL_1.5V +1.5V
2
R307 AC@10K_4 R242 *0_6
[37] IOAC_LANPWR#
C463
C790 C497 C369
AC@1000p/50V_4 *1000p/50V_4 *0.1u/10V_4 *10u/6.3V_8
+WL_VDD
CN14 R642
[37] BT_POWERON R643 *short_4BT_POWERON_R 51 52 +WL_VDD
Reserved +3.3V *[email protected]_4
49 Reserved GND 50
R639 0_4 PLTRST#_R 47 48
[7,8,31,37] PLTRST# Reserved +1.5V
R634 0_4 PCLK_DEBUG_R 45 46 WLAN_OFF_R R637 AC@0_4
[8] PCLK_DEBUG Reserved LED_WPAN# WLAN_OFF [37]
43 GND LED_WLAN# 44 TP67
B +WL_VDD 41 +3.3Vaux LED_WWAN# 42 B
39 +3.3Vaux GND 40
37 GND USB_D+ 38 USBP7+ [7]
35 GND USB_D- 36 USBP7- [7]
33 34 +WL_VDD
[8] PCIE_FCH_TXP1_WLAN PETp0 GND
31 32 WL_SMDATA
[8] PCIE_FCH_TXN1_WLAN PETn0 SMB_DATA
29 30 WL_SMCLK
GND SMB_CLK
27 GND +1.5V 28 +WL_1.5V
5
25 26 U22 *AC@TC7SH08FU
[8] PCIE_FCH_RXP1_WLAN PERp0 GND
[8] PCIE_FCH_RXN1_WLAN 23 PERn0 +3.3Vaux 24 +WL_VDD 2 FCH_PCIE_RST# [7,28,37]
21 22 FCH_PCIE_RST#_R 4
GND PERST#
19 UIM_C4 W_DISABLE# 20 RF_EN [37] 1 IOAC_RST# [37]
17 UIM_C8 GND 18
3
15 16 DEBUG_LFRAME# R614 *short_4
GND UIM_VPP LPC_LFRAME# [8,31,37]
13 14 DEBUG_LAD3 R613 *short_4 LPC_LAD3 [8,31,37]
[8] CLK_PCIE_WLANP REFCLK+ UIM_RESET
11 12 DEBUG_LAD2 R611 *short_4 LPC_LAD2 [8,31,37] Debug
[8] CLK_PCIE_WLANN REFCLK- UIM_CLK
9 10 DEBUG_LAD1 R608 *short_4 LPC_LAD1 [8,31,37] R300 *AC@0_4
PCIE_REQ_WLAN#_R GND UIM_DATA DEBUG_LAD0 R607 *short_4 R288 0_4
7 CLKREQ# UIM_PWR 8 LPC_LAD0 [8,31,37]
5 Reserved +1.5V 6 +WL_1.5V
3 4
GND
GND
PCIE_WAKE#_WLAN_R Reserved GND

1 WAKE# +3.3V 2 +WL_VDD
MINI-CARD1
53
54
C C
Leakage circuit (MPC) +WL_VDD

+WL_VDD
R239 R297 R313

[email protected]_4 Q30 [email protected]_4 [email protected]_4
5
2
R264 [email protected]_4 Q28

EC: +3VPCU +3VPCU
3 4 WL_SMDATA
[7,35] SDATA1
3 1 PCIE_WAKE#_WLAN_R
[37] PCIE_WAKE#_WLAN
2
AC@ME2N7002E_200MA
6 1 WL_SMCLK
[7,35] SCLK1
+3V +WL_VDD
AC@2N7002DW
D R262 D
2
Q26 [email protected]_4
FCH: +3V
1 3 PCIE_REQ_WLAN#_R
[7] PCIE_REQ_WLAN#
AC@ME2N7002E_200MA
PROJECT : ZRI/ZQI
R235 NAC@0_4 Size Document Number Rev
MINI PCIE(WLAN/BT) A1A
1 2 3
www.vinafix.vn 4 5 6
Date: Wednesday, April 24, 2013
7
Sheet 30
8
of 50
1 2 3 4
SATA HDD TPM

CN12
19 19 +5V
CN18
18
17
120mil R668 *short_4 CLKRUN#_R 1
+5V_HDD R270 *short_8 [8,37] CLKRUN# 1
16 [7,8,30,37] PLTRST# 2 2
A 15 3 3
A
14 C361 C402 C425 C424 4
+ 4
13 +3V_S5 5 5
12 *100u/6.3V_3528 10u/6.3V_6 *0.1u/16V_4 0.01u/25V_4 6
+3V 6
11 C819 [email protected]/10V_4 7 7
10 8 8
9 R437 *short_4 SERIRQ_R 9
[8,37] IRQ_SERIRQ 9
8 R436 *short_4 LPCPD#_R 10
[7] FCH_LPC_PD# 10
7 [8,30,37] LPC_LAD0 11 11
6 SATA_RXP0_C C362 0.01u/16V_4 SATA_RXP0_R 12
SATA_RXP0_R [9] [8,30,37] LPC_LAD1 12
5 SATA_RXN0_C C360 0.01u/16V_4 SATA_RXN0_R 13
SATA_RXN0_R [9] [8,30,37] LPC_LFRAME# 13
4 R435 *short_4 PCLK_TPM_C 14
[8,11] LPC_CLK1 14
3 SATA_TXN0_R C340 0.01u/16V_4 SATA_TXN0_C SATA_TXN0_C [9] C587 TPM@10p/50V_4 15
SATA_TXP0_R C339 0.01u/16V_4 SATA_TXP0_C 15
2 SATA_TXP0_C [9] 16 16
1 1 [8,30,37] LPC_LAD2
TPM@TPM_CONN
[8,30,37] LPC_LAD3
SATA_HDD
B B
SATA Re-driver
MINI-CARD SSD
+3V_SATA
H=4.95mm
CN23
51 Reserved +3.3V 52
49 Reserved GND 50
47 Reserved +1.5V 48
45 Reserved LED_WPAN# 46
43 GND LED_WLAN# 44
41 +3.3Vaux LED_WWAN# 42
39 +3.3Vaux GND 40
37 GND USB_D+ 38
35 GND USB_D- 36
C C594 [email protected]/16V_4 SATA_TXP1_C 33 34 C
[9] SATA_TXP1 PETp0 GND
C590 [email protected]/16V_4 SATA_TXN1_C 31 32
[9] SATA_TXN1 PETn0 SMB_DATA
29 GND SMB_CLK 30
27 GND +1.5V 28
C591 [email protected]/16V_4 SATA_RXN1_C 25 26
[9] SATA_RXN1 PERp0 GND
C589 [email protected]/16V_4 SATA_RXP1_C 23 24
[9] SATA_RXP1 PERn0 +3.3Vaux
21 GND PERST# 22
19 UIM_C4 W_DISABLE# 20
17 UIM_C8 GND 18
15 GND UIM_VPP 16
13 REFCLK+ UIM_RESET 14
11 REFCLK- UIM_CLK 12
9 GND UIM_DATA 10
7 CLKREQ# UIM_PWR 8
5 Reserved +1.5V 6
3 4
GND
GND
Reserved GND
1 WAKE# +3.3V 2
+3V SSD@MINI-CARD1
53
54
+3V_SATA R441 *short_8
D D
C592 C595 C593
*[email protected]/10V_4 [email protected]/10V_4 SSD@10u/10V_8

PROJECT : ZRI/ZQI
rating = 1000mA @ 128G Size Document Number Rev
SATA(HDD/SSD/TPM) A1A
www.vinafix.vn
1 2 3 4
5 4 3 2 1
Codec (ADO) +3V +5VA

HEADPHONE/Mic combo (AMP)
R363 R362
*10K/J_4 *10K_4
EAPD#
HP-L HP 20120910: ALC3225 has a internal MOSFET COMBO_MICJD 22K/F_4 R344
HP-R MIC2-VREFO
R360 C494
*10K_4 10u/6.3V_6
C557
Need check AMP C568 C567 MIC2-VREFO
2.2u/6.3V_6 0.1u/10V_4
PD PIN level *10u/6.3V_6 R351 ADOGND
MIC2-R 2.2u/6.3V_6 C505 MIC2_MIC 2.2K/J_4
D C820 Place next to pin 28 D
+
2.2u/6.3V_6 MIC2-L 2.2u/6.3V_6 C517 R346 1K/J_4 COMBO_MIC
+3V R656 +3VCPVDD ADOGND
1
*SHORT_6 R345
C571 10u/6.3V_6 ADOGND 22K/F_4 D7
R385 R393 *14V/38V/100P_4
close to pin 27
2
+5VA
+1.5V
20121009: FAE Vic request to change 1K ohm from 0 ohm
C527
C812 ANALOG Combo Jack
+ ADOGND ADOGND
0.1u/10V_4 *0/J_4 0/J_4
2.2u/6.3V_6 CN15
R314 C581 C577 4
*SHORT_6 Layout Note: 3
DIGITAL HP-L R364 56/F_4 HP-L-1 R356 HPL_SYS
36
35
34
33
32
31
30
29
28
27
26
25
Place close to Codec U29 ADOGND 0.1u/10V_4 10u/6.3V_6 *SHORT_6
1
+1.5VAVDD2 HP-R R415 56/F_4 HP-R-1 R434 HPR_SYS 2
HP-OUT-L
MIC1-VREFO-L
AVDD1
AVSS1
CPVDD
CBN
CPVEE
HP-OUT-R
MIC1-VREFO-R
VREF
LDO1-CAP
MIC2-VREFO
ADOGND ADOGND Place next to pin 26 *SHORT_6 5
HPOUT_JD 6 7
C486 C496 ADOGND
1
10u/6.3V_6 0.1u/10V_4 37 24 L_SPK2 SIT_2SJ3052-005111F
CBP LINE2-L D19
C516
Place next to pin 40 10u/6.3V_6 38 AVSS2 LINE2-R 23 R_SPK2 SPK-2 D16
*14V/38V/100P_4
D22
*14V/38V/100P_4
*14V/38V/100P_4
ADOGND
2
ADOGND 39 22
LDO2-CAP LINE1-L
ANALOG
40 21
INT MIC
AVDD2 LINE1-R ADOGND ADOGND ADOGND
+5V R335 +5VPVDD1 41 20
*SHORT_6 PVDD1 MIC1-R
C473 C472 C493 C510 L_SPK+ 42 19
SPK-L+ MIC1-L EXT MIC
10u/6.3V_6 0.1u/10V_4 10u/6.3V_6 0.1u/10V_4
SPK-1
L_SPK-
R_SPK-
43
44
SPK-L- MIC2-R 18
17
MIC2-R
MIC2-L
Internal Speaker (AMP) +5V
Output Gain Table
SPK-R- MIC2-L R1 R2 R3 R4 Gain (Differential)
C
Place next to pin 41 R_SPK+ 45 SPK-R+ MONO-OUT 16 Pin1 - Pin6: DGND R376 +5V_AMP
NC NC 0 0 11dB
C
*SHORT_6
+5V R334
*SHORT_6
+5VPVDD2 46 PVDD2 JDREF 15 R413
close to pin 15
20K/F_4 ADOGND Pin7 - Pin12: AGND C532 C551 0 NC NC 0 14dB
GPIO0/DMIC-DATA
Thermal Pad: DGND
GPIO1/DMIC-CLK
C474 C475 C492 C509 PD# 47 14 0.1u/10V_4 10u/6.3V_6
PDB Sense B NC 0 0 NC 19dB
10u/6.3V_6 0.1u/10V_4 10u/6.3V_6 0.1u/10V_4 COMBO_MICJD SENSEA R412 39.2K/F_4 HPOUT_JD
SDATA-OUT
48 13
SPDIFO/GPIO2 Sense A 0 0 NC NC 25dB
LDO3-CAP
close to U5001
SDATA-IN
DVDD-IO
3
4
PCBEEP
RESET#
close to pin 13
BIT-CLK
U30
DVDD
SYNC
DVSS
DIGITAL 49 ANALOG
PVDD1
PVDD2
GND
Place next to pin 46 Spilt by DGND +5VA
ALC3225 6 R_SPK2+
1
10
11
12
OUT-RP
PCBEEP dont coupling any signals if possible R_SPK2 C579 1u/16V_6 R419 1K/F_6 C572 1u/16V_6 9 INPUT-R OUT-RN 5 R_SPK2- R2
DIGITAL 8/17 separate PCBEEP to Digital from Realtek suggestion
EAPD# 7 R1 R396 R384
PD# L_SPK2-
1.6Vrms OUT-LN 2 *0/J_4 *0/J_4
+3V R647 +3VDVDD C821 L_SPK2 C573 1u/16V_6 R410 1K/F_6 C566 1u/16V_6 10 1 L_SPK2+
*SHORT_6 10u/6.3V_6 PCBEEP C561 1u/35V_6 BEEP_1 R365 47K/F_4 BEEP_2 INPUT-L OUT-LP G1
SPKR [7]
close to pin 7 D10 RB500V-40 G2
C800 C797 C554 R392 R418 R402 11 G1 R4
GND
0.1u/10V_4 10u/6.3V_6 4.7K/J_4 1.6K/F_6 1.6K/F_6 G1 G2
PCBEEP_EC [37] 8 BYP G2 12
100p/50V_4 D11 RB500V-40 R395 R383
ALC1001-CGT R3 0/J_4 0/J_4
13
C560 *100p/50V_4 +5V
Place next to pin 1
ADOGND C580
ACZ_RESET#_AUDIO [7]
R420 *20K/F_4 2.2u/6.3V_6
1 2 ADOGND
D18 5.5V/25V/410P_4 Layout Note:
R429 *22K/F_4
Layout Note: Place very close to U5001
DMIC_DATA
ACZ_SYNC_AUDIO [7]
Place very close to U5001 ADOGND 20120928：Follow ME & PDC pin define
DMIC DMIC_CLK +3VDVDDIO R655
*SHORT_6
+3V
CN22
B
C822 C814 R_SPK2+ R414 *SHORT_6 40mil for each signal R_SPK+_2 L_SPK+_2 1
B
R_SPK2- R408 *SHORT_6 R_SPK-_2 L_SPK-_2 2

0.1u/10V_4 10u/6.3V_6 L_SPK2- R398 *SHORT_6 L_SPK-_2 L_SPK+_1 3
L_SPK2+ R390 *SHORT_6 L_SPK+_2 L_SPK-_1 4
Place next to pin 9 R_SPK+ R676 *SHORT_6 R_SPK+_1 R_SPK-_2 5
R_SPK- R675 *SHORT_6 R_SPK-_1 R_SPK+_2 6
ACZ_SDIN0_R R380 33/J_4 C578 C570 C565 C558 L_SPK- R674 *SHORT_6 L_SPK-_1 R_SPK-_1 7 9
ACZ_SDIN0 [7]
*68p/50V_4 *68p/50V_4 *68p/50V_4 *68p/50V_4 L_SPK+ R673 *SHORT_6 L_SPK+_1 R_SPK+_1 8 10
C552 22p/50V_4
SPK CN
C829 C828 C827 C826
ACZ_BITCLK_AUDIO [7]
*68p/50V_4 *68p/50V_4 *68p/50V_4 *68p/50V_4
ACZ_SDOUT_AUDIO [7]
Mono MIC Stereo MIC

INT DIP AMIC(Reserve Stereo) (AMP) CN1 N.C stuff
R6 N.C stuff
R5 stuff N.C
Power(ADO) Mute(ADO)
R379 *0/J_4 +3V
R433 *short_4 CN17

+5V R327 *0/J_4 AMIC1_INTL1_R R696 *short_4 DMIC_DATA
+5VA R382 *short_4 +3V 4
3 C586 *0.1u/10V_4
R326 *short_4 C833
1
L48 UPB201209T-310Y-N/6A/31ohm_8 C596 *1000p/50V_4 62
C588 *1000p/50V_4 51 22p/50V_4
D31
A 0V : Power down Class D SPK amplifer AMIC
TVS/6pF_4 A
R350 3.3V : Power up Class D SPK amplifer
2
ADOGND
ADOGND *10K/J_4
cap place close to MIC-connector
PD# D9 RB500V-40 AMP_MUTE#
DGND plane AGND plane Tied at one point only under
AMP_MUTE# [37]
AMIC1_INTL2_R R697 *short_4 DMIC_CLK
the codec or near the codec
1
D8 RB500V-40 ACZ_RESET#_AUDIO C834
D32 22p/50V_4
TVS/6pF_4 Quanta Computer Inc.
2
PROJECT : ZRI/ZQI
A1A
REALTEK ALC3225
5 4 3 2 1
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5 4 3 2 1
INT & EXT USB2.0 Active Low:

mDP USB3.0 re-driver IC
1st: AL007534000 (Promate)
2nd: AL000547005 (GMT)
3rd: AL002501000 (DDS)
+5V_S5 U12
USB3_TXN1 C99 [email protected]/10V_4 USB3_TXN1_1 8 23 USB3_TXN1_1R R135 REM@0/J_4 USB3_TXN1_2

[7] USB3_TXN1 RX1- TX1- USB3_TXN1_2 [25]
C276 1u/6.3V_4 USB3_TXP1 C88 [email protected]/10V_4 USB3_TXP1_1 9 22 USB3_TXP1_1R R129 REM@0/J_4 USB3_TXP1_2
[7] USB3_TXP1 RX1+ TX1+ USB3_TXP1_2 [25]
CN6
D U17 USB3_RXN1 C86 [email protected]/10V_4 USB3_RXN1_1 11 20 USB3_RXN1_1R R125 REM@0/J_4 USB3_RXN1_2 D
[7] USB3_RXN1 TX2- RX2- USB3_RXN1_2 [25]
2 8 USBP0 1 6 USB3_RXP1 C74 [email protected]/10V_4 USB3_RXP1_1 12 19 USB3_RXP1_1R R119 REM@0/J_4 USB3_RXP1_2
IN1 OUT3 VDD GND6 [7] USB3_RXP1 TX2+ RX2+ USB3_RXP1_2 [25]
1
3 7 USBP0-_R 2 5
IN2 OUT2 C180 C103 C735 USBP0+_R D- GND5
OUT1 6 3 D+
4 4 7 +mDP_USB_RE_PWR 1 R140 *[email protected]/F_4
[37] USBON# EN# 470p/50V_4 0.1u/10V_4 100u/6.3V_3528 GND1 GND7 VCC R544 [email protected]/F_4
1 8 13 5 +mDP_USB_RE_PWR
2
GND GND8 EQ3 VCC EN_RXD
OC# 5 2 EQ1
USB2.0 14 R495 *[email protected]/F_4
UP7534BRA8-15 EQ4 CM R104 [email protected]/F_4
17 EQ2
[7] OC_1# NC1 7
DE3 3 24
DE1 NC2
R126 *short_4 DE4 16 6
DE2 GND *[email protected]_4 R532 +USB_RE_PWR
GND 10
OS3 4 18
OS1 GND *[email protected]_4 R491 +USB_RE_PWR
[7] USBP0- GND 21
OS4 15
[7] USBP0+ OS2
1
R507 R531
R121 *short_4 D4 D3 +3V REM@SN65LVPE502ARGER REM_TI@0/J_4 REM_TI@0/J_4
*5V/30V/0.2p_4 *5V/30V/0.2p_4
+5V_S5 R550 +mDP_USB_RE_PWR
2
*SHORT_6
C234 1u/6.3V_4
U18 CN7
2 IN1 OUT3 8
C 3 IN2 OUT2 7 1 1 13 13 C
USBP3
4
OUT1 6 2
3
2 14 14 Control pins setting
[37] USBON# EN# C307 3
1 GND
5
4
5
4 EN_RXD Device function CM Device function
OC# 5
UP7534BRA8-15
0.1u/10V_4
USBP3-_R
6
7
6
USB3_RXP1
USB3_RXN1
R515
R519
NREM@0/J_4
NREM@0/J_4
USB3_RXP1_2
USB3_RXN1_2
1(default) Normal Operation 0(default) Normal Operation
7
OC_1#
USBP3+_R 8
9
8
USB3_TXN1
USB3_TXP1
R525
R522
NREM@0/J_4
NREM@0/J_4
USB3_TXN1_2
USB3_TXP1_2
0 Sleep Mode 1 Compliance Test Mode
9
[37] NBSWON# 10 10
[26,37] LID591# 11 11
+3VPCU 12 12
USB/B CONN
L55 +mDP_USB_RE_PWR
4 3 USBP3-_R
[7] USBP3- 4 3
1 2 USBP3+_R
[7] USBP3+ 1 2
DLW21HN900SQ2L_C
C652 C65 C698 C672
REM@1U/6.3V_4 [email protected]/16V_4 [email protected]/6.3V_6 REM@470P/50V_4
+mDP_USB_RE_PWR
B B
R494 R543 R493 R542 R492 R541
REM@0_4 REM@0_4 *[email protected]/F_4 *[email protected]/F_4 *[email protected]/F_4 *[email protected]/F_4

EQ3
EQ4
DE3
DE4
OS3
OS4
R103 R139 R102 R138 R101 R137
*[email protected]/F_4 *[email protected]/F_4 *REM@75K/F_4 *REM@75K/F_4 [email protected]/F_4 [email protected]/F_4
A A

PROJECT : ZRI/ZQI
INT&EXT USB A1A

5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
USB3.0/2.0 2012-06-15
USB3.0 re-driver IC
+5VPCU
Active High:
1st: AL007534001 (Promate)
2nd: AL000547006 (GMT)
3rd: AL002511002 (DDS)
C629 1u/6.3V_4
U37
2 8 USBPWR1
IN1 OUT3
D 3 IN2 OUT2 7 D
6 C628
OUT1
1
USB_BC_EN 4 EN C634 1000p/50V_4
1 GND
OC# 5
100u/6.3V_3528
2
UP7534ARA8-15
[7] OC_0#
R59 *short_4
USBP10-_C USB 3.0 Connector

USBP10+_C
CN3
USB3.0_CONN
R58 *short_4 1 1 VBUS
USBP10-_R 2 2 D-
11/15 add cap for RF suggest R56 *short_4 USBP10+_R 3 3 D+
4 4
USB3_RXN0 USB3_RXN0_R GND
[7] USB3_RXN0 5 5 SSRX-
USB3_RXP0 USB3_RXP0_R 6
[7] USB3_RXP0 6 SSRX+
7 7
USB3_TXN0_R GND
C 8 8 C
C45 C44 R57 *short_4 USB3_TXP0_R SSTX-
9 9 SSTX+
*1.6P/50V_4 *1.6P/50V_4
13
12
11
10
R62 *short_4
13
12
11
10
USB3_TXN0 C49 0.1u/10V_4 USB3_TXN0_C
[7] USB3_TXN0
USB3_TXP0 C50 0.1u/10V_4 USB3_TXP0_C
[7] USB3_TXP0
R63 *short_4
C28 C27
*1.6P/50V_4 *1.6P/50V_4
11/15 add cap for RF suggest
USB Charger to 3.0
CB SELCDP Funcion
B 0 X DCP autodetect with mouse/keyboard wakeup B

USBP10-_R RV7 1 2 *EGA_4
1 0 S0 charging with SDP only
USBP10+_R RV6 1 2 *EGA_4
1 1 S0 charging with CDP or SDP only (depending on external device)
USB3_RXN0_R RV4 1 2 *EGA_4
USB3_RXP0_R RV5 1 2 *EGA_4
U6 R93 CH@0_4 USB_CHARGE_ON [37]

BC_CEN 1 8 R78 *CH@0_4 MAINON [37,40,41,47] USB3_TXN0_R RV2 1 2 *EGA_4
USBP10-_C CEN CB1
2 DM TDM 7 USBP10- [7]
USBP10+_C 3 6 USB3_TXP0_R RV3 1 2 *EGA_4
DP TDP USBP10+ [7]
4 5 C59 [email protected]/10V_4
SELCDP VDD
Thermal Pad 9
CH@SLG55584A
R482 CH@10K_4 +5VPCU

CEN:SLG55584A----pull up +3VPCU
R472 NCH@0_4 SLG55584----pull low
R471 NCH@0_4
R478 CH@47K_4 C642 *[email protected]/10V_4
5
BC_CEN 2
A 4 USB_BC_EN A
USB_BC_ON 1
[37] USB_BC_ON
U38
3
CH@TC7SH08FU
R466 NCH@0_4 Quanta Computer Inc.

PROJECT : ZRI/ZQI
INT&EXT USB A1A

5 4 3 2 1
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5 4 3 2 1
7 8 MX2
K/B(KBC) 5 6 MX3
MX4
TOUCHPAD BOARD CONN(TPD)
3 4
CN19 1 2 MX5
MY0 26 CP6 *100p/50Vx4
[37] MY0 +3V
MY1 25 28 7 8 MX6
[37] MY1
MY2 24 27 5 6 MX7
[37] MY2
MY3 23 3 4 MY17
[37] MY3
MY4 22 1 2 MY16
[37] MY4
MY5 21 CP5 *100p/50Vx4
[37] MY5
D MY6 20 7 8 MY3 R406 R416 D
[37] MY6 20121005 SWAP keyboard pin-define
MY7 19 5 6 MY2 Q33 2.2K_4 2.2K_4
[37] MY7
MY8 18 3 4 MY1 5
[37] MY8
MY9 17 1 2 MY0
[37] MY9
MY10 16 CP1 *100p/50Vx4 3 4 SDATA1_TP
[37] MY10 +3VPCU [7,30] SDATA1
MY11 15 7 8 MY7
[37] MY11
MY12 14 5 6 MY6
[37] MY12
MY13 13 3 4 MY5 2
[37] MY13
MY14 12 RP6 10K_10P8R 1 2 MY4
[37] MY14
MY15 11 10 1 MX3 CP2 *100p/50Vx4 6 1 SCLK1_TP
[37] MY15 [7,30] SCLK1
MY16 10 MX4 9 2 MX2 7 8 MY11
[37] MY16
MY17 9 MX5 8 3 MX1 5 6 MY10
[37] MY17
MX7 8 MX6 7 4 MX0 3 4 MY9 2N7002DW
[37] MX7
MX6 7 MX7 6 5 1 2 MY8
[37] MX6
MX5 6 CP3 *100p/50Vx4
[37] MX5
MX4 5 7 8 MY15 R407 *0_4
[37] MX4
MX3 4 5 6 MY14
[37] MX3
MX2 3 3 4 MY13 R430 *0_4
[37] MX2
MX1 2 1 2 MY12
[37] MX1
MX0 1 CP4 *100p/50Vx4
[37] MX0
C583 *100p/50V_4 MX1
KB_CONN C584 *100p/50V_4 MX0
C C
+3V R439 0_4 +3V L59 0_6
L60 *0_6
KB_BL LED +5V +5V
+5V R440 *0_4
+5V
R431 R432 C825

C585 *[email protected]/10V_6 0.1u/10V_4 50mil
R438 10K_4 10K_4 CN16
1
KBL@10K_4 +TPVDD 1
Q34 L47 *short_6 TPCLK_R 2
[37] TPCLK
2 KBL@AO3413 L46 *short_6 TPDATA_R 3
[37] TPDATA
4
SDATA1_TP 5
3
C562 C563 SCLK1_TP 6

CN20 *0.01u/16V_4 *0.01u/16V_4 7 9
[7] SMBALERT#
3
2 +5V_KB R404 *short_4 +5V_KB_R 8 10

[37] KB_BL_LED 4 [9] BOARD_ID2
Q35 C575 C569 3 6
KBL@DTC144EUA 2 5 TP_CN
1
[email protected]/6.3V_6 [email protected]/25V_4 1 LOW=ELAN

KBL@KB_backlight HIGH=SYNAPTICS
B B
If need to support XT(25) GPU, need check with thermal

CPU FAN(THM)
+3V +5V +3V +5V
FAN2 For GPU
+3V +5V +3V +5V
FAN1 For CPU R453 R452
10K/J_4
R455
10K/J_4
R457
1K/J_4 *short_8
R237 R240 R261 R604

1K/J_4 10K/J_4 10K/J_4 *short_8 CN5
[37] FANSIG2
+5V_FAN2
4 6
2
CN10 3 5
[37] FANSIG1 2
+5V_FAN1 1 3 FAN_PWM_CN2
4 6 [37] CPUFAN2 1
2
3 5 Q36 FAN2
2 30mil
1 3 FAN_PWM_CN1 MMBT3904-7-F_200MA
A [37] CPUFAN1 1 A
Q27 30mil FAN1

MMBT3904-7-F_200MA
PROJECT : ZRI/ZQI
KB/TP/FAN A1A

5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
LED(UIF)
HOLE(OTH)
HOLE1 HOLE13 HOLE20 HOLE21 Power

*hg-c236d118p2 *hg-c236d118p2 *hg-c236d118p2 MBZRQ002010
7 6 7 6 7 6
8 5 8 5 8 5 +3V_S5 R22 1M_4
D D
9 4 9 4 9 4
R13 1M_4
Blue
1
2
3
1
2
3
1
2
3
1
LED_B/R +3V_S5
R12 300_4 3 1
[37] PWRLED#
R21 680_4 4 2
[37] SUSLED#
HOLE16 HOLE4 HOLE5 HOLE9 HOLE2
SSD@MBZRQ002010 *hg-c236d118p2 *hg-te382x675bc236d118p2 *hg-c236d118p2 *hg-c236d118p2
7 6 7 6 7 6 7 6 7 6 LED1
8
9
5
4
8
9
5
4
8
9
5
4
8
9
5
4
8
9
5
4
Amber
Battery
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
+3VPCU R28 1M_4
R29 1M_4
Blue
BATT Enable short pad LED_B/R +3VPCU
R15 300_4 3 1
C [37] BATLED0# C
HOLE15 HOLE18 SW1
* H-C236D165P2 *h-te236x236bc236d158p2 R14 680_4 4 2
[37] BATLED1#
TP75 3 2 TP66
3 2 4 1
LED2
Lid Switch Amber

1
BATT_EN# [38]
EE RETURN-PATH CAPACITORS(EMC)
HOLE3 HOLE14 HOLE8
*hg-c276d118p2 *hg-c276d118p2 *HG-C236D118P2
7 6 7 6 7 6 +3V +3V +VGPU_CORE +VGPU_CORE +1.1V +1.1V VIN
8 5 8 5 8 5
9 4 9 4 9 4
1
2
3
1
2
3
1
2
3
B B
C638 C637 C753 C323 C432 C449 C394
*1000p/50V_4 *0.1u/25V_4 *1000p/50V_4 *0.1u/25V_4 *1000p/50V_4 *0.1u/25V_4 0.1u/25V_4
HOLE6 HOLE10 HOLE12 HOLE7 HOLE11

EV@MBZRQ001010 EV@MBZRQ001010 *h-tc150bc256d150p2 *h-tc150bc256d150p2 *h-tc150bc256d150p2
+5V_S5 +5V_S5 +VDDNB_CORE +VDDNB_CORE VIN VIN VIN VIN

1
C216 C217 C732 C733 C134 C310 C329 C622

*1000p/50V_4 *0.1u/25V_4 *1000p/50V_4 *0.1u/25V_4 0.1u/25V_4 0.1u/25V_4 0.1u/25V_4 0.1u/25V_4
PAD1 HOLE22 HOLE23 PAD2 PAD3 PAD4 PAD5

52ZRKMATN00 *SPAD-RE140X72NP *SPAD-RE300X94NP *spad-zri-np *spad-zri-np *spad-zri-1np *spad-zri-1np
A A

1
2
3
4
5
6
PROJECT : ZRI/ZQI
LAN DB/ LED/ EMI/ Hole A1A

5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
EC(KBC) L31 PBY160808T-250Y-N/3A/25ohm_6 +A3VPCU

+3V
C408 C421
30mil
0.1u/10V_4 10u/6.3V_6
+3VPCU E775AGND
R295 2.2_6 R340 C500 C498
1 2 +3VPCU_EC 0.03A(30mils) C443 *short_6
4.7u/6.3V_6 0.1u/10V_4
C789 C435 C773 C774 C436 C793 1u/6.3V_4
115
102
19
46
76
88
44
4
4.7u/6.3V_6 0.1u/10V_4 *0.1u/16V_4 0.1u/10V_4 39p/50V_4 0.1u/10V_4 U23
VCC1
VCC2
VCC3
VCC4
VCC5
AVCC
VCORF
VDD
D E775AGND C393 10u/6.3V_6 ICM D
C389 0.01u/16V_4 SM BUS PU(KBC)

[8,30,31] LPC_LFRAME# 3 LFRAME/GPIOF6 GPIO90/AD0 97 TEMP_MBAT [38]
[8,30,31] LPC_LAD0 126 LAD0/GPIOF1 GPIO91/AD1 98 PCIE_WAKE#_WLAN [30] +3VPCU
[8,30,31] LPC_LAD1 127 LAD1/GPIOF2 A/D GPIO92/AD2 99 TP58
ICM
[8,30,31] LPC_LAD2 128 LAD2/GPIOF3 GPIO93/AD3 100 ICM [38]
[8,30,31] LPC_LAD3 1 LAD3/GPIOF4
[8,11] CLK_PCI_EC 2 LCLK/GPIOF5
CLK_PCI_EC 101 TP59
GPIO94/DA0 S5_ON R627 10K_4
[8,31] CLKRUN# 8 GPIO11/CLKRUN D/A GPI95/DA1 105 TP42
R281 AC@0_4 MBCLK R253 4.7K_4
GPI96/DA2 106 EC_WLAN_WAKE# [7]
121 MBDATA R254 4.7K_4
[7] SIO_A20GATE GPIO85/GA20
R317
[7] SIO_RCIN# 122 KBRST/GPIO86
*22_4 64
GPIO01/TB2 ACIN [38]
29 LPC 79 BC_EN TP39 +3V_S5
[7] SIO_EXT_SCI# ECSCI/GPIO54 GPIO02/SPI_CS
95 NBSWON#_R R243 *Short_4
GPIO03/AD6 NBSWON# [33]
6 96 TP40 APU_SIC_EC R256 1K_4
[26] EC_FPBACK# GPIO24 GPIO04/AD5
C478 108 APU_SID_EC R255 1K_4
GPIO05/AD4 IOAC_RST# [30]
*10p/50V_4 [32] AMP_MUTE# 124 GPIO10/LPCPD GPIO06/IOX_DOUT/RTS1 93 LID591# [26,33]
94 GPU_ID
GPIO07/AD7/VD_IN2 +3V_GFX
[7,8,30,31] PLTRST# 7 LREST/GPIOF7 GPIO16 114 KB_BL_LED [35]
GPIO30/F_WP 109 +1.1V_DUAL_EN [42]
EMI reserve 123 15 GPUT_CLK R304 EV@1K_4
[30] RF_EN GPIO67/PWUREQ GPIO36 DGPU_AC_DC# [16]
80 VRON TP38 GPUT_DATA R308 EV@1K_4
GPIO41 HWPG
[8,31] IRQ_SERIRQ 125 SERIRQ/GPIOF0 GPIO42/SCL3B/TCK 17
GPIO43/SDA3B/TMS 20
[7] SIO_EXT_SMI# 9 GPIO65/SMI GPIO44/TDI 21 SUSB# [7]
GPIO GPO47/SCL4 24 TP48
GPIO50/PSCLK3/TDO 25 D/C# [38]
[35] MX0 54 KBSIN0/GPIOA0 GPIO51 26 S5_ON [39,47]
[35] MX1 55 KBSIN1/GPIOA1 GPIO52/PSDAT3/RDY 27 HDMI_HPD_EC# [27]
56 28 +3V_S5
C [35] MX2 KBSIN2/GPIOA2 GPIO53/SDA4 TP49 C
[35] MX3 57 KBSIN3/GPIOA3 GPIO70 73 SUSC# [7]
58 74 PCH_RSMRST# R252 *8.2K_4
[35] MX4 KBSIN4/GPIOA4 GPIO71 PWROK_EC [11]
[35] MX5 59 KBSIN5/GPIOA5 GPIO72 75 PCH_RSMRST# [7]
[35] MX6 60 KBSIN6/GPIOA6 GPIO75/SPI_SCK 82 MAINON [34,40,41,47]
61 83 PCIE_RST#_EC R251 *AC@0_4 +3VPCU
[35] MX7 KBSIN7/GPIOA7 GPO76/SPI_MOSI FCH_PCIE_RST# [7,28,30]
GPIO77/SPI_MISO 84
53 104 GPU_ID R244 [email protected]_4
[35] MY0 KBSOUT0/JENK/GPIOB0 GPIO80/VD_IN1 DNBSWON# [7]
[35] MY1 52 KBSOUT1/TCK/GPIOB1 GPO82/IOX_LDSH/VD_OUT1 110 TP62
[35] MY2 51 KBSOUT2/TMS/GPIOB2 GPO84/IOX_SCLK/VD_OUT2 112 USBON# [33] GPU_ID : H = Mars
[35] MY3 50 KBSOUT3/TDI/GPIOB3 GPIO97/DA3 107 USB_CHARGE_ON [34] L = Thames
[35] MY4 49 KBSOUT4/JEN0/GPIOB4 KB
[35] MY5 48 KBSOUT5/TDO//GPIOB5
[35] MY6 47 KBSOUT6/RDY/GPIOB6 GPIO56/TA1 31 FANSIG2 [35]
[35] MY7 43 KBSOUT7/GPIOB7 GPIO20/TA2/IOX_DIN_DIO 117 SUSON [40]
[35] MY8 42 KBSOUT8/GPIOC0 GPIO14/TB1 63 FANSIG1 [35]
[35] MY9 41 KBSOUT9/SDP_VIS
[35] MY10 40 KBSOUT10/P80_CLK TIMER GPIO15/A_PWM 32 CPUFAN2 [35]
[35] MY11 39 KBSOUT11/P80_DAT GPIO21/B_PWM 118 PCBEEP_EC [32]
[35] MY12 38 KBSOUT12/GPIO64/TEST GPIO13/C_PWM 62 PWRLED# [36]
[35] MY13 37 KBSOUT13/GPIO63/TRIST GPIO32/D_PWM 65 BATLED0# [36] H_PROCHOT# [5,8]
[35] MY14 36 KBSOUT14/GPIO62/XORTR GPIO45/E_PWM 22 CPUFAN1 [35]
3
35 16 SUSLED#
[35] MY15 KBSOUT15/GPIO61/XOR_OUT GPIO40/F_PWM/1_WIRE SUSLED# [36]
34 81 Q29
[35] MY16 GPIO60/KBSOUT16 GPIO66/G_PWM WLAN_OFF [30]
[35] MY17 33 GPIO57/KBSOUT17 GPIO33/H_PWM/VD1_EN 66 BATLED1# [36]
PROCHOT_EC 2
MBCLK 70
[7,38] MBCLK GPIO17/SCL1
MBDATA 69 R286 2N7002K
[7,38] MBDATA GPIO22/SDA1
[5] APU_SIC_EC APU_SIC_EC 67 SMB 113 USB_BC_ON [34]
1
APU_SID_EC GPIO73/SCL2 GPIO87/SIN_CR 100K_4
[5] APU_SID_EC 68 GPIO74/SDA2 GPIO34 14 +1.1V_EN [42]
GPUT_CLK 119 IR 23
[16] GPUT_CLK GPIO23/SCL3 GPIO46/TRST IOAC_LANPWR# [30]
GPUT_DATA 120 111 PROCHOT_EC
[16] GPUT_DATA GPIO31/SDA3 GPO83/SOUT_CR
B SPI_SDO_UR_R R247 33_4 B
SPI_SDO [9]
72 87 R248 *short_4
[35] TPCLK GPIO37/PSCLK1 F_SDO/F_SDIO0 SPI_SDI [9]
71 86 SPI_SDI_UR R249 100K/F_4
[35] TPDATA GPIO35/PSDAT1 F_SDI/F_SDIO1
TP63 10 GPIO26/PSCLK2 PS/2 FIU GPIO81/F_SDIO2/F_WP 91
[30] BT_POWERON 11 GPIO27PSDAT2 GPIO00/32KCLKIN/F_SDIO3 77
90 SPI_CS0#_UR R246 33_4
F_CS0 SPI_CS [9]
+3VPCU 47K/F_4 R250 VCC_POR# 85 92 SPI_SCK_UR_R R245 33_4
VCC_POR F_SCK SPI_SCK [9]
+3V
GPIO55/CLKOUT/IOX_DIN_DIO 30 TP50 HWPG(KBC)
12 VTT
AGND
GND1
GND2
GND3
GND4
GND5
GND6
13 R339
TP64 PECI
NPCE985L 10K/J_4
5
18
45
78
89
116
103
D13 RB500V-40 HWPG

SM BUS ARRANGEMENT TABLE [40] HWPG_VDDR
D15 RB500V-40
[41] HWPG_1.2V
L27 PBY160808T-250Y-N/3A/25ohm_6 SM Bus 1 Battery, FCH
D14 RB500V-40
[42] HWPG_1.1V_DUAL
SM Bus 2 APU D12 RB500V-40
[39] SYS_HWPG
E775AGND
SM Bus 3 GPU
Placement for EC of VIN power plan 3/5VPCU reset switch (CLG)

A A
VIN
SW2
NBSWON# 3/5V_SW
TP77 2 3 SYS_SHDN# [5,16,39,44,47]
C317 C619 C373 C119 4 1 TP76
1
1
0.1u/25V_4 0.1u/25V_4 0.1u/25V_4 0.1u/25V_4 G1 C837 D33

5
0.1u/16V_4 *14V/38V/100P_4
2
*SHORT_PAD
2
PROJECT : ZRI/ZQI
A1A
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NPCE885/FLASH
5 4 3 2 1
5 4 3 2 1
VA2 PR37
VA1 PQ7 PD1 0.01/F_0612 PQ23
AOL1413 SBR1045SP5-13 VIN AOL1413
CN9 1 1 1
1 2 5 3 1 2 2 5
2 3 2 3
PR57
3
1
*Short_4
4 PC148 PC48 PR43 24737_ACN PC38 PC37 PR139
4
Power conn 0.1u/50V_6 0.1u/50V_6 220K_4 0.1u/50V_6 2200p/50V_6 33K/F_4
PD6
SMAJ20A 24737_ACP
2
D PC150 PC39 PR56 C-Test D
0.1u/50V_6 2200p/50V_6 1 6 *Short_4
PD7 PR44
C-Test PR135
2 5 D/C# [37]
1N4148WS 220K_4 10K_4
recommend 200mA at least. 3 4 PR63
*Short_4
PQ9
3
IMD2AT108
2
24737_ACP
PQ19
2N7002K
C-Test 24737_ACN
1
PR102
*Short_6 PC85 PC88 PC84
0.1u/50V_6 0.1u/50V_6 0.1u/50V_6
PR113
63.4K/F_4
1
VIN
PR114 PC97
ACP
ACN
10K/F_4 1u/16V_6
+3VPCU +3VPCU 24737_ACDET 6 16 24737_REGN
ACDET REGN
C C
C-Test PD4
24737_VCC 20 RB500V-40
PR111 PR110 VCC PR123 PC99 PC100
100K_4 100K_4 PR106 PC94 *Short_6 2200p/50V_6 4.7u/25V_8
20_1206 0.47u/25V_6 17 24737_BST
BTST
5
[37] ACIN
PC95
3
47n/50V_6
PQ20
18 24737_DH 4 MDV1528
HIDRV
2 5 ACOK#
PQ15 19 24707_LX
3
2
1
2N7002K PHASE PR147
C-Test 0.01/F_0612
1
BATT_EN# MBDATA 8 PU7 PL13

[36] BATT_EN# SDA BQ24737RGRR 6.8uH_7X7X3
PR116 15 24737_DL 1 2 BAT-V
*Short_4 LCDRV
MBCLK 9 SCL
5
PC115 +3VPCU PR117
R-Test
0.1u/50V_6 PR129 *Short_4 14
10K_4 PGND
24737_BM# 11 4 PR142 PR141
PC192 BM# PQ18 *Short_4 *Short_4
B
*100p/50V_4 PR112 PR131 PC107 MDV1528 B
*10K_4 24737_CMPOUT 3 10/F_6 0.1u/25V_4 C-Test
3
2
1
CMPOUT 24737_SRP 24737_SRP PC114 PC185 PC179
SRP 13
2200p/50V_6 4.7u/25V_8 10u/25V_1206
50458-00801-V01
BAT-V 24737_ILIM 10 PC104 24737_SRN

ILIM
PJ1 0.1u/25V_4 3/25 PC184 change
9 8
PR128 to 0805 size by ME.
7
PR136 316K/F_4 24737_CMPIN 4
CMPIN SRN 12 24737_SRN 1/23 Del PR140,PC110 require (MT)
6
BATT_EN# 100_4 by ME require. (MT)
TEMP_MBAT PR130
IOUT
GND
GND
GND
GND
GND
5 TEMP_MBAT [37]
7.5_6 PC106
4 0.1u/25V_4
3 For battery reverse
PR134 PR115
21
22
23
24
25
2 1M_4 PR120
10 1 *100K_4
*100K_4
+3VPCU
PR124 PC98
100K/F_4 0.01u/25V_4
3
PR138
*0_4 PR118 PR122
100_4 100_4
1/23 Don't mount 24737_BM# 2 [37] ICM ICM
PR138 by Weiting. MBCLK [7,37]
(MT) PQ17
*2N7002K
MBDATA [7,37]
1
A PC89 A
PU9 100p/50V_4
IP4223-CZ6
REGN MAX voltage 6.5V
MBDATA
1 CH1 CH4 6 V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
2 VN VP 5 +3VPCU =0.793V for 3.965A current limit Quanta Computer Inc.
TEMP_MBAT MBCLK
3 CH2 CH3 4 PROJECT : ZRI/ZQI
Pin10 ILIM=0.793V Size Document Number Rev
Add ESD diode base on EC FAE suggestion Rsr = 0.01ohm Charger(BQ24737RGRR) A1A
5 4 3 2 1
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5 4 3 2 1
MAIND SYS_SHDN#
MAIND [40,47] SYS_SHDN# [5,16,37,44,47]
C-Test
PR105
*Short_6
+3VPCU VL 3V_LDO
PR233
C-Test
C-Test 10K/F_4
D [37] SYS_HWPG D
VIN VIN
SYS_SHDN#
10u/6.3V_8
0.1u/25V_4
4.7u/6.3V_6
C-Test
PR234 PR235 PR237
PC92 PC91 *Short_4 *Short_4 *100K/F_4
PC93
PC181
4.7u/25V_8 2200p/50V_6 PC166 PC168
51225_VIN
PC83
2200p/50V_6 4.7u/25V_8
+5VPCU +5VPCU
5
+3VPCU
5 Volt +/- 5%
5
TDC : 6.6A PQ51
MDV1528 +3VPCU
13
12
3
PEAK : 8.8A 4 3.3 Volt +/- 5%
PQ16 4 C-Test
VIN
VREG5
VREG3
OCP : 10A MDV1528 TDC : 5.8A
7 6 SYS_SHDN#
Width : 280mil
3
2
1
PGOOD EN2
PEAK : 7.7A
1
2
3
C-Test 51225_EN1 20 10 51225_DH2
EN1 DRVH2 PR241 PC170 OCP : 9A
PL10 51225_DH1 16 9 51225_VBST2 PL8
2.2uH_7X7X3 PC172 PR242 DRVH1 VBST2 2.2uH_7X7X3 Width : 240mil
51225_VBST1 17 8 51225_SW2 1/F_6 0.1u/50V_6
VBST1 PU12 SW2
0.1u/50V_6 1/F_6 51225_SW1 18 TPS51225RUKR 11 51225_DL2
SW1 DRVL2
5
C PR109 51225_DL1 15 4 51225_FB2 PR104 C
15K/F_4 DRVL1 VFB2 PQ52 6.49K/F_4
PQ54 51225_FB1 2 21 MDV1595S PR99
+ MDV1595S VFB1 GND *4.7_6 +
4 4
14 VO1 GND 22
VCLK
PC165 PC167 PC72 PC158
GND
GND
GND
GND
CS1
CS2
220u/6.3V_6X4.2 0.1u/50V_6 0.1u/50V_6 220u/6.3V_6X4.2
1
2
3
3
2
1
PC81
PR103 *680p/50V_6 PR108
19
26
25
24
23
10K/F_4 10K/F_4
1/23 Del PR240,PC171
51225_CS1
51225_CS2
51225_VCLK
by ME require. (MT)
97.6K/F_4
86.6K/F_4
OCP:9A
PC82 L(ripple current)
2 0.1u/50V_6
PD2
C-Test =(9-3.3)*3.3/(2.2u*0.355M*9)
1PS302 3
OCP:9A 1
PR236
~2.676A
Iocp=9-(2.676/2)=7.66A
L(ripple current) *Short_6 C-Test Vth=(7.66A*14mOhm)+1mV=108.27mV
PR101
PR107
PC86
=(9-5)*5/(2.2u*0.3M*9) 0.1u/50V_6
R(Ilim)=(108.27mV*8)/10uA
PR100
=3.367A 2 *Short_6 =86.614K
Iocp=10-(3.367/2)=8.32A PD3
3
10/16 change
B
Vth=(8.32A*14mOhm)+1mV=117.43mV 1PS302 PC87 B
0.1u/50V_6
R(Ilim)=(117.43mV*8)/10uA 1
=93.994K
+15V_ALWP
+15V
PR254
22_8 PC188
0.1u/50V_6
VIN +3V_S5 +5V_S5 +15V VIN +5VPCU +5VPCU +3VPCU

+3VPCU
PR157 PR149 PR148 PR150 PR156

5
5
1M_6 22_8 22_8 1M_6 *1M_6
3
3
S5D 2 MAIND 4 MAIND 4 S5D 2
A PQ13 PQ11 A
3
MDV1528Q MDV1528Q
PQ14 PQ59
3
2
1
3
2
1
2 AO3404 AO3404
[37,47] S5_ON
1
1
2 2 2
+5V_S5 +5V +3V +3V_S5
PR151 PQ31 PQ30 PQ29
1
PQ32 1M_6 2N7002K 2N7002K 2N7002K

DTC144EU PC113
TDC : 1.5A TDC : 2.5A TDC : 2.35A TDC : 1.5A
1
*2.2n/50V_4
PEAK : 2A PEAK : 3.4A PEAK : 3.2A PEAK : 2A
PROJECT : ZRI/ZQI
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Width : 60mil Width : 100mil Width : 100mil Width : 60mil SYSTEM 5V/3V (TPS51225) A1A

5 4 3 2 1
5 4 3 2 1
TDC : 0.75A +0.75V_DDR_VTT

PEAK : 1A
Width : 40mil
PC180 PC96
10u/6.3V_8 10u/6.3V_8
D TDC : 0.38A D
+SMDDR_VREF
PEAK : 0.5A
Width : 20mil
Close to IC
Greater than or equal 40mil
PC184
0.22u/10V_4
+5V_S5
+3V
PC176 PC103
C-Test
22
21
10u/6.3V_8 1u/10V_4
2
PR126
VIN
100K/F_4
VTTSNS
PAD
PAD
VTTREF
VTTGND
VTT
VLDOIN
PQ21 +1.5VSUS
RJK03J6DPA 1.5 Volt +/- 5%
5
[37] HWPG_VDDR 20 PGOOD V5IN 12
C
PC112
4.7u/25V_8
TDC : 11.3A C
C-Test
[34,37,41,47] MAINON
PR252 51216_S3 17 S3 DRVH 14 51216_DRVH 4 PEAK : 15A
*Short_4 PR133 PC105
2_6 0.1u/50V_6 PC109 PC111 OCP : 18A
1
2
3
PR253 51216_S5 16 15 51216_VBST 2200p/50V_4 4.7u/25V_8 C-Test
[37] SUSON
*Short_4 S5 PU10 VBST Width : 480mil
TPS51216RUKR
PR247 51216_MODE 19 13 51216_SW +1.5VSUS
200K/F_4 MODE SW
PL12
5
PR250 51216_TRIP 18 11 51216_DRVL 0.68uH_7X7X3
53.6K/F_4 TRIP DRVL
VDDQSNS
PR137
26 10 4 *4.7_6
PAD PGND
REFIN
GND
PAD
PAD
PAD
REF
PQ58
1
2
3
RJK03K5DPA +
VREF=1.8V PC108 PC175
6
25
24
23
7 *680p/50V_6 0.1u/50V_6 PC174

C-Test 330u/2.5V_6X4.2
51216_REFIN
PR246
B PC186 *Short_6 RDSon=4.3mohm +1.5VSUS
B
51216_S3 PR249 51216_S5 0.1u/10V_4
*0_4
PR248
10K/F_4 Close to output cap
3
[39,47] MAIND 2
PR251 PC187 Mode Frequency Discharge mode PQ60

51K/F_4 0.01u/25V_4 AO3404
1
200K 400K Tracking Discharge +1.5V
100K 300K Tracking Discharge TDC : 0.38A

PEAK : 0.5A
OCP=18A Width : 20mil
A L ripple current S3 S5 +1.5VSUS REF VTT A
=(19-1.5)*1.5/(0.68u*400k*19)
=5.079A
S0 1 1 ON ON ON Quanta Computer Inc.
Vtrip=18-(5.079/2)*4.3mohm
=0.06647V
S3 (mainon off) 0 1 ON ON OFF PROJECT : ZRI/ZQI
Rlimit=0.06647/10uA*8=53.183Kohm
S4/S5 0 0 OFF OFF OFF A1A
DDR 1.5V(TPS51216)
5 4 3 2 1
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5 4 3 2 1
C-Test
VIN
D D
+5V_S5
+3V
PC119 PC3 PC117

1u/10V_4 2200p/50V_6 4.7u/25V_8
5
PR160
100K/F_4
7
C-Test PQ1
C-Test MDV1528
V5IN
51211V_DRVH 4
1 9 PR1 PC4
[37] HWPG_1.2V PGOOD DRVH +1.2V
*Short_6 0.1u/50V_6 C-Test
VDDA_PWRGD 51211V_EN 3 10 51211V_VBST PL1
3
2
1
PR159 *Short_4 EN VBST 2.2uH_7X7X3
51211V_TRIP 2 PU1 8 51211V_SW
PR4 86.6K/F_4 TRIP TPS51211DSCR SW
PR3 51211V_TST 5 6 51211V_DRVL
*100K/F_4 PR2 464K/F_4 TST DRVL
5
C
12 GND GND 11
PR5 +1.2V C
GND
GND
GND
GND
7.15K/F_4
1.2 Volt +/- 5%
FB
+
4 TDC : 5.25A
13
14
15
16
4
PC1 PC2
51211V_FB 0.1u/50V_6 330u/2V_7343 PEAK : 7A
PQ2
OCP : 8.5A
3
2
1
MDV1595S PR6
OCP=8.5A 10K/F_4
Width : 220mil
L ripple current
=(19-1.2)*1.05/(2.2u*290k*19)
=1.762A
Vtrip=8.5-(1.762/2)*14mohm
=0.10666V
Rlimit=0.10666/10uA*8=85.322Kohm
B B
PR9
100K_4
PC5 +5VPCU
+3V
C-Test 1u/16V_6 PU2
G9661-25ADJF12U
4 VPP PGOOD 1 VDDA_PWRGD
VDDA_PWRGD [43]
[34,37,40,47] MAINON 2 VEN VO 6 +2.5V

PR11 *Short_4
+3VPCU 3 VIN PR7 +2.5V
8 GND R1
ADJ
9 GND NC 5 73.2K/F_4
PC7
2.5 Volt +/- 5%
10u/6.3V_8 TDC : 0.6A
7
PR10
100K_4 PEAK : 0.75A
0.8V PR8 Width : 40mil
PC6 PC8 PC9
10u/6.3V_8 0.1u/50V_6 *0.1u/50V_6
R2 34K/F_4
A A
Vout =0.8(1+R1/R2)
=2.5V Quanta Computer Inc.
PROJECT : ZRI/ZQI
+1.2V(TPS51211)/+2.5V A1A

5 4 3 2 1
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5 4 3 2 1
D D
C-Test
VIN
+5V_S5
+3V
PC71 PC156 PC154

1u/10V_4 2200p/50V_6 4.7u/25V_8
5
PR92
*100K/F_4
7
PQ50
C-Test C-Test MDV1528
V5IN
DUAL_DRVH 4
PR93 PC74 +1.1V_DUAL
[37] HWPG_1.1V_DUAL 1 PGOOD DRVH 9
*Short_6 0.1u/50V_6
C-Test
DUAL_EN 3 10 DUAL_VBST PL9
[37] +1.1V_DUAL_EN
3
2
1
PR98 *Short_4 EN VBST 2.2uH_7X7X3
DUAL_TRIP 2 PU6 8 DUAL_SW
C TRIP TPS51211DSCR SW C
PR94 60.4K/F_4
PR97 DUAL_TST 5 6 DUAL_DRVL
*100K/F_4 PR74 464K/F_4 TST DRVL
5
12 GND GND 11
PR85 PR87
GND
GND
GND
GND
*4.7_6 5.76K/F_4
+1.1DUAL
FB
+
4 1.1 Volt +/- 5%
13
14
15
16
4
PC80 PC164
DUAL_FB
PQ49 PC73
0.1u/50V_6 330u/2.5V_6X4.2 TDC : 3.75A
3
2
1
MDV1595S *680p/50V_6 PR81 PEAK : 5A
10K/F_4
OCP : 6A
Width : 150mil
OCP=6A
L ripple current
=(19-1.1)*1.1/(2.2u*290k*19) +5V_S5 +15V +1.1V_DUAL
B +1.1V B
=1.624A
Vtrip=6-(1.624/2)*14mohm
=0.0726V
5
PR256 PR255 PR244
Rlimit=0.0726/10uA*8=58.103Kohm 10K/F_4 22_8 1M_4
4
PQ53
+1.1V
3
PR239 MDV1528Q
*Short_4 C-Test TDC : 2.8A
3
2
1
[3,5,7,8,9,10,11,12,13,25,26,27,30,31,32,33,35,36,37,39,40,41,43,44,45,46,47] +3V 2 2 2 PEAK : 3.8A
[37] +1.1V_EN PQ55 PQ57 PQ56
+1.1V Width : 120mil
2N7002K 2N7002K 2N7002K PC183
PC169 *2200p/50V_4
1
1
PR238 *0.1u/10V_4
*0_4
A A

PROJECT : ZRI/ZQI
+1.1V_DUAL(TPS51211) A1A

5 4 3 2 1
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5 4 3 2 1
+VDDNB_CORE
PC138
330p/50V_4
PR52
10_4 C-Test
C-Test Load line setting
[5] APU_VDDNB_RUN_FB_H PR48
+5V_S5 2.2/F_6 VIN
PR61 PR58 Close with BOOT_NB
2200p/50V_4
*Short_4 3.01K/F_4
PHASE_NB inductor
0.1u/50V_6
4.7u/25V_8
4.7u/25V_8
4.7u/25V_8
Close to the RC time
1
PC57
PC146
PC66
PC147
PC62
PC46
CPU side. PC52 PR51
constant 0.22u/25V_6 +
D D
100p/50V_4 499/F_4 C-Test VSUMG+
2
UGATE_NB 4 PC149
2
47u/25V_6X4.5
PR36
PR38
1/F_6
PC139 PR197 PR207
1
2
3
47n/16V_4
*Short_6
0.15u/10V_4
680p/50V_4 2K/F_4 10K_6_NTC PQ44 PL7
PC41
PC45
AON6414AL 0.36uH DCR=1.1mOhm
PR196
11K/F_4
PHASE_NB 1 2 +VDDNB_CORE
PR193 PC49 PR49
5
1u/10V_4
1u/10V_4
*0_4 150p/50V_4 267K/F_4
4
PR55
PR198
+
1000p/50V_6 2.2_6
2.61K/F_4
PC42 PR41 LGATE_NB 4
62771_VSEN_NB
0.1u/10V_4
10u/6.3V_8
47p/50V_4 634/F_4
PC51
PC47
62771_FB_NB VSUMG- PC60
62771_VDDP
1
2
3
62771_VDD
PC53
PQ48 330u/2V_7343
PC26
PC31
AON6752
ISUMN_NB
OCP
PC50
62771_COMP_NB 0.1u/10V_4
+1.5V +3V
36
37
38
25
26
40
39
VSUMG+ PR199 3.65K/F_6
C-Test
COMP_NB
FB_NB
VSEN_NB
VDDP
ISUMP_NB
ISUMN_NB
VDD
PR188 PR34
1K_4 10K/F_4
PR47 VSUMG- PR200 1/F_4
*Short_4
35 34 LGATE_NB
PGOOD_NB LGATE_NB
[11] VRM_PWRGD VRM_PWRGD 20 33 PHASE_NB

PGOOD PHASE_NB
PR27 *Short_4 62771_SVC 3 32 UGATE_NB

[5] APU_SVC SVC UGATE_NB
C
PR190 *Short_4 BOOT_NB
C-Test C
[5] CORE_PWM_PROCHOT# 4 VR_HOT_L BOOT_NB 31
PR40
PR31 *Short_4 62771_SVD 5 30 BOOT_2 2.2/F_6 VIN
[5] APU_SVD SVD BOOT2 BOOT_2
2200p/50V_4
0.1u/50V_6
4.7u/25V_8
4.7u/25V_8
+1.5V PR186 *Short_4 62771_VDDIO 6 29 UGATE_2
VDDIO UGATE2
1
PC132
PC36
PC144
PC133
PC35
PU3 0.22u/25V_6 +
PR26 *Short_4 62771_SVT 7 ISL62771HRZ-T 28 PHASE_2 PC126
[5] APU_SVT
2
SVT PHASE2 UGATE_2 47u/25V_6X4.5
4
2
[41] VDDA_PWRGD PR185 *Short_4 62771_EN 8 27 LGATE_2
1
2
3
ENABLE LGATE2 PQ42 PL4
PR32 *Short_4 62771_PWROK 9 24 LGATE_1 PHASE_2 1 2 +VDD_CORE
[5] APU_PWRGD_SVID_REG PWROK LGATE1
PR35
C-Test
4
2.2_6
62771_EN NTC_NB 1 23 PHASE_1
NTC_NB PHASE1 +
LGATE_2 4
+VDD_CORE
TDC : 37.5A
0.1u/10V_4
10u/6.3V_8
NTC 11 22 UGATE_1
NTC UGATE1
1000p/50V_6
PC32
PC24
PC27
1
2
3
PEAK : 50A
PC21
470K_4_NTC
470K_4_NTC
PQ41 330u/2V_7343
27.4K/F_4
27.4K/F_4
PR208
PR71
PR168
PR13
PR189 IMON_NB 2 21 BOOT_1 AON6752

IMON_NB BOOT1
*100K/F_4 OCP : 62A
IMON 10 IMON EP 41 Width : 2000mil
0.1u/10V_4
0.1u/10V_4
Load Line = 2.1mV/A

ISUMN
ISUMP
COMP
ISEN1
ISEN2
PC140
PC137
VSEN
133K/F_4
133K/F_4
VSUM+ PR25 3.65K/F_6

RTN
PR194
PR184
9.76K/F_4
9.76K/F_4
Add 9 GND VIAs

FB
PR69
PR12
for thermal pad ISEN2 PR24 10K/F_4

19
18
16
17
15
14
13
12
PR179
*10K/F_4
VSUM- PR178 1/F_4 ISEN1
62771_VSEN
B B
62771_RTN
ISEN2 +VDDNB_CORE +VDD_CORE

62771_FB
ISUMN
62771_COMP
C-Test
Place NTC close to the Place NTC close to the
PC19 PR33
VDDNB Hot-Spot. VDDCORE Hot-Spot. PC23 2.2/F_6
0.22u/25V_6 VIN
47p/50V_4 VSUM- BOOT_1
+ +
2200p/50V_4
0.1u/50V_6
4.7u/25V_8
4.7u/25V_8
5
1
PC123
PC124
PR182 PC17 PR28 PC130 PC25
PC10
PC122
*0_4 150p/50V_4 267K/F_4 0.22u/25V_6 0.22u/25V_6 PC143 PC141
ISEN1 *330u/2V_7343 *330u/2V_7343
2
UGATE_1 4
PC134 PR180
680p/50V_4 2K/F_4
1
2
3
VSUM+ PQ37 PL2
PHASE_1 1 2 +VDD_CORE
PC15 PR23
PR21
100p/50V_4 499/F_4 PR174
4
+VDD_CORE
2.2_6
0.22u/10V_4
0.1u/10V_4
2.61K/F_4
PC129
PC128
PR177
11K/F_4
PC136 PR29 LGATE_1 4 + +
0.1u/10V_4
10u/6.3V_8
330p/50V_4 2.37K/F_4
1000p/50V_6
PC20
PC16
PR15 PR169 Close with
1
2
3
PC12
10_4 10K_6_NTC PQ38 PC11 PC14
PR14 PR30
phase1 inductor AON6752 330u/2V_7343 330u/2V_7343
Load line setting
*Short_4 590/F_4
[5] APU_VDD_RUN_FB_H VSUM-
C-Test OCP
RC time PC131 VSUM+ PR176 3.65K/F_6
[5] APU_VDD_RUN_FB_L 0.1u/10V_4
constant
PR17 ISEN1 PR171 10K/F_4
*Short_4 PR22
Parallel PR16 *10K/F_4
A 10_4 VSUM- PR175 1/F_4 ISEN2 A
PC135
0.01u/16V_4
Close to the
CPU side.
www.vinafix.vn
PROJECT : ZRI/ZQI
VDD / VDDNB CORE (ISL62771) A1A
5 4 3 2 1
5 4 3 2 1
+3V_GFX
Default 0.85V
H_VID0
PR209 *EV@10K/F_4
H_VID1
PR216 *EV@10K/F_4
H_VID2
PR219 EV@10K/F_4
H_VID3
PR224 *EV@10K/F_4 C-Test
H_VID4
PR226 EV@10K/F_4 PR67
H_VID5 [email protected]/F_6 VIN
D D
PR210 EV@10K/F_4 51728_VBST2
EV@10K/F_4
EV@10K/F_4
EV@10K/F_4
*EV@10K/F_4
*EV@10K/F_4
EV@2200p/50V_4
5
PC56
PC55
PC58
PC152
+3V +3V
PC67
PR90
*EV@100K_4 51728_DRVH2 4
PR222
PR223
PR215
PR214
PR213
PR203
EV@10K/F_4
EV@100K/F_4
EV@100K/F_4
1
2
3
2
EV@200_4
*EV@10K/F_4 PQ45 PL3
PQ12 EV@AON6414AL [email protected]_7X7X3
DCR=1.1mOhm
*EV@PDTC143TT 51728_LL2 1 2 +VGPU_CORE
+5V_S5
SYS_SHDN# [5,16,37,39,47]
EV@1000p/50V_6 [email protected]_6
THAL_GPU_VR 1 3
4
5
PR46
PR79
PR77
PR96
PR89
[email protected]/F_4
+
*Short_4
51728_DRVL2
EV@10u/6.3V_8
4
PC22
PC29
PC44
PC155 PC28
1
2
3
[email protected]/10V_6 PQ43 EV@330u/2V_7343
[8] PE_PWRGD EV@AON6752
PR192
PR191
26
[16] GPU_DPRSLPVR
V5IN
PR88 *EV@100K/F_4 33 30 51728_DRVH2
PGD DRVH2 51728_CSP2
34 29 51728_VBST2
PR227 [email protected]_4 PG VBST2
C C
PR230
PR195
51728_PCNT 13 28 51728_LL2 PC159
PCNT LL2 *[email protected]/25V_4
Check EN level PR217 EV@100K/F_4 12 27 51728_DRVL2 Close to the
SLP DRVL2
VR side.
PC142
[7,45,46] DGPU_PWREN PR83 *Short_4 51728_EN 35 3 51728_CSP2
EN CSP2
THAL_GPU_VR 10 4 51728_CSN2 51728_CSN2
THAL CSN2
H_VID0 20 PC160
[16] PWRCNTRL4 PR73 *Short_4 VID0 *[email protected]/25V_4
H_VID1 19 21 51728_DRVH1
[16] PWRCNTRL3 PR76 *Short_4 VID1 DRVH1
H_VID2 18 22 51728_VBST1 PR187
[16] PWRCNTRL2 PR78 *Short_4 VID2 VBST1 EV@100K/F_4_3540NTC
H_VID3 17 23 51728_LL1
[16] PWRCNTRL1 PR82 *Short_4 VID3 LL1
H_VID4 16 24 51728_DRVL1
[16] PWRCNTRL0 PR84 *Short_4 VID4 DRVL1
H_VID5 15 6 51728_CSP1
[16] PWRCNTRL5 PR80 *Short_4 VID5 CSP1
14 5 51728_CSN1
VID6 PU5 CSN1 +3V
51728_DROOP EV@TPS51728RHAR C-Test
PC77 EV@68p/50V_4 25
PGND
39 PR205 PR68
DROOP *Short_4 [email protected]/F_6 VIN
PC76 PR86 51728_VBST1
EV@1200p/50V_4 [email protected]/F_4 36 51728_TONSEL
B +3V TONSEL B
EV@2200p/50V_4
51728_V5FILT 51728_VREF 40
VREF
PC63
PC64
PC68
PC69
TRIPSEL 31 51728_TRIPSEL PC153
PC163 PR225
OSRSEL 32 51728_OSRSEL
[email protected]/10V_6 *EV@0_4 51728_DRVH1 4 1/31 Delet PC151 for
PR70
PR204 SMT open issue
1
2
3
51728_SLEW 37 PR72 *EV@10K/F_4 PQ46 PL6
PR211 PR218 PR221 PR220 EV@316K/F_4 SLEW *Short_4 EV@AON6414AL [email protected]_7X7X3 DCR=1.1mOhm
*EV@0_4
*EV@0_4 *EV@0_4 *Short_4 51728_LL1 1 2 +VGPU_CORE
9 THRM
1
4
PU
PR75
*EV@0_4
*EV@0_4
*Short_4
PR202 PR95
+ +
[email protected]_6
51728_TONSEL EV@100K/F_4_3540NTC 38 51728_V5FILT
V5FILT
TPAD10
TPAD11
TPAD12
TPAD13
TPAD14
TPAD15
TPAD16
TPAD1
TPAD2
TPAD3
TPAD4
TPAD5
TPAD6
TPAD7
TPAD8
TPAD9
IMON
PwPd
51728_DRVL1 PC127
EV@10u/6.3V_8
4
GND
GFB
VFB
PC18
PC40
EV@1000p/50V_6
THRM=0.75V/60uA=12.5K PC33 EV@330u/2.5V_6X4.2
PC70
EV@330u/2V_7343
1
2
3
PR212
PR206
PC157 PQ47
8
11
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
+VGPU_CORE
PR50
PR42
[email protected]/10V_6 EV@AON6752
51728_CSP1 +VGPU_CORE
PR183
EV@100_4 51728_IMON Countinue current:30A
PR231
PR45
PR229 PR228 *Short_6 PC162
*Short_4 *[email protected]/25V_4 Peak current:40.5A
51728_VFB Close to the
[19] GPUVDDC_SENSE OCP minimum 50A
A A
VR side.
PC43
51728_GFB
[19] GPUVSS_SENSE Loadline=0mV/A
PR232 PR91 PC75
Parallel *Short_4 [email protected]/F_4 EV@3300p/50V_4
PR181 PC161
EV@100_4 *[email protected]/25V_4
51728_CSN1 Quanta Computer Inc.
Close to the PR201
PC78 PC79 EV@100K/F_4_3540NTC PROJECT : ZRI/ZQI
GPU side. EV@1n/50V_4 EV@1n/50V_4 Size Document Number Rev
A1A
+VGPU CORE(TPS51728)
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
C-Test
VIN
D +5V_S5 D
+3V
PC54 PC61 PC65

EV@1u/10V_4 EV@2200p/50V_6 [email protected]/25V_8
5
PR65
*EV@100K/F_4
7
PQ10
EV@MDV1528
V5IN
0.95V_DRVH 4
HWPG_PCIE 1 9 PR64 PC59 +PCIE_VDDC_GFX
TP37 PGOOD DRVH *Short_6 [email protected]/50V_6 C-Test
0.95V_EN 3 10 0.95V_VBST PL5
[7,44,46] DGPU_PWREN
3
2
1
EN VBST [email protected]_7X7X3
PR62 0.95V_TRIP 2 PU4 8 0.95V_SW
*Short_4 PR66 EV@51K/F_4 TRIP EV@TPS51211DSCR
SW
PR60 0.95V_TST 5 6 0.95V_DRVL
*EV@100K/F_4 PR53 EV@464K/F_4 TST DRVL
5
12 GND GND 11
PR39 PR54 +0.95V
GND
GND
GND
GND
C C
*[email protected]_6 [email protected]/F_4
0.95 Volt +/- 5%
FB
+
4 TDC : 3.2A
13
14
15
16
4
PC30 PC145
0.95V_FB [email protected]/50V_6 EV@330u/2.5V_6X4.2 PEAK : 4.3A
PQ8 PC34
OCP : 5.2A
3
2
1
VFB=0.7V EV@MDV1595S *EV@680p/50V_6 PR59
EV@10K/F_4
Width : 130mil
OCP=5.2A
L ripple current
=(19-0.95)*0.95/(2.2u*290k*19)
=1.415A
Vtrip=5.2-(1.415/2)*14mohm
B =0.06289V B
Rlimit=0.06289/10uA*8=50.318Kohm
A A

PROJECT : ZRI/ZQI
+1.05V(TPS51211) A1A

5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
+3VPCU
C-Test
+3V
PC173
EV@10u/6.3V_8 PC90
[email protected]/25V_6 PU8 EV@TPS54318RTER
PR121 16 VIN PH 10
EV@100K/F_4
PL11 +1.8V_GFX
1 VIN PH 11
EV@1uH_7X7X3
C-Test
D
2 VIN PH 12 D
TP47 HWPG_+1.8GFX 14 13 PR127

PWRGD BOOT *Short_6
15 6 PC101
[7,44,45] DGPU_PWREN EN VSNS [email protected]/50V_6 PR125
PR243
R1 EV@100K/F_4 +1.8V_GFX
7 COMP GND 3 C-Test
*Short_4
8 4
PC189 PC191 PC190
EV@10u/6.3V_8
1.8 Volt +/- 5%
RT/CLK GND 1.8V_VSNS [email protected]/10V_4 EV@10u/6.3V_8 TDC : 0.8A
PAD
PAD
PAD
PAD
PAD
PAD
PC182 9 5
SS AGND
EV@1000p/50V_4 PR245 PR132 PEAK : 1.1A
EV@10K/F_4 EV@121K/F_4 R2 PR119
Width : 40mil
22
21
20
19
18
17
V0=0.8*(R1+R2)/R2
PC178 PC177 PC102
EV@1200p/50V_4 [email protected]/25V_4
*EV@100p/50V_4
C C
VIN +1.5V_GFX +3V_GFX +15V +1.5VSUS +3V
5
PR20 PR170 PR172 PR173
3
EV@1M_4 EV@22_8 EV@22_8 EV@1M_4
B B
1/23 PQ5 change PX_MODE_D 4 PQ3 PX_MODE_D 2
to 2N7002 by EV@MDV1595S
3
3
Weiting require.
PQ4
3
2
1
PR19 +1.5V_GFX EV@AO3404
1
DGPU_PWREN 2 EV@1M_4 2 2 2 +3V_GFX
PC125
PQ5 PQ6 PQ40 PQ39 *[email protected]/50V_4
EV@2N7002K EV@2N7002K EV@2N7002K EV@2N7002K
PC13
1
*EV@1u/10V_4
TDC : 3A TDC : 0.02A
1/23 PC13 no 1/23 Del PR18, function PEAK : 4A PEAK : 0.025A
use by Weiting same with PR217.
require. (MT) Width : 120mil Width : 10mil
A A

PROJECT : ZRI/ZQI
www.vinafix.vn
A1A
GPU_POWER/+1.8V_GPU
5 4 3 2 1
5 4 3 2 1
VIN +3V +5V +0.75V_DDR_VTT +1.5V +15V
D D
VIN PR154 PR155 PR146 PR143 PR145 PR152
1M_4 22_8 22_8 *22_8 22_8 1M_4
MAINON_G MAIND
PD5 MAIND [39,40]
3
DA2J10100L
3
PR153
MAINON 2 PQ24 1M_4 2 2 2 2 2
[34,37,40,41] MAINON DTC144EUA PC116
PQ28 PQ26 PQ22 PQ25 PQ27 *2200p/50V_4
2N7002K 2N7002K *2N7002K 2N7002K 2N7002K
1
PR167 PR144
1
1M_6 *100K/F_6
Thermal protection
1
PQ35
AO3409
2
3
C C
3
S5_ON 2
[37,39] S5_ON
PQ36 PR161
DTC144EUA 1 *Short_6
VL VL
SYS_SHDN# [5,16,37,39,44]
PR162
200K_6
PR163 PC120
PR166 200K/F_4 0.1u/50V_6
3
887/F_4
8
PR165
10K_6_NTC 2.469V 3 +
1 2
2 -
B PQ33 B
3
PU11A 2N7002K
4
BA10393F PC121
1
0.1u/50V_6
S5_ON 2
PR164
PQ34 200K/F_4
2N7002K
1
5 +
7
6 -
PU11B
A BA10393F A
For EC control thermal protection (output 3.3V) Quanta Computer Inc.

PROJECT : ZRI/ZQI
A1A
Discharge/Thermal
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
ZRP Power On Sequence: S5 > S0 45

+3V_RTC
VIN
+5VPCU/+3VPCU/+15V
AC not present equal to LOW; AC present equal to High
ACIN
D
S5_ON active by pull up 10k to +3VPCU D
EC FW download APU Power on sequence required:

EC SPI signals Llano APU:
1.Group A ( +1.5VSUS, +2.5V_VDDA ) ramp before Group B
( +VDD_CORE, +VDDNB_CORE, +1.2V_VDDPR )
Power button from switch to EC
NBSWON#
HUDSON-M3:
S5_ON 1.+3V_S5 ramp before +1.1V_DUAL
2.+3V ramp before +1.1V
3.+3V_S5,+3V ramping down time > 300us
+3V_S5/+5V_S5 4.100uS <= +3V_S5,+3V <= 40mS
5.100uS <= All power rails except +3V_S5,+3V <= 40mS
+1.1V_DUAL_EN
+1.1V_DUAL
+1.1V_DUAL_PG 20ms delay at least
RSMRST#
50ms Max
RTCLK
>16ms Min
Power button from EC to FCH
DNBSWON#
C C
SUSC
SUSON
+1.5VSUS +0.75V_DDR_VTT only will be shut down in S3 mode and for DDR3 SODIMM only
APU GROUP A power +0.75V_DDR_VTT
HWPG_1.5V
SUSB
MAINON
+5V/+3V
+2.5V/+1.5V
+1.1V Controlled by +3.3V

VDDA_PWRGD
APU GROUP B power +VDDNB_CORE

B B
+VDD_CORE
+1.2V
VRM_PWRGD
HWPG_1.2V
98ms < T <150ms
FCH_PWRGD 50ms Max
APU_CLKP/N
38ms Max
APU_PWRGD
101ms < T <113ms
A_RST#(PLTRST#) 75ns < T <100ns
A PCIRST# 1ms < T <2.3ms A
APU_RST#
www.vinafix.vn
PROJECT :ZRI/ZQI
A1A
POWER SEQUENCE
5 4 3 2 1
5 4 3 2 1
+5VPCU +-5%
MDV1528Q
P.35
+5V_S5 +-5%
S5_ON enable
(Peak:3A, TDC:2.25A)
48
AC/DC Insert enable
(Peak:8.3A, TDC:6.25A) OCP: 10 A
MDV1528Q +5V +-5%
D
P.35 MAIND enable D
(Peak:5.4A, TDC:4A)
RT8223P
P.35
MDV1528Q +3V_S5 +-5%
P.35 S5_ON enable
+3VPCU +-5% (Peak:0.85A, TDC:0.64A)
AC/DC Insert enable +3V +-5%

Power Tree Table MDV1528Q MAIND enable +3V_GFX
(Peak:5.6A, TDC:4.2A) OCP: 6.8A MDV1528Q
P.35 DGPU_PWREN
(Peak:2.7A, TDC:02A) P.35
(Peak:0.06A, TDC:0.005A)
AC System Charger
MDV1528Q +2.5V
BQ24707A
P.35 MAINON enable
DC (Peak:0.75A, TDC:0.6A)
(On LAN board)
MDV1528Q +1.8V_GFX +-5%

P.35 DGPU_PWREN
C C
(Peak:1.9A, TDC:1.4A)
+0.75V_DDR_VTT
SUSON enable
(Peak:1A, TDC:0.75A) +1.5V
AO3404 MAIND enable
P.36 (Peak:0.5A, TDC:0.375A)
+SMDDR_VREF
TPS51216RUKR
SUSON enable
P.36 (Peak:0.5A, TDC:0.38A) +PCIE_VDDC_GFX (+1V/+-5%)
+1.5VSUS +-5% MDV1528Q DGPU_PWREN enable
SUSON enable P.41 (Peak:2.2A, TDC:1.65A)
(Peak:14.6A, TDC:11A) OCP:18A
+1.5V_GFX
MDV1528Q DGPU_PWREN enable
P.41 (Peak:2.2A, TDC:1.65A)
+1.1V_DUAL
+1.1V_DUAL_EN enable +1.1V
TPS51211DSCR MDV1528Q
+1.1V_EN enable
B
P.37 (Peak:5.2A, TDC:3.86A) OCP:6.2A P.37 B
(Peak:4A, TDC:3A)
+1.2V +-5%
TPS51211DSCR VDDA_PWRGD enable
P.38 (Peak:7.5A, TDC:5.6A) OCP:9A
+VDD_CORE
VRM_PWRGD enable
(Peak:35A, TDC:26A) OCP:44A
ISL62771HRZ-T
+VDDNB_CORE
P.39
VRM_PWRGD enable
+VGPU_CORE
A TPS51728RHAR DGPU_PWREN enable A
P.40 (Peak:24A, TDC:18A) OCP:28A
+VDDCI_GFX (+1V/+-5%)
TPS51211DSCR DGPU_PWREN enable
P.42 Quanta Computer Inc.
PROJECT : ZRI/ZQI
www.vinafix.vn
A1A
Power Tree
5 4 3 2 1

Acer V5-452G DA0ZRIMB8E0 REV E Schematic Diagram

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Acer V5-452G DA0ZRIMB8E0 REV E Schematic Diagram

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5 4 3 2 1

ZRI/ZQI Block Diagram

Channel A LAYER 2 : GND

USB2-6 24.5mm X 24.5mm 10/100/1G P39

ALC3225 P32 P37 +1.8V_GFX(TPS54318RTER)

Quanta Computer Inc.

Date: Wednesday, April 24, 2013 Sheet 1 of 50

1 LVDS Panel Sku LVDS@

14 No Always connect functions Sku NAC@ VR_ON

Special part value change or modify

B 4 ELPIDA on board DRAM ELP@ B

EC FCH Device I2C_Device(S)

I2Ce_1(M) I2Cf_2(M) Charger Battery ALL/S5

I2Ce_2(M) APU ALL

EC will Conflict with FCH.

Quanta Computer Inc.

Date: Wednesday, April 24, 2013 Sheet 2 of 50

[15] PEG_RXP0 AP1 AN1 PEG_TXP0_C C695 [email protected]/10V_4 PEG_TXP0 [15]

AH5 P_GPP_RXP[0] P_GPP_TXP[0] AG7

[8] UMI_RXP0 AM10 AN6 UMI_TXP0_C C709 0.1u/10V_4 UMI_TXP0 [8]

+1.2V_VDDP R576 196/F_6 P_ZVDDP AR11 AP11 P_ZVSS

HDT+ Connector for Debug only

Soldermask openings for all bottom side vias/TPs under FS1

[12] M_A_RST# J28 MA_RESET_L [13,14] M_B_RST# H31 MB_RESET_L

+MEMVREF_CPU G32 M_VREF RICHLAND_APU_BGA813

+1.5VSUS R594 39.2/F_4 +M_ZVDDIO AJ32 M_ZVDDIO

[25] MINI_DP_TXP0 H2 DP0_TXP[0] DP0_AUXP M5 MINI_DP_AUXP [25]

[25] MINI_DP_TXP3 F1 DP0_TXP[3] DP3_AUXP P5

DISPLAY PORT MISC.

RICHLAND_APU_BGA813 R593 R149

R152 R148 R151

Q17 BOOT VOLTAGE

SVC SVD VFIX_+VDD VFIX_+VDD

R571 1K_4 APU_ALERT SVC R548 Rd *short_4 APU_SVC APU_SVC [43]

*220_4 *220_4 *220_4 C136

C209 C165 C166 C203 C204

+2.5V L19 DECOUPLING between PROCESSOR and DIMMs W2

A10 AJ05757RT01 Quanta Computer Inc.

E18 KSO_4/GPIO213 SDA3_LV/GPIO196 G21

[15] PCIE_RST# R684 33_4 PCIE_RST#_R AE2 PCIE_RST#

GPP_CLK5N LFRAME# LPC_LFRAME# [30,31,37]

GPP_CLK8N APU_PG APU_PWRGD_R [3,5]

H7 S5_CORE_EN S5_CORE_EN is necessary to connect enable pin of

C775 10p/50V_4 20MIL C556

BOLTON-M3 R366 0.1u/10V_4

R683 *short_4 Quanta Computer Inc.

[31] SATA_TXP0_C AK19 SATA_TX0P

+3V_S5 R708 EV@1K_4 BOARD_ID5 R693 *EV@10K_4

Quanta Computer Inc.

PLACE ALL THE DECOUPLING CAPS ON

L40 R333 *short_8 +FCH_VDDAN_11_SSUSB_S

Quanta Computer Inc.

OVERLAP COMMON PADS WHERE

[8] PCI_CLK4 PCI_CLK4

[7] EC_PWM2 EC_PWM2

Remove PCI_CLK2 function

-------- PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 EC_PWM2 RTC_CLK

PULL FORCE IGNORE FUSION EC CLKGEN SPI ROM S5 PLUS MODE

R348 R349 R342 R341 R662

220_4 220_4 *220_4 C136