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    Acer ES1-532G

    Uploaded by

    Adrian Martinez
    The document is a schematic for the Compal Electronics B5V1L motherboard. It includes the model and file names, a confidentiality notice, a parts list with the PCB part number and description, and schematic diagrams showing the motherboard components and connections. The diagrams depict elements such as the CPU, memory, ports, connectors, and chips that make up the Braswell-M based motherboard designed by Compal Electronics.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    Acer ES1-532G

    Uploaded by

    Adrian Martinez
    160 views52 pages
    The document is a schematic for the Compal Electronics B5V1L motherboard. It includes the model and file names, a confidentiality notice, a parts list with the PCB part number and description, and schematic diagrams showing the motherboard components and connections. The diagrams depict elements such as the CPU, memory, ports, connectors, and chips that make up the Braswell-M based motherboard designed by Compal Electronics.

    Copyright

    © © All Rights Reserved

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    The document is a schematic for the Compal Electronics B5V1L motherboard. It includes the model and file names, a confidentiality notice, a parts list with the PCB part number and description, and schematic diagrams showing the motherboard components and connections. The diagrams depict elements such as the CPU, memory, ports, connectors, and chips that make up the Braswell-M based motherboard designed by Compal Electronics.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    160 views52 pages

    Acer ES1-532G

    Uploaded by

    Adrian Martinez
    The document is a schematic for the Compal Electronics B5V1L motherboard. It includes the model and file names, a confidentiality notice, a parts list with the PCB part number and description, and schematic diagrams showing the motherboard components and connections. The diagrams depict elements such as the CPU, memory, ports, connectors, and chips that make up the Braswell-M based motherboard designed by Compal Electronics.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 52

    A B C D E

    Model Name : B5V1L


    File Name : LA-D921P

    1 1

    Compal Confidential
    2
    Braswell M/B Schematics Document 2

    Intel Braswell-M DIS

    B5V1L
    LA-D921P REV:1.0
    2016-05-04
    3 3

    PCB@
    ZZZ PCB B5V1L LA-D921P LS-D671P
    Part Number Description
    DAZ1QA00100 PCB B5V1L LA-D921P LS-D671P

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    Cover Page
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 1 of 52
    A B C D E
    A B C D E

    Fan Control
    page 35

    HDMI Conn. eDP

    1
    204pin DDR3L-SO-DIMM X1 USB 2.0 1

    page 14
    conn x1 Card Reader
    page 25 page 24 Memory BUS Port 1 Port 2 RTS5170
    Single Channel NGFF SD only
    USB port 3
    PS8407A eDP 1.35V DDR3L 1333/1600 BT
    on Sub/B
    page 25

    DDI2
    HDMI x 4 lanes with active level shift
    DDI
    USB 3.0 USB 2.0 CMOS
    conn x1 conn x1 Camera
    Nvidia N16V-GMR1 Braswell-M USB port 0 USB port 1 USB port 2
    with DDR3 x8 SDIO
    page 15~23
    eMMC
    page 32 Reserve
    page 27 PCIe 2.0 x 2
    SOC Touch
    2
    NGFF 5GT/s Screen USB HUB
    2

    PCIe 1.0
    WLAN 2.5GT/s port 0/1 I2C (PORT2)
    FCBGA 1170 Pin USB port 3 USB port 4
    port 2 page 31 page 31 page 24 page 24 page 29

    SATA3.0 USBx5 48MHz


    PCIe 1.0 6.0 Gb/s
    2.5GT/s SATA0
    HD Audio 24MHz
    port 3 page 06~13

    SATA HDD
    LAN(GbE) Conn. HDA Codec
    Realtek 8111H ALC233page 28
    page 26 SPI

    3
    RJ45 conn. LPC BUS SPI ROM 3

    page 30
    CLK=24MHz 64Mb page 8
    Int. Speaker Int. AMIC UAJ
    TPM on Sub/B
    ENE page 28 page 28 page 31
    KB9022 NPCT650LA0YX
    page 33 QFN32 page 34

    Sub Board
    Touch Pad
    LS-D671 Int.KBD PS2 (from EC) / I2C (from SOC)
    IO/B
    page 31

    page 34 page 34

    DC/DC Interface.
    page 36

    Power Circuit DC/DC


    page 37~49 Security Classification Compal Secret Data Compal Electronics, Inc.
    2015/12/24 2017/12/24 Title
    Issued Date Deciphered Date Block Diagrams
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHOR ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L Braswell-M/B LA-D921P
    Date Wednesday May 11 2016 Sheet 2 of 52
    A B C D E

    WWW.AliSaler.Com
    A B C D E

    Voltage Rails Board ID / SKU ID Table for AD channel


    Power Plane Description S0 S3 S4/S5 BOARD ID Table_LA-D9211P
    +19V VIN 19V Adapter power supply ON ON ON
    BATT+ 12V Battery power supply ON ON ON
    Board ID PCB Revision
    ON ON ON
    01 EVT_LA-D921PR01
    +19VB AC or battery power rail for power circuit. (19V/12V)
    +RTCVCC RTC Battery Power ON ON ON
    02 PVT_LA-D921PR10
    ON ON OFF
    03
    1
    +1.05VALW +1.05v Always power rail 1

    ON ON OFF
    04
    +1.15VALW +1.15v Always power rail
    +1.24VALW +1.24v Always power rail ON ON OFF

    +1.8VALW +1.8v Always power rail ON ON OFF

    +3VALW +3.3v Always power rail ON ON OFF

    +5VALW +5.0v Always power rail ON ON ON


    +1.35V +1.35V power rail for DDR3L ON ON OFF
    +3V PTP +3.3V power rail for PTP ON ON OFF
    +SOC VCC Core voltage for SOC ON OFF OFF
    +SOC VGG GFX voltage for SOC ON OFF OFF

    +0.675VS +0.675V power rail for DDR3L Terminator ON OFF OFF

    +1.8VS +1.8v system power rail ON OFF OFF

    +3VS +3.3v system power rail ON OFF OFF

    +5VS +5.0v system power rail ON OFF OFF


    OFF OFF
    43 level BOM table
    +1.05VSDGPU +1.05VS power rail for GPU ON
    +1.5VSDGPU +1.5VS power rail for GPU ON OFF OFF 43 Level Description BOM Structure
    2
    +3VSDGPU AON +3VS power rail for GPU(AON rails) ON OFF OFF 431A35BOL01 B5V1L QK0J VGMR1 2G HDMI 233@/ALS@/HUB@/NBYOC@/8111H@/VGA@/GMR1@/X7601@/GC6@/PCB@/QK0J@/DBG@ 2

    +3VSDGPU MAIN +3VS power rail for GPU GC62.0 ON OFF OFF 431A35BOL02 B5V1L QK0K VGMR1 2G HDMI 233@/ALS@/HUB@/NBYOC@/8111H@/VGA@/GMR1@/X7601@/GC6@/PCB@/QK0K@/DBG@
    +VGA CORE Core power for descrete GPU ON OFF OFF 431A35BOL03 B5V1L QK0G VGMR1 2G HDMI 233@/ALS@/HUB@/NBYOC@/8111H@/VGA@/GMR1@/X7601@/GC6@/PCB@/QK0G@/DBG@
    431A35BOL04 B5V1L QK0G VGMR1 4G HDMI 233@/ALS@/HUB@/NBYOC@/8111H@/VGA@/GMR1@/X7603@/GC6@/DR@/PCB@/QK0G@/DBG@
    Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. 431A35BOL05 B5V1L QK0K SGTR 2G HDMI 233@/ALS@/HUB@/NBYOC@/8111H@/VGA@/GTR@/X7604@/GC6@/PCB@/QK0K@/DBG@
    431A35BOL06 B5V1L QK0K SGTR 4G HDMI 233@/ALS@/HUB@/NBYOC@/8111H@/VGA@/GTR@/X7605@/GC6@/DR@/PCB@/QK0K@/DBG@

    I2C Address Table


    Address(8bit)
    BUS Device Address(7 bit)
    Write Read

    SOC_I2C0 Reserved (Touch Pad)


    SOC_I2C2 +3VALW Reserved(Touch Screen)
    SOC_I2C5 Touch Pad SA577C-1202 (ELAN) 0x15
    +3VALW Touch Pad TM-P3218-001 (SYNAPTICS) 0x2C
    PCU_SMB D MM1 0xA0
    3
    +3VLAW BOM Option Table BOM Option Table BOM Option Table 3

    EC_SMB_CK2 N16V-GMR1 (VGA) 0x9E Item BOM Structure Item BOM Structure Item BOM Structure
    +3VS Unpop @ USB HUB HUB@ CPU 3060 QK0J@
    EC_SMB_CK1 BQ24735R(Charger IC) 0x12 Connector CONN@ with BYOC BYOC@ CPU 3160 QK0K@
    +3VALW_EC BATTERY PACK 0x16 EMC requirement EMC@ without BYOC NBYOC@ CPU 3710 QK0G@
    EMC requirement depop @EMC@ eMMC parts EMMC@ CPU N3060 SR2KN@
    HDMI act i ve LS ALS@ RTL8111GUS LAN 8111GUS@ CPU N3160 SR2KP@
    Power But t on DBG@ RTL8111H LAN 8111H@ CPU N3710 SR2KL@
    TPM TPM@ Touch Screen TSI@
    VGA VGA@ N16V-GMR1 GMR1@
    Dual Rank DR@ N16S-GTR GTR@

    Security Classification Compal Secret Data Compal Electronics, Inc.


    2015/12/24 2017/12/24 Title
    Issued Date Deciphered Date Notes List
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 3 of 52
    A B C D E
    A B C D E

    VR_ON NCP81201MNTXG 7000mA


    +SOC_VCC
    (PU8101)
    11000mA
    NCP81201MNTXG +SOC_VGG
    (PU8201)

    1 1

    SYSON RT8207PGQW 5900mA SUSP#


    (PU501) +1.35VP +0.675VSP
    ADAPTER
    PJ501
    +1.35V

    3V_EN SY8286BRAC SUSP# G971ADJF11U


    CHARGER +19VB +3VALWP +1.5VS
    (PU401) PU701

    SUSP# EM5209VF 3335mA 0 ohm


    +3VS +3VS_WLAN
    (U11)
    ENVDD SY6288C20AAC
    BATTERY +LCDVDD
    2
    LAN PWR EN 1400mA
    (UX1) 2
    SY6288C20AAC
    +3V_LAN TP PWR EN
    (UL1) SY6288C20AAC
    +3V_PTP
    (UK1)
    +3V_SOCP 3VSDGPU MAIN EN SY6288C20AAC 200mA
    EC_EN_1.05VALW +3VSDGPU_MAIN
    MOIC (U14)
    RT5041AGQW 5400mA DGPU PWR EN SY6288C20AAC 15mA
    +1.05VALWP +3VSDGPU_AON
    (PU601) (U2615)

    1000mA SUSP AO3413 110mA


    +1.8VALW_PMICP +1.8VS
    (U2614)

    550mA
    +1.24VALWP
    MOIC
    3 RT5041AGQW 700mA 3

    +1.15VALWP
    (PU601)

    254mA +1.5VSP
    (No use)

    EC_ON
    SY8286CRAC SUSP# EM5209VF 4868mA JPA1
    +5VALWP +5VS +VDDA
    (PU402) (U11)

    0 ohm
    +5VS_HDD

    0 ohm
    +VCC_FAN1

    USB_PWR_EN 0 ohm
    SY6288C20AAC +TS_PWR
    +USB3_VCCA
    (US21)
    AP2330W
    (UY1) +HDMI_5V_OUT

    Security Classification Compal Secret Data Compal Electronics, Inc.


    2015/12/24 2017/12/24 Title
    Issued Date Deciphered Date Power Rail

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 4 of 52
    A B C D E
    5 3 2 1

    B5V1L AC Power UP Sequence


    2016-02-19 S5->S0 S0->S3 S3->S0 S0->S5
    EC V02BT07 Plug in
    SOC ACIN
    +3VLP
    6.38us
    ACIN
    +3VLP
    > 238us EC_ON
    EC_ON
    D > 2.828ms +5VALW D
    +5VALW

    ON/OFF
    ON/OFF
    > 93.1ms > 25.72ms 3V_EN
    3V_EN
    > 763 3us > 1.286ms +3VALW
    +3VALW

    > 3 369ms > 5.596ms EC_EN_1.05VALW


    EC_EN_1.05VALW
    > 634.8us > 155.2us +1.05VALW(VNN)
    +1.05VALW(VNN)
    > 2.12ms > 173.7us +1.8VALW
    +1.8VALW
    > 3.785ms > 57.1us +1.15VALW
    +1.15VALW
    > 4.822ms > 88.89us +1.24VALW
    +1.24VALW
    > 6.717ms > 64.49us +3V_SOC
    +3V_SOC

    C > 24.39ms -> > 8.357S EC_RSMRST# C


    EC_RSMRST# ->
    > > 111ms
    > > > 3.39us PBTN_OUT#
    PBTN_OUT#
    6.25ms 110.4ms
    > 23.43ms > 61.08us EC_SLP_S4#
    EC_SLP_S4#
    > 23.47ms > 61us > 104.2us EC_SLP_S3#_1P8
    EC_SLP_S3#_1P8
    > 10.03ms > 150.1ms SYSON
    SYSON
    > 600.9us > 145.3us +1.35V
    +1.35V
    > 5.204ms -19.75ns DDR_PWROK
    DDR_PWROK
    > 30.33ms > 25.69ms > 20.07ms > 29.38ms SUSP#
    SUSP#
    > 3.344us > 950us > 4.112us > 934.0us +0.675VS
    +0.675VS
    > 395.3us > 1.522ms > 418 5us > 1.509ms +1.5VS
    +1.5VS
    > 348.1us > 1.014ms > 373us > 912.9us +3VS
    +3VS
    > 457.3us > 841.1us > 508us > 863.9us +5VS
    +5VS
    B B

    > 40.15ms > 5.806ms > 30.10ms > 9.281ms VR_ON


    VR_ON
    > 1.544ms > 16.98ms > 1.545ms > 44.94ms +SOC_VGG
    +SOC_VGG
    > 3.233ms > 44.39ms > 3.247ms > 89.54ms +SOC_VCC
    +SOC_VCC
    > 3.397ms 401.2ns > 3.396ms > 400.1ns VGATE
    VGATE

    > 110.2ms -3.152us > 110.7ms -3.269us PMC_CORE_PWROK


    PMC_CORE_PWROK
    > 111.4ms -579.2ns > 111.9ms -365.2ns DDR_CORE_PWROK
    DDR_CORE_PWROK
    > 126.1ms > 124.4ms
    PMC_PLTRST# PMC_PLTRST#

    ON/OFF -> PMC_PLTRST#


    410.8ms

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    THIS SHEET OF ENGINEERING DRAWING S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, NC. AND CONTAINS CONFIDENTIAL
    B5V1L Power sequence
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV SION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTA NS C 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date: Wednesday, May 11, 2016 Sheet 5 of 52
    5 3 2 1
    5 3 2 1

    DDR_A_D[0..63] 14

    DDR_A_DQS[0..7] 14

    DDR_A_DQS#[0..7] 14
    CHV_MCP_EDS CHV_MCP_EDS
    USOC1A USOC1B
    14 DDR_A_MA[0..15] DDR_A_MA15 BD49 DDR0 BD5 DDR1
    DDR_A_MA14 BD47 DDR3_M0_MA_15 BG33 DDR_A_D63 BD7 DDR3_M1_MA_15 BG21
    DDR_A_MA13 BF44 DDR3_M0_MA_14 DDR3_M0_DQ_63 BH28 DDR_A_D62 BF10 DDR3_M1_MA_14 DDR3_M1_DQ_63 BH26
    DDR_A_MA12 BF48 DDR3_M0_MA_13 DDR3_M0_DQ_62 BJ29 DDR_A_D61 BF6 DDR3_M1_MA_13 DDR3_M1_DQ_62 BJ25
    D DDR_A_MA11 BB49 DDR3_M0_MA_12 DDR3_M0_DQ_61 BG28 DDR_A_D60 BB5 DDR3_M1_MA_12 DDR3_M1_DQ_61 BG26 D
    DDR_A_MA10 BJ45 DDR3_M0_MA_11 DDR3_M0_DQ_60 BG32 DDR_A_D59 BJ9 DDR3_M1_MA_11 DDR3_M1_DQ_60 BG22
    DDR_A_MA9 BE52 DDR3_M0_MA_10 DDR3_M0_DQ_59 BH34 DDR_A_D58 BE2 DDR3_M1_MA_10 DDR3_M1_DQ_59 BH20
    DDR_A_MA8 BD44 DDR3_M0_MA_9 DDR3_M0_DQ_58 BG29 DDR_A_D57 BD10 DDR3_M1_MA_9 DDR3_M1_DQ_58 BG25
    DDR A_MA7 BE46 DDR3_M0_MA_8 DDR3_M0_DQ_57 BJ33 DDR_A_D56 BE8 DDR3_M1_MA_8 DDR3_M1_DQ_57 BJ21
    DDR_A_MA6 BB46 DDR3_M0_MA_7 DDR3_M0_DQ_56 BB8 DDR3_M1_MA_7 DDR3_M1_DQ_56
    DDR_A_MA5 BH48 DDR3_M0_MA_6 BD28 DDR_A_D55 BH6 DDR3_M1_MA_6 BD26
    DDR_A MA4 BD42 DDR3_M0_MA_5 DDR3_M0_DQ_55 BF30 DDR_A_D54 BD12 DDR3_M1_MA_5 DDR3_M1_DQ_55 BF24
    DDR_A_MA3 BH47 DDR3_M0_MA_4 DDR3_M0_DQ_54 BA34 DDR_A_D53 BH7 DDR3_M1_MA_4 DDR3_M1_DQ_54 BA20
    DDR_A_MA2 BJ48 DDR3_M0_MA_3 DDR3_M0_DQ_53 BD34 DDR_A_D52 BJ6 DDR3_M1_MA_3 DDR3_M1_DQ_53 BD20
    DDR_A_MA1 BC42 DDR3_M0_MA_2 DDR3_M0_DQ_52 BD30 DDR_A_D51 BC12 DDR3_M1_MA_2 DDR3_M1_DQ_52 BD24
    DDR_A_MA0 BB47 DDR3_M0_MA_1 DDR3_M0_DQ_51 BA32 DDR_A_D50 BB7 DDR3_M1_MA_1 DDR3_M1_DQ_51 BA22
    DDR3_M0_MA_0 DDR3_M0_DQ_50 BC34 DDR_A_D49 DDR3_M1_MA_0 DDR3_M1_DQ_50 BC20
    BF52 DDR3_M0_DQ_49 BF34 DDR_A_D48 BF2 DDR3_M1_DQ_49 BF20
    14 DDR_A_BS2 AY40 DDR3_M0_BS_2 DDR3_M0_DQ_48 AY14 DDR3_M1_BS_2 DDR3_M1_DQ_48
    14 DDR_A_BS1 BH46 DDR3_M0_BS_1 AV32 DDR_A_D47 BH8 DDR3_M1_BS_1 AV22
    14 DDR_A_BS0 DDR3_M0_BS_0 DDR3_M0_DQ_47 AV34 DDR_A_D46 DDR3_M1_BS_0 DDR3_M1_DQ_47 AV20
    BG45 DDR3_M0_DQ_46 BD36 DDR_A_D45 BG9 DDR3_M1_DQ_46 BD18
    14 DDR_A_CAS# BA40 DDR3_M0_CASB DDR3_M0_DQ_45 BF36 DDR_A_D44 BA14 DDR3_M1_CASB DDR3_M1_DQ_45 BF18
    14 DDR_A_RAS# BH44 DDR3_M0_RASB DDR3_M0_DQ_44 AU32 DDR_A_D43 BH10 DDR3_M1_RASB DDR3_M1_DQ_44 AU22
    14 DDR_A_WE# AU38 DDR3_M0_WEB DDR3_M0_DQ_43 AU34 DDR_A_D42 AU16 DDR3_M1_WEB DDR3_M1_DQ_43 AU20
    14 DDR_A_CS1# AY38 DDR3_M0_CSB_1 DDR3_M0_DQ_42 BA36 DDR_A_D41 AY16 DDR3_M1_CSB_1 DDR3_M1_DQ_42 BA18
    14 DDR_A_CS0# DDR3_M0_CSB_0 DDR3_M0_DQ_41 BC36 DDR_A_D40 DDR3_M1_CSB_0 DDR3_M1_DQ_41 BC18
    BD38 DDR3_M0 DQ_40 BD16 DDR3_M1_DQ_40
    14 DDR_A_CLK1 BF38 DDR3_M0_CK_1 BH38 DDR_A_D39 BF16 DDR3_M1_CK_1 BH16
    14 DDR_A_CLK1# AY42 DDR3_M0_CKB_1 DDR3_M0_DQ_39 BH36 DDR_A_D38 AY12 DDR3_M1_CKB_1 DDR3_M1_DQ_39 BH18
    14 DDR_A_CKE1 DDR3_M0_CKE_1 DDR3_M0_DQ_38 BJ41 DDR_A_D37 DDR3_M1_CKE_1 DDR3_M1_DQ_38 BJ13
    BD40 DDR3_M0_DQ_37 BH42 DDR_A_D36 BD14 DDR3_M1_DQ_37 BH12
    14 DDR_A_CLK0 BF40 DDR3_M0_CK_0 DDR3_M0_DQ_36 BJ37 DDR_A_D35 BF14 DDR3_M1_CK_0 DDR3_M1_DQ_36 BJ17
    14 DDR_A_CLK0# BB44 DDR3_M0_CKB_0 DDR3_M0 DQ_35 BG37 DDR_A_D34 BB10 DDR3_M1_CKB_0 DDR3_M1_DQ_35 BG17
    14 DDR_A_CKE0 DDR3_M0_CKE_0 DDR3_M0_DQ_34 BG43 DDR_A_D33 DDR3_M1_CKE_0 DDR3_M1_DQ_34 BG11
    AT30 DDR3_M0_DQ_33 BG42 DDR_A_D32 AT24 DDR3_M1_DQ_33 BG12
    C AU30 RSVD1 DDR3_M0_DQ_32 AU24 RSVD1 DDR3_M1_DQ_32 C
    RSVD2 BB5 DDR A_D31 RSVD2 BB3
    AV36 DDR3_M0_DQ_31 AW53 DDR_A_D30 AV18 DDR3_M1_DQ_31 AW1
    14 DDR_A_ODT0 BA38 DDR3_M0_ODT_0 DDR3_M0_DQ_30 BC52 DDR_A_D29 BA16 DDR3_M1_ODT_0 DDR3_M1_DQ_30 BC2
    14 DDR_A_ODT1 DDR3_M0_ODT_1 DDR3_M0_DQ_29 AW51 DDR_A_D28 DDR3_M1_ODT_1 DDR3_M1_DQ_29 AW3
    AT28 DDR3_M0_DQ_28 AV51 DDR_A_D 7 AT26 DDR3_M1_DQ_28 AV3
    Remove VREFCA & VREFDQ DDR3_M0_OCAVREF DDR3_M0_DQ_27 DDR3_M1_OCAVREF DDR3_M1_DQ_27
    AU28 BC53 DDR_A_D26 AU26 BC1
    (not for DDR3L design) DDR3_M0_ODQVREF DDR3_M0_DQ_26 DDR_A_D25 DDR3_M1_ODQVREF DDR3_M1_DQ_26
    AV52 AV2
    BA42 DDR3_M0_DQ_25 BD52 DDR_A_D24 BA12 DDR3_M1_DQ_25 BD2
    14 DDR_A_RST# AV28 DDR3_M0_DRAMRSTB DDR3_M0_DQ_24 DDR_CORE_PWROK AV26 DDR3_M1_DRAMRSTB DDR3_M1_DQ_24
    41 DDR_PWROK DDR3_DRAM_PWROK AV42 DDR_A_D23 DDR3_VCCA_PWROK AV12
    DDRA_RCOMP BA28 DDR3_M0_DQ_23 AP41 DDR_A_D22 DDRB_RCOMP BA26 DDR3_M1_DQ_23 AP13
    DDR3_M0_RCOMPPD DDR3_M0_DQ_22 AV41 DDR_A_D21 DDR3_M1_RCOMPPD DDR3_M1_DQ_22 AV13
    14 DDR_A_DM[0..7] DDR_A_DM7 BH30 DDR3_M0_DQ_21 AT44 DDR_A_D20 BH24 DDR3_M1_DQ_21 AT10
    DDR_A_DM6 BD32 DDR3_M0_DM_7 DDR3_M0_DQ_20 AP40 DDR_A_D19 BD22 DDR3_M1_DM_7 DDR3_M1_DQ_20 AP14
    DDR_A_DM5 AY36 DDR3_M0_DM_6 DDR3_M0_DQ_19 AT38 DDR_A_D18 AY18 DDR3_M1_DM_6 DDR3_M1_DQ_19 AT16
    DDR_A_DM4 BG41 DDR3_M0_DM_5 DDR3_M0_DQ_18 AP42 DDR_A_D17 BG13 DDR3_M1_DM_5 DDR3_M1_DQ_18 AP12
    DDR_A_DM3 BA53 DDR3_M0_DM_4 DDR3_M0_DQ_17 AT40 DDR_A_D16 BA1 DDR3_M1_DM_4 DDR3_M1_DQ_17 AT14
    DDR_A_DM2 AP44 DDR3_M0_DM_3 DDR3_M0_DQ_16 AP10 DDR3_M1_DM_3 DDR3_M1_DQ_16
    DDR_A_DM1 AT48 DDR3_M0_DM_2 AV45 DDR_A_D15 AT6 DDR3_M1_DM_2 AV9
    DDR_A_DM0 AP52 DDR3_M0_DM_1 DDR3_M0_DQ_15 AY50 DDR_A_D14 AP2 DDR3_M1_DM_1 DDR3_M1_DQ_15 AY4
    DDR3_M0_DM_0 DDR3_M0_DQ_14 AT50 DDR_A_D13 DDR3_M1_DM_0 DDR3_M1_DQ_14 AT4
    DDR_A_DQS7 BH32 DDR3_M0_DQ_13 AP47 DDR_A_D 2 BH22 DDR3_M1_DQ_13 AP7
    DDR_A_DQS#7 BG31 DDR3_M0_DQS_7 DDR3_M0_DQ_12 AV50 DDR_A_D11 BG23 DDR3_M1_DQS_7 DDR3_M1_DQ_12 AV4
    DDR_A_DQS6 BC30 DDR3_M0_DQSB_7 DDR3_M0_DQ_11 AY48 DDR_A_D 0 BC24 DDR3_M1_DQSB_7 DDR3_M1_DQ_11 AY6
    DDR_A_DQS#6 BC32 DDR3_M0_DQS_6 DDR3_M0_DQ_10 AT47 DDR_A_D9 BC22 DDR3_M1_DQS_6 DDR3_M1_DQ_10 AT7
    DDR_A_DQS5 AT32 DDR3_M0_DQSB_6 DDR3_M0_DQ_9 AP48 DDR_A_D8 AT22 DDR3_M1_DQSB_6 DDR3_M1_DQ_9 AP6
    DDR_A_DQS#5 AT34 DDR3_M0_DQS_5 DDR3_M0_DQ_8 AT20 DDR3_M1_DQS_5 DDR3_M1_DQ_8
    DDR_A_DQS4 BH40 DDR3_M0_DQSB_5 AP51 DDR_A_D7 BH14 DDR3_M1_DQSB_5 AP3
    DDR_A_DQS#4 BG39 DDR3_M0_DQS_4 DDR3_M0_DQ_7 AR53 DDR_A_D6 BG15 DDR3_M1_DQS_4 DDR3_M1_DQ_7 AR1
    DDR_A_DQS3 AY52 DDR3_M0_DQSB_4 DDR3_M0_DQ_6 AK52 DDR_A_D5 AY2 DDR3_M1_DQSB_4 DDR3_M1_DQ_6 AK2
    DDR_A_DQS#3 BA51 DDR3_M0_DQS_3 DDR3_M0_DQ_5 AL53 DDR_A_D4 BA3 DDR3_M1_DQS_3 DDR3_M1_DQ_5 AL1
    B DDR_A_DQS2 AT42 DDR3_M0_DQSB_3 DDR3_M0_DQ_4 AR51 DDR_A_D3 AT12 DDR3_M1_DQSB_3 DDR3_M1_DQ_4 AR3 B
    DDR_A_DQS#2 AT41 DDR3_M0_DQS_2 DDR3_M0_DQ_3 AT52 DDR_A_D2 AT13 DDR3_M1_DQS_2 DDR3_M1_DQ_3 AT2
    DDR_A_DQS1 AV47 DDR3_M0_DQSB_2 DDR3_M0_DQ_2 AL51 DDR_A_D1 AV7 DDR3_M1_DQSB_2 DDR3_M1_DQ_2 AL3
    DDR_A_DQS#1 AV48 DDR3_M0_DQS_1 DDR3_M0_DQ_1 AK51 DDR_A_D0 AV6 DDR3_M1_DQS_1 DDR3_M1_DQ_1 AK3
    DDR_A_DQS0 AM52 DDR3_M0_DQSB_1 DDR3_M0_DQ_0 AM DDR3_M1_DQSB_1 DDR3_M1_DQ_0
    DDR_A_DQS#0 AM51 DDR3_M0_DQS_0 AM3 DDR3_M1_DQS_0
    DDR3_M0_DQSB_0 1 OF 13 DDR3_M1_DQSB_0
    BSW-MCP-EDS_FCBGA1170 2 OF 13
    BSW-MCP-EDS_FCBGA1170
    close to SOC pin

    182_0402_1% 1 2 R963 DDRA_RCOMP EMC@ .1U_0402_16V7K


    1 2
    182_0402_1% 1 2 R964 DDRB_RCOMP C1160

    EMC@
    1 2 DDR_CORE_PWROK +1.35V_SOC
    C1159 .1U_0402_16V7K

    R1 R3

    1
    USOC1 USOC1 ESD request 0211 +3V_SOC
    QK0J@ SR2KN@ R993
    10K_0402_5%

    5
    U55
    S IC FH8066501715929 QK0J D1 1.6G FCBGA S IC FH8066501715929 SR2KN D1 1.6G ABO! 3.3V 1 1.35V

    2
    SA00009IJ30 SA00009IJ50 NC 4 DDR_CORE_PWROK
    PMC_CORE_PWROK 2 Y
    10,33 PMC_CORE_PWROK A

    G
    NL17SZ07DFT2G_SC70-5

    3
    USOC1 USOC1 SA00004BV00
    QK0K@ SR2KP@
    A A
    S IC FH8066501715928 QK0K D1 1.6G FCBGA S IC FH8066501715928 SR2KP D1 1.6G ABO!
    SA00009IK20 SA00009IK40

    USOC1 USOC1
    QK0G@ SR2KL@
    Security Classification Compal Secret Data Compal Electronics, Inc.
    2015/12/24 2017/12/24 Title
    S IC FH8066501715927 QK0G D1 1.6G FCBGA S IC FH8066501715927 SR2KL D1 1.6G ABO!
    Issued Date Deciphered Date BSW-M SOC Memory DDR3L

    WWW.AliSaler.Com
    SA00009IE30 SA00009IE50
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 6 of 52
    5 3 2 1
    5 3 2 1

    +1.8VALW
    eDP

    5
    U61
    CHV_MCP_EDS 1
    USOC1C

    P
    NC 4 ENBKL
    DDI1_ENBKL 2 Y ENBKL 33
    A

    G
    D NL17SZ07DFT2G_SC70-5 +3VS D

    3
    M44 SA00004BV00
    RSVD15 K44 @ ENBKL 1 @ 2
    RSVD12 4.7K_0402_5% R1159
    K48 R1142 2 @ 1 0_0402_5%
    D50 RSVD14 K47
    25 HDMI_TX2+ C51 DDI0_TXP_0 RSVD13
    25 HDMI_TX2- DDI0_TXN_0 1.35V
    T44

    MCSI and Camera interface


    H49 MCSI_1_CLKP T45 INVT_PWM_SOC 1 2
    25 HDMI_TX1+ H50 DDI0_TXP_1 MCSI_1_CLKN
    1.35V 4.7K_0402_5% R1161
    25 HDMI_TX - DDI0_TXN_1 Y47
    F53 DDI0 MCSI_1_DP_0 Y48
    25 HDMI_TX0+ F52 DDI0_TXP_2 MCSI_1_DN_0 V45
    HDMI 25 HDMI_TX0- DDI0_TXN_2 1.35V MCSI_1_DP_1 V47 RP41
    G53 MCSI_1_DN_1 V50 +1.8VALW DDI1_ENBKL 8 1
    25 HDMI_CLK+ G52 DDI0_TXP_3 MCSI_1_DP_2 V48 ENVDD 7 2
    25 HDMI_CLK- DDI0_TXN_3 1.35V MCSI_1_DN_2 DDI1_PWM
    41 6 3
    MCSI_1_DP_3

    5
    H47 1.24V T42 U64 5 4
    H46 DDI0_AUXP MCSI_1_DN_3 1
    1.35V

    P
    DDI0_AUXN P50 NC 4 INVT_PWM_SOC 100K_0804_8P4R_5%
    W5 MCSI_2_CLKP P48 DDI1_PWM 2 Y INVT_PWM_SOC 24
    25 HDMI_HPD_SOC# HV_DDI0_HPD MCSI_2_CLKN A

    G
    1.8V
    Y51 P47 NL17SZ07DFT2G_SC70-5

    3
    25 HDMI_DDCCLK_SOC Y52 HV_DDI0_DDC_SCL MCSI_2_DP_0 P45
    1.8V SA00004BV00
    25 HDMI_DDCDATA_SOC HV_DDI0_DDC_SDA MCSI_2_DN_0 M48
    V52 MCSI_2_DP_1 M47
    V5 PANEL0_BKL EN 1.8V MCSI_2_DN_1
    W53 PANEL0_BKLTCTL 1.8V T50
    1 R968 2 DDI0_RCOMPP F38 PANEL0_VDDEN 1.8V RSVD17 T48
    402_0402_1% DDI0_RCOMPN G38 DDI0 PLLOBS_P RSVD16
    DDI0_PLLOBS 1 35V
    P44 R1003 1 2 150_0402_1%
    J51 MCSI_COMP
    C 24 EDP_TXP0 H51 DDI1_TXP_0 AB41 C
    24 EDP_TXN0 DDI1_TXN_0 1.35V GP_CAMERASB00 EC_KBRST# 33
    AB45
    K51 GP_CAMERASB01 AB44 DGPU_PRSNT#
    24 EDP_TXP1 K52 DDI1_TXP_1 GP_CAMERASB02 AC53
    24 EDP_TXN1 DDI1_TXN_1 1.35V GP_CAMERASB03
    DGPU_PRSNT#
    DDI1 AB51 DGPU_HOLD_RST#_SOC1.8V
    L53 GP_CAMERASB04 AB52 VGA_SELECT1 DGPU_HOLD_RST#_SOC1.8V 29 +1.8VALW
    DDI1_TXP_2 GP_CAMERASB05
    UMA H
    L51 1.35V 1 8V AA51 VGA_SELECT2
    DDI1_TXN_2 GP_CAMERASB06 AB40 VGA_SELECT3
    GP_CAMERASB07
    DIS L*

    1
    M52 Y44 UMA@
    eDP Panel M51 DDI1_TXP_3
    1.35V
    GP_CAMERASB08 R4905
    DDI1_TXN_3 Y42 GP_CAMERASB09 10K_0402_5%
    M42 GP_CAMERASB09 Y41 TP_INT_1#
    24 EDP_AUXP DDI1_AUXP GP_CAMERASB10 TP_INT_1# 29
    K42 1.35V V40
    24 EDP_AUXN

    2
    DDI1_AUXN GP_CAMERASB1 DGPU_PRSNT#
    R51
    29 EDP_HPD# HV_DDI1_HPD 1.8V

    1
    VGA@
    DDI1_ENBKL P51 R1045
    DDI1_PWM P52 PANEL1_BKLTEN 1.8V M7 EMMC_CLK 10K_0402_5%
    R53 PANEL1_BKLTCTL 1.8V SDMMC1_CLK P6 EMMC_CMD EMMC_CLK 32
    ENVDD
    24 ENVDD 2 DDI1_RCOMPP PANEL1_VDDEN SDMMC1_CMD EMMC_CMD 32
    1 R986 F47 1.8V

    2
    402_0402_1% DDI1_RCOMPN F49 DDI1 PLLOBS_P M6 EMMC_D0
    DDI1_PLLOBS 1.35V SDMMC1_D0 EMMC_D EMMC_D0 32
    M4
    F40 SDMMC1_D1 P9 EMMC_D2 EMMC_D1 32 +1.8VALW
    G40 DDI2_TXP_0 SDMMC1_D2 P7 EMMC_D3 EMMC_D2 32
    DDI2_TXN_0 1.35V 1.8V SDMMC1
    SDMMC1_D3_CD_B EMMC_D4 EMMC_D3 32
    T6
    J40 MMC1_D4_SD_WE T7 EMMC_D5 EMMC_D4 32
    K40 DDI2_TXP_1 DDI2 MMC1_D5 T10 EMMC_D6 EMMC_D5 32
    DDI2_TXN_1 1.35V MMC1_D6 EMMC_D7 EMMC_D6 32 GP_CAMERASB09
    T12 R642 1 @ 210K_0402_5%
    F42 MMC1_D7 T13 EMMC_RCLK EMMC_D7 32
    G42 DDI2_TXP_2 MMC1_RCLK P13 EMMC_RCLK 32
    1.35V R970 1 2
    DDI2_TXN_2 SDMMC1_RCOMP 100_0402_1%
    D44 MMC1_RCOMP If unused, terminate 100 ? 1 %r esi st or near t o SoC.
    B F44 DDI2_TXP_3 K10 B
    DDI2_TXN_3 1.35V SDMMC2_CLK Braswell PDG_0p95 P.200
    K9
    D48 SDMMC2_CMD
    C49 DDI2_AUXP M12
    DDI2_AUXN 1.35V SDMMC2_D0 M10
    U51 SDMMC2_D1 K7
    HV_DDI2_HPD 1.8V SDMMC2_D2 K6
    1.8V SDMMC2
    SDMMC2_D3_CD_B EC_LID_OUT# 33
    T51
    T52 HV_DDI2_DDC_SCL F2
    HV_DDI2_DDC_SDA 1.8V SDMMC3_CLK D2
    B53 SDMMC3_CMD K3
    RSVD6 1.8V/3.3V SDMMC3_CD_B
    A52
    E52 RSVD3 NC s J1
    D52 RSVD9 SDMMC3_D0 J3 VRAM RANK GPIO VGA type reserve
    B50 RSVD8 SDMMC3_D1 H3
    RSVD5 1.8V/3.3V SDMMC3_D2
    B49 G2
    E53 RSVD4 SDMMC3_D3 VGA_SELECT2 +1.8VALW VGA_SELECT1 +1.8VALW
    C53 RSVD10 K2
    SDMMC3
    A51 RSVD7 1.8V SDMMC3_1P8_EN L3
    RSVD2 1.8V SDMMC3_PWR_EN_B Dual Rank H N16S-GTR H

    1
    A49 P12
    VGA GPIO reserve G44 RSVD1 1.8V/3.3V SDMMC3_RCOMP R992 R4902
    RSVD11
    1

    Single Rank L 1K_0402_5% N16V-GMR1 L 1K_0402_5%


    VGA_SELECT3 R969 DR@ @
    +1.8VALW 80.6_0402_1%

    2
    3 OF 13 VGA_SELECT2 VGA_SELECT1
    H
    2
    1

    1
    BSW-MCP-EDS_FCBGA1170
    R4903 R1008 Internal PD20K R1037
    L 1K_0402_5% Internal PD20K 20K_0402_5% 10K_0402_5%
    @ Checklist R0.95 Page 194 @ @
    RCOMP 80ohm_1% (not exist in ISPD)
    2

    2
    VGA_SELECT3
    A
    V0.2 modify A
    2

    R4904
    20K_0402_5%
    @
    1

    Security Classification Compal Secret Data Compal Electronics, Inc.


    2015/12/24 2017/12/24 Title
    Issued Date Deciphered Date BSW-M SOC Display
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 7 of 52
    5 3 2 1
    5 3 2 1

    D D

    USOC1D CHV_MCP_EDS

    VGA@ CC17 1 2 .1U_0402_16V7K PEG_HTX_DRX_P0 C24 C31


    15 PEG_HTX_C_DRX_P0 PEG_HTX_DRX_N0 PCIE_TXP0 SATA_TXP0 SATA_PTX_DRX_P0 30
    VGA@ CC21 1 2 .1U_0402_16V7K B24 B30
    15 PEG_HTX_C_DRX_N0 PEG_DTX_C_HRX_P0 G20 PCIE_TXN0 SATA_TXN0 N28 SATA_PTX_DRX_N0 30
    15 PEG_DTX_C_HRX_P0 PEG_DTX_C_HRX_N0 PCIE_RXP0 SATA_RXP0 SATA_PRX_DTX_P0 30 HDD
    dGPU J20 M28
    15 PEG_DTX_C_HRX_N0 PCIE_RXN0 SATA_RXN0 C29 SATA_PRX_DTX_N0 30
    PEG_HTX_DRX_P1 3.3V SATA_TXP1
    VGA@ CC18 1 2 .1U_0402_16V7K A25 A29
    15 PEG_HTX_C_DRX_P1 PEG_HTX_DRX_N1 PCIE_TXP1 SATA_TXN1
    VGA@ CC19 1 2 .1U 0402_16V7K C25 J28
    15 PEG_HTX_C_DRX_N1 PEG_DTX_C_HRX_P1 D20 PCIE_TXN1 SATA_RXP1 K28
    15 PEG_DTX_C_HRX_P1 PEG_DTX_C_HRX_N1 F20 PCIE_RXP1 SATA_RXN1
    15 PEG_DTX_C_HRX_N1 PCIE_RXN1 AH3 TP_INT_2#
    PCIE_HTX_DRX_P2 SATA_LEDN TP_INT_2# 29
    C1135 1 2 1U_0402_16V7K B26 AH2
    27 PCIE_HTX_C_DRX_P2 PCIE_HTX_DRX_N2 PCIE_TXP2 SATA_GP0
    C1000 1 2 . U_0402_16V7K C26 AG3
    27 PCIE_HTX_C_DRX_N2 PCIE_HRX_DTX_P2 D22 PCIE_TXN2 PCIe S ATA SATA_GP1 AG1 DEVSLP0_SOC TS_INT_R# 29
    WLAN 27 PCIE_HRX_DTX_P2 PCIE_RXP2 1.8V SATA_GP2 T188 @
    PCIE_HRX_DTX_N2 F22 1.05V AF3 EMMC_RST#
    EMMC_RST# 32
    27 PCIE_HRX_DTX_N2 PCIE_RXN2 SATA_GP3
    C1133 1 2 .1U_0402_16V7K PCIE_HTX_DRX_P3 A27 N30 SATA_RCOMPP 2 R972 1
    26 PCIE_HTX_C_DRX_P3 PCIE_HTX_DRX_N3 PCIE_TXP3 SATA_OBSP SATA_RCOMPN 402_0402_1%
    C1134 1 2 .1U_0402_16V7K C27 M30
    26 PCIE_HTX_C_DRX_N3 PCIE_HRX_DTX_P3 G24 PCIE_TXN3 SATA_OBSN
    PCIE LAN 26 PCIE_HRX_DTX_P3 PCIE_HRX_DTX_N3 J24 PCIE_RXP3 W3 SOC_SPI_CLK
    26 PCIE_HRX_DTX_N3 PCIE_RXN3 FST_SPI_CLK
    C VGA_CLKREQ# AM10 V4 SOC_SPI_CS0# C
    29 VGA_CLKREQ# PCIE_CLKREQ_1# AM12 PCIE_CLKREQ0B FST_SPI_CS0_B V6 SOC_SPI_CS1# T193@
    WLAN_CLKREQ# PCIE_CLKREQ B FST_SPI_CS1_B +1.8VALW
    If no PCI Express* ports is implemented on the platform
    27 WLAN_CLKREQ#
    AK14
    PCIE_CLKREQ2B
    1.8V FST_SPI_CS2_B
    V7
    Pull up PCIE CLKREQ[3 0] N to V1P8A with 10 KΩ resistor LAN_CLKREQ# AM14 RP40
    26 LAN_CLKREQ# PCIE_CLKREQ3B V2 SOC_SPI_MOSI VGA_CLKREQ# 1 8
    A21 FST_SPI_D0 V3 SOC_SPI_MISO PCIE_CLKREQ_1# 2 7
    15 CLK_PEG_VGA C21 CLK_DIFF_P_0 FAST SPI FST_SPI_D1 U1 SOC_SPI_WP# WLAN_CLKREQ# 3 6
    15 CLK_PEG_VGA# CLK_DIFF_N_0 FST_SPI_D2 SOC_SPI_HOLD# LAN_CLKREQ#
    C19
    CLK_DIFF_P_1
    1.8V FST_SPI_D3
    U3 4 5
    B20
    C18 CLK_DIFF_N_1 AF13 HDA_RST# 10K_0804_8P4R_5%
    27 CLK_PCIE_WLAN CLK_DIFF_P_2 1.05V MF_HDA_RSTB
    WLAN B18 AD6 @
    27 CLK_PCIE_WLAN# C17 CLK_DIFF_N_2 MF_HDA_SDI1 AD9 HDA_BIT_CLK T189
    26 CLK_PCIE_LAN A17 CLK_DIFF_P_3 MF_HDA_CLK AD7 HDA_SDIN0 RP55
    LAN 26 CLK_PCIE_LAN# CLK_DIFF_N_3 1.8V/ MF_HDA_SDI0 HDA_SDIN0 28
    2 @ R979 1 CLK_P4 C16 AF12 HDA_SYNC HDA_SYNC 1 8
    CLK_DIFF_P_4 1 5V MF_HDA_SYNC HDA_SYNC_AUDIO 28
    402_0402_1% CLK_N4 B16 AF14 HDA_SDOUT HDA_SDOUT 2 7
    HDA_SDOUT_AUDIO 28
    CLK_DIFF_N_4 MF HDA_SDO AB9 @ HDA_BIT_CLK 3 6
    MF_HDA_DOCKENB T191 HDA_BITCLK_AUDIO 28
    2 R975 1 PCIE_RCOMPP D26 AB7 HDA_RST# 4 5
    HDA_RST_AUDIO# 28
    402_0402_1% PCIE_RCOMPN F26 PCIE_OBSP MF_HDA_DOCKRSTB
    PCIE_OBSN H4 SOC_SPKR
    V14 AUDIO
    1.8V SPKR SOC_SPKR 28 75_0804_8P4R_1%
    Y13 SPI1_CLK AK9
    Y12 SPI1_CS0_B SPI
    GP_SSP_2_CLK AK10
    V13 SPI1_CS1_B GP_SSP_2_FS AK12
    SPI1_MISO 1.8V 1.8V GP_SSP_2_TXD
    V12 AK13
    SPI1_MOSI GP_SSP_2_RXD
    4 OF 13

    BSW-MCP-EDS_FCBGA1170

    B B

    Checklist suggest PU 100K


    +BIOS_SPI Follow A4WAL
    +BIOS_SPI +1.8VALW
    R999 1 2 3.3K_0402_5% SPI_CS0#
    R1033 1 @ 2 0_0402_5%
    R1001 1 2 20K_0402_5% SPI_WP#

    R1000 1 2 20K_0402_5% SPI_HOLD#


    C1013 2 1 .1U_0402_16V7K

    From CPU
    SOC_SPI_CS0# 1 EMC@ 2 SPI_CS0#
    R2581 33_0402_5%
    SOC_SPI_WP# 1 EMC@ 2 SPI_WP#
    SPI ROM ( 8MByte ) 1.8V +BIOS_SPI
    U56
    R2580 10_0402_5% SPI_CS0# 1 8
    SPI_MISO 2 CS# VCC 7 SPI_HOLD#
    RP37 SPI_WP# 3 DO(IO1) HOLD#(IO3) 6 SPI_CLK
    SOC_SPI_MISO 4 5 SPI_MISO 4 WP#(IO2) CLK 5 SPI_MOSI
    SOC_SPI_HOLD# 3 6 SPI_HOLD# GND DI(IO0)
    SOC_SPI_CLK 2 7 SPI_CLK W25Q64DWSSIG_SO8
    SOC_SPI_MOSI 1 8 SPI_MOSI

    A 10_0804_8P4R_5% A

    EMC@

    Reserve for EMI(Near SPI ROM)


    SPI_CLK 1 2 2 1
    @EMC@ R1002 @EMC@ C1014 Security Classification Compal Secret Data Compal Electronics, Inc.
    33_0402_5% 10P_0402_50V8J 2015/12/24 2017/12/24 Title
    Issued Date Deciphered Date BSW-M SOC SATA/PCI-E/HDA

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 8 of 52
    5 3 2 1
    5 3 2 1

    USOC1E CHV_MCP_EDS EMMC


    XTAL_19.2M_IN1 2 XTAL_19.2M_OUT
    R1004 200K_0402_5%
    XTAL_19.2M_IN P24 +1.8VALW
    XTAL_19.2M_OUT M22 OSCIN C11
    OSCOUT 1.05V RSVD3

    2
    Y7 B10
    J26 RSVD2 F12 R641
    N26 RSVD13 RSVD9 F10
    RSVD17 RSVD8 10K_0402_5%
    ICLK_ICOMP
    15P_0402_50V8J

    1 3 P20
    1 3 ICLK_RCOMP ICLKICOMP EMMC@
    N20 iCLK RESERVED D12 EMMC_STRAP

    1
    ICLKRCOMP RSVD5
    1

    1
    C1023 P26 E8
    RSVD18 RSVD7
    C1005

    K26 C7 W EMMC H*
    15P_0402_50V8J M26 RSVD14 RSVD4 D6 EMMC_STRAP
    2

    2
    2 4 AH45 RSVD16 RSVD6
    GND GND RSVD1
    WO EMMC L
    D J12 D
    A9 RSVD11 F7

    PLTFM CLK's
    MF_PLT_CLK0 RSVD10

    2
    C9 J14
    B8 MF_PLT_CLK1 RSVD12 L13 R991
    19.2MHZ_10PF_7M19200019 B7 MF_PLT_CLK2 1.8V RSVD15
    MF_PLT_CLK3 100K_0402_5%
    B5 AK6 SOC_I2C0_CLK @
    B4 MF_PLT_CLK4 I2C0_SCL AH7 SOC_I2C0_DATA
    Change P/N to SJ10000N700 Reserve for Touch Pad

    1
    MF_PLT_CLK5 I2C0_SDA
    19.2MHz_12pF AF6
    AM40 I2C1_SCL AH6
    AM41 GPIO_DFX0 I2C1_SDA

    GPIO_DFX
    AM44 GPIO_DFX1 AF9 SOC_I2C2_CLK
    R984 1 2 2.49K_0402_1% ICLK_ICOMP AM45 GPIO_DFX2 I2C2_SCL AF7 SOC_I2C2_DATA
    R985 1 2 49.9_0402_1% ICLK_RCOMP AM47 GPIO_DFX3 I2C I2C2_SDA for Touch Screen
    SOC_GPIO_DFX5 AK48 GPIO_DFX4 1.8V 1.8V AE4
    SOC_GPIO_DFX6 AM48 GPIO_DFX5 I2C3_SCL AD2
    49.9_1% for RCOMP GPIO_DFX6 I2C3_SDA
    2.49K_1% for ICOMP AK41
    AK42 GPIO_DFX7 AC1 EMMC_STRAP
    GPIO_DFX8 I2C4_SCL AD3
    DDI0_ENABLE AD51 I2C4_SDA
    DDI1_ENABLE AD52 GPIO_SUS0 AB2 SOC_I2C5_CLK
    +1.8VALW R1175
    Must Drive high before RSMRST SOC_GPIO_SUS2 AH50 GPIO_SUS1 I2C5_SCL AC3 SOC_I2C5_DATA
    EC_SCI# SOC Internal PU 20K for Touch Pad

    GPIO_SUS
    4.7K_0402_5% AH48 GPIO_SUS2 I2C5_SDA
    1 2 DDI0_ENABLE R959 SOC_GPIO_SUS4 AH51 GPIO_SUS3 AA1
    1 2 DDI1_ENABLE SOC_GPIO_SUS5 AH52 GPIO_SUS4 1.8V I2C6_SCL AB3 SOC_I2C0_CLK 1 2 SOC_I2C5_CLK_R
    0_0402_5% @
    R1176 EC_SCI# 1 @ 2 SOC_GPIO_SUS6 AG51 GPIO_SUS5 I2C6_SDA R1055 0_0402_5%
    33 EC_SCI# EC_SMI# AG53 GPIO_SUS6 AA3 I2C_NFC_SCL SOC_I2C0_DATA 1 2 SOC_I2C5_DATA_R
    4.7K_0402_5% T213@ @
    33 EC_SMI# SOC_GPIO_SUS9 AF52 GPIO_SUS7 I2C_NFC_SCL Y2 I2C_NFC_SDA +1.8VALW
    T214@ R1056 0_0402_5%
    SOC_GPIO_SUS8 AF51 SEC_GPIO_SUS9 I2C_NFC_SDA SOC_I2C5_CLK 1 @ 2
    AE51 SEC_GPIO_SUS8 AM6 PCU_SMB_CLK R1155 2 @ 1 1K_0402_5% R1057 0_0402_5%
    AC51 SEC_GPIO_SUS10 SMBUS
    MF_SMB_CLK AM7 PCU_SMB_DATA R1180 2 @ 1 1K_0402_5% SOC_I2C5_DATA 1 @ 2
    GPIO_RCOMP AH40 SEC_GPIO_SUS11 MF_SMB_DATA AM9 PCU_SMB_ALERT# R1181 2 @ 1 1K_0402_5% R1058 0_0402_5%
    C +1.8VALW TP_INT_3# Y3 GPIO0_RCOMP 1.8V MF_SMB_ALERTB C
    29 TP_INT_3# GPIO_ALERT
    1

    R995
    R1016 1 @ 2 20K_0402_5% SOC_GPIO_DFX5 100_0402_1% 5 OF 13
    R1022 1 @ 2 20K_0402_5% SOC_GPIO_DFX6 BSW MCP-EDS_FCBGA1170
    2

    For Touch Screen


    +1.8VALW +1.8VALW
    component placed near JEDP1
    R977 1 2 100K_0402_5% SOC_GPIO_SUS4 1K_0402_5% 2 @ 1 R1143 SOC_I2C2_DATA
    1K 0402_5% 2 @ 1 R1144 SOC_I2C2_CLK
    R981 1 2 4.7K_0402_1% SOC_GPIO_SUS6

    +TS_PWR +1.8VALW +TS_PWR


    SOC_GPIO_SUS4: SOC_GPIO_SUS6: SOC_GPIO_SUS8: 2 TSI@ 1 I2C2_SCL_PNL
    BIOS Boot Select i on Halt Boot Strap: ICLK, USB 2.0, 2.2K_0402_5% R1147
    0 = LPC 1= Normal Operat i on DDI SFR supply 2 TSI@ 1 I2C2_SDA_PNL Vgs= 1.1V Vgs= 1.5V

    5
    1 = SPI (internal PU) select : 2 2K_0402_5% R1150

    G
    0 = Supply is 1.25V

    G
    +3VALW SOC_I2C2_CLK 4 3 SOC_I2C2_CLK_L 3 4 I2C2_SCL_PNL
    1 = Supply is 1.35V SOC_I2C2_CLK_L I2C2_SCL_PNL 24

    D
    2.2K_0402_5% 2 TSI@ 1R2566 TSI@Q2512A TSI@ Q2511A

    2
    +1.8VALW 2.2K_0402_5% 2 TSI@ 1R2565 SOC_I2C2_DATA_L PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6

    G
    SB000016K00 SB000013K00

    G
    SOC_GPIO_SUS8 1 2 +5VALW SOC_I2C2_DATA 1 6 SOC_I2C2_DATA_L 6 1 I2C2_SDA_PNL
    I2C2_SDA_PNL 24

    D
    R1048 2.2K_0402_5% 2 @ 1R2567 TSI@Q2512B TSI@ Q2511B
    4.7K_0402_5% 2.2K_0402_5% 2 @ 1R2568 PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6
    SB000016K00 SB000013K00

    R1040 1 @ 2 10K_0402_5% SOC_GPIO_SUS9

    B B
    For Touch Pad
    SOC_GPIO_SUS5: +1.8VALW component placed near JTP1
    BIOS/EFI Top Swap Security Flash Descriptors 1K_0402_5% 2 @ 1 R1153 SOC_I2C5_DATA_R
    0 = Override 1K_0402_5% 2 @ 1 R1152 SOC_I2C5_CLK_R
    1 = Normal Operat i on (I nt er nal P U) +1.8VALW +3V_PTP
    +1.8VALW
    +3V_PTP
    +1.8VALW Vgs= 1.5V
    Vgs= 1.1V
    1

    5
    2 1 I2C5_SCL_TP

    G
    G
    1

    R1006 2.2K_0402_5% R1156 SOC_I2C5_CLK_R4 3 SOC_I2C5_CLK_L 3 4 I2C5_SCL_TP


    I2C5_SDA_TP I2C5_SCL_TP 34

    S
    D
    10K_0402_5% EC programing : 2 1 Q2509A Q2508A

    2
    R978 "High"for Flash BIOS 2.2K_0402_5% R1157 For BOM PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6
    2

    SOC_GPIO_SUS2

    G
    10K_0402_5% SB000016K00 SB000013K00

    G
    @ +3VALW SOC_I2C5_DATA_R 1 6 SOC_I2C5_DATA_L 6 1 I2C5_SDA_TP
    2

    I2C5_SDA_TP 34
    1

    SOC_GPIO_SUS5 1 2

    D
    Q2509B Q2508B
    @ R1051 4.7K_0402_5%2 1R2564 SOC_I2C5_CLK_L PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6
    1

    D SOC_I2C5_DATA_L
    R1011 0_0402_5% 4.7K_0402_5%2 1R2563 SB000016K00 SB000013K00
    10K_0402_5% 2
    TXE_DBG 33
    G
    2

    S Q62
    3

    L2N7002LT1G_SOT23-3 +3VALW +1.8VALW +3VS

    2.2K_0402_5%2 1R2562 PCU_SMB_CLK_L


    SOC_GPIO_SUS2: Top Swap( A16 Override ) 2.2K_0402_5%2 1R2561 PCU_SMB_DATA_L Vgs= 1.1V Vgs= 1.5V
    0 = Change Boot Loader address

    5
    1 = Normal Operat i on

    G
    G
    +3VS PCU_SMB_CLK 4 3 PCU_SMB_CLK_L 3 4
    Reference checklist 0.92 P.37 DDR_SMB_CK 14

    D
    Q2502A Q2507A

    2
    A 2.2K_0402_5%2 1R2570 DDR_SMB_CK PJT138KA 2N SOT363-6 DMN63D8LDW 7_SOT363-6 A
    2.2K_0402_5%2 1R2569 DDR_SMB_DA SB000016K00 SB000013K00

    G
    G
    +RTCBATT +CHGRTC W=20mils PCU_SMB_DATA 1 6 PCU_SMB_DATA_L 6 1
    DDR_SMB_DA 14

    D
    D22 Q2502B Q2507B
    2 +RTCVCC PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6 DDR<13 14>
    W 10mil SB000016K00 SB000013K00
    1
    W=20mils
    3 Security Classification Compal Secret Data Compal Electronics, Inc.
    2015/12/24 2017/12/24 Title
    BAS40-04_SOT23-3
    1 Issued Date Deciphered Date BSW-M SOC CLK/PMU/SPI
    C151
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    .1U_0402_16V7K AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    2 Custom 1.0
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 9 of 52
    5 3 2 1
    5 3 2 1

    USOC1F CHV_MCP_EDS
    +1.8VALW

    +3VS
    PLT_RST# Buf f er
    B48
    B32 USB_OTG_ID C42
    31 PCH_USB3_TX0_P USB3_TXP0 USB_DP0 USB20_P0 31

    1
    C32 B42 USB3.0 Port
    31 PCH_USB3_TX0_N F28 USB3_TXN0 USB_DN0 USB20_N0 31
    USB3 Port 0 31 PCH_USB3_RX0_P R2024 @
    D28 USB3_RXP0 C43 1K_0402_5% R982
    31 PCH_USB3_RX0_N USB3_RXN0 USB_DP1 USB20_P1 31

    5
    B44 USB2.0 Port U53 4.7K_0402_5%
    A33 USB_DN1 USB20_N1 31 1
    1.8V 3.3V

    P
    2

    2
    C33 USB3_TXP1 C41 NC 4
    F30 USB3_TXN1 USB_DP2 A41 USB20_P2 24 PMC_PLTRST# 2 Y PLT_RST_BUF# 15,26,27,33,34
    USB3_RXP1 USB_DN2 USB20_N2 24 Camera A

    G
    D30
    +1.8VALW USB3_RXN1 C45 NL17SZ07DFT2G_SC70-5

    3
    C34 USB_DP3 A45 USB20_P3 24
    Touch screen SA00004BV00
    D B34 USB3_TXP2 USB_DN3 USB20_N3 24 D
    USB3_TXN2

    1
    @ G32 1.05V 1.8V B40
    J32 USB3_RXP2 USB_DP4 C40 USB20_P4 29 +1.8VALW
    TO DGPU R1151 USB2.0 Hub

    USB3.0

    USB2.0
    USB3_RXN2 USB_DN4 USB20_N4 29
    10K_0402_5% RP39
    C35 P16 USB_OC1# PMC_PCIE_WAKE# 1 8
    A35 USB3_TXP3 USB_OC1_B P14 USB_OC0# PMC_BATLOW# 2 7

    2
    GPU_EVENT# G34 USB3_TXN3 USB_OC0_B USB_OC0# 31 USB_OC0# 3 6
    15 GPU_EVENT# J34 USB3_RXP3 B46 USB2_OBSP USB_OC1# 4 5
    USB3_RXN3 RSVD3 B47 USB_VBUSSNS 1 2
    +1.8VALW 2 R987 1 USB3_RCOMPP D34 USB_VBUSSNS A48 USB2_RCOMP R1032 10K_0804_8P4R_5%
    402_0402_1% USB3_RCOMPN F34 USB3_OBSP USB_RCOMP 0_0402_5% PMC_RSTBTN# 1 2
    +3V SOC USB3_OBSN M36 R2025 1K_0402_5%
    USB_HSIC_0_STROBE Sch. chelist PU 1k

    1
    GC6@ C37 N36 2 R988 1
    R1009 A37 RSVD4 USB_HSIC_0_DATA 1 2

    HSIC
    113_0402_1%
    GC6@ 10K_0402_5% F36 RSVD1 1.24V K38 R485 100K_0402_5%
    RSVD7 USB_HSIC_1_STROBE

    RESERVED
    U2515 D36 M38 @EMC@
    1 M34 RSVD6 USB_HSIC_1_DATA N38 HSIC_RCOMP 1 2 PDG 2p1 page:238 PMC_CORE_PWROK C1007 1 2 0.047U_0402_25V7K
    P

    2
    NC 4 GC6_FB_EN_R M32 RSVD11 USB_HSIC_RCOMP R1012 45.3_0402_1% If a HSIC Port is not implemented on the
    GC6_FB_EN Y RSVD10 platform, data, strobe signals and
    2 AD10 DBG_UART_TXD USB HSIC RCOMP can be left unconnected.
    15 GC6_FB_EN A UART1_TXD
    G
    C38 AD12 DBG_UART_RXD
    NL17SZ07DFT2G_SC70-5 B38 RSVD5 UART1_RXD AD13 @EMC@
    3

    RSVD2 UART1_CTS_B PMC_PLTRST#

    UART
    SA00004BV00 G36 AD14 C1006 1 2 22P_0402_50V8J
    J36 RSVD8 UART1_RTS_B USB2_OBSP
    RSVD9 1.8V Y6 GPU_EVENT#
    N34 UART2_TXD Y7 EC_RSMRST# R990 1 2 100K_0402_5%
    RSVD12 UART2_RXD

    2
    P34 V9 GC6_FB_EN_R @
    RSVD13 UART2_CTS_B V10 DGPU_PWR_EN R1015 @EMC@
    UART2_RTS_B DGPU_PWR_EN 36
    49.9_0402_1% C1155 1 2 22P_0402_50V8J
    6 OF 13

    1
    BSW-MCP-EDS_FCBGA1170
    C +1.8VALW C
    RP52
    4 5 SOC_H_TDI USOC1G CHV_MCP_EDS
    3 6 SOC_H_TDO
    2 7 SOC_H_TMS
    1 8 SOC_H_PREQ_BUF# SOC_H_TCK AF42 M18 ILB_RTC_X1 PMC_SLP_S3# R1042 1 @ 2 0_0402_5%
    EC_SLP_S3#_1P8 33

    JT G/ITP
    SOC_H_TDI AD47 TCK BRTCX1_PAD K18 ILB_RTC_X2
    51_0804_8P4R_5% SOC_H_TDO AF40 TDI 1.8V BRTCX2_PAD F16 ILB_RTC_EXTPAD 1 2
    SOC_H_TMS AD48 TDO BVCCRTC_EXTPAD C1008 .1U_0402_16V7K
    R989 1 2 51_0402_5% SOC_H_TCK SOC_H_TRST# AB48 TMS D18 RTC_RST#

    RTC
    R1026 1 2 51_0402_5% SOC_H_TRST# TRST_B SRTCRST_B G16 PMC_CORE_PWROK
    COREPWROK F18 EC_RSMRST# PMC_CORE_PWROK 6,33
    SOC_H_PRDY# 3.3V RSMRST_B RTC_TEST# EC_RSMRST# 33 +1.8VALW +3VALW_EC
    @T208 AD45 J16 @ C1017
    SOC_H_PREQ_BUF#AF41 CX_PRDY_B RTEST_B G18 2 1 @ .1U_0402_16V7K
    M13 CX_PREQ_B RSVD VSS R1052 10K_0402_5% .1U_0402_16V7K 1 2
    RSVD5 AE3 PMC_SUSPWRDNACK 1 2
    2 R1014 LPC_CLK_0 SUSPWRDNACK PMC_SUS_STAT# PMC_SUSPWRDNACK 33 +1.8VALW
    0_0402_5%1 @ P2 D 4 T207@ U71
    33 LPC_CLK_EC 2 R1017 LPC_CLK_1 MF_LPC_CLKOUT0 SUS_STAT_B PMC SUSCLK
    0_0402_5%1 @ R3 C15 T212@ C1016 1 6
    34 LPC_CLK_TPM T3 MF_LPC_CLKOUT1 PMU_SUSCLK C 2 EC SLP_S4# 2 VCCA VCCB 5
    34 LPC_CLKRUN# P3 LPC_CLKRUNB PMU_SLP_S4_B B14 PMC_SLP_S3# EC_SLP_S4# 33 SOC_SERIRQ 3 GND EO 4 EC_SERIRQ
    33,34 LPC_FRAME# LPC_FRAMEB PMU_SLP_S3_B A4 B4 EC_SERIRQ 33,34

    PMU
    AF2 PMC_RSTBTN#

    LPC
    0_0402_5%1 @ 2 R1018 LPC_AD0_SOC M3 PMU_RESETBUTTON_B F14 PMC_PL RST# G2129TL1U_SC70-6
    33,34 LPC_AD0 LPC_AD1_SOC MF_LPC_AD0 PMU_PLTRST_B PMC_BATLOW# PMC_PLTRST# 32
    33,34 LPC_AD1
    0_0402_5%1 @ 2 R1021 M2
    MF_LPC_AD1 3.3V/ 1.8V PMU_BATLOW_B C14
    0_0402_5%1 @ 2 R1024 LPC_AD2_SOC N3 C13 PMC_ACIN
    33,34 LPC_AD2 LPC_AD3_SOC MF_LPC_AD2 1.8V PMU_AC_PRESENT PMC_SLP_S0#
    0_0402_5%1 @ 2 R1031 N1 A13
    33,34 LPC_AD3 MF_LPC_AD3 PMU_SLP_S0IX_B B12 PMC_SLP_S0# 42
    100_0402_1%1 2 R1013 LPC_RCOMP T4 PMU_SLP_LAN_B N16 PMC_PCIE_WAKE#
    LPC-25MHz LPC_HVT_RCOMP PMU_WAKE_B
    SOC_SERIRQ T2 M16 PBTN_OUT#
    ILB_SERIRQ PMU_PWRBTN_B P18 PBTN_OUT# 33
    ILB_RTC_X1 H5 PMU_WAKE_LAN_B

    PWM
    ILB_RTC_X2 H7 PWM0 AD42

    SVID
    1 2 PWM1 SVID0_CLK AD41 VR_SVID_CLK 44,45
    B 1.8V SVID0_DATA AD40 VR_SVID_DATA 44 45 B
    R994
    SVID0_ALERT_B VR_SVID_ALERT# 44,45
    10M_0402_5%
    P28 Vo tage sense
    32.768KHZ_12.5PF_Q13FC135000040 R1023 P30 RSVD6 AG32 VCC0_SENSE R1073 1 @ 2 0_0402_5%
    RSVD7 CORE_VCC0_SENSE VCC_SENSE 44
    Reserved

    Y8 1 2 20K_0402_1% AF50 AJ32 VSS0_SENSE R1074 1 @ 2 0_0402_5%


    1 2 AF48 RSVD4 CORE_VSS0_SENSE AD29 VCC1_SENSE R1075 1 @ 2 0_0402_5%
    +1.8VALW RSVD3 CORE_VCC1_SENSE VSS1_SENSE
    AF44 AF27 R1076 1 @ 2 0_0402_5%
    RSVD1 CORE_VSS1_SENSE VSS_SENSE 44
    1

    C1009 C1010 AF45 AD24 VGG_SENSEP


    AD50 RSVD2 DDI_VGG_SENSE AD22 VGG_SENSEN VGG_SENSEP 45
    15,33 H_PROCHOT# PROCHOT_B 1.8V UNCORE_VSS_SENSE2 VGG_SENSEN 45
    15P_0402_50V8J 15P_0402_50V8J AC27
    2

    UNCORE_VSS_SENSE1
    2
    @EMC@ 7 OF 13
    Y8 change P/N to SJ10000LV00 for ESR<50k ohm C1002
    10P_0402_50V8J BSW-MCP-EDS_FCBGA1170 +SOC_VCC
    1

    VCC_SENSE R1077 1 2 100_0402_1%


    +RTCVCC ESD request 0926 VSS_SENSE R1078 1 2 100_0402_1%

    R996 For UART


    RTC_TEST# 2
    20K_0402_1%
    1
    debug
    +SOC_VGG
    RTC_RST# 2 1 DBG_UART_TXD 1 2 UART_TXD_NGFF
    UART_TXD_NGFF 27
    2 1 R997 20K_0402_1%
    VGG_SENSEP R1019 1
    R1035
    2 100_0402_1% 0_0402_5%
    C1011 C1012 VGG_SENSEN R1020 1 2 100_0402_1%
    1U_0402_6.3V6K 1U_0402_6.3V6K DBG_UART_RXD 1 2 UART_RXD_NGFF
    1 2 UART_RXD_NGFF 27
    R1036
    0_0402_5%

    A A
    RTC_TEST# 1 @ 2 CLR_CMOS#
    CLR_CMOS# 33
    0_0402_5% R1088
    RTC_RST# 2 @ 1
    1

    0_0402_5% R1089
    Clear CMOS
    1

    @ Close to RAM door R983 2 1 2.2K_0402_5% +1.8VALW


    @ JCMOS1
    JCMOS2 0_0603_5% RB751V-40_SOD323-2
    Security Classification Compal Secret Data Compal Electronics, Inc.
    2

    0_0603_5% PMC_ACIN 2 1 2015/12/24 2017/12/24 Title


    ACIN 33,39 Issued Date Deciphered Date BSW-M SOC USB/LPC/SMBus
    2

    WWW.AliSaler.Com
    D40
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 10 of 52
    5 3 2 1
    5 3 2 1

    D D

    USOC1H CHV_MCP_EDS

    +SOC_VCC 3.5A (can merge with V1P05A) +1.05VALW


    10A AA18
    AF36 UNCORE_VNN_S41 AA19
    AG33 CORE_VCC1_S0IX3 UNCORE_VNN_S42 AA21
    AG35 CORE_VCC1_S0IX7 UNCORE_VNN_S43 AA22
    AG36 CORE_VCC1_S0IX8 UNCORE_VNN_S44 AA24
    AG38 CORE_VCC1_S0IX9 UNCORE_VNN_S45 AA25
    AJ33 CORE_VCC1_S0IX10 UNCORE_VNN_S46 AC18
    AJ36 CORE_VCC1_S0IX14 UNCORE_VNN_S47 AC19
    AJ38 CORE_VCC1_S0IX15 UNCORE_VNN_S48 AC21
    CORE_VCC1_S0IX16 UNCORE_VNN_S49 AC22
    AF30 UNCORE_VNN_S410 AC24
    AG27 CORE_VCC1_S0IX2 UNCORE_VNN_S411 AC25
    AG29 CORE_VCC1_S0IX4 UNCORE_VNN_S412 AD25
    AG30 CORE_VCC1_S0IX5 UNCORE_VNN_S413 AD27 +1.05VALW
    AJ27 CORE_VCC1_S0IX6 UNCORE_VNN_S414
    AJ29 CORE_VCC1_S0IX11 AA30
    CORE_VCC1_S0IX12 RSVD1
    1900mA Conf i r md w
    i t hI nt el , t hes e pi n us e +1. 05V po wer
    AJ30 V33
    C AF29 CORE_VCC1_S0IX13 UNCORE_V1P15_S0IX6 AA32 C
    +SOC_VGG CORE_VCC1_S0IX1 UNCORE_V1P15_S0IX1 AA33 C1042 1 2 1U_0402_6.3V6K
    UNCORE_V1P15_S0IX2 AA35 C1043 1 2 1U_0402_6.3V6K
    12A UNCORE_V1P15_S0IX3
    UNCORE_V1P15_S0ix -
    AD16 AA36 C1044 1 2 1U_0402_6.3V6K Back side : 1uF *3
    AD18 DDI_VGG_S0IX1 UNCORE_V1P15_S0IX4 AC32 C1050 1 2 1U_0402_6.3V6K
    DDI_VGG_S0IX2 UNCORE_V1P15_S0IX5 Package edge : 1uF *2
    AD19 Y30 C1049 1 2 1U_0402_6.3V6K
    AF16 DDI VGG_S0IX3 UNCORE_V1P15_S0IX7 Y32
    AF18 DDI_VGG_S0IX4 UNCORE_V1P15_S0IX8 Y33
    AF19 DDI_VGG_S0IX5 UNCORE_V1P15_S0IX9 Y35 R1178 1 @ 2 0_0805_5%
    DDI_VGG_S0IX6 UNCORE_V1P15_S0IX10 +1.05VALW
    AF21
    AF22 DDI_VGG S0IX7 V19 +1.05VALW_ICLK_GND_OFF C1059 1 2 2.2U_0402_6.3V6M

    iCLK
    AJ 9 DDI_VGG_S0IX8 ICLK_GND_OFF2 V18 @ C1109 1 2 1U_0402_6.3V6K
    DDI_VGG_S0IX15 ICLK_GND_OFF1
    ICLK_GND_OFF - Back side : 1uF *1
    AG16
    AG18 DDI_VGG S0IX9 AM21
    DDI_VGG_S0IX 0 DDR_V1P05A_G31 +1.05VALW
    AG19 AM33
    AG21 DDI_VGG_S0IX1 DDR_V1P05A_G34 AM22 C1080 1 2 22U_0603_6.3V6M 1900mA

    DDR
    +1.15VALW AG22 DDI_VGG_S0IX12 DDR_V1P05A_G32 AN22 C1054 1 2 22U_0603_6.3V6M
    DDI_VGG S0IX13 DDR_V1P05A_G35
    DDR_V1P05A_G3 - Back side : 1uF *1
    700mA AG24 AN32 C1053 1 2 1U_0402_6.3V6K Package edge : 22uF *2
    AJ21 DDI_VGG_S0IX14 DDR_V1P05A_G36 AM32
    AJ22 DDI_VGG_S0IX16 DDR_V1P05A_G33
    AJ24 DDI_VGG_S0IX17 V22 C1055 1 2 1U_0402_6.3V6K PCIE_V1P05A_G3 - Back side : 1uF *1

    PCIe
    C1028 1 2 1U_0402_6.3V6K AK24 DDI_VGG_S0IX18 PCIE_V1P05A_G31 V24
    CORE_V1P15_S0ix - DDI_VGG_S0IX19 PCIE_V1P05A_G32
    Back side : 1uF *4 C1029 1 2 1U_0402_6.3V6K
    Package edge : 1uF *2 C1030 1 2 1U_0402_6.3V6K AK30
    C1031 1 2 1U_0402_6.3V6K AK35 CORE_V1P15_S0IX1 U24 C1056 1 2 1U_0402_6.3V6K SATA_V1P05A_G3 - Back side : 1uF *1

    SATA
    C1032 1 2 1U_0402_6.3V6K AK36 CORE_V1P15_S0IX2 SATA_V1P05A_G32 U22
    C1033 1 2 1U_0402_6.3V6K AM29 CORE_V1P15_S0IX3 SATA_V1P05A_G31
    CORE_V1P15_S0IX4 C1057 1 2 1U_0402_6.3V6K USB3_V1P05A_G3 - Back side : 1uF *1
    V27

    USB
    AK33 USB3_V1P05A_G32 U27 C1089 1 2 1U_0402_6.3V6K
    AJ35 FUSE_V1P15_S0IX2 USB3_V1P05A_G31 V29 C1090 1 2 1U_0402_6.3V6K
    FUSE_V1P15_S0IX1 USBSSIC_V1P05A_G3
    USBSSIC_V1P05A_G3 - Back side : 1uF *1
    Package edge : 1uF *1

    FUSE
    B AM19 N18 B
    C1034 1 2 1U_0402_6.3V6K AK21 DDI_V1P15_S0IX2 FUSE3_V1P05A_G5 U19 C1103 1 2 1U_0402_6.3V6K
    DDI_V1P15_S0ix - DDI_V1P15_S0IX1 FUSE_V1P05A_G3
    Back side : 1uF *1 C1035 1 2 1U_0402_6.3V6K FUSE_V1P05A_G5 - Package edge : 1uF *1
    Package edge : 1uF *2 8 OF 13 C1104 1 2 1U_0402_6.3V6K
    C1105 1 2 1U_0402_6.3V6K
    BSW-MCP-EDS_FCBGA1170 FUSE_V1P05A_G3 - Back side : 1uF *2

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    2015/12/24 2017/12/24 Title
    Issued Date Deciphered Date BSW-M SOC Power
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 11 of 52
    5 3 2 1
    5 3 2 1

    (pin_AN27)DDR_VDDQ_G_S4 -
    Back side : 1uF *1
    Package edge : 22uF *1
    +1.35V_SOC

    +1.24VALW_ICLK +1.24VALW
    R1158 1 @ 2 0_0805_5% +1.35V_DDRSFR_VDDQ R1179
    1 0_0805_5%
    EMC@ C1075 1 2 22U_0603_6.3V6M 1 @ 2
    C1107 C1051 1 2 1U_0402_6.3V6K +1.24VALW
    330P_0402_50V7K 550mA 1 1
    2
    C1060 @ C1110
    +1.35V_SOC USOC1I CHV_MCP_EDS 1U_0402_6.3V6K 1U_0402_6.3V6K
    2 2
    D R1177 1 @ 2 0_0805_5% +1.35V_DDR VDDQ D

    1 AN27 V36 C1058 1 2 1U_0402_6.3V6K DDI_VDDQ_G3 - Back side : 1uF *1


    EMC@ C1079 1 2 22U_0603_6.3V6M AM25 DDRSFR_VDDQ_G_S4 DDI_VDDQ_G31 Y36 @
    DDR_VDDQ_G_S42 DDI_VDDQ_G32
    ICLK_VSFR_G3 - Back side : 1uF *1
    C1108 C1052 1 2 1U_0402_6.3V6K C1085 1 2 1U_0402_6.3V6K
    330P_0402_50V7K BE1 T40 +1.24V_SOC @ MIPI_V1P24A_G3 - Back side : 1uF *1
    2 BE53 DDR_VDDQ_G_S416 MIPI_V1P2A_G32 P40 C1086 1 2 1U_0402_6.3V6K
    DDR_VDDQ_G_S419 MIPI_V1P2A_G31 Package edge : 1uF *1
    BJ2 +1.24VALW_USBVDDQ +1.24VALW
    BJ3 DDR_VDDQ_G_S426 Y27 +1.24VALW_ICLK
    (pin_AM25)DDRSFR_VDDQ_G_S4 - DDR_VDDQ_G_S427 ICLK_VSFR_G32
    +1.35V +1.35V_SOC Back side : 1uF *1 BJ49 Y25
    BJ5 DDR_VDDQ_G_S428 ICLK_VSFR_G31 R1209 1 @ 2 0_0805_5%
    Package edge : 22uF *1 DDR_VDDQ_G_S429
    @EMC@ L61 BH50 P38
    2 1 BH5 DDR_VDDQ_G_S425 CORE_VSFR_G35 V30 C1047 1 2 1U_0402_6.3V6K
    DDR_VDDQ_G_S424 CORE_VSFR_G36 1 1

    DDR
    HCB2012KF-121T50_2P BH49 AC30 C1048 1 2 1U_0402_6.3V6K CORE_VSFR_G3 - Back side : 1uF *2
    BH4 DDR_VDDQ_G_S423 PCIE_V1P05A_G31 C1081 @ C1111
    @EMC@ L62 BE3 DDR_VDDQ_G_S422 1U_0402_6.3V6K 1U_0402_6.3V6K
    2 1 BG51 DDR_VDDQ_G_S417 AF35 C1046 1 2 1U_0402_6.3V6K 2 2
    DDR_VDDQ_G_S421 CORE_VSFR_G34
    CORE_VSFR_G3 - Back side : 1uF *1
    HCB2012KF-121T50_2P BG3 AD35
    BJ51 DDR_VDDQ_G_S420 CORE_VSFR_G32 AD38
    DDR_VDDQ_G_S430 CORE_VSFR_G33
    USB_VDDQ_G3 -
    @EMC@ L63 BJ52 AC36 @ pin_H44 - Back side : 1uF *1
    2 1 AY10 DDR_VDDQ_G_S431 CORE_VSFR_G31 C1087 1 2 1U_0402_6.3V6K
    DDR_VDDQ_G_S414
    USBHSIC_V1P24A_G3 - Back side : 1uF *1
    HCB2012KF-121T50_2P AY44
    JP3 JP@ AV44 DDR_VDDQ_G_S415 M41 +1.24V_SOC C1061 1 2 1U_0402_6.3V6K
    AV10 DDR_VDDQ_G_S413 USBHSIC_V1P2A_G3 U35 C1062 1 2 1U_0402_6.3V6K
    DDR_VDDQ_G_S410 USB_VDDQ_G32
    USB_VDDQ_G3 - pin_U35,V35 - Back side : 1uF *2
    BE51 V35 +1.24VALW_USBVDDQ

    USB
    JUMP_43X118 AV38 DDR_VDDQ_G_S418 USB_VDDQ_G33 H44 @
    JP4 JP@ AV16 DDR_VDDQ_G_S412 USB_VDDQ_G31 P41 C1088 1 2 1U_0402_6.3V6K
    1900mA DDR_VDDQ_G_S411 USBSSIC_V1P2A_G3
    USBSSIC_1P24A_G3 - Package edge : 1uF *1
    AU36
    AU18 DDR_VDDQ_G_S49 AA29
    JUMP_43X118 AN36 DDR_VDDQ_G_S48 USB_V1P8A_G3
    DDR_VDDQ_G_S47 +1.8VALW
    JP3,JP4 short C1069 1 2 22U_0603_6.3V6M AN35 C23
    C1071 1 2 22U_0603_6.3V6M AN19 DDR_VDDQ_G_S46 USB_V3P3A_G32 B22
    DDR_VDDQ_G_S45 USB_V3P3A_G31 +3V_SOC 1 1 USB_V1P8A_G3 - Back side : 1uF *1

    1U_0402_6.3V6K
    C1083

    1U_0402_6.3V6K
    C1082
    C1072 1 2 22U_0603_6.3V6M AN18 Package edge : 1uF *1
    C C1074 1 2 330P_0402_50V7K AM36 DDR_VDDQ_G_S44 C5 C
    DDR_VDDQ_G_S4 - DDR_VDDQ_G_S43 RTC_V3P3RTC_G52 +RTCVCC 1

    1U_0402_6.3V6K
    C1084
    Package edge : 22uF *4 EMC@ AM18 B6
    DDR_VDDQ_G_S41 RTC_V3P3RTC_G51 D4 2 2

    RTC
    RTC V3P3A_G51 +3V_SOC 1

    1U_0402_6.3V6K
    C1100
    E1 E3 USB_V3P3A_G3 - Package edge : 1uF *1
    +VDD_SD3 SDIO_V3P3A_V1P8A_G3 R C_V3P3A_G52 2
    3/8:EMI request C1074 330P E2 1
    SDIO_V3P3A_V1P8A_G32

    1U_0402_6.3V6K
    C1101
    G1 RTC_V3P3RTC_G5 - Package edge side : 1uF *1
    +VDD_LPC SDIO_V3P3A_V1P8A_G33 2
    AH4 U16
    +VDD_AUDIO UNCORE_V1P8A_G32 FUSE_V P8A_G3 +1.8VALW
    AF4 RTC_V3P3A_G5 - Package edge side : 1uF *1
    UNCORE_V1P8A_G31 2

    FUSE
    Y18 H10 1
    +1.8VALW GPIO_V1P8A_G35 FUSE1_V1P05A_G4 +1.05VALW

    1U_0402_6.3V6K
    C1102
    AD33 G10
    AK18 GPIO_V1P8A_G31 FUSE0_V1P05A G3 A3
    550mA GPIO_V1P8A_G33 RSVD_VSS 1 FUSE_V1P8A_G3 - Back side : 1uF *1

    1U_0402_6.3V6K
    C1106
    C1091 1 2 1U_0402_6.3V6K AF33 K20
    C1092 1 2 1U_0402_6.3V6K AK19 GPIO_V1P8A_G32 RSVD M20 2
    GPIO_V1P8A_G3 - GPIO_V1P8A_G34 RSVD2
    FUSE_V1P05A_G4 - Package edge : 1uF *1
    pin_Y18 - Back side*1 C1093 1 2 1U_0402_6.3V6K
    C1094 1 2 1U_0402_6.3V6K 2
    other pin - Package edge*2
    C1095 1 2 1U_0402_6.3V6K 9 OF 13

    BSW-MCP-EDS_FCBGA1170

    +1.24VALW
    +VDD_SD3
    +VDD_LPC +VDD_AUDIO
    Use +1.5VS

    2
    R1208 148mA R1211 R1218 @
    1 @ 2 0_0603_5% 1 @ 2 0_0603_5% 1 @ 2 0_0603_5% R1212
    +3V_SOC +1.8VS +1.8VALW
    0_0603_5%
    1 +1.8VALW R1210 1 @ 2 0_0603_5% 1
    1U_0402_6.3V6K
    C1097

    1U_0402_6.3V6K
    C1096

    1 1

    1
    +1.24V_SOC

    1U_0402_6.3V6K
    C1099

    1U_0402_6.3V6K
    C1098
    @
    SDIO_V3P3A_V1P8A_G3 - UNCORE_V1P8A_G3 - Back side : 1uF *1

    2
    2 2 SDIO V3P3A_V1P8A_G3 -
    pin_G1 - Back side : 1uF *1 2 2
    pin_E1,E2 - Back side : 1uF *2 R1213
    B B
    0_0603_5%

    1
    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title
    BSW-M SOC Power

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 12 of 52
    5 3 2 1
    5 3 2 1

    D D

    ball_B52 :
    if connect to GND , layout side need use 3mil-core and will cost up ,
    so lef t NC pi n_B52 (I nt el CRB al s ol e ft NC
    )

    C CHV_MCP_EDS C V_MCP_ DS CHV_MCP_EDS C


    USOC1J USOC1K USOC1L
    CHV_MCP_EDS USOC1M
    Power-VSS Power VSS Power-VSS Power-VSS
    F1 W1
    AN3 AF38 AN21 AY9 AN33 Y24 C1 VSS18 VSS57 V44
    AN29 VSS98 VSS51 AF32 BG30 VSS5 VSS6 AY28 P32 VSS2 VSS102 G30 BH53 VSS17 VSS56 V42
    AN25 VSS97 VSS50 AF25 BG27 VSS101 VSS52 AY26 P27 VSS99 VSS53 G28 BH52 VSS16 VSS55 V41
    AN24 VSS96 VSS49 AF10 BG24 VSS100 VSS51 AY24 P22 VSS98 VSS52 G26 BH2 VSS15 VSS54 V38
    AN16 VSS95 VSS48 AE9 BG20 VSS99 VSS50 AY22 P19 VSS97 VSS51 G22 BH1 VSS14 VSS53
    AN14 VSS94 VSS47 AE8 BG19 VSS98 VSS49 AY20 AF24 VSS96 VSS50 G14 BG53 VSS13 V32
    AN12 VSS93 VSS46 AE6 BG18 VSS97 VSS48 AW35 N53 VSS1 VSS49 G12 BG1 VSS12 VSS52 V21
    AN11 VSS92 VSS45 AE53 BG16 VSS96 VSS47 AW27 N5 VSS95 VSS48 F5 B52 VSS10 VSS51 V16
    AN1 VSS91 VSS44 AE50 BG14 VSS95 VSS46 AW19 N32 VSS94 VSS47 F35 B2 VSS5 VSS50 U9
    AM50 VSS90 VSS43 AE48 BF42 VSS94 VSS45 AM13 N24 VSS93 VSS46 F32 VSS4 VSS49 U8
    AM42 VSS89 VSS42 AE46 BF32 VSS93 VSS4 AK29 N22 VSS92 VSS45 F27 A6 VSS48 U6
    AM4 VSS88 VSS41 AE45 BF28 VSS92 VSS3 AK22 M9 VSS91 VSS44 F24 A5 VSS2 VSS47 U53
    AM38 VSS87 VSS40 AE43 BF27 VSS91 VSS2 AV40 VSS90 VSS43 F19 VSS1 VSS46 U5
    AM35 VSS86 VSS39 AE42 BF26 VSS90 VSS44 AV35 K45 VSS42 E51 M24 VSS45 U49
    AH44 VSS85 VSS38 AE40 BF22 VSS89 VSS43 AV30 M40 VSS77 VSS41 E35 A7 VSSA VSS44 U48
    AM30 VSS60 VSS37 AE14 BF12 VSS88 VSS42 AV27 M35 VSS87 VSS39 E19 BF50 VSS3 VSS43 U46
    AM27 VSS84 VSS36 AE12 BE35 VSS87 VSS41 AV24 M27 VSS86 VSS38 D42 BF4 VSS9 VSS42 U45
    U25 VSS83 VSS35 AE11 BE19 VSS86 VSS40 AV19 AW13 VSS85 VSS37 D40 BB50 VSS8 VSS41 U43
    P10 VSS100 VSS34 AE1 C20 VSS85 VSS39 AV14 M19 VSS3 VSS36 D38 VSS7 VSS40 U42
    AM16 VSS99 VSS33 AD44 BD53 VSS103 VSS38 AJ18 M14 VSS84 VSS35 D32 BB4 VSS39 U40
    AD4 VSS81 VSS32 AD36 BG7 VSS84 VSS1 AU53 L35 VSS83 VSS34 D27 VSS6 VSS38 U38
    AK7 VSS31 VSS30 AC29 BD35 VSS102 VSS37 AU51 L27 VSS82 VSS33 D24 BG47 VSS37
    AK50 VSS80 VSS23 AD32 BD27 VSS83 VSS36 AU3 L19 VSS81 VSS32 D16 Y9 VSS11 U33
    AK47 VSS79 VSS29 AD30 BD19 VSS82 VSS35 AU1 L1 VSS80 VSS31 D10 Y50 VSS70 VSS35 U32
    AK45 VSS78 VSS28 AD21 BD1 VSS81 VSS34 AT9 K50 VSS79 VSS30 J42 Y45 VSS69 VSS34 U30
    AK44 VSS77 VSS27 AC38 BC44 VSS80 VSS33 AT51 T47 VSS78 VSS65 C47 Y40 VSS68 VSS33 U29
    AK40 VSS76 VSS26 AC35 BC40 VSS79 VSS32 AT45 K4 VSS100 VSS29 C39 Y4 VSS67 VSS32
    AK4 VSS75 VSS25 AC33 BC38 VSS78 VSS31 AT36 K36 VSS76 VSS28 C36 Y38 VSS66 U21
    AK38 VSS74 VSS24 AC16 BC28 VSS77 VSS30 AT35 K34 VSS75 VSS27 C30 Y29 VSS65 VSS31 U18
    B AK32 VSS73 VSS22 AB6 BC26 VSS76 VSS29 AT3 K32 VSS74 VSS26 C3 Y22 VSS64 VSS30 U36 B
    AK27 VSS72 VSS21 AB50 BC16 VSS75 VSS28 AT27 K30 VSS73 VSS25 C28 Y21 VSS63 VSS36 U14
    AK25 VSS71 VSS20 AB47 BC14 VSS74 VSS27 AT19 K24 VSS72 VSS24 C22 Y19 VSS62 VSS29 U12
    AM24 VSS70 VSS19 AB42 BC10 VSS73 VSS26 AT18 K22 VSS71 VSS23 AW41 Y16 VSS61 VSS28 U11
    AK16 VSS82 VSS18 AB4 BB35 VSS72 VSS25 AP9 K16 VSS70 VSS4 BJ7 Y14 VSS60 VSS27 T9
    AJ53 VSS69 VSS17 AB14 BB27 VSS71 VSS24 AP50 K14 VSS69 VSS22 BJ47 Y10 VSS59 VSS26 P42
    AJ51 VSS68 VSS16 AB13 BB19 VSS70 VSS23 AP45 K12 VSS68 VSS21 BJ43 VSS58 VSS23 T14
    AJ3 VSS67 VSS15 AB12 BA35 VSS69 VSS22 AP4 J53 VSS67 VSS20 BJ39 P4 VSS25 R1
    AJ25 VSS66 VSS14 AB10 BA30 VSS68 VSS21 AN9 M45 VSS66 VSS19 BJ35 L41 VSS22 VSS24
    AJ16 VSS65 VSS13 AA53 BA27 VSS67 VSS20 AN8 J38 VSS88 VSS18 BJ31 P36 VSS19 P35
    AJ1 VSS64 VSS12 AA38 BA24 VSS66 VSS19 AN6 J35 VSS64 VSS17 BJ27 VSS21 13 OF 13 VSS20
    AH9 VSS63 VSS11 AA27 BA19 VSS65 VSS18 AN53 J30 VSS63 VSS16 BJ23 BSW-MCP-EDS_FCBGA1170
    AH47 VSS62 VSS10 AA16 B36 VSS64 VSS17 AN51 J27 VSS62 VSS15 BJ19
    AH42 VSS61 VSS9 A47 B28 VSS63 VSS16 AN5 J22 VSS61 VSS14 BJ15
    AH41 VSS59 VSS8 A43 AY7 VSS62 VSS15 AN49 J19 VSS60 VSS13 BJ11
    AH14 VSS58 VSS7 A39 AY51 VSS60 VSS14 AN48 J18 VSS59 VSS12 BG5
    AH13 VSS57 VSS6 A31 AY47 VSS59 VSS13 AN46 H8 VSS58 VSS11 BG49
    AH12 VSS56 VSS5 A23 AY34 VSS58 VSS12 AN45 E46 VSS57 VSS10 BG40
    AH10 VSS55 VSS4 A19 AY32 VSS56 VSS11 AN43 H35 VSS40 VSS9 BG38
    AG25 VSS54 VSS3 A15 AY30 VSS55 VSS10 AN42 H27 VSS56 VSS8 BG36
    AF47 VSS53 VSS2 A11 AY3 VSS54 VSS9 AN40 H19 VSS55 VSS7 BG35
    VSS52 VSS1 AN30 VSS53 VSS8 AN38 M50 VSS54 VSS6 BG34
    10 OF 13 AY45 VSS6 VSS7 V25 VSS89 VSS5
    BSW-MCP-EDS_FCBGA1170 VSS57 VSS101

    11 OF 13 12 OF 13
    BSW-MCP-EDS_FCBGA1170 BSW-MCP-EDS_FCBGA1170

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    2015/12/24 2017/12/24 Title
    Issued Date Deciphered Date BSW-M SOC GND
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 13 of 52
    5 3 2 1
    A B C D E

    +DDR_A_VREF_DQ +1.35V +1.35V


    JDIMM1
    1 2
    3 VREF_DQ VSS1 4 DDR_A_D7
    DDR_A_D0 5 VSS2 DQ4 6 DDR_A_D3 DDR_A_DQS#[0..7] 6
    DDR_A_D1 7 DQ0 DQ5 8
    9 DQ1 VSS3 10 DDR_A_DQS#0 DDR_A_DQS[0..7] 6
    DDR_A_DM0 11 VSS4 DQS#0 12 DDR_A_DQS0
    13 DM0 DQS0 14 DDR_A_D[0..63] 6
    DDR_A_D2 15 VSS5 VSS6 16 DDR_A_D6
    DDR_A_D5 17 DQ2 DQ6 18 DDR_A_D4 DDR_A_MA[0..15] 6
    19 DQ3 DQ7 20
    DDR_A_D13 21 VSS7 VSS8 22 DDR_A_D9 DDR_A_DM[0..7] 6
    DDR_A_D12 23 DQ8 DQ12 24 DDR_A_D8
    1 25 DQ9 DQ13 26 1
    DDR_A_DQS#1 27 VSS9 VSS10 28 DDR_A_DM1
    DDR_A_DQS1 29 DQS#1 DM1 30
    DQS1 RESET# DDR_A_RST# 6
    31 32
    DDR_A_D10 33 VSS11 VSS12 34 DDR_A_D14
    DDR_A_D11 35 DQ10 DQ14 36 DDR_A_D15
    37 DQ11 DQ15 38 EMC@
    DDR_A_D22 39 VSS13 VSS14 40 DDR_A_D16 DDR_A_RST# C1077 1 2 .1U_0402_16V7K
    DDR_A_D17 41 DQ16 DQ20 42 DDR_A_D19
    43 DQ17 DQ21 44
    DDR_A_DQS#2 45 VSS15 VSS16 46 DDR_A_DM2 ESD request 0211
    DDR_A_DQS2 47 DQS#2 DM2 48
    49 DQS2 VSS17 50 DDR_A_D20
    DDR_A_D23 51 VSS18 DQ22 52 DDR_A_D21
    DDR_A_D18 53 DQ18 DQ23 54
    55 DQ19 VSS19 56 DDR_A_D27
    All VREF traces should DDR_A_D28 57 VSS20 DQ28 58 DDR_A_D25
    have 10 mil trace width DDR_A_D30 59 DQ24 DQ29 60
    61 DQ25 VSS21 62 DDR_A_DQS#3
    DDR_A_DM3 63 VSS22 DQS#3 64 DDR_A_DQS3
    65 DM3 DQS3 66
    DDR_A_D26 67 VSS23 VSS24 68 DDR_A_D29
    DDR_A_D24 DQ26 DQ30 DDR_A_D31
    Signal voltage level = 0.675 V
    69 70
    7 DQ27 DQ31 72 PLACE TWO 4.7K RESISTORS CLOSE TO
    VSS25 VSS26 DIMMS ON DIMM_VREF_CA / DIMM_VREF_DQ
    Decoupling caps are needed; one 0.1 µ F placed close to VREF pins of each DDR3 SODIMM.
    73 74
    6 DDR_A_CKE0 CKE0 CKE1 DDR_A_CKE1 6
    75 76
    77 VDD1 VDD2 78 DDR_A_MA15
    79 NC1 A15 80 DDR_A_MA14 +1.35V +DDR_A_VREF_DQ
    6 DDR_A_BS2 BA2 A14
    81 82
    2 DDR_A_MA12 83 VDD3 VDD4 84 DDR_A_MA11 1 2 2
    DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7 R1027
    87 A9 A7 88 4.7K_0402_1%
    DDR_A_MA8 VDD5 VDD6 DDR_A_MA6 1
    89 90
    DDR_A_MA5 91 A8 A6 92 DDR_A_MA4 1 2 C1076
    93 A5 A4 94 R1028
    VDD7 VDD8 .1U_0402_16V7K
    DDR_A_MA3 95 96 DDR_A_MA2 4.7K_0402_1% 2
    DDR_A_MA 97 A3 A2 98 DDR_A_MA0
    99 A1 A0 100
    101 VDD9 VDD10 102
    6 DDR_A_CLK0 CK0 CK1 DDR_A_CLK1 6
    103 104
    6 DDR_A_CLK0# CK0# CK1# DDR_A_CLK1# 6 +1.35V +DDR_A_VREF_CA
    105 106
    DDR_A_MA10 107 VDD11 VDD12 108
    A10/AP BA1 DDR_A_BS1 6
    109 110 1 2
    6 DDR_A_BS0 BA0 RAS# DDR_A_RAS# 6
    111 112 R1029
    113 VDD13 VDD14 114 4.7K_0402_1%
    6 DDR_A_WE# WE# S0# DDR_A_CS0# 6 1
    115 116
    6 DDR_A_CAS# CAS# ODT0 DDR_A_ODT0 6
    117 118 1 2 C1078
    DDR_A_MA13 119 VDD15 VDD16 120 R1030
    A13 ODT1 DDR_A_ODT1 6 .1U_0402_16V7K
    121 122 4.7K_0402_1% 2
    6 DDR_A_CS1# S1# NC2
    123 124
    125 VDD17 VDD18 126
    NCTEST VREF_CA +DDR_A_VREF_CA
    127 128
    DDR_A_D48 129 VSS27 VSS28 130 DDR_A_D52
    DDR_A_D49 131 DQ32 DQ36 132 DDR_A_D53
    133 DQ33 DQ37 134
    DDR_A_DQS#6 135 VSS29 VSS30 136 DDR_A_DM6
    DDR_A_DQS6 137 DQS#4 DM4 138
    Layout Note
    139 DQS4 VSS31 140 DDR_A_D54 Place near JDIMM1
    DDR_A_D50 141 VSS32 DQ38 142 DDR_A_D55
    DDR_A_D51 143 DQ34 DQ39 144
    145 DQ35 VSS33 146 DDR_A_D32 +1.35V
    VSS34 DQ44
    Follow B5W1S
    3 DDR_A_D36 147 148 DDR_A_D33 +1.35V 3
    DDR_A_D37 149 DQ40 DQ45 150
    151 DQ41 VSS35 152 DDR_A_DQS#4 +1.35V C111 1 2 10U_0603_6.3V6M
    DDR_A_DM4 VSS36 DQS#5 DDR_A_DQS4 1
    Swap D4->D5,D5->D6,D6->D4 153 154 C112 1 2 10U_0603_6.3V6M
    155 DM5 DQS5 156 C113 1 2 10U_0603_6.3V6M + CD16
    DDR_A_D38 157 VSS37 VSS38 158 DDR_A_D34 EMC@ C120 1 2 .1U_0402_16V7K C114 1 2 10U_0603_6.3V6M 330U_D2_2V_Y
    DDR_A_D39 159 DQ42 DQ46 160 DDR_A_D35 EMC@ C127 1 2 .1U_0402_16V7K @
    161 DQ43 DQ47 162 EMC@ C121 1 2 .1U_0402_16V7K 2
    DDR_A_D44 163 VSS39 VSS40 164 DDR_A_D40 EMC@ C126 1 2 .1U_0402_16V7K C110 1 2 .1U_0402_16V7K
    DDR_A_D45 165 DQ48 DQ52 166 DDR_A_D41 EMC@ C118 1 2 .1U_0402_16V7K C109 1 2 .1U_0402_16V7K
    167 DQ49 DQ53 168 1 2 1 2
    SGA00009S00
    EMC@ C119 .1U_0402_16V7K C108 .1U_0402_16V7K
    DDR_A_DQS#5 169 VSS41 VSS42 170 DDR_A_DM5 EMC@ C148 1 2 .1U_0402_16V7K C107 1 2 .1U_0402_16V7K 330U 2V H1.9
    DDR_A_DQS5 171 DQS#6 DM6 172 EMC@ C149 1 2 .1U_0402_16V7K C 5 1 2 .1U_0402_16V7K 9mohm POLY
    173 DQS6 VSS43 174 DDR_A_D42 EMC@ C150 1 2 .1U_0402_16V7K C116 1 2 .1U_0402_16V7K
    DDR_A_D46 175 VSS44 DQ54 176 DDR_A_D43 C1 7 1 2 . U 0402_16V7K
    DDR_A_D47 177 DQ50 DQ55 178
    179 DQ51 VSS45 180 DDR_A_D63
    DDR_A_D56 181 VSS46 DQ60 182 DDR_A_D58
    DDR_A_D59 183 DQ56 DQ61 184
    185 DQ57 VSS47 186 DDR_A_DQS#7
    DDR_A_DM7 187 VSS48 DQS#7 188 DDR_A_DQS7
    189 DM7 DQS7 190
    DDR_A_D62 191 VSS49 VSS50 192 DDR_A_D61 +0.675VS
    DDR_A_D60 193 DQ58 DQ62 194 DDR_A_D57
    195 DQ59 DQ63 196 C123 1 2 10U_0603_6.3V6M
    197 VSS51 VSS52 198
    199 SA0 EVENT# 200
    +3VS VDDSPD SDA DDR_SMB_DA 9
    201 202 C124 1 2 1U_0402_6.3V6K
    203 SA1 SCL 204 DDR_SMB_CK 9
    +0.675VS +0.675VS C122 1 2 1U_0402_6.3V6K
    VTT1 VTT2
    205 206
    G1 G2
    2

    1 @ @
    R211 R212 FOX_AS0A621-H2R6-7H
    Channel A
    0_0402_5%

    C125 CONN@
    0_0402_5%

    .1U_0402_16V7K Layout Note


    2 SP07000WM10 Place near JDIMM1.203,204
    1

    <Address: SA1:SA0=00 (A0H)> Security Classification Compal Secret Data Compal Electronics, Inc.
    2015/12/24 2017/12/24 Title
    Issued Date Deciphered Date DDR3L DIMMA
    DIMM_1 Reverse
    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 14 of 52
    A B C D E
    A B C D E

    UGPU1A
    GPIO I/O USAGE

    Part 1 of 6 +3VSDGPU_AON
    GC6_FB_EN GC6_FB_EN 10 GPIO0 O GC6 FB EN
    8 PEG_HTX_C_DRX_P0 AG6 C6 RP2000
    AG7 PEX_RX0 GPIO0 B2 +1.8VALW 10K_0804_8P4R_5%
    8 PEG_HTX_C_DRX_N0 PEX_RX0_N GPIO1 GPIO8_OVERT
    8 PEG_HTX_C_DRX_P1 AF7 D6 8 1 GPIO1 O MEM VDD CTL
    AE7 PEX_RX1 GPIO2 C7 GPIO9_ALERT 7 2
    8 PEG_HTX_C_DRX_N1 PEX_RX1_N GPIO3
    AE9 F9 6 3
    AF9 PEX_RX2 GPIO4 A3 3VSDGPU_MAIN_EN 3VSDGPU_MAIN_EN 36,49 ACIN_BUF 5 4
    AG9 PEX_RX2_N GPIO5 A4 GPU_EVENT#_1 GC6@
    GPIO2 O LCD BL PWM

    5
    AG10 PEX_RX3 GPIO6 B6 U2514 VGA@
    AF10 PEX_RX3_N GPIO7 A6 GPIO8_OVERT 1 GPIO3 O LCD VCC

    P
    AE10 NC OVERT F8 GPIO9_ALERT NC 4 GPU_EVENT#_1
    AE12 NC GPIO9 C5 2 Y +3VSDGPU_AON
    1 NC GPIO10 10 GPU_EVENT# A 1

    G
    AF12 E7 DGPU_VID RP2001
    AG12 NC GPIO11 D7 ACIN_BUF DGPU_VID 49 GPIO4 O LCD BL EN
    NL17SZ07DFT2G_SC70-5 10K_0804_8P4R_5%

    3
    AG13 NC GPIO12 B4 PSI SA00004BV00 GPU_EVENT#_1 8 1

    GPIO
    AF13 NC GPIO13 B3 PSI 49 3VSDGPU_MAIN_EN 7 2
    AE13 NC GPIO14 C3 GPU_PEX_RST_HOLD# 6 3
    GPIO5 O 3V3 MAIN EN
    NC GPIO15 V1.0 modify GC6_FB_EN
    AE15 D5 5 4
    AF15 NC GPIO16 D4
    AG15 NC GPIO17 C2 GC6@
    GPIO6 I GPU EVENT#
    AG16 NC GPIO18 F7
    AF16 NC GPIO19 E6 ACIN_BUF 2 1
    AE16 NC GPIO20 C4 GPU_PEX_RST_HOLD# D2000 DGPU_AC_DETECT 33 GPIO7 O 3D Vision
    AE18 NC GPIO21 RB751V-40_SOD323-2 +3VSDGPU_AON
    AF18 NC AB6 VGA@
    AG18 NC PEX_WAKE_NC GPIO8 I SYS PEX RST MON#
    AG19 NC SYS_PEX_RST_MON# R2056 2 @ 1 10K_0402_5%
    AF19 NC
    AE19 NC +1.8VALW I2CS_SDA R2000 1 VGA@ 2 1.8K_0402_1%
    GPIO9 I/O ALERT
    AE21 NC AG3
    AF21 NC NC AF4 I2CS_SCL R2001 1 VGA@ 2 1.8K_0402_1%
    AG21 NC NC AF3
    GPIO10 O MEM VREF CTL
    AG22 NC NC @

    5
    NC U2513 PSI R2052 2 VGA@ 1 10K_0402_5%
    1 GPIO11 O PWM VID

    P
    VGA@ CV11 1 2 .1U_0402_16V7K PEG_DTX_HRX_P0 AC9 AE3 ACIN_BUF 4 NC
    8 PEG_DTX_C_HRX_P0 PEX_TX0 NC Y

    DACs
    VGA@ CV12 1 2 .1U_0402_16V7K PEG_DTX_HRX_N0 AB9 AE4 2
    8 PEG_DTX_C_HRX_N0 PEX_TX0_N NC A H_PROCHOT# 10,33

    G
    VGA@ CV13 1 2 .1U_0402_16V7K PEG_DTX_HRX_P1 AB10
    8 PEG_DTX_C_HRX_P1 PEG_DTX_HRX_N1 PEX_TX1
    8 PEG_DTX_C_HRX_N1 VGA@ CV14 1 2 .1U_0402_16V7K AC10 NL17SZ07DFT2G_SC70-5 GPIO12 I PWR LEVEL

    3
    PEX_TX1_N

    PCI EXPRESS
    AD11 SA00004BV00
    AC11 PEX_TX2 W5 PLTRST_VGA#
    AC12 PEX_TX2_N NC AE2
    PEX_TX3 TSEN_VREF V0.2 modify GPIO13 O PSI
    AB12 AF2
    AB13 PEX_TX3_N NC
    Vgs= 2V

    2
    AC13 NC
    2 AD14 NC GPIO14 I HPD A 2
    AC14 NC GPIO8_OVERT 1 6
    NC GPU_OVERT 33
    AC15 VGA@ GPIO15 I HPD C
    AB15 NC DMN66D0LDW-7_SOT363-6
    AB16 NC B7 R2003 1 VGA@ 2 1.8K_0402_1%
    NC I2CA_SCL Q2000A
    AC16 A7 R2004 1 VGA@ 2 1.8K_0402_1% GPIO16 I FRAME LOCK#
    AD17 NC I2CA_SDA
    NC PLTRST_VGA#
    V1.0 modify
    AC17 C9 R2005 1 VGA@ 2 1.8K_0402_1%
    AC18 NC I2CB_SCL C8 R2006 1 VGA@ 2 1.8K_0402_1%
    NC I2CB_SDA Vgs= 2V GPIO17 I HPD D
    I2C
    AB18

    5
    AB19 NC A9 R2007 1 VGA@ 2 1.8K_0402_1%
    AC19 NC I2CC_SCL B9 R2008 1 VGA@ 2 1 8K_0402_1%
    AD20 NC I2CC_SDA GPIO9_ALERT 4 3
    GPIO18 I HPD E
    NC I2CS_SCL GPU_ALERT 33
    AC20 D9 VGA@
    AC21 NC I2CS_SCL D8 I2CS_SDA DMN66D0LDW-7_SOT363-6
    AB21 NC I2CS_SDA GPIO19 I HPD F or HPD B
    Q2000B
    AD23 NC
    AE23 NC Place Under L6
    NC PLTRST_VGA#
    V1.0 modify GPIO20 Reserved
    AF24 C2000 0_0402_5% 1 @ 2R1164
    AE24 NC L6 +PLLVDD 1 2 .1U_0402_16V7K
    AG24 NC PLLVDD M6 VGA@
    AG25 NC SP_PLLVDD 1 2
    GPIO21 O GPU PEX RST HOLD#
    +3VSDGPU_AON @
    NC N6 C2001 R1165 0_0402_5%
    Vgs= 2V

    2
    NC +GPU_PLLVDD 1 2 .1U_0402_16V7K
    VGA@
    GPIO22
    1 VGA@ 2 AE8 I2CS_SCL 1 6
    +3VSDGPU_AON 8 CLK_PEG_VGA PEX_REFCLK EC_SMB_CK2 27,33
    R2009 10K_0402_5% AD8 VGA@ GPIO23
    PEG_CLKREQ# 8 CLK_PEG_VGA# PEX_REFCLK_N
    AC6 Place Under M6 DMN66D0LDW-7_SOT363-6
    29 PEG_CLKREQ# PEX_CLKREQ_N
    Q2001A
    PEX_TSTCLK_OUT+ AF22
    CLK

    2 @ 1 PEX_TSTCLK_OUT- AE22 PEX_TSTCLK_OUT C11 XTALIN


    GPIO24
    PEX_TSTCLK_OUT_N XTAL_IN PLTRST_VGA#
    V1.0 modify
    R2010 200_0402_1% B10 XTALOUT 0_0402_5% 1 @ 2R4915
    XTAL_OUT
    3 PLTRST_VGA# AC7 A10 XTAL_SSIN R2012 1 VGA@ 2 10K_0402_5% 3
    2 VGA@ 1 PEX_TREMP AF25 PEX_RST_N XTAL_SSIN C10 XTAL_OUTBUFF R2013 1 VGA@ 2 10K_0402_5% 1 @ 2
    PEX_TERMP XTAL_OUTBUFF +3VSDGPU_AON
    R2011 2.49K_0402_1% R 168 0_0402_5%
    Vgs= 2V

    5
    GM108-ES-S-A1_FCBGA595
    @ I2CS_SDA 4 3
    EC_SMB_DA2 27,33
    VGA@
    DMN66D0LDW-7_SOT363-6
    Q2001B

    SM010019400 3000ma 33ohm@100mhz DCR 0.05


    38mA +1.05VSDGPU
    GC6 2.0 funct i on GC6_FB_EN
    D2001 VGA@
    2 +PLLVDD 1 2 R4961 27MHZ_10PF_7V27000023
    1 1.5VS_DGPU_PWR_EN L2000 CHILISIN PBY160808T-330Y-N 680_0402_ %
    1.5VS_DGPU_PWR_EN 36,47 XTALOUT_R
    3 GC6@ 1 XTALOUT 1 2 3 1 XTALIN
    C2003 VGA@ 3 1

    15P_0402_50V8J
    PLL_VDD
    1

    BAV70W_SOT323-3 GC6@ VGA@ GND GND

    5P_0402_50V8J
    0.1Ux1, 22Ux1

    1
    R2014 22U_0603_6.3V6M VGA@ X2000 VGA@
    30ohm(ESR0.05)x1

    1
    R2016 200K_0402_5% 2 VGA@ 4 2 C2005
    0_0402_5% Near GPU C2004

    2
    1 NGC6@ 2
    29,36,48,49 VGA_PWROK
    2

    2
    SM01000AG00 2A 300ohm@100mhz DCR 0.1
    V0.2 modify 17mA
    Crys als must have a max ESR of 80 ohm
    +3VSDGPU_AON VGA@
    U2001 +GPU_PLLVDD 1 2
    5

    VGA@ L2001 HCB1608KF-301T20_2P


    PLT_RST_BUF# 2 1
    P

    10,26,27,33,34 PLT_RST_BUF#
    1

    B 4SYS_PEX_RST_MON# C2007
    DGPU_HOLD_RST# Y SYS_PEX_RST_MON# 17
    1 C2006 VGA@
    29 DGPU_HOLD_RST#
    2

    1
    G

    A 10U_0603_6.3V6M 47U_0805_6.3V6M
    2

    MC74VHC1G08DFT2G_SC70 5 R2019 R2017 VGA@ 2


    3

    0_0402_5% 10K_0402_5% SP_PLLVDD+VID_PLLVDD Near GPU


    NGC6@ VGA@ 0.1Ux2, 10Ux1,47Ux1
    +3VSDGPU_AON
    300ohm(ESR0.2)x1
    1

    U2002
    5

    GC6@
    SYS_PEX_RST_MON# 2
    Compal Electronics, Inc.
    P

    B 4 PLTRST_VGA# Security Classification Compal Secret Data


    1

    GPU_PEX_RST_HOLD# 1 Y
    A Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title
    G

    R2018
    MC74VHC1G08DFT2G_SC70-5 10K_0402_5% N16X PEG 1/9
    3

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    GC6@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    B5V1L Braswell-M/B LA-D921P
    2

    Reserved from NV suggest MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON CS, INC.
    Date Wednesday May 11 2016 Sheet 15 of 52
    A B C D E
    A B C D E

    VRAM Interface
    +1.5VSDGPU

    RP33
    CMDA23 1 8
    A5MUB exchange 2 7
    CMDA21 3 6 +1.5VSDGPU +1.5VSDGPU
    4 5
    UGPU1B VGA@ 2 2
    100_0804_8P4R_5%
    1 1
    C2084 C2083
    MDA[15..0] RP42 .1U_0402_16V7K .1U_0402_16V7K
    20,21 MDA[15..0] 1 1
    Part 2 of 6 CMDA24 1 8 @ @
    MDA[31..16] CMDA[31..0] 20,21,22,23 A5MUB exchange 2 7
    20,21 MDA[31..16]
    MDA0 E18 C27 CMDA0 CMDA26 3 6
    MDA[47..32] MDA1 F18 FBA_D00 FBA_CMD0 C26 CMDA1 4 5 +1.5VSDGPU +1.5VSDGPU
    22,23 MDA[47..32] FBA_D01 FBA_CMD1
    MDA2 E16 E24 CMDA2 VGA@
    UGPU1 MDA[63..48] MDA3 F17 FBA_D02 FBA_CMD2 F24 CMDA3 100_0804_8P4R_5%
    22,23 MDA[63..48] FBA_D03 FBA_CMD3 2 2
    MDA4 D20 D27 CMDA4
    MDA5 D21 FBA_D04 FBA_CMD4 D26 CMDA5 RP43 C2086 C2085
    MDA6 F20 FBA_D05 FBA_CMD5 F25 CMDA6 CMDA10 1 8
    FBA_D06 FBA_CMD6 .1U_0402_16V7K .1U_0402_16V7K
    MDA7 E21 F26 CMDA7 A5MUB exchange 2 7 1 1
    FBA_D07 FBA_CMD7 @ @
    MDA8 E15 F23 CMDA8 CMDA22 3 6
    S IC N16S-GTR-S-A2 BGA 595P GPU ABO ! MDA9 D15 FBA_D08 FBA_CMD8 G22 CMDA9 4 5
    GTR@ MDA10 F15 FBA_D09 FBA_CMD9 G23 CMDA10 VGA@ +1.5VSDGPU +1.5VSDGPU
    MDA11 F13 FBA_D10 FBA_CMD10 G24 CMDA11 100_0804_8P4R_5%
    SA00009FP40 FBA_D11 FBA_CMD11
    MDA12 C13 F27 CMDA12 2 2
    MDA13 B13 FBA_D12 FBA_CMD12 G25 CMDA13 RP44
    UGPU1 MDA14 E13 FBA_D13 FBA_CMD13 G27 CMDA14 CMDA4 1 8 C2088 C2087
    MDA15 D13 FBA_D14 FBA_CMD14 G26 CMDA15 A5MUB exchange 2 7 .1U_0402_16V7K .1U_0402_16V7K
    MDA16 B15 FBA_D15 FBA_CMD15 M24 CMDA16 CMDA12 3 6 1 1
    FBA_D16 FBA_CMD16 @ @
    MDA17 C16 M23 CMDA17 4 5
    MDA18 A13 FBA_D17 FBA_CMD17 K24 CMDA18 VGA@
    MDA19 A15 FBA_D18 FBA_CMD18 K23 CMDA19 100_0804_8P4R_5%
    S IC N16V-GMR1-S-A2 BGA 595P ABO ! MDA20 B18 FBA_D19 FBA_CMD19 M27 CMDA20
    GMR1@ MDA21 A18 FBA_D20 FBA_CMD20 M26 CMDA21 RP45
    MDA22 A19 FBA_D21 FBA_CMD21 M25 CMDA22 CMDA8 1 8
    SA00009IT20 FBA_D22 FBA_CMD22
    MDA23 C19 K26 CMDA23 A5MUB exchange 2 7
    MDA24 B24 FBA_D23 FBA_CMD23 K22 CMDA24 CMDA14 3 6
    MDA25 C23 FBA_D24 FBA_CMD24 J23 CMDA25 4 5
    MDA26 A25 FBA_D25 FBA_CMD25 J25 CMDA26 VGA@
    MDA27 A24 FBA_D26 FBA_CMD26 J24 CMDA27 100_0804_8P4R_5%
    MDA28 A21 FBA_D27 FBA_CMD27 K27 CMDA28 PVT modify 01/13
    2 MDA29 B21 FBA_D28 FBA_CMD28 K25 CMDA29 DQSA, DQSA# reverse RP46 2
    MDA30 C20 FBA_D29 FBA_CMD29 J27 CMDA30 CMDA9 1 8
    MDA31 C2 FBA_D30 FBA_CMD30 J26 CMDA31 2 7
    MDA32 R22 FBA_D31 FBA_CMD31 A5MUB exchange CMDA29 3 6 +1.5VSDGPU +1.5VSDGPU
    FBA_D32 DQMA[3..0] 20,21
    MDA33 R24 D19 DQMA0 4 5
    FBA_D33 FBA_DQM0

    INTERFACE A
    MDA34 T22 D14 DQMA1 VGA@ 2 2
    MDA35 R23 FBA_D34 FBA_DQM1 C17 DQMA2 100_0804_8P4R_5%
    MDA36 N25 FBA_D35 FBA_DQM2 C22 DQMA3 C2090 C2089
    FBA_D36 FBA_DQM3 DQMA[7..4] 22,23
    MDA37 N26 P24 DQMA4 RP47 .1U_0402_16V7K .1U_0402_16V7K

    MEMORY
    MDA38 N23 FBA_D37 FBA_DQM4 W24 DQMA5 CMDA5 1 8 1 1
    FBA_D38 FBA_DQM5 @ @
    MDA39 N24 AA25 DQMA6 A5MUB exchange 2 7
    NV 15x DG-06803-V03 MDA40
    MDA41
    V23
    V22
    FBA_D39
    FBA_D40
    FBA_DQM6
    FBA_DQM7
    U25 DQMA7 CMDA13 3
    4
    6
    5 +1.5VSDGPU +1.5VSDGPU
    NV 16x DG-07158-V04 MDA42
    MDA43
    T23
    U22
    FBA_D41
    FBA_D42 FBA_DQS_RN0
    F19
    C14
    DQSA#0
    DQSA#1
    DQSA#[3..0] 20,21
    VGA@
    100_0804_8P4R_5%
    FBA_D43 FBA_DQS_RN1 2 2
    MDA44 Y24 A16 DQSA#2
    MDA45 AA24 FBA_D44 FBA_DQS_RN2 A22 DQSA#3 RP48 C2091 C2092
    FBA_D45 FBA_DQS_RN3 DQSA#[7..4] 22,23
    MDA46 Y22 P25 DQSA#4 CMDA6 1 8 .1U_0402_16V7K .1U_0402_16V7K
    MDA47 AA23 FBA_D46 FBA_DQS_RN4 W22 DQSA#5 A5MUB exchange 2 7 1 1
    FBA_D47 FBA_DQS_RN5 @ @
    MDA48 AD27 AB27 DQSA#6 CMDA7 3 6
    MDA49 AB25 FBA_D48 FBA_DQS_RN6 T27 DQSA#7 4 5
    MDA50 AD26 FBA_D49 FBA_DQS RN7 VGA@ +1.5VSDGPU
    FBA_D50 DQSA[3..0] 20,21
    MDA51 AC25 E19 DQSA0 100_0804_8P4R_5%
    MDA52 AA27 FBA_D51 FBA_DQS_WP0 C15 DQSA1
    FBA_D52 FBA_DQS_WP1 2
    MDA53 AA26 B16 DQSA2 RP49
    MDA54 W26 FBA_D53 FBA_DQS_WP2 B22 DQSA3 CMDA27 1 8 C2093
    FBA_D54 FBA_DQS_WP3 DQSA[7..4] 22,23
    SM010019400 3000ma 33ohm@100mhz DCR 0.05 MDA55 Y25 R25 DQSA4 2 7 .1U_0402_16V7K
    MDA56 R26 FBA_D55 FBA_DQS_WP4 W23 DQSA5 CMDA30 3 6 1
    FBA_D56 FBA_DQS_WP5 @
    MDA57 T25 AB26 DQSA6 4 5
    MDA58 N27 FBA_D57 FBA_DQS_WP6 T26 DQSA7 VGA@
    +1.05VSDGPU MDA59 R27 FBA_D58 FBA_DQS_WP7 100_0804_8P4R_5%
    MDA60 V26 FBA_D59
    VGA@
    15+55mA MDA61 V27 FBA_D60 RP50
    3 2 1 L2002 +FB_PLLAVDD MDA62 W27 FBA_D61 CMDA28 1 8 3
    CHILISIN PBY160808T-330Y-N MDA63 W25 FBA_D62 A5MUB exchange 2 7
    22U_0603_6.3V6M

    VGA@ VGA@ VGA@ FBA_D63 D24 CMDA25 3 6


    .1U_0402_16V7K

    .1U_0402_16V7K

    .1U_0402_16V7K

    FBA_CLK0 CLKA0 20,21


    1 1 1 1 F16 D25 4 5
    FB_PLLAVDD_1 FBA_CLK0_N CLKA0# 20,21
    P22 VGA@
    C2008 FB_PLLAVDD_2 N22 100_0804_8P4R_5%
    FBA_CLK1 CLKA1 22,23
    C2011

    C2010

    C2009

    VGA@ T97 @ D23 M22


    2 2 2 2 FB_VREF_PROBE FBA_CLK1_N CLKA1# 22,23
    RP51
    D18 CMDA15 1 8
    H22 FBA_WCK01 C18 A5MUB exchange 2 7
    FB_DLLAVDD FBA_WCK01_N D17 CMDA11 3 6
    Place Near GPU Place Under F16 P22 H22 1 VGA@ 2 FB_CLAMP F3 FBA_WCK23 D16 4 5
    10K_0402_5% R2028 FB_CLAMP FBA_WCK23_N T24 VGA@
    FBA_WCK45 U24 100_0804_8P4R_5%
    60.4_0402_1% 1 @ 2 R2020FBA_CMD34 F22 FBA_WCK45_N V24
    60.4_0402_1% 1 @ 2 R2022FBA_CMD35 J22 FBA_CMD34 FBA_WCK67 V25
    change to 1.35VSDGPU +1.5VSDGPU FBA_CMD35 FBA_WCK67_N

    GM108-ES-S-A1_FCBGA595
    @

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    N16X VRAM 2/9
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON CS, INC. B5V1L Braswell-M/B LA-D921P
    Date Wednesday May 11 2016 Sheet 16 of 52
    A B C D E
    A B C D E

    UGPU1C MULTI LEVEL STRAPS


    Part 3 of 6 F11
    AC3 NC AD10 +3VSDGPU_AON +3VSDGPU_MAIN
    AC4 NC NC AD7
    Y4 NC NC B19 strap0 strap1 strap2 strap3 strap4
    Y3 NC FBA_CMD32 V5

    1
    AA3 NC NC V6
    AA2 NC NC G1 R2029 R2030 R2031 R2032 R2033 R2035 R2036 R2037
    AB1 NC NC G2 VGA@ @ @ @ @ X76@ @ @
    NC NC

    NC
    AA1 G3 49.9K_0402_1% 4.99K_0402_1% 10K_0402_1% 4.99K_0402_1% 10K_0402_1% 30K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
    AA4 NC NC G4

    2
    AA5 NC NC G5
    1 NC NC 1
    G6
    NC G7 STRAP0
    AB5 NC V1 STRAP1 ROM_SI
    AB4 NC NC V2 STRAP2 ROM_SO
    AB3 NC NC W1 STRAP3 ROM_SCLK
    AB2 NC NC W2 STRAP4
    AD3 NC NC W3
    AD2 NC NC W4

    1
    AE1 NC NC
    AD1 NC R2038 R2039 R2040 R2041 R2042 R2044 R2045 R2046
    AD4 NC @ @ @ @ @ X76@ VGA@ VGA@
    NC For GC62.0 use
    AD5 D11 R2050 1 @ 2 10K_0402_5% N14x for CEC ,NC 4.99K_0402_1% 45.3K_0402_1% 15K_0402_1% 4.99K_0402_1% 45.3K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
    NC BUFRST_N
    N15x for GPIO8

    2
    D10
    T2 NC
    T3 NC E9 SYS_PEX_RST_MON#
    NC GPIO8 SYS_PEX_RST_MON# 15
    T1
    R1 NC E 0
    NC NC
    GENERAL
    R2
    LVDS/TMDS

    R3 NC F10
    N2 NC NC
    N3 NC
    NC D1 STRAP0
    STRAP0 D2 STRAP
    V3 STRAP1 E4 STRAP2
    V4 NC STRAP2 E3 STRAP3
    U3 NC STRAP3 D3 STRAP4
    U4 NC STRAP4 C1
    T4 NC NC
    T5 NC
    R4 NC F6 MULTI_STRAP_REF0_GND 1 VGA@ 2
    R5 NC MULTI_STRAP_REF0_GND F4 R2051 40.2K_0402_1%
    NC NC F5
    2 NC 2
    N1
    M1 NC
    M2 NC F12
    M3 NC THERMDP
    K2 NC E12
    K3 NC THERMDN
    K1 NC
    J1 NC
    NC

    M4 F2 VCCSENSE_VGA
    M5 NC VDD_SENSE VCCSENSE_VGA 49
    L3 NC
    L4 NC
    K4 NC
    NC
    K5
    J4 NC F1 VSSSENSE_VGA For N16V-GMR1 Multi strap table Decive ID : 0x134F
    NC GND_SENSE VSSSENSE_VGA 49
    GPU VRAM RANK X76 Freq Memory Size Memory Config strap0 strap1 strap2 strap3 strap4 ROM_SI ROM_SO ROM_SCLK
    Voltage
    X76683BO003
    J5 0xC (SA00008DN10) Hynix H5TC4G63CFR-N0C PU 24.9K
    N4 NC 1GH 256Mx16x8
    N5 NC TEST +1.5V Dual 4G 0xD (SA000076PB0) Samsung K4W4G1646E-BC1A PU 30.1K
    NC
    N16V-
    P3 AD9 TESTMODE R2054 1 VGA@ 2 10K_0402_5% PU 49.9K NC NC NC NC PD 15K PD 4.99K PD 4.99K
    P4 NC TESTMODE AE5 JTAG_TCK_VGA PAD @ T24
    GMR1
    NC JTAG_TCK JTAG_TDI
    X76683BO001
    AE6 PAD @ T1 0x5 (SA00008DN10) Hynix H5TC4G63CFR-N0C PD 30.1K
    JTAG_TDI AF6 JTAG_TDO PAD @ T186 1GHz 256Mx16x4
    JTAG_TDO JTAG_TMS
    X76683BO002
    J2 AD6 PAD @ T5 +1.5V Single 2G 0x4 (SA000076PB0) Samsung K4W4G1646E-BC1A PD 24.9K
    J3 NC JTAG_TMS AG4 JTAG_RST R2053 1 VGA@ 2 0K_0402_5%
    NC JTAG_TRST_N PD 15K
    3 3
    H3
    H4 NC
    NC SERIAL
    D12
    ROM_CS_N B12 ROM_SI
    ROM_SI A12 ROM_SO
    For N16S-GTR Multi strap table Decive ID : 0x134D
    ROM_SO C12 ROM_SCLK GPU VRAM RANK X76 Freq Memory Size Memory Config strap0 strap1 strap2 strap3 strap4 ROM_SI ROM_SO ROM_SCLK
    ROM_SCLK Voltage
    X76683BO005
    GM108-ES-S-A1_FCBGA595 0xC (SA00008DN10) Hynix H5TC4G63CFR-N0C PU 24.9K
    @ 1GHz 256Mx16x8
    +1.5V Dual 4G 0xD (SA000076PB0) Samsung K4W4G1646E-BC1A PU 30.1K
    VGA Power Sequence N16S-
    PU 49.9K NC NC NC NC PD 15K PD 4.99K PD 4.99K
    GTR
    X76683BO004
    0x5 (SA00008DN10) Hynix H5TC4G63CFR-N0C PD 30.1K
    1GHz 256Mx16x4
    +1.5V Single 2G 0x4 (SA000076PB0) Samsung K4W4G1646E-BC1A PD 24.9K

    PD 15K

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    N16X LVDS 3/9
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON CS, INC. B5V1L Braswell-M/B LA-D921P
    Date Wednesday May 11 2016 Sheet 17 of 52
    A B C D E
    A B C D E

    NV 16x DG-07158-V05 NV 16x DG-07158-V05

    1 1

    UGPU1D +1.05VSDGPU
    +1.5VSDGPU 3.24A 1.275A
    Part 4 of 6
    B26 AA10

    .1U_0402_16V7K

    .1U_0402_16V7K

    4.7U_0603_6.3V6K
    C25 FBVDDQ_01 PEX_IOVDDQ_1 AA12

    10U_0603_6.3V6M

    22U_0603_6.3V6M
    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K
    4.7U_0603_6.3V6K

    4.7U_0603_6.3V6K
    C2039 FBVDDQ_02 PEX_IOVDDQ_2

    C2040

    C2032

    C2033

    C2021

    C2022

    C2013

    C2014

    C2016

    C2017
    1 1 1 2 2 E23 AA13 1 1 1 1
    E26 FBVDDQ_03 PEX_IOVDDQ_3 AA16
    F14 FBVDDQ_04 PEX_IOVDDQ_4 AA18
    VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ F21 FBVDDQ_05 PEX_IOVDDQ_5 AA19 VGA@ VGA@ VGA@ VGA@
    2 2 2 2 1 G13 FBVDDQ_06 PEX_IOVDDQ_6 AA20 2 2 2 2
    G14
    G15
    FBVDDQ_07
    FBVDDQ_08
    PEX_IOVDDQ_7
    PEX_IOVDDQ_8
    AA21
    AB22
    NV 16x DG-07158-V05
    Under GPU G16 FBVDDQ_09 PEX_IOVDDQ_9 AC23
    G18 FBVDDQ_10 PEX_IOVDDQ_10 AD24
    G19 FBVDDQ_11 PEX_IOVDDQ_11 AE25

    10U_0603_6.3V6M
    FBVDDQ_12 PEX_IOVDDQ_12 Under GPU Near GPU

    C2045

    C2047
    G20 AF26

    22U_0603 6.3V6M
    1 1 FBVDDQ_13 PEX_IOVDDQ_13 Midway GPU & Power supply
    G21 AF27
    H24 FBVDDQ_14 PEX_IOVDDQ_14
    VGA@ VGA@ H26 FBVDDQ_AON
    2 2 J21 FBVDDQ AON AA22
    K2 FBVDDQ_AON PEX_IOVDD_1 AB23
    L22 FBVDDQ_AON PEX_IOVDD_2 AC24
    L24 FBVDDQ_19 PEX_IOVDD_3 AD25
    Near GPU

    POWER
    L26 FBVDDQ_20 PEX_IOVDD_4 AE26
    M21 FBVDDQ_21 PEX_IOVDD_5 AE27
    2 N21 FBVDDQ_22 PEX_IOVDD_6 2
    R21 FBVDDQ_23
    T21 FBVDDQ_24
    V21 FBVDDQ_25 +3VSDGPU_AON
    W21 FBVDDQ_26
    FBVDDQ_27 G10
    3V3_AON G12

    .1U_0402_16V7K

    1U_0402_6.3V6K
    56mA

    4.7U_0603_6.3V6K
    3V3_AON

    C2048

    C2049

    C2050
    G8 2 1 1
    VDD33_3 G9
    VDD33_4
    VGA@ VGA@ VGA@
    V7 1 2 2
    W7 NC +1.5VSDGPU
    AA6 NC
    W6 NC D22 FB_CAL_PD_VDDQ 1 VGA@ 2
    NC FB_CAL_PD_VDDQ Under GPU Near GPU
    Y6 40.2_0402_1% R2078 +3VSDGPU_MAIN
    NC
    C24 FB_CAL_PU_GND VGA@ 2
    FB_CAL_PU_GND 42.2_0402_1% R2079

    1U_0402_16V7K

    .1U_0402_16V7K

    1U_0402_6.3V6K

    4.7U_0603_6.3V6K
    B25 FB_CAL_TERM_GND1 VGA@ 2

    C2051

    C2052

    C2053

    C2054
    M7 2 2 1 1
    N7 NC FB_CAL_TERM_GND 51.1_0402_1% R2080
    T6 NC
    P6 NC VGA@ VGA@ VGA@ VGA@
    NC 1 1 2 2

    T7
    R7 IFPD_PLLVDD_2 Under GPU Near GPU NV 16x DG-07158-V06
    +3VSDGPU_AON
    U6 NC
    R6 IFPD_RSET AA8
    286mA
    NC PEX_PLL_HVDD_1 AA9
    PEX_PLL_HVDD_2

    .1U_0402_ 6V7K

    4.7U_0603_6.3V6K

    4.7U_06 3_6.3V6K
    AB8

    C2034

    C2035

    C2036
    3 3
    PEX_SVDD_3V3 2 1 1

    J7 VGA@ VGA@ VGA@


    K7 NC 1 2 2
    K6 NC AA14
    H6 NC PEX_PLLVDD_1 AA15
    J6 NC PEX_PLLVDD_2
    NC Near GPU +1.05VSDGPU
    130mA R2075
    +PEX_PLLVDD 1 @ 2 0_0603_5%

    C2041

    C2042

    C2043
    .1U_0402 16V7K

    1U_0402_6.3V6K

    4.7U_0603_6.3V6K
    2 1 1
    GM108-ES-S-A1_FCBGA595
    @

    1
    VGA@
    2
    VGA@
    2
    VGA@ NV 16x DG-07158-V05
    Under GPU Near GPU

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    N16X POWER & GND 4/9
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON CS, INC. B5V1L Braswell-M/B LA-D921P
    Date Wednesday May 11 2016 Sheet 18 of 52
    A B C D E
    A B C D E

    UGPU1F
    UGPU1E +VGA_CORE +VGA_CORE

    A2 Part 5 of 6 K11
    Part 6 of 6 NV 16x DG-07158-V05
    A26 GND_001 GND_057 K13 K10 V18
    AB11 GND_002 GND_058 K15 K12 VDD_001 VDD_041 V16
    1 GND_003 GND_059 VDD_002 VDD_040 1
    AB14 K17 K14 V14
    AB17 GND_004 GND_060 L10 K16 VDD_003 VDD_039 V12
    AB20 GND_005 GND_061 L12 K18 VDD_004 VDD_038 V10
    AB24 GND_006 GND_062 L14 L11 VDD_005 VDD_037 U17

    POWER
    AC2 GND_007 GND_063 L16 L13 VDD_006 VDD_036 U15
    AC22 GND_008 GND_064 L18 L15 VDD_007 VDD_035 U13
    AC26 GND_009 GND_065 L2 L17 VDD_008 VDD_034 U11
    AC5 GND_010 GND_066 L23 M10 VDD_009 VDD_033 T18
    AC8 GND_01 GND_067 L25 M12 VDD_010 VDD_032 T16
    AD12 GND_012 GND_068 L5 M14 VDD_011 VDD_031 T14
    AD13 GND_013 GND_069 M11 M16 VDD_012 VDD_030 T12
    AD15 GND_014 GND_070 M13 M18 VDD_013 VDD_029 T10
    AD16 GND_015 GND_071 M15 N11 VDD_014 VDD_028 R17
    AD18 GND_016 GND_072 M17 N13 VDD_015 VDD_027 R15
    AD19 GND_017 GND_073 N10 N15 VDD_016 VDD_026 R13
    AD21 GND_018 GND_074 N12 N17 VDD_017 VDD_025 R11
    AD22 GND_019 GND_075 N14 P10 VDD_018 VDD_024 P18
    AE11 GND_020 GND 076 N 6 P12 VDD_019 VDD_023 P16
    AE14
    AE17
    GND_021
    GND_022
    GND_077
    GND_078
    N18
    P11
    VDD_020 VDD_022
    VDD_021
    P14 DA-07751-V01
    AE20 GND_023 GND_079 P 3
    AF1 GND_024 GND_080 P15
    GND_025 GND_081
    GND
    AF11 P17
    AF14 GND_026 GND_082 P2
    AF17 GND_027 GND_083 P23
    AF20 GND_028 GND_084 P26
    AF23 GND_029 GND_085 P5
    AF5 GND_030 GND_086 R10
    AF8 GND_031 GND_087 R12 GM108-ES-S-A1_FCBGA595
    AG2 GND_032 GND_088 R14 @
    AG26 GND_033 GND_089 R16
    B1 GND_034 GND_090 R18
    B11 GND_035 GND_091 T11
    2 B14 GND_036 GND_092 T13 2
    B17 GND_037 GND_093 T15
    B20 GND_038 GND_094 T17
    B23 GND_039 GND_095 U10
    B27 GND_040 GND_096 U12
    B5 GND_041 GND_097 U14
    B8 GND_042 GND_098 U16
    E11 GND_043 GND_099 U18
    E14 GND_044 GND_100 U2
    E17 GND_045 GND_101 U23
    E2 GND_046 GND_102 U26
    E20 GND_047 GND_103 U5
    E22 GND_048 GND_104 V11
    E25 GND_049 GND_105 V13
    E5 GND_050 GND_106 V15
    E8 GND_051 GND_107 V17
    H2 GND_052 GND_108 Y2
    H23 GND_053 GND_109 Y23
    H25 GND_054 GND_110 Y26
    H5 GND_055 GND_111 Y5
    GND_056 GND_112
    DA-07314-V04
    AA7
    GND AB7
    GND

    GM108-ES-S-A1_FCBGA595
    @

    3 3

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    N16X POWER & GND 5/9
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON CS, INC. B5V1L Braswell-M/B LA-D921P
    Date Wednesday May 11 2016 Sheet 19 of 52
    A B C D E
    A B C D E

    VRAM DDR3 chips 16,21,22,23 DQSA[7..0]


    DQSA[7..0]

    DQSA#[7..0]
    16,21,22,23 DQSA#[7..0]
    DQMA[7..0]
    16,21,22,23 DQMA[7..0]
    MDA[63..0]
    16,21,22,23 MDA[63..0]
    CMDA[30..0]
    16,21,22,23 CMDA[30..0]

    Lower Rank 0 BOT SIDE Rank0 Rank1


    Mode E
    X76 for GMR1 2G Address 0..31 32..63 0..31 32..63
    1 1

    CMD0 ODT ODT


    ZZZ
    X7601@ U2004 X76@ U2005 X76@ CMD1 CS1*
    +MEM_VREFCA0 M8 E3 MDA9 +MEM_VREFCA0 M8 E3 MDA25
    +MEM_VREFDQ0 VREFCA DQL0 +MEM_VREFDQ0 H1 VREFCA DQL0 CMD2 CS0*
    VGMR2G HYN 256M16 B5V1L H1 F7 MDA12 F7 MDA30
    X76683BO001 VREFDQ DQL1 F2 MDA8 VREFDQ DQL1 F2 MDA24
    DQL2 DQL2 CMD3 CKE CKE
    CMDA7 N3 F8 MDA13 CMDA7 N3 F8 MDA28
    CMDA10 P7 A0 DQL3 H3 MDA11 Group1 B5V1L SWAP CMDA10 P7 A0 DQL3 H3 MDA27 Group3
    A1 DQL4 A1 DQL4 CMD4 A9 A9 A11 A11
    ZZZ CMDA24 P3 H8 MDA14 CMDA24 P3 H8 MDA31
    X7602@ CMDA6 N2 A2 DQL5 G2 MDA10 CMDA6 N2 A2 DQL5 G2 MDA26
    A3 DQL6 A3 DQL6 CMD5 A6 A6 A7 A7
    CMDA22 P8 H7 MDA15 CMDA22 P8 H7 MDA29
    CMDA26 P2 A4 DQL7 CMDA26 P2 A4 DQL7
    A5 A5 CMD6 A3 A3 BA1 BA1
    VGMR2G SAM 256M16 B5V1L CMDA5 R8 CMDA5 R8
    X76683BO002 CMDA21 R2 A6 D7 MDA18 CMDA21 R2 A6 D7 MDA6
    A7 DQU0 A7 DQU0 CMD7 A0 A0 A12 A12
    CMDA8 T8 C3 MDA22 CMDA8 T8 C3 MDA1
    CMDA4 R3 A8 DQU1 C8 MDA16 CMDA4 R3 A8 DQU1 C8 MDA4
    A9 DQU2 A9 DQU2 CMD8 A8 A8 A8 A8
    CMDA25 L7 C2 MDA23 CMDA25 L7 C2 MDA2
    CMDA23 R7 A10/AP DQU3 A7 MDA 9 Group2 B5V1L SWAP CMDA23 R7 A10/AP DQU3 A7 MDA5 Group0
    X76 for GMR1 4G A 1 DQU4 A11 DQU4 CMD9 A12 A12 A0 A0
    CMDA9 N7 A2 MDA20 CMDA9 N7 A2 MDA0
    CMDA12 T3 A12 DQU5 B8 MDA17 CMDA12 T3 A12 DQU5 B8 MDA7
    A13 DQU6 A13 DQU6 CMD10 A1 A1 A2 A2
    CMDA14 T7 A3 MDA21 CMDA14 T7 A3 MDA3
    ZZZ M7 A14 DQU7 M7 A14 DQU7
    A15/BA3 +1.5VSDGPU A15/BA3 +1.5VSDGPU
    CMD11 RAS* RAS* RAS* RAS*
    X7603@
    CMD12 A13 A13 A14 A14
    CMDA29 M2 B2 CMDA29 M2 B2
    VGMR2G HYN 256M16 B5V1L CMDA13 N8 BA0 VDD D9 CMDA13 N8 BA0 VDD D9
    BA1 VDD BA1 VDD CMD13 BA1 BA1 A3 A3
    X76683BO003 CMDA27 M3 G7 CMDA27 M3 G7
    BA2 VDD K2 BA2 VDD K2
    VDD VDD CMD14 A14 A14 A13 A13
    K8 K8
    VDD N1 VDD N1
    VDD VDD CMD15 CAS* CAS* CAS* CAS*
    CLKA0 J7 N9 CLKA0 J7 N9
    2 X76 for GTR 2G CLKA0# K7 CK VDD R1 CLKA0# K7 CK VDD R1 CMD16 ODT ODT 2
    CMDA3 K9 CK VDD R9 CMDA3 K9 CK VDD R9
    CKE/CKE0 VDD +1.5VSDGPU CKE/CKE0 VDD +1.5VSDGPU CMD17 CS1*
    ZZZ
    X7604@ CMDA0 K1 A1 CMDA0 K1 A1 CMD18 CS0*
    CMDA2 L2 ODT/ODT0 VDDQ A8 CMDA2 L2 ODT/ODT0 VDDQ A8
    CMDA11 J3 CS/CS0 VDDQ C1 CMDA11 J3 CS/CS0 VDDQ C1
    RAS VDDQ RAS VDDQ CMD19 CKE CKE
    SGTR2G HYN 256M16 B5V1L CMDA15 K3 C9 CMDA15 K3 C9
    X76683BO004 CMDA28 L3 CAS VDDQ D2 CMDA28 L3 CAS VDDQ D2
    WE VDDQ WE VDDQ CMD20 RST RST RST RST
    310mAVDDQ E9 E9
    F1 VDDQ F1
    X76 for GTR 4G VDDQ 310mAVDDQ CMD21 A7 A7 A6 A6
    DQSA1 F3 H2 DQSA3 F3 H2
    DQSA2 C7 DQSL VDDQ H9 DQSA0 C7 DQSL VDDQ H9
    DQSU VDDQ DQSU VDDQ CMD22 A4 A4 A5 A5
    ZZZ CMD23 A11 A11 A9 A9
    X7605@ DQMA1 E7 A9 DQMA3 E7 A9
    DQMA2 D3 DML VSS B3 DQMA0 D3 DML VSS B3
    DMU VSS DMU VSS CMD24 A2 A2 A1 A1
    E1 E1
    SGTR4G HYN 256M16 B5V1L VSS G8 VSS G8
    VSS VSS CMD25 A10 A10 WE* WE*
    X76683BO005 DQSA#1 G3 J2 DQSA#3 G3 J2
    DQSA#2 B7 DQSL VSS J8 DQSA#0 B7 DQSL VSS J8
    DQSU VSS DQSU VSS CMD26 A5 A5 A4 A4
    M1 M1
    VSS M9 VSS M9
    VSS VSS CMD27 BA2 BA2
    P1 P1
    CMDA20 T2 VSS P9 CMDA20 T2 VSS P9
    RESET VSS RESET VSS CMD28 WE* WE* A10 A10
    T1 T1
    ZQ0 L8 VSS T9 ZQ1 L8 VSS T9
    ZQ/ZQ0 VSS ZQ/ZQ0 VSS CMD29 BA0 BA0 BA0 BA0
    1

    1
    CMD30 BA2 BA2
    J1 B1 J1 B1
    R2081 VGA@ L1 NC/ODT1 VSSQ B9 R2082 VGA@ L1 NC/ODT1 VSSQ B9
    NC/CS1 VSSQ NC/CS1 VSSQ Not Available
    243_0402_1% J9 D1 243_0402_1% J9 D1
    L9 NC/CE1 VSSQ D8 9 NC/CE1 VSSQ D8
    2

    2
    3 NCZQ1 VSSQ E2 NCZQ1 VSSQ E2 3
    VSSQ E8 VSSQ E8
    VSSQ F9 VSSQ F9
    VSSQ G1 VSSQ G1
    VSSQ VSSQ Command Bit Default Pull down
    G9 G9
    VSSQ VSSQ ODTx 10k
    96-BALL 96-BALL
    SDRAM DDR3 SDRAM DDR3 DDR3 CKEx 10k
    H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 RST 10k
    CS* No Termination

    CLKA0
    16,21 CLKA0

    1
    VGA@
    R2087
    162_0402_1% +1.5VSDGPU +1.5VSDGPU
    2

    CLKA0#
    16,21 CLKA0#
    R2085 R2086
    VGA@ VGA@
    1.33K_0402_1% 1.33K_0402_1%

    +MEM_VREFCA0 +MEM VREFDQ0


    +MEM_VREFCA0 21 +MEM_VREFDQ0 21

    1 1
    CMDA0 R2093 1 VGA@ 2 10K_0402_5% R2091 R2092
    CMDA3 R2094 1 VGA@ 2 10K_0402_5% VGA@ C2055 VGA@ C2056
    +1.5VSDGPU CMDA16 R2095 1 VGA@ 2 10K_0402_5% 1.33K_0402_1% .1U_0402_16V7K 1.33K_0402_1% .1U_0402_16V7K
    CMDA19 R2098 1 VGA@ 2 10K_0402_5% 2 2
    VGA@ VGA@
    CMDA20 R2099 1 VGA@ 2 10K_0402_5%
    C2079

    C2080

    C2081

    C2082
    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    .1U_0402_16V7K

    .1U_0402_16V7K

    .1U_0402_16V7K

    .1U_0402_16V7K
    C2071

    C2072

    C2073

    C2074

    C2075

    C2076

    C2077

    C2078

    1 1 1 1 1 1 1 1 1 1 1 1

    VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
    2 2 2 2 2 2 2 2 2 2 2 2

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    N16X Lower Rank0 6/9
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON CS, INC. B5V1L Braswell-M/B LA-D921P
    Date Wednesday May 11 2016 Sheet 20 of 52
    A B C D E
    A B C D E

    VRAM DDR3 chips 16,20,22,23 DQSA[7..0]


    DQSA[7..0]

    DQSA#[7..0]
    16,20,22,23 DQSA#[7..0]
    DQMA[7..0]
    16,20,22,23 DQMA[7..0]
    MDA[63..0]
    16,20,22,23 MDA[63..0]
    CMDA[30..0]
    16,20,22,23 CMDA[30..0]
    Lower Rank 1 TOP SIDE
    1 1

    Rank0 Rank1
    Mode E
    Address 0..31 32..63 0..31 32..63
    U2007 X76@ CMD0 ODT ODT
    U2006 X76@
    +MEM_VREFCA0 M8 E3 MDA30
    +MEM_VREFCA0 M8 +MEM_VREFDQ0 H1 VREFCA DQL0 CMD1 CS1*
    E3 MDA12 F7 MDA25
    20 +MEM_VREFCA0 +MEM_VREFDQ0 H1 VREFCA DQL0 VREFDQ DQL1
    F7 MDA9 F2 MDA28 CMD2 CS0*
    20 +MEM_VREFDQ0 VREFDQ DQL1 DQL2
    F2 MDA13 CMDA9 N3 F8 MDA24
    CMDA9 N3 DQL2 F8 MDA8 CMDA24 P7 A0 DQL3 H3 MDA29 Group3
    A0 DQL3 A1 DQL4 CMD3 CKE CKE
    CMDA24 P7 H3 MDA15 Group1 B5V1L SWAP CMDA10 P3 H8 MDA26
    CMDA10 P3 A1 DQL4 H8 MDA10 CMDA13 N2 A2 DQL5 G2 MDA31
    A2 DQL5 A3 DQL6 CMD4 A9 A9 A11 A11
    CMDA13 N2 G2 MDA14 CMDA26 P8 H7 MDA27
    CMDA26 P8 A3 DQL6 H7 MDA11 CMDA22 P2 A4 DQL7
    A4 DQL7 A5 CMD5 A6 A6 A7 A7
    CMDA22 P2 CMDA21 R8
    CMDA21 R8 A5 CMDA5 R2 A6 D7 MDA1
    A6 A7 DQU0 CMD6 A3 A3 BA1 BA1
    CMDA5 R2 D7 MDA22 CMDA8 T8 C3 MDA6
    CMDA8 T8 A7 DQU0 C3 MDA18 CMDA23 R3 A8 DQU1 C8 MDA2
    A8 DQU1 A9 DQU2 CMD7 A0 A0 A12 A12
    CMDA23 R3 C8 MDA23 CMDA28 L7 C2 MDA4
    CMDA28 L7 A9 DQU2 C2 MDA16 Group2 B5V1L SWAP CMDA4 R7 A10/AP DQU3 A7 MDA3 Group0
    A10/AP DQU3 A11 DQU4 CMD8 A8 A8 A8 A8
    CMDA4 R7 A7 MDA21 CMDA7 N7 A2 MDA7
    CMDA7 N7 A11 DQU4 A2 MDA17 CMDA14 T3 A12 DQU5 B8 MDA0
    A12 DQU5 A13 DQU6 CMD9 A12 A12 A0 A0
    CMDA14 T3 B8 MDA20 CMDA12 T7 A3 MDA5
    CMDA12 T7 A13 DQU6 A3 MDA19 M7 A14 DQU7
    A14 DQU7 A15/BA3 +1.5VSDGPU
    CMD10 A1 A1 A2 A2
    M7
    A15/BA3 + .5VSDGPU CMD11 RAS* RAS* RAS* RAS*
    CMDA29 M2 B2
    CMDA29 M2 B2 CMDA6 N8 BA0 VDD D9
    BA0 VDD BA1 VDD CMD12 A13 A13 A14 A14
    CMDA6 N8 D9 CMDA30 M3 G7
    CMDA30 M3 BA1 VDD G7 BA2 VDD K2
    BA2 VDD VDD CMD13 BA1 BA1 A3 A3
    K2 K8
    2 VDD K8 VDD N1 2
    VDD VDD CMD14 A14 A14 A13 A13
    N1 CLKA0 J7 N9
    CLKA0 J7 VDD N9 CLKA0# K7 CK VDD R1
    16,20 CLKA0 CK VDD CK VDD CMD15 CAS* CAS* CAS* CAS*
    CLKA0# K7 R1 CMDA3 K9 R9
    16,20 CLKA0# CK VDD CKE/CKE0 VDD +1.5VSDGPU
    CMDA3 K9 R9 CMD16 ODT ODT
    CKE/CKE0 VDD +1.5VSDGPU
    CMDA0 K1 A1 CMD17 CS1*
    CMDA0 K1 A1 CMDA1 L2 ODT/ODT0 VDDQ A8
    CMDA1 L2 ODT/ODT0 VDDQ A8 CMDA11 J3 CS/CS0 VDDQ C1
    CS/CS0 VDDQ RAS VDDQ CMD18 CS0*
    CMDA11 J3 C1 CMDA15 K3 C9
    CMDA15 K3 RAS VDDQ C9 CMDA25 L3 CAS VDDQ D2
    CAS VDDQ WE VDDQ CMD19 CKE CKE
    CMDA25 L3 D2 310mAVDDQ E9
    WE VDDQ E9 F1
    310mAVDDQ VDDQ CMD20 RST RST RST RST
    F1 DQSA3 F3 H2
    DQSA1 F3 VDDQ H2 DQSA0 C7 DQSL VDDQ H9
    DQSL VDDQ DQSU VDDQ CMD21 A7 A7 A6 A6
    DQSA2 C7 H9
    DQSU VDDQ
    CMD22 A4 A4 A5 A5
    DQMA3 E7 A9
    DQMA1 E7 A9 DQMA0 D3 DML VSS B3
    DML VSS DMU VSS CMD23 A11 A11 A9 A9
    DQMA2 D3 B3 E1
    DMU VSS E1 VSS G8
    VSS VSS CMD24 A2 A2 A1 A1
    G8 DQSA#3 G3 J2
    DQSA#1 G3 VSS J2 DQSA#0 B7 DQSL VSS J8
    DQSL VSS DQSU VSS CMD25 A10 A10 WE* WE*
    DQSA#2 B7 J8 M1
    DQSU VSS M1 VSS M9
    VSS VSS CMD26 A5 A5 A4 A4
    M9 P1
    VSS P1 CMDA20 T2 VSS P9
    VSS RESET VSS CMD27 BA2 BA2
    CMDA20 T2 P9 T1
    RESET VSS T1 ZQ3 L8 VSS T9
    VSS ZQ/ZQ0 VSS CMD28 WE* WE* A10 A10
    ZQ2 L8 T9

    1
    ZQ/ZQ0 VSS DR@ CMD29 BA0 BA0 BA0 BA0
    1

    R2101 J1 B1
    DR@ J1 B1 243_0402_1% L1 NC/ODT1 VSSQ B9
    NC/ODT1 VSSQ NC/CS1 VSSQ CMD30 BA2 BA2
    3 R2100 L1 B9 J9 D 3
    243_0402_1% J9 NC/CS1 VSSQ D1 L9 NC/CE1 VSSQ D8 Not Available

    2
    L9 NC/CE1 VSSQ D8 NCZQ1 VSSQ E2
    2

    NCZQ1 VSSQ E2 VSSQ E8


    VSSQ E8 VSSQ F9
    VSSQ F9 VSSQ G1
    VSSQ G1 VSSQ G9
    VSSQ G9 VSSQ
    VSSQ Command Bit Default Pull down
    96-BALL
    96-BALL SDRAM DDR3 ODTx 10k
    SDRAM DDR3 H5TQ2G63BFR-11C_FBGA96
    H5TQ2G63BFR-11C_FBGA96 DDR3 CKEx 10k
    RST 10k
    CS* No Termination

    +1.5VSDGPU
    C2067

    C2068

    C2069

    C2070
    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    .1U_0402_16V7K

    .1U_0402_16V7K

    .1U_0402_16V7K

    .1U_0402_16V7K
    C2059

    C2060

    C2061

    C2062

    C2063

    C2064

    C2065

    C2066

    1 1 1 1 1 1 1 1 1 1 1 1

    2 2 2 2 2 2 2 2 2 2 2 2

    DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    N16X Lower Rank1 7/9
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON CS, INC. B5V1L Braswell-M/B LA-D921P
    Date Wednesday May 11 2016 Sheet 21 of 52
    A B C D E
    A B C D E

    VRAM DDR3 chips 16,20,21,23 DQSA[7..0]


    DQSA[7..0]

    DQSA#[7..0]
    16,20,21,23 DQSA#[7..0]
    DQMA[7..0]
    16,20,21,23 DQMA[7..0]

    16,20,21,23 MDA[63..0]
    MDA[63..0]

    CMDA[30..0]
    Upper Rank 0 BOT SIDE
    16,20,21,23 CMDA[30..0]

    1 Rank0 Rank1 1
    Mode E
    Address 0..31 32..63 0..31 32..63
    U2008 X76@ U2009 X76@

    +MEM_VREFCA1 M8 +MEM_VREFCA1
    CMD0 ODT ODT
    E3 MDA33 M8 E3 MDA45
    MEM_VREFDQ H1 VREFCA DQL0 F7 MDA39 +MEM_VREFDQ1 H1 VREFCA DQL0 F7 MDA44
    VREFDQ DQL1 VREFDQ DQL1 CMD1 CS1*
    F2 MDA32 F2 MDA47
    CMDA7 N3 DQL2 F8 MDA36 CMDA7 N3 DQL2 F8 MDA40
    A0 DQL3 A0 DQL3 CMD2 CS0*
    CMDA 0 P7 H3 MDA35 Group4 CMDA10 P7 H3 MDA46 Group5 B5V1L SWAP
    CMDA24 P3 A1 DQL4 H8 MDA37 CMDA24 P3 A1 DQL4 H8 MDA42
    A2 DQL5 A2 DQL5 CMD3 CKE CKE
    CMDA6 N2 G2 MDA34 CMDA6 N2 G2 MDA41
    CMDA22 P8 A3 DQL6 H7 MDA38 CMDA22 P8 A3 DQL6 H7 MDA43
    A4 DQL7 A4 DQL7 CMD4 A9 A9 A11 A11
    CMDA26 P2 CMDA26 P2
    CMDA5 R8 A5 CMDA5 R8 A5
    A6 A6 CMD5 A6 A6 A7 A7
    CMDA21 R2 D7 MDA56 CMDA21 R2 D7 MDA52
    CMDA8 T8 A7 DQU0 C3 MDA59 CMDA8 T8 A7 DQU0 C3 MDA49
    A8 DQU A8 DQU1 CMD6 A3 A3 BA1 BA1
    CMDA4 R3 C8 MDA58 CMDA4 R3 C8 MDA54
    CMDA25 L7 A9 DQU2 C2 MDA62 CMDA25 L7 A9 DQU2 C2 MDA51
    A10/AP DQU3 A10/AP DQU3 CMD7 A0 A0 A12 A12
    CMDA23 R7 A7 MDA57 Group7 CMDA23 R7 A7 MDA53 Group6 B5V1L SWAP
    CMDA9 N7 A11 DQU4 A2 MDA61 CMDA9 N7 A11 DQU4 A2 MDA50
    A12 DQU5 A12 DQU5 CMD8 A8 A8 A8 A8
    CMDA12 T3 B8 MDA60 CMDA12 T3 B8 MDA55
    CMDA14 T7 A13 DQU6 A3 MDA63 CMDA14 T7 A13 DQU6 A3 MDA48
    A14 DQU7 A14 DQU7 CMD9 A12 A12 A0 A0
    M7 M7
    A15/BA3 +1.5VSDGPU A15/BA3 +1.5VSDGPU CMD10 A1 A1 A2 A2
    CMDA29 M2 B2 CMDA29 M2 B2 CMD11 RAS* RAS* RAS* RAS*
    CMDA13 N8 BA0 VDD D9 CMDA13 N8 BA0 VDD D9
    CMDA27 M3 BA1 VDD G7 CMDA27 M3 BA1 VDD G7
    BA2 VDD BA2 VDD CMD12 A13 A13 A14 A14
    K2 K2
    VDD K8 VDD K8
    VDD VDD CMD13 BA1 BA1 A3 A3
    N1 N1
    CLKA1 J7 VDD N9 CLKA1 J7 VDD N9
    CK VDD CK VDD CMD14 A14 A14 A13 A13
    CLKA1# K7 R1 CLKA1# K7 R1
    2 CMDA19 K9 CK VDD R9 CMDA19 K9 CK VDD R9 2
    CKE/CKE0 VDD +1.5VSDGPU CKE/CKE0 VDD +1.5VSDGPU
    CMD15 CAS* CAS* CAS* CAS*
    CMD16 ODT ODT
    CMDA16 K1 A1 CMDA16 K1 A1
    CMDA18 L2 ODT/ODT0 VDDQ A8 CMDA18 L2 ODT/ODT0 VDDQ A8
    CS/CS0 VDDQ CS/CS0 VDDQ CMD17 CS1*
    CMDA11 J3 C1 CMDA11 J3 C1
    CMDA15 K3 RAS VDDQ C9 CMDA15 K3 RAS VDDQ C9
    CAS VDDQ CAS VDDQ CMD18 CS0*
    CMDA28 L3 D2 CMDA28 L3 D2
    WE VDDQ E9 WE VDDQ E9
    VDDQ 310mAVDDQ CMD19 CKE CKE
    310mAVDDQ F1 F1
    DQSA4 F3 H2 DQSA5 F3 VDDQ H2
    DQSL VDDQ DQSL VDDQ CMD20 RST RST RST RST
    DQSA7 C7 H9 DQSA6 C7 H9
    DQSU VDDQ DQSU VDDQ
    CMD21 A7 A7 A6 A6
    DQMA4 E7 A9 DQMA5 E7 A9 CMD22 A4 A4 A5 A5
    DQMA7 D3 DML VSS B3 DQMA6 D3 DML VSS B3
    DMU VSS E1 DMU VSS E1
    VSS VSS CMD23 A11 A11 A9 A9
    G8 G8
    DQSA#4 G3 VSS J2 DQSA#5 G3 VSS J2
    DQSL VSS DQSL VSS CMD24 A2 A2 A1 A1
    DQSA#7 B7 J8 DQSA#6 B7 J8
    DQSU VSS M1 DQSU VSS M1
    VSS VSS CMD25 A10 A10 WE* WE*
    M9 M9
    VSS P1 VSS P1
    VSS VSS CMD26 A5 A5 A4 A4
    CMDA20 T2 P9 CMDA20 T2 P9
    RESET VSS T1 RESE VSS T1
    VSS VSS CMD27 BA2 BA2
    ZQ5 L8 T9 ZQ4 L8 T9
    ZQ/ZQ0 VSS ZQ/ZQ0 VSS
    CMD28 WE* WE* A10 A10
    1

    1
    J1 B1 J1 B1 CMD29 BA0 BA0 BA0 BA0
    R2083 VGA@ L1 NC/ODT1 VSSQ B9 R2084 VGA@ L1 NC/ODT1 VSSQ B9
    243_0402_1% J9 NC/CS1 VSSQ D1 243_0402_1% J9 NC/CS1 VSSQ D1
    NC/CE1 VSSQ NC/CE1 VSSQ CMD30 BA2 BA2
    L9 D8 L9 D8
    2

    2
    NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
    VSSQ VSSQ Not Available
    3 E8 E8 3
    VSSQ F9 VSSQ F9
    VSSQ G1 VSSQ G1
    VSSQ G9 VSSQ G9
    VSSQ VSSQ
    96-BALL 96-BALL Command Bit Default Pull down
    SDRAM DDR3 SDRAM DDR3
    H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 ODTx 10k

    DDR3 CKEx 10k


    RST 10k
    CS* No Termination

    +1.5VSDGPU +1.5VSDGPU

    +1.5VSDGPU
    R2088 R2089
    VGA@ VGA@
    1.33K_0402_1% 1.33K_0402_1%
    C2102

    C2101

    C2099

    C2105
    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    .1U_0402_16V7K

    .1U_0402_16V7K

    .1U_0402_16V7K

    .1U_0402_16V7K
    C2098

    C2104

    C2094

    C2103

    C2095

    C2097

    C2100

    C2096

    1 1 1 1 1 1 1 1 1 1 1 1 CLKA1
    +MEM_VREFCA1 +MEM_VREFDQ1 16,23 CLKA1
    +MEM_VREFCA1 23 +MEM_VREFDQ1 23

    1
    VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ 1 1 VGA@
    2 2 2 2 2 2 2 2 2 2 2 2 R2096 R2097 R2103
    VGA@ C2057 VGA@ C2058 162_0402_1%
    1.33K_0402_1% .1U_0402_16V7K 1.33K_0402_1% .1U_0402_16V7K

    2
    2 2 CLKA1#
    VGA@ VGA@ 16,23 CLKA1#

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    N16X Upper Rank0 8/9
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON CS, INC. B5V1L Braswell-M/B LA-D921P
    Date Wednesday May 11 2016 Sheet 22 of 52
    A B C D E
    A B C D E

    VRAM DDR3 chips 16,20,21,22 DQSA[7..0]


    DQSA[7..0]

    DQSA#[7..0]
    16,20,21,22 DQSA#[7..0]
    DQMA[7..0]
    16,20,21,22 DQMA[7..0]
    MDA[63..0]
    16,20,21,22 MDA[63..0]
    CMDA[30..0]
    16,20,21,22 CMDA[30..0]

    Upper Rank 1 TOP SIDE


    1 1

    Rank0 Rank1
    Mode E
    Address 0..31 32..63 0..31 32..63
    CMD0 ODT ODT
    U2010 X76@ U2011 X76@
    +MEM_VREFCA1 M8 +MEM_VREFCA1 M8
    CMD1 CS1*
    E3 MDA39 E3 MDA44
    22 +MEM_VREFCA1 +MEM_VREFDQ1 H1 VREFCA DQL0 +MEM_VREFDQ1 H1 VREFCA DQL0
    F7 MDA33 F7 MDA45 CMD2 CS0*
    22 +MEM_VREFDQ1 VREFDQ DQL1 VREFDQ DQL1
    F2 MDA36 F2 MDA40
    CMDA9 N3 DQL2 F8 MDA32 CMDA9 N3 DQL2 F8 MDA47
    A0 DQL3 A0 DQL3 CMD3 CKE CKE
    CMDA24 P7 H3 MDA38 Group4 CMDA24 P7 H3 MDA43 Group5 B5V1L SWAP
    CMDA10 P3 A1 DQL4 H8 MDA34 CMDA10 P3 A1 DQL4 H8 MDA41
    A2 DQL5 A2 DQL5 CMD4 A9 A9 A11 A11
    CMDA13 N2 G2 MDA37 CMDA13 N2 G2 MDA42
    CMDA26 P8 A3 DQL6 H7 MDA35 CMDA26 P8 A3 DQL6 H7 MDA46
    A4 DQL7 A4 DQL7 CMD5 A6 A6 A7 A7
    CMDA22 P2 CMDA22 P2
    CMDA21 R8 A5 CMDA21 R8 A5
    A6 A6 CMD6 A3 A3 BA1 BA1
    CMDA5 R2 D7 MDA59 CMDA5 R2 D7 MDA49
    CMDA8 T8 A7 DQU0 C3 MDA56 CMDA8 T8 A7 DQU0 C3 MDA52
    A8 DQU1 A8 DQU1 CMD7 A0 A0 A12 A12
    CMDA23 R3 C8 MDA62 CMDA23 R3 C8 MDA51
    CMDA28 L7 A9 DQU2 C2 MDA58 CMDA28 L7 A9 DQU2 C2 MDA54
    A10/AP DQU3 A10/AP DQU3 CMD8 A8 A8 A8 A8
    CMDA4 R7 A7 MDA63 Group7 CMDA4 R7 A7 MDA48 Group6 B5V1L SWAP
    CMDA7 N7 A11 DQU4 A2 MDA60 CMDA7 N7 A11 DQU4 A2 MDA55
    A12 DQU5 A12 DQU5 CMD9 A12 A12 A0 A0
    CMDA14 T3 B8 MDA61 CMDA14 T3 B8 MDA50
    CMDA12 T7 A13 DQU6 A3 MDA57 CMDA12 T7 A13 DQU6 A3 MDA53
    A14 DQU7 A14 DQU7 CMD10 A1 A1 A2 A2
    M7 M7
    A15/BA3 + .5VSDGPU A15/BA3 +1.5VSDGPU CMD11 RAS* RAS* RAS* RAS*
    CMDA29 M2 B2 CMDA29 M2 B2 CMD12 A13 A13 A14 A14
    CMDA6 N8 BA0 VDD D9 CMDA6 N8 BA0 VDD D9
    CMDA30 M3 BA1 VDD G7 CMDA30 M3 BA1 VDD G7
    BA2 VDD BA2 VDD CMD13 BA1 BA1 A3 A3
    K2 K2
    2 VDD K8 VDD K8 2
    VDD VDD CMD14 A14 A14 A13 A13
    N1 N1
    CLKA1 J7 VDD N9 CLKA1 J7 VDD N9
    16,22 CLKA1 CK VDD CK VDD CMD15 CAS* CAS* CAS* CAS*
    CLKA1# K7 R1 CLKA1# K7 R1
    16,22 CLKA1# CK VDD CK VDD
    CMDA19 K9 R9 CMDA19 K9 R9 CMD16 ODT ODT
    CKE/CKE0 VDD +1.5VSDGPU CKE/CKE0 VDD +1.5VSDGPU
    CMD17 CS1*
    CMDA16 K1 A1 CMDA16 K1 A1
    CMDA17 L2 ODT/ODT0 VDDQ A8 CMDA17 L2 ODT/ODT0 VDDQ A8
    CS/CS0 VDDQ CS/CS0 VDDQ CMD18 CS0*
    CMDA11 J3 C1 CMDA11 J3 C1
    CMDA15 K3 RAS VDDQ C9 CMDA15 K3 RAS VDDQ C9
    CAS VDDQ CAS VDDQ CMD19 CKE CKE
    CMDA25 L3 D2 CMDA25 L3 D2
    WE VDDQ E9 WE VDDQ E9
    310mAVDDQ 310mAVDDQ CMD20 RST RST RST RST
    F1 F1
    DQSA4 F3 VDDQ H2 DQSA5 F3 VDDQ H2
    DQSL VDDQ DQSL VDDQ CMD21 A7 A7 A6 A6
    DQSA7 C7 H9 DQSA6 C7 H9
    DQSU VDDQ DQSU VDDQ
    CMD22 A4 A4 A5 A5
    DQMA4 E7 A9 DQMA5 E7 A9 CMD23 A11 A11 A9 A9
    DQMA7 D3 DML VSS B3 DQMA6 D3 DML VSS B3
    DMU VSS E1 DMU VSS E1
    VSS VSS CMD24 A2 A2 A1 A1
    G8 G8
    DQSA#4 G3 VSS J2 DQSA#5 G3 VSS J2
    DQSL VSS DQSL VSS CMD25 A10 A10 WE* WE*
    DQSA#7 B7 J8 DQSA#6 B J8
    DQSU VSS M1 DQSU VSS M1
    VSS VSS CMD26 A5 A5 A4 A4
    M9 M9
    VSS P1 VSS P1
    VSS VSS CMD27 BA2 BA2
    CMDA20 T2 P9 CMDA20 T2 P9
    RESET VSS T1 RESET VSS T1
    VSS VSS CMD28 WE* WE* A10 A10
    ZQ6 L8 T9 ZQ7 L8 T9
    ZQ/ZQ0 VSS ZQ/ZQ0 VSS
    CMD29 BA0 BA0 BA0 BA0
    1

    1
    J1 B1 J1 B1 CMD30 BA2 BA2
    3 R2090 L1 NC/ODT1 VSSQ B9 R2102 L1 NC/ODT1 VSSQ B9 3
    243_0402_1% J9 NC/CS1 VSSQ D1 243_0402_1% J9 NC/CS1 VSSQ D1
    NC/CE1 VSSQ NC/CE1 VSSQ Not Available
    DR@ L9 D8 DR@ L9 D8
    2

    2
    NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
    VSSQ E8 VSSQ E8
    VSSQ F9 VSSQ F9
    VSSQ G1 VSSQ G1
    VSSQ G9 VSSQ G9
    VSSQ VSSQ Command Bit Default Pull down
    96-BALL 96-BALL ODTx 10k
    SDRAM DDR3 SDRAM DDR3
    H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 DDR3 CKEx 10k
    RST 10k
    CS* No Termination

    +1.5VSDGPU

    C2146

    C2109

    C2108

    C2106
    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    1U_0402_6.3V6K

    .1U_0402_16V7K

    .1U_0402_16V7K

    .1U_0402_16V7K

    .1U_0402_16V7K
    C2110

    C2151

    C2147

    C2150

    C2148

    C2149

    C2107

    C2152

    1 1 1 1 1 1 1 1 1 1 1 1

    2 2 2 2 2 2 2 2 2 2 2 2

    DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@ DR@

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    N16X Upper Rank1 9/9
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON CS, INC. B5V1L Braswell-M/B LA-D921P
    Date Wednesday May 11 2016 Sheet 23 of 52
    A B C D E
    A B C D E

    1 1

    LCD POWER CIRCUIT


    +3VS +LCDVDD +19VB +INVPWR_B+ Place closed to JEDP1
    UX1 W=60mils +LCDVDD
    1U_0402_6.3V6K
    CX1

    5 1 W=60mils W=60mils
    IN OUT LX1 +3VS
    1
    2 1 1 HCB2012KF-221T30_0805
    GND 1 2
    4 3 CX4 EMC@ 1 1
    2 EN OC

    1000P_0402_50V7K
    CX5 @EMC@
    .1U_0402_16V7K SM01000EJ00 3000ma 1 1
    SY6288C20AAC_SOT23-5 CX3 2 2 CX2 CX6 CX7
    @ 220ohm@100mhz
    4.7U_0603_6.3V6K DCR 0.04 68P_0402_50V8J .1U_0402_16V7K .1U_0402_16V7K
    @EMC@ 2 2
    7 ENVDD 2 2 @

    W=60mils JEDP1
    CX8 1 2 .1U_0402_16V7K EDP_TXP0_C 1
    7 EDP_TXP0 EDP_TXN0_C +INVPWR_B+ 1
    CX9 1 2 .1U_0402_16V7K 2 41
    7 EDP_TXN0 1 2 EDP_TXP1_C 3 2 G1 42
    CX10 .1U_0402_16V7K
    7 EDP_TXP1 1 2 EDP_TXN1_C 4 3 G2 43
    CX11 .1U_0402_16V7K
    7 EDP_TXN1 INVT_PWM_SOC 1 2 100K_0402_5% 5 4 G3 44
    RX1 @
    2 7 INVT_PWM_SOC INVT_PWM_SOC 6 5 G4 45 2
    EMC@ EC_BKOFF# 7 6 G5 46
    CX14 1 2 .1U_0402_16V7K EDP_AUXP_C CX12 1 2 220P_0402_50V7K EDP_HPD_CONN 8 7 G6
    7 EDP_AUXP EDP_AUXN_C 29 EDP_HPD_CONN 8
    7 EDP_AUXN CX15 1 2 .1U_0402_16V7K EMC@ +LCDVDD
    9
    EC_BKOFF# CX13 1 2 220P_0402_50V7K 10 9
    33 EC_BKOFF# 11 10
    RX2 1 @ 2 10K_0402_5% 12 11
    EDP_AUXN_C 13 12
    +3VS EDP_AUXP_C 14 13
    15 14
    100K_0402_5% 1 @ 2 RX3 EDP_AUXN_C EDP_TXP0_C 16 15
    100K_0402_5% 1 @ 2 RX4 EDP_AUXP_C EDP_TXN0_C 17 16
    18 17
    EDP_TXP1_C 19 18
    EDP_TXN1_C 20 19
    21 20
    22 21
    23 22
    24 23
    25 24
    26 25
    Touch Screen +TS_PWR
    27 26
    27
    28
    +3VS +TS_PWR TS_EN 29 28
    33 TS_EN USB20_P3 30 29
    1 2 0_0603_5% 10 USB20_P3 USB20_N3 31 30
    RX7 @
    10 USB20_N3 I2C2_SCL_PNL 32 31
    Touch Screen 9 I2C2_SCL_PNL I2C2_SDA_PNL 32
    33
    +5VS 9 I2C2_SDA_PNL TS_RST# 34 33
    33 TS_RST# TS_INT# 35 34
    1 2 0_0603_5% 29 TS_INT# 36 35
    RX8 @
    37 36
    3 +3VS USB20_P2_CAMERA 37 3
    38
    USB20_N2_CAMERA 39 38
    For Camera 39
    40
    40
    STARC_107K40-000001-G2
    CONN@
    Camera SP01000XE00
    USB20_N2 RX10 1 @ 2 0_0402_5% USB20_N2_CAMERA
    10 USB20_N2

    USB20_P2 RX11 1 @ 2 0_0402_5% USB20_P2_CAMERA


    10 USB20_P2

    follwo B5W1A they confirmed with EMC team no need to reserve choke

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title
    eDP CONN.

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 24 of 52
    A B C D E
    5 3 2 1

    +5VS W=40mils +HDMI_5V_OUT Active Level Shift


    +3VS_ALS
    UY1 ALS_CLK- HDMI_R_CK-
    RY2 1 @ 2 0_0402_5%

    .1U_0402_16V7K
    +1.5VS
    ALS_CLK+ HDMI_R_CK+

    ALS@

    0.01U_0402_16V7K

    ALS@ CY7
    3 RY3 1 @ 2 0_0402_5%
    OUT
    1 1 1

    CY6
    1 W=20mils
    IN CY1
    2 .1U_0402_16V7K ALS_TX0- RY4 1 @ 2 0_0402_5% HDMI_R_D0-
    GND 2 2 2
    ALS_TX0+ HDMI_R_D0+

    .1U_0402_16V7K
    ALS@ CY3

    .1U_0402_16V7K
    ALS@ CY2

    0.01U_0402_16V7K
    ALS@ CY4

    0.01U_0402_16V7K
    ALS@ CY5
    RY5 1 @ 2 0_0402_5%
    AP2330W-7_SC59-3 1 1 1 1
    D D
    UY2
    ALS_TX1- RY6 1 @ 2 0_0402_5% HDMI_R_D1-
    2 2 2 2 19 11
    20 VDD15_1 VDD33 +3VS_ALS ALS_TX1+ RY7 1 @ 2 0_0402_5% HDMI_R_D1+
    31 VDD15_2 30 ALS_TX2+
    40 VDD15_3 OUT_D2+ 29 ALS_TX2-
    VDD15_4 OUT_D2-
    27 ALS_TX1+
    1 .1U_0402_16V7K HDMI_C1_TX2+ OUT_D1+ ALS_TX1- ALS_TX2- HDMI_R_D2-

    RY37 2.2K_0402_5%

    RY36 2.2K_0402_5%
    7 HDMI_TX2+ CY9 ALS@ 2 1 26 RY8 1 @ 2 0_0402_5%
    CY8 ALS@ 2 1 .1U_0402_16V7K HDMI_C1_TX2- 2 IN_D2+ OUT_D1-
    7 HDMI_TX2- IN_D2-

    1
    +3VS +3VS_ALS 25 ALS_TX0+ ALS_TX2+ RY9 1 @ 2 0_0402_5% HDMI_R_D2+
    1 .1U_0402_16V7K HDMI_C1_TX1+ OUT_D0+ ALS_TX0-

    ALS@

    ALS@
    7 HDMI_TX1+ CY11 ALS@ 2 4 24
    RY33 1 @ 2 0_0603_5% CY10 ALS@ 2 1 .1U_0402_16V7K HDMI_C1_TX1- 5 IN_D1+ OUT_D0-
    7 HDMI_TX1- IN_D1- ALS_CLK+
    22
    CY13 ALS@ 2 1 .1U_0402_16V7K HDMI_C1_TX0+ 6 OUT_CLK+ 21 ALS_CLK
    7 HDMI TX0+

    2
    CY12 ALS@ 2 1 .1U_0402_16V7K HDMI_C1_TX0- 7 IN_D0+ OUT_CLK-
    7 HDMI_TX0- IN_D0- HDMI_DDCDATA_ALS
    39
    CY15 ALS@ 2 1 .1U_0402_16V7K HDMI_C1_CLK+ 9 SDA_SRC 38 HDMI_DDCCLK_ALS
    7 HDMI_CLK+ IN_CLK+ SCL_SRC
    7 HDMI_CLK- CY14 ALS@ 2 1 .1U_0402_16V7K HDMI_C _CLK 10 33 HDMI_SDATA
    +3VS_ALS IN_CLK- SDA_SNK 32 HDMI_SCLK
    HDMI_BUF 14 SCL_SNK
    HDMI_DCIN_EN 13 DDCBUF/SDA_CTL
    HDMI_EQ 17 DCIN_EN/SCL_CTL 3 HDMI_HPD_SOC
    RY17 1 @ 2 4.7K_0402_5% HDMI_DCIN_EN 8 EQ/I2C_ADDR HPD_SRC
    RY16 1 @ 2 4.7K_0402_5% HDMI_CFG I2C_CTL_EN
    HDMI_HPD 28 12
    HPD_SNK NC_1 +1.5VS
    HPD_SNK with Internal PD 150K 15
    18 NC_2 34 HDMI_ISET
    @T2 5 36 REXT NC_3 37
    PD# NC_4 +3VS_ALS

    1
    +HDMI_5V_OUT HDMI_CFG 23
    RPY3 HDMI_PRE CFG

    0.01U_0402_16V7K

    0.01U_0402_16V7K
    RY32 16
    HDMI_SCLK 5 4 +1.8VALW 4.99K_0402_1% PRE
    HDMI_SDATA 1 1

    ALS@

    CY24

    ALS@

    CY25
    6 3 ALS@ 35
    HDMI_DDCCLK_SOC 7 2 GND 41

    2
    C HDMI_DDCDATA_SOC 8 1 EPAD C
    PS8407AGTR2-A1 _TQFN40_5X5 2 2
    2.2K_0804_8P4R_5% ALS@
    PS8407A --- SA000077R30
    close pin12,37

    +1.8VALW
    1

    RY10
    10K_0402_5% RY14 1 @ 2 20K_0402_5%

    Intel Sugesstion HDMI connector


    2

    7 HDMI_HPD_SOC# JHDMI1
    HDMI_HPD 19
    HP_DET
    1

    D 18
    HDMI_HPD_SOC +HDMI_5V_OUT +5V
    QY1 2 17
    L2N7002LT1G_SOT23-3 G HDMI_SDATA 16 DDC/CEC_GND
    SDA
    1

    S HDMI_SCLK 15
    3

    RY1 14 SCL
    Ut lity

    2
    100K_0402_5% 13
    DY1 HDMI_R_CK- 12 CEC
    11 CK-
    2

    @EMC@ HDMI_R_CK+ 10 CK_shield


    HDMI_R_D0- 9 CK+
    YSLC05CH_SOT23-3 8 D0-
    HDMI_R_D0+ 7 D0_shield
    HDMI_R_D1- 6 D0+
    5 D1-

    1
    HDMI_R_D1+ 4 D1_shield 20
    B B
    HDMI_R_D2- 3 D1+ GND 21
    2 D2- GND 22
    Reserved for ESD HDMI_R_D2+ 1 D2_shield GND 23
    D2+ GND
    YUQIU_H050FD019M190BA
    CONN@
    DC232004800

    +3VS_ALS +3VS_ALS +3VS_ALS +3VS_ALS


    1

    1
    DDC Level Shif t er @ RY19 @ RY11 @ RY13 @ RY20
    4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
    (Other BOM)
    2

    2
    HDMI_BUF HDMI_PRE HDMI_EQ HDMI_ISET
    1

    1
    2 RY34 1 +3VS_ALS
    ALS@ 200K_0402_5%
    +1.8VALW @ RY15 @ RY21 @ RY12 @ RY18
    4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
    8

    UY3
    2

    2
    EN

    2 7
    VREF1 VREF2
    HDMI_DDCCLK_SOC 3 6 HDMI_DDCCLK_ALS Enable active DDC buffer;
    A 7 HDMI_DDCCLK_SOC SCL1 SCL2 A
    Internal pull down at ~150KΩ , 3.3V I/O Output pre-emphasis setting; Receiver equalization setting;
    HDMI_DDCDATA_SOC 4 5 HDMI_DDCDATA_ALS Internal pull down at ~150kΩ , Internal pull down at ~150kΩ , 3.3V I/O.
    7 HDMI_DDCDATA_SOC SDA1 SDA2 L: default, passive DDC pass-through
    H: active DDC buffer with internal pull 3.3V I/O. L: programmable EQ for channel loss up to 5.3dB
    GND

    up2.36K resistor L: no pre-emphasis H: programmable EQ for channel loss up to 10dB


    M: active DDC buffer without internal pull H: 1.6dB pre-emphasis M: programmable EQ for channel loss up to 14dB
    G3401A91G ADFN3X2 8P M: 3.0dB pre-emphasis
    up resistor
    1

    SA00006YA00

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    HDMI CONN.
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L Braswell-M/B LA-D921P
    Date Wednesday May 11 2016 Sheet 25 of 52
    5 3 2 1
    5 3 2 1

    +3VALW +3V_LAN

    RL1 @
    0_0805_5%
    1 2

    60mil 60mil
    UL1 @
    5 1
    IN OUT
    2
    ( Should be place within 200 mils ) 0.1uF close to Pin 3,8,22,30
    D GND Close to U20 Pin23 Close to Pin 24 @ RL13 1uF reserved for Pin 22 0.1uF close to Pin 11,32 D
    4 3 0_0805_5%
    EN OC 1 2
    2 W=60mils
    SY6288C20AAC_SOT23-5 +3V_LAN
    CL1 W=60mils W=60mils +LAN_VDD +3V_LAN
    1U_0402_6.3V6K LAN_PWR_EN LL1
    1 LAN_PWR_EN 33
    +REGOUT 1 2
    2.2UH +-5% NLC252018T-2R2J-N

    0.1U_0402_16V7K

    4.7U_0603_6.3V6K

    0.1U_0402_16V7K

    CL6

    1U_0402_6.3V6K

    CL7

    0.1U_0402_16V7K

    CL8

    0.1U_0402_16V7K

    CL9

    0.1U_0402_16V7K

    CL10

    0.1U_0402_16V7K

    CL11
    4.7U_0603_6.3V6K

    CL12
    4.7U_0603_6.3V6K

    CL13
    0.1U_0402_16V7K

    CL14
    0.1U_0402_16V7K
    2 IDC=1200mA

    CL21 8111H@

    CL4 8111GUS@

    CL5 8111GUS@
    1 8111GUS@ 1 1 1 1 1 1

    1
    CL2 8111GUS@ CL3 8111GUS@
    4.7U_0603_6.3V6K 0.1U_0402_16V7K

    2
    1 @ @ @

    2
    2 2 2 2 2 2 2
    +3V_LAN Rising t i me r equest: 0. 5~100 mS

    SA000028Y10
    High act i ve.
    EN threshold voltage :1.2~2.0V
    Current limit threshold :1.5~2.8A
    Output turn-on rising t i me: 1. 3~2. 7 ms

    UL2

    C C
    close to Pin 17, 18
    LAN_MIDI0+ 1 17 PCIE_HRX_C_DTX_P3 .1U_0402_16V7K 2 1 CL15
    LAN_MIDI0- 2 MDIP0 HSOP 18 PCIE_HRX_C_DTX_N3 .1U_0402_16V7K 2 1 CL16 PCIE_HRX_DTX_P3 8 +3V_LAN SJ10000E800
    +LAN_VDD 3 MDIN0 HSON 19 PLT_RST_BUF# PCIE_HRX_DTX_N3 8
    YL1
    LAN_MIDI1+ 4 AVDD10 PERSTB 20 ISOLATEB PLT_RST_BUF# 10,15,27,33,34 25MHZ_10PF_7V25000014
    LAN_MIDI1- 5 MDIP1 ISOLATEB 21 LAN_PME# RL2 2 @ 1 0_0402_5%
    MDIN1 LANWAKEB

    1
    LAN_MIDI2+ 6 22 LAN_VDD EC_PME# 33 XTLI 1 3 XTLO
    LAN_MIDI2- 7 MDIP2 DVDD10 23 +3V_LAN RL12 1 3
    +LAN_VDD 8 MDIN2 VDDREG 24 +REGOUT 10K_0402_5% GND GND
    LAN_MIDI3+ AVDD10 REGOUT LAN_LED2 1 1
    9 25 T10 @
    LAN_MIDI3- 10 MDIP3 LED2 26 GPO CL17 2 4 CL18
    PU to +1.8VALW at PCH side

    2
    +3V_LAN 11 MDIN3 LED1/GPIO 27 LAN_LED0 LAN_PME# 10P_0402_50V8J
    AVDD33 LED0 T9 @ 10P_0402_50V8J
    12 28 XT O 2 2
    8 LAN_CLKREQ# 13 CLKREQB CKXTAL1 29 XTLI
    8 PCIE_HTX_C_DRX_P3 HSIP CKXTAL2 +LAN VDD
    14 30 RL3
    8 PCIE_HTX_C_DRX_N3 HSIN AVDD10 LAN_RST
    15 31 1 2
    8 CLK_PCIE_LAN 16 REFCLK_P RSET 32 +3V_LAN +3V_LAN
    2.49K_0402_1%
    8 CLK_PCIE_LAN# REFCLK_N AVDD33 33
    GND

    1
    RL4 Consider VCC33 may be connected to Main
    10K_0402_5%
    @ Power or chipset/bios's GPO, the pull-low
    resistor RL7 can be NC only when Main Power

    2
    UL2 RTL8111GS-CG_QFN32_4X4 8111GUS@ GPO 1 2 0_0402_5% or chipset/bios's GPO can ensure to drive the
    LAN_PHY_EN 33
    SA00006ML00 @ RL5 ISOLATEB pin to a voltage level < 0.8V at the
    Use 8111GS symbol , pop 8111GUS part system state S3~S5.
    LAN Connector Reserved
    S IC RTL8111H-CG QFN 32P E-LAN CTRL +3VS
    B 8111H@ B
    SA000080P00 JRJ45
    RJ45_MIDI0+ 1
    PR1+

    2
    RJ45_MIDI0- 2 RL6
    PR1- 1K_0402_5%
    T2507 RJ45_MIDI1+ 3
    LAN_MIDI3- 1 24 RJ45_MIDI3- PR2+

    1
    TD1+ TX1+ RJ45_MIDI2+ 4
    LAN_MIDI3+ 2 23 RJ45_MIDI3+ PR3+ ISOLATEB
    TD1- TX1- RJ45_MIDI2- 5
    PR3-

    1
    LAN_TERMAL3 22
    TDCT1 TXCT1 RJ45_MIDI1- 6 RL7
    4 21 PR2- 15K_0402_5%
    TDCT2 TXCT2 RJ45_MIDI3+ 7 9
    LAN_MIDI2- 5 20 RJ45_MIDI2- PR4+ GND 10

    2
    TD2+ TX2+ RJ45_MIDI3- 8 GND
    LAN_MIDI2+ 6 19 RJ45_MIDI2+ PR4-
    TD2- TX2- SANTA_130452-W
    LAN_MIDI1- 7 18 RJ45_MIDI1- CONN@
    TD3+ TX3+ DC23400AX00
    LAN_MIDI1+ 8 17 RJ45_MIDI1+ 40mil
    TD3- TX3- RJ45_GND 1 2 LANGND
    9 16 CL19
    TDCT3 TXCT3 10P_0402_50V8J
    10 15
    40mil
    TDCT4 TXCT4 LANGND

    1
    LAN_MIDI0- 11 14 RJ45_MIDI0- @EMC@
    TD4+ TX4+ JUMP_43X118
    LAN_MIDI0+ 12 13 RJ45_MIDI0+ JPL1 JPL2
    TD4- TX4- @EMC@
    DL1 B88069X9231T203_4P5X3P2-2
    A MHPC_NS692417 MESC5V02BD03_SOT23-3 A
    Place close to TCT pin 1

    2
    EMC@
    C2723
    4
    3
    2
    1

    0.1U_0402_16V7K

    1
    2 RP10
    75_0804_8P4R_1%

    H : 2mm Security Classification Compal Secret Data Compal Electronics, Inc.


    5
    6
    7
    8

    RJ45_GND
    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title
    LAN RTL8111GUS-CG

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    Custom 1.0
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L Braswell-M/B LA-D921P
    Date Wednesday May 11 2016 Sheet 26 of 52
    5 3 2 1
    A B C D E

    For Wireless LAN


    NGFF WL+BT (KEY E)
    +3VS 60mil +3VS_WLAN

    RM11 2 0_0805_5%
    1 1 1
    NBYOC@ CM1 @
    CM2 CM3
    4.7U_0603_6.3V6K .1U_0402_16V7K .1U_0402_16V7K JNGFF1
    2 2 2 1 2
    1 GND_1 3.3VAUX_2 +3VS_WLAN 1
    3 4
    29 USB20_HUB_P1 5 USB_D+ 3.3VAUX_4 6
    +3VS_WLAN
    BT 29 USB20_HUB_N1 7 USB_D- LED1# 8
    @ T3801
    +3VALW 9 GND_7 PCM_CLK 10
    UM1 11 SDIO_CLK PCM_SYNC 12
    W=60mils SDIO_CMD PCM_OUT
    1U_0402_6.3V6K
    CM4

    5 1 13 14
    IN OUT 15 SDIO_DAT0 PCM_IN 16
    1 SDIO_DAT1 LED2# @ T3802
    2 17 18
    @ GND 19 SDIO_DAT2 GND_18 20
    4 3 21 SDIO_DAT3 UART_WAKE 22
    2 EN OC SDIO_WAKE UART_TX UART_RXD_NGFF 10
    23
    SY6288C20AAC_SOT23-5 SDIO_RST
    BYOC@ 24
    25 UART_RX 26 UART_TXD_NGFF 10
    27 GND_33 UART_RTS 28
    33 WLAN_ON 8 PCIE_HTX_C_DRX_P2 29 PET_RX_P0 UART_CTS 30 E51TXD_P80DATA_R
    8 PCIE_HTX_C_DRX_N2 31 PET_RX_N0 CLink_RST 32 E51RXD_P80CLK_R
    33 GND_39 CLink_DATA 34
    8 PCIE_HRX_DTX_P2 PER_TX_P0 CLink_CLK
    35 36
    8 PCIE_HRX_DTX_N2 PER_TX_N0 COEX3 @ T3803
    37 38
    GND_45 COEX2 @ T3804
    39 40
    8 CLK_PCIE_WLAN REFCLK_P0 COEX1 @ T3805
    41 42
    8 CLK_PCIE_WLAN# REFCLK_N0 SUSCLK(32KHz) @ T3806
    43 44
    45 GND_51 PERST0# 46 BT_ON PLT_RST_BUF# 10,15,26,33,34
    8 WLAN_CLKREQ# CLKREQ0# W_DISABLE2# WL_OFF# BT_ON 33
    47 48
    33 WLAN_PME# PEWAKE0# W_DISABLE1# MINI1_SMBDATA RM4 1 WL_OFF# 33
    49 50 @ 2 0_0402_5%
    GND_57 I2C_DAT MINI _SMBCLK RM5 1 EC_SMB_DA2 15,33
    51 52 @ 2 0_0402_5%
    RSVD/PCIE_RX_P1 I2C_CLK EC_SMB_CK2 15,33
    RM6 53 54
    2 1 10K_0402_5% 55 RSVD/PCIE_RX_N1 I2C_IRQ 56
    +3VS_WLAN GND_63 RSVD_64
    57 58
    59 RSVD/PCIE_TX_P1 RSVD_66 60
    61 RSVD/PCIE_TX_N1 RSVD_68 62
    2 63 GND_69 RSVD_70 64 2
    RSVD_71 3.3VAUX_72 +3VS_WLAN
    65 66
    67 RSVD_73 3.3VAUX_74
    GND_75 68
    69 GND1
    GND2
    RM2 0_0402_5% 1 @ 2 E51TXD_P80DATA_R BELLW_80152-3221
    33 E51TXD_P80DATA 1 2 E5 RXD_P80CLK_R
    RM3 0_0402_5% @ CONN@
    33 E51RXD_P80CLK
    SP070013E00
    1

    RM7
    100K_0402_5%
    2

    3 3

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    NGFF WLAN
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 27 of 52
    A B C D E
    A B C D E

    HD Audio Codec
    SM01000EJ00 3000mA 220ohm@100mhz DCR 0.04
    +PVDD_HDA +5VS
    40mil
    (output = 300 mA)
    JPA1 40mil
    +VDDA
    Int. Speaker Conn.
    40mil 1 2 40mil SPK_R+
    JSPK1
    LA1 2 1 1 SPKR+ EMC@ 1 LA2 2 PBY160808T-121Y-N_2P 1
    +VDDA SPK_R 1

    .1U_0402_16V7K
    CA4
    HCB2012KF-221T30_0805 1 1 JUMP_43X118 4.75V SPKR- EMC@ 1 LA3 2 PBY160808T-121Y-N_2P 2
    2

    1
    SPK_L+

    10U_0603_6.3V6M
    CA1

    .1U_0402_16V7K
    CA2

    .1U_0402_16V7K
    CA3
    @ SPKL+ EMC@ 1 LA4 2 PBY160808T-121Y-N_2P 3
    SPKL- EMC@ 1 LA5 2 PBY160808T-121Y-N_2P SPK_L- 4 3
    2 5 4

    2
    G1

    3
    2 2 @ +AVDD1_HDA @EMC@ 6
    GND & GNDA moat EMI request for solve EMI noise G2
    GND GND GND ACES_50278-00401-001
    DA1 DA2 GND CONN@
    Place near Pin41 Place near Pin46 MESC5V02BD03_SOT23-3 MESC5V02BD03_SOT23-3
    @EMC@ @EMC@ SP02000RR00
    1
    20mil 1
    CA5 1 2 10U_0603_6.3V6M RA1 1 @ 2
    GND +VDDA

    1
    10U_0603_6.3V6M
    CA9
    1

    1
    .1U_0402_16V7K
    CA8
    Pin9 need to matching with SOC HDA CA6 1 2 .1U_0402_16V7K 0_0603_5%
    interface. GND GND
    RA2 2 @ 1 0_0402_5% +1.8VS_DVDDIO
    +1.8VS Place near Pin9

    2
    2 @
    +3VS_DVDD GND & GNDA moat
    use +1.5VS Analog MIC(SMD)
    20mi GNDA +MICBIAS2
    RA5 2 @ 1 0_0402_5% Place near Pin26
    +3VS

    1 1

    2
    +1.8VS_VDDA

    .1U_0402_16V7K
    CA11
    CA10 RA6 2 @ 1 +1.8VS
    1 RA7

    1
    .1U_0402_16V7K
    CA12

    CA13
    10U_0603_6.3V6M
    10U_0603_6 3V6M 0_0402_5% 2.2K_0402_5%
    2 2 use +1.5VS
    15mil 15mil AMIC1

    1
    2 @ INT_MIC_R RA8 1 @ 2 INT_MIC_R_1 1
    +
    Place near Pin1 GND GNDA
    0_0603_5% 2
    Place near Codec 1
    CA14 -

    41

    46

    26

    40
    1

    9
    UA1 Place near Pin40 @EMC@ GETTOP SOM4013SL-G423-RC-HS
    220P_0402_50V7K @

    DVDD

    DVDD-IO

    PVDD1

    PVDD2

    AVDD1

    AVDD2
    2
    CY000002V00
    LINE1-L 22
    Omnidirect i onal
    LINE1-R 21 LINE1-L(PORT-C-L) 43 SPKL-
    INT_MIC_R INT_MIC CA32 1 LINE2_L LINE1-R(PORT-C-R) SPK-OUT-L- GNDA Follow EA52_BM(LA-B511P) footprint
    UA1 2 1 2 42 SPKL+
    RA9 1K_0402_5% 4.7U_0603_6.3V6K 24 SPK-OUT-L+
    CA33 1 2 LINE2_R 23 LINE2-L(PORT-E-L) 45 SPKR+
    4.7U_0603_6.3V6K LINE2-R(PORT-E-R) SPK-OUT-R+ 44 SPKR-
    RING2 17 SPK-OUT-R-
    40mil SLEEVE 18 MIC2-L(PORT-F-L) /RING2
    2
    ALC233-VB2-CG_MQFN48_6X6 MIC2-R(PORT-F-R) /SLEEVE 32 HP_LEFT 2
    Combo MIC HPOU -L(PORT I-L) HP_RIGHT
    233@ +MICBIAS +MICBIAS 31 33
    SA00007BF10 +MICBIAS2 30 LINE1-VREFO-L HPOUT-R(PORT I-R)
    +MICBIAS2 LINE1-VREFO-R HDA_SYNC_AUDIO
    0 HDA_SYNC_AUDIO 8
    2 SYNC 6 HDA_BITCLK_AUDIO
    GPIO0/DMIC-DATA BCLK HDA_BITCLK_AUDIO 8
    3
    GPIO1/DMIC-CLK 1 @EMC@ 2 1 2 CA15 @EMC@ GND
    RA10 0_0402_5% 22P_0402_50V8J
    EC_MUTE# 47 5 HDA_SDOUT_AUDIO
    33 EC_MUTE# HDA_RST_AUDIO# PDB SDATA-OUT HDA_SDIN0_AUDIO HDA_SDOUT_AUDIO 8
    8 HDA_RST_AUDIO# 11 8 1 RA33 2 HDA_SDIN0 8
    RESETB SDATA-IN 75_0402_1%
    48
    MONO_IN 12 SPDIF-OUT/GPIO2
    10mil PCBEEP 16
    HP_PLUG# RA13
    Close
    2
    codec1 200K_0402_1% SENSE_A 13 MONO-OUT
    31 HP_PLUG# SENSE A MIC2_VREFO
    RA14 2 1 100K_0402_1% 14
    +3VS SENSE B
    1 29 10U_0603_6 3V6M 2 1 CA18 GND
    37 MIC2-VREFO
    CA19 35 CBP 7 10U_0603_6.3V6M 2 1 CA20
    CBN LDO3-CAP GNDA
    2.2U_0402_6.3V6M 39
    2 LDO2-CAP 27 10U_0603_6.3V6M 2 1 CA21
    LDO1-CAP GNDA
    +3VS_DVDD 36
    CPVDD 1 RA15 2
    28 CODEC_VREF 100K_0402_5% 10mil
    Pin20 RA16 1 @ 2 0_0402_5% 20 VREF
    ALC283 : NC +3VALW CPVREF 1 1
    Headphone Out

    .1U_0402_16V7K
    CA23

    2.2U_0402_6 3V6M
    CA24
    15
    ALC255/256/233 : Power for combo jack depop 10U_0603_6.3V6M 2 1 CA22 19 JDREF 34 CPVEE
    GNDA MIC-CAP CPVEE
    circuit at system shutdown mode 2 2
    1 @
    4 +MIC2_VREFO
    Pin4 49 DVSS 25 CA26
    ALC283 : DVSS Thermal PAD AVSS1 38 2.2U_0402_6.3V6M
    ALC255/256/233 : DC DET (For Japen customer only) AVSS2 2

    ALC255-CG_MQFN48_6X6
    Place nea pin28
    3 3

    1
    SA00007BF10 GND
    GND @ RA19 RA20
    GNDA 2.2K_0402_5% 2.2K_0402_5%
    GNDA

    2
    RA21 CA27 SLEEVE SLEEVE 31
    DOS mode 12K_0402_5% .1U_0402_16V7K Pin15 RING2 RING2 31
    2 1 BEEP#_R 1 2 MONO_IN
    33 BEEP# ALC283 : Ref. Resistor for Jack Detect
    ALC255/256/233 : Jack Detect for SPDIF-OUT and SPK-OUT port
    2

    RA22 1 10/20 vendor review change to 0.1uF.


    OS mode 12K_0402_5% @
    100P_0402_50V8J
    CA28

    4.7K_0402_5%
    RA23

    2 1
    8 SOC_SPKR
    2
    1

    HP_LEFT RA24 1 @ 2 0_0402_5% HPOUT_L_1 HPOUT_L_1 31


    HP_RIGHT RA27 1 @ 2 0_0402_5% HPOUT_R_1 HPOUT_R_1 31

    GND
    LINE1-L 1 2
    CA29 4.7U_0603_6.3V6K
    LINE1-R 1 2
    CA30 4 7U_0603_6.3V6K
    +MICBIAS DA5
    GND & GNDA moat 2 2 RA29
    JPA2 JPA3 4.7K_0402_5%
    JUMP_43X39 JUMP_43X39 1
    1 2 1 2
    @ 1 2 @ 1 2 3 2 RA32 1
    4.7K_0402_5%
    JPA4 JPA5 BAT54A-7-F_SOT23-3
    JUMP_43X39 JUMP_43X39
    1 2 1 2
    @ 1 2 @ 1 2

    CA31 @ JPA7
    .1U_0402_16V7K JUMP_43X39
    1 2 1 2
    @ 1 2

    RA25 1 @ 2 0_0402 5%
    Secur ty Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    GND GNDA GND GNDA


    HD Audio Codec ALC233
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

    WWW.AliSaler.Com
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH S SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L Braswell-M/B LA-D921P
    Date Wednesday May 11 2016 Sheet 28 of 52
    A B C D E
    5 3 2 1

    USB HUB\ GL850

    +3V_SOC

    2
    R270
    0_0402_5% +3V_HUB
    +3V_HUB
    @
    HUB@

    1
    D 1 2 D
    C288 .1U_0402_16V7K C279 close to U73 pin5
    HUB@
    10U_0603_6.3V6M C280 close to U73 pin9

    .1U_0402_16V7K
    1 1 1 2
    C294
    HUB@
    C283 close to U73 pin14

    C293
    HUB@
    C289 .1U_0402_16V7K

    1
    HUB@
    2
    C284 close to U73 pin21 +3V_HUB +3V_HUB
    2 2 C291 .1U_0402_16V7K
    HUB@

    2
    1 2 HUB@ U2
    C290 .1U_0402_16V7K R1053 5 1 USB20_N4
    9 AVDD DM0 2 USB20_P4 USB20_N4 10
    0_0402_5%
    14 AVDD DP0 USB20_P4 10
    +3V_HUB 21 AVDD 3 USB20_HUB_N1

    1
    27 DVDD DM1 4 USB20_HUB_P1 USB20_HUB_N1 27
    28 V5 DP1 USB20_HUB_P1 27 BT
    V33

    1
    HUB@ 6 USB20_HUB_N2
    +3V_HUB DM2 7 USB20_HUB_P2 USB20_HUB_N2 31
    R272 USB2.0 SUB/B
    18 DP2 USB20_HUB_P2 31
    R976 10K_0402_5%
    1 HUB@ 2 PSELF 0_0402_5% 26 TEST/SCL 12 USB20_HUB_N3
    PWREN1#/SDA DM3 13 USB20_HUB_P3 USB20_HUB_N3 31
    R266 100K_0402_5% Card Reader

    2
    1 2 RESET# 17 DP3 USB20_HUB_P3 31
    @
    1 HUB@ 2 OVCUR2# 33,41 SYSON RESET# 15
    R268 10K_0402_5%
    Port2 is removable. 2
    HUB@ HUB_XIN 10 DM4 16
    C292 HUB_XOUT 11 X1 DP4 Port4 disable.
    1 @ 2 OVCUR1# X2 25 OVCUR1#
    1U_0402_6.3V6K OVCUR1#/SMC
    R269 10K_0402_5% 1 PSELF 22 24 OVCUR2#
    1 @ 2 OVCUR3#
    reseve for Port1,3 PGANG 23 PSELF OVCUR2#/SMD 20 OVCUR3#
    Port2 is removable.
    R273 10K_0402_5% PGANG OVCUR3# 19
    OVCUR4#
    29 8 RREF 2 HUB@ 1
    GND RREF R267 619_0402_1%
    C 1 HUB@ 2 PGANG C
    R271 100K_0402_5% GL850G-OHY50_QFN28_5X5
    HUB@

    Y2
    SA000066320, S IC GL850G-OHY50 QFN 28P USB2.0 HUB
    HUB_XIN 1 4 1
    1 C296
    C295 33P_0402_50V8J
    33P_0402_50V8J HUB@
    HUB@ 2 3 2 HUB_XOUT
    2
    12MHZ_18PF_7V12000001
    V0.2 modify HUB@

    TP_INT LS(Other for BOM) +1.8VALW

    eDP LS (Other for BOM)


    +1.8VALW

    1
    +3V_PTP
    R1166
    1

    2.2K_0402_5%

    5
    U2510
    R383 DGPU LS(other BOM) 1

    P
    2
    10K_0402_5% TP_INT_1# 1 @ 2 TP_INT# 4 NC
    7 TP_INT_1# Y 2
    R1059 0_0402_5%
    2

    A TP_INT#_EC 33,34

    G
    +3VSDGPU_AON TP_INT_2# 1 @ 2
    B 7 EDP_HPD# VGA_PWROK 15,36,48,49 8 TP_INT_2# B
    R1060 0_0402_5% NL17SZ07DFT2G_SC70-5

    3
    TP_INT_3# 1 @ 2 SA00004BV00
    9 TP_INT_3#
    1

    D +3VS R4919 0_0402_5%


    Q13 2 EDP_HPD_CONN R1043 @ R1044
    EDP_HPD_CONN 24
    L2N7002LT1G_SOT23-3 G 10K_0402_5% 0_0402_5%
    1

    S @
    3

    1
    2

    R364 R2015 PH +1.8VALW at SOC


    100K_0402_5% 10K_0402_5%

    5
    VGA@ U57 SOC/1.8V
    2

    2
    G

    From GPU/3 3V 1
    P
    2

    NC 4
    3 1 PEG_CLKREQ_D# 2 Y VGA_CLKREQ# 8
    15 PEG_CLKREQ# A
    G
    S

    NL17SZ07DFT2G_SC70-5
    3

    SA00004BV00
    Q36 VGA@ V1.0 modify
    L2N7002LT1G_SOT23-3
    +1.8VALW
    TS LS (Other for BOM)
    VGA@
    +3VSDGPU_AON
    @ +TS_PWR
    2
    1 2 +1.8VALW C297
    R1050 0_0402_5% .1U_0402_16V7K +1.8VALW

    1
    1

    1 R2043

    2
    R2034 10K_0402_5%
    5

    1
    1K_0402_5% @ U58 VGA@ GPU/3.3V R635
    1 R634 TSI@
    SOC/1.8V 10K_0402_5%
    P

    2
    NC 4 10K_0402_5% TSI@ TSI@
    2

    Y DGPU_HOLD_RST# 15

    5
    DGPU_HOLD_RST#_SOC1.8V 2 U2511

    1
    7 DGPU_HOLD_RST#_SOC1.8V A
    G

    P
    2
    NL17SZ07DFT2G_SC70-5 TS_INT_R# 4 NC
    3

    A 8 TS_INT_R# Y 2 TS_INT# A
    SA00004BV00
    A TS_INT# 24

    G
    VGA@
    NL17SZ07DFT2G_SC70-5

    3
    SA00004BV00

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    USB Hub GL850G& Reset Button
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    Custom 1.0
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L Braswell-M/B LA-D921P
    Date Wednesday May 11 2016 Sheet 29 of 52
    5 3 2 1
    A B C D E

    1 1

    SATA HDD1 Conn.


    JHDD1

    1
    CO1 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 2 GND
    8 SATA_PTX_DRX_P0 SATA_PTX_C_DRX_N0 A+
    CO2 1 2 0.01U_0402_16V7K 3
    8 SATA_PTX_DRX_N0 A-
    4
    CO3 1 2 0.01U_0402_16V7K SATA_PRX_C_D X_N0 5 GND
    8 SATA_PRX_DTX_N0 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6 B-
    CO4
    8 SATA_PRX_DTX_P0 7 B+
    +3VS GND

    8
    9 V33
    10 V33
    1 V33
    2 +5VS +5VS_HDD 12 GND 2
    13 GND
    RO3 1 @ 2 0_0805_5% +5VS_HDD 14 GND
    15 V5
    16 V5
    17 V5
    18 GND
    19 Reserved 23
    20 GND GND 24
    21 V12 GND 25
    22 V12 GND 26
    V12 GND

    SANTA_194403-1
    CONN@

    LTCX0078W00

    +3VS +5VS_HDD

    100mils
    .1U_0402_16V7K

    10U_0603_6.3V6M

    .1U_0402_16V7K

    1 1 1
    CO11
    @

    CO12

    CO13
    @

    3 3
    2 2 2

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title
    HDD

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 30 of 52
    A B C D E
    A B C D E

    For ESD request


    USB MB Port 0 (U3&U2)
    +USB3_VCCA
    DS21 EMC@
    USB3_CTX_L_DRX_P0 USB3_CTX_L_DRX_P0
    Max H:6mm
    1 1 10 9 W=100mils
    SF000006900
    USB20_P0 2 1 USB20_P0_L USB3_CTX_L_DRX_N0 2 2 9 8 USB3_CTX_L_DRX_N0
    10 USB20_P0 1 1
    USB3_CRX_L_DTX_P0 4 4 7 7 USB3_CRX_L_DTX_P0 CS25 + CS26
    USB20_N0 3 4 USB20_N0_L
    10 USB20_N0 220U_C6_6.3V_M_R15 .1U_0402_16V7K
    USB3_CRX_L_DTX_N0 5 5 6 6 USB3_CRX_L_DTX_N0 2
    2 EMC@
    MCM1012B900F06BP_4P
    LS26 EMC@ 3 3 USB3.0 Conn.
    1
    8 JUSB1 1
    1
    For RF request L05ESDL5V0NA-4 SLP2510P8 USB20_N0_L 2 VBUS
    USB20_P0_L 3 D-
    2 1 PCH_USB3_TX0_P_C RS22 1 @ 2 0_0402_5% USB3_CTX_L_DRX_P0 4 D+
    10 PCH_USB3_TX0_P USB3_CRX_L_DTX_N0 GND
    CS484 .1U_0402_16V7K 5
    USB3_CRX_L_DTX_P0 6 StdA-SSRX- 10
    2 1 PCH_USB3_TX0_N_C RS21 1 @ 2 0_0402_5% USB3_CTX_L_DRX_N0 7 StdA-SSRX+ GND 11
    10 PCH_USB3_TX0_N USB3_CTX_L_DRX_N0 GND-DRAIN GND 12
    CS482 .1U_0402_16V7K 8
    USB3_CTX_L_DRX_P0 9 StdA-SSTX- GND 13
    StdA-SSTX+ GND
    LOTES_AUSB0015-P001A
    CONN@

    DS22 EMC@ DC23300AI00


    6 3 USB20_P0_L +5VALW
    I/O4 I/O2 +USB3_VCCA
    +USB3_VCCA CS23 EMC@
    PCH_USB3_RX0_P RS25 1 @ 2 0_0402_5% USB3_CRX_L_DTX_P0 .1U_0402_16V7K US21
    10 PCH_USB3_RX0_P
    5 2 1 2 5 1 W=100mils
    VDD GND IN OUT
    PCH_USB3_RX0_N RS24 1 @ 2 0_0402_5% USB3_CRX_ _DTX_N0 2
    10 PCH_USB3_RX0_N GND
    4 1 USB20_N0_L USB_PWR_EN 4 3 RS23 1 @ 2 0_0402_5%
    I/O3 I/O1 EN OC USB_OC0# 10
    AZC099-04S.R7G_SOT23-6 SY6288C20AAC_SOT23-5 1
    CS24
    .1U_0402_16V7K
    2
    @

    2 2

    USB MB Port 1 (U2) USB/B (USB, AUDIO, CR)

    +USB3_VCCA
    JUSB3
    HPOUT_L_1 1
    USB20_P1 USB20_P1_L 28 HPOUT_L_1 HPOUT_R_1 1
    2 1 28 HPOUT_R_1 2
    10 USB20_P1 2
    28 SLEEVE SLEEVE 3
    RING2 4 3
    USB20_N1 USB20_N1_L JUSB2 28 RING2 HP_PLUG# 4
    .1U_0402_16V7K
    CS490

    3 4 28 HP_PLUG# 5
    10 USB20_N1 5
    1 1 5 GNDA 6
    MCM1012B900F06BP_4P USB20_N1_L 2 VBUS G1 6 7 6
    LS27 USB20_P _L 3 D- G2 7 8 7
    EMC@ +3VS
    4 D+ G3 8 9 8
    2 GND G4 9
    EMC@

    10
    ACON_UARC9-4K1986 USB20_HUB_N3 11 10
    29 USB20_HUB_N3 USB20_HUB_P3 11
    CONN@ Card reader 12
    29 USB20_HUB_P3 12
    3 DC23300AH00 13 3
    USB20_HUB_P2 14 13
    29 USB20_HUB_P2 USB20_HUB_N2 14
    USB 2.0 port 15
    29 USB20_HUB_N2 15
    DS5 EMC@ 16
    6 3 USB20_P1_L USB_PWR_EN 17 16
    I/O4 I/O2 33 USB_PWR_EN 17
    18
    +USB3_VCCA 19 18
    20 19
    +5VALW 20
    5 2 21
    VDD GND 22 G1
    G2

    4 1 USB20_N1_L ACES_85201-2005N
    I/O3 I/O1 CONN@
    AZC099-04S.R7G_SOT23-6

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    USB Conn
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON CS, INC. B5V1L Braswell-M/B LA-D921P
    Date Wednesday May 11 2016 Sheet 31 of 52
    A B C D E
    5 3 2 1

    D +3VALW R1 +3VS_EMMC +1.8VS_EMMC R2 +1.8VALW D


    0_0805_5% 0_0805_5%
    1 2 1 2
    EMMC@ 1 1 1 1 EMMC@
    EMMC@ EMMC@ EMMC@
    C71 C72 EMMC@ C73 C74
    10U_0603_6.3V6M .1U_0402_16V7K 10U_0603_6.3V6M .1U_0402_16V7K
    2 2 2 2

    AA3
    AA5
    T10

    W4
    M6
    N5

    U9

    K6

    Y4
    U4
    CHECK A4

    VCCQ
    VCCQ
    VCCQ
    VCCQ
    VCCQ
    VCC
    VCC
    VCC
    VCC
    A6 NC
    A9 NC
    A11 NC W5 EMMC_CMD_R R3 1 EMMC@2 0_0402_5% EMMC_CMD
    B2 NC CMD EMMC_CMD 7
    U4
    B13 NC
    D1 NC
    D14 NC @EMC@ +1.8VS_EMMC
    H1 NC U5 EMMC_PLT_RST# C76 1 2 .1U_0402_16V7K
    H2 NC RST_n
    EMMC32G-M525-A01 H6 NC W6 EMMC_CLK_R R5 1 EMMC@2 0_0402_5% EMMC_CLK EMMC_CMD_R R17 1 EMMC@2 20K_0402_5%
    NC CLK EMMC_CLK 7
    KNGST32G@ H7
    H8 NC
    SA00009KE10 NC
    H9
    H10 NC
    H11 NC H3 EMMC_D0_R R11 1 EMMC@2 0_0402_5% EMMC_D0
    H12 NC DAT0 H4 EMMC_D1_R 1 EMMC_D1 EMMC_D0 7
    R13 EMMC@2 0_0402_5%
    H13 NC DAT1 H5 EMMC_D2_R 1 EMMC_D2 EMMC_D1 7
    R15 EMMC@2 0_0402_5%
    H14 NC DAT2 J2 EMMC_D3_R R16 1 EMMC@2 0_0402_5% EMMC_D3 EMMC_D2 7 BSW no need?
    NC DAT3 EMMC_D4_R EMMC_D4 EMMC_D3 7
    J1
    J7 NC DAT4
    J3
    J4 EMMC_D5_R
    R18
    R19
    1
    1
    EMMC@2
    EMMC@2
    0_0402_5%
    0_0402_5% EMMC_D5 EMMC_D4 7 CRB no stuf f t hes e
    C J8 NC
    NC
    DAT5
    DAT6
    J5 EMMC_D6_R R21 1 EMMC@2 0_0402_5% EMMC_D6 EMMC_D5
    EMMC_D6
    7
    7
    BSW not support eMMC 5.0 C
    J9 J6 EMMC_D7_R R22 1 EMMC@2 0_0402_5% EMMC_D7
    J10 NC DAT7 EMMC_D7 7
    U4
    J11 NC +1.8VS_EMMC
    J12 NC EMMC@
    J13 NC K2 EMMC_VDDI C75 1 2 .1U_0402_16V7K
    J14 NC VDDi EMMC_D0_R R4 1 @ 2 20K_0402_5%
    K1 NC EMMC_D1_R R6 1 @ 2 20K_0402_5%
    EMMC32G-M525-A01 K3 NC U1 EMMC_D2_R R7 1 @ 2 20K_0402_5%
    HYN32@ K5 NC NC U2 EMMC_D3_R R8 1 @ 2 20K_0402_5%
    K7 NC NC U3 EMMC_D4_R R9 1 @ 2 20K_0402_5%
    SA00007QH20 NC NC EMMC_D5_R
    K8 U6 R10 1 @ 2 20K_0402_5%
    K9 NC NC U7 EMMC_D6_R R12 1 @ 2 20K_0402_5%
    K10 NC NC U10 EMMC_D7_R R14 1 @ 2 20K_0402_5%
    K11 NC NC U12
    K12 NC NC U13
    K13 NC NC U14
    K14 NC NC V1 EMMC_CLK_R R20 1 @ 2 20K_0402_5%
    U4 L1 NC NC V2
    L2 NC NC V3 EMMC_RCLK_R R32 1 2 20K_0402_5%
    L3 NC NC V12 EMMC V5.0@
    L4 NC NC V13
    L12 NC NC V14
    L13 NC NC W1
    EMMC32G-M525-A01 L14 NC NC W2
    HYN64@ M1 NC NC W3
    M2 NC NC W7
    SA00007X720 NC NC
    M3 W8
    M5 NC
    NC
    NC
    NC
    W9 Level shif t +1.8VS_EMMC
    M8 W10
    EMMC_VSF2 M9 NC NC W11 +1.8VS_EMMC
    @ T2 EMMC_VSF3 NC NC
    M10 W12 +1.8VALW
    @ T3 NC NC

    1
    B M12 W13 B
    NC NC

    1
    M13 W14 R23
    U4 M14 NC NC Y1 10K_0402_5% @ 10K_0402_5%
    NC NC

    5
    N1 Y3 R24 @
    N2 NC NC Y6 1

    2
    N3 NC NC Y7 NC 4 EMMC_PLT_RST#

    2
    N10 NC NC Y8 2 @ 1 2 Y
    NC NC 8 EMMC_RST# A

    G
    N12 Y9 R33 0_0402_5%
    EMMC32G-M525-A01 N13 NC NC Y10 @ U2512

    3
    SAM64@ N14 NC NC Y11 2 @ 1 NL17SZ07DFT2G_SC70-5
    NC NC 10 PMC_PLTRST#
    SA00009EF10 P1 Y12 R27 SA00004BV00
    P2 NC NC Y13 0_0402_5%
    P3 NC NC Y14
    P10 NC NC AA1 2 @ 1
    P12 NC NC AA2 R26
    P13 NC NC AA7 0_0402_5%
    P14 NC NC AA8
    R1 NC NC AA9
    R2 NC NC AA10
    For eMMC5.0 EMMC V5.0@ R3 NC NC AA11
    2 1 EMMC_RCLK_R R5 NC NC AA12
    7 EMMC_RCLK NC NC
    0_0402_5% R31 R12 AA13
    R13 NC NC AA14
    R14 NC NC AE1
    T1 NC NC AE14
    T2 NC NC AG2
    T3 NC NC AG13
    T5 NC NC AH4
    T12 NC NC AH6
    T13 NC NC AH9
    T14 NC NC AH11
    NC NC
    VSSQ
    VSSQ
    VSSQ
    VSSQ
    VSSQ

    VSS
    VSS
    VSS
    VSS

    A A

    KE4CN5B6A_FBGA169 Pad size 9 mils, BI trace width/space : 3.5/3.5 mils


    K4
    Y2
    Y5
    AA4
    AA6

    M7
    P5
    R10
    U8

    Security Classification
    2015/12/24
    Compal Secret Data
    2017/12/24 Title
    Compal Electronics, Inc.
    Issued Date Deciphered Date
    EMMC STORAGE

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    Custom 1.0
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 32 of 52
    5 3 2 1
    A B C D E

    +3VALW_EC

    1
    @ R1091
    0_0603_5%

    2
    For abnormal shutdown +3VLP +3VALW_EC L31 +EC_VCCA
    BLM15AG121SN1D_L0402_2P
    D25 1 @ 2 1 2 +EC_VCCA +VCC_LPC
    RB751V-40_SOD323-2 +1.8VALW +1.8VALW_EC
    EC_RSMRST# 1

    .1U_0402_16V7K
    C502

    .1U_0402_16V7K
    C503

    1000P_0402_50V7K
    C504

    1000P_0402_50V7K
    C505
    SPOK 1 2 R236 1 1 2 2 .1U_0402_16V7K2 1 C506

    +VCC_LPC
    D2002 0_0805_5% C508
    RB751V-40_SOD323-2 .1U_0402_16V7K 1 @ 2 .1U_0402_16V7K2 1 C507
    1 1 2 PMC_CORE_PWROK 2 @ 1
    2 2 @1 @1 R237
    ECAGND 38 +3VALW_EC
    0_0805_5%

    111
    125
    +3VALW_EC LID_SW# R476 1 2 47K_0402_5%

    22
    33
    96

    67
    9
    U28
    +3VS

    EC VDD0
    EC_VDD/VCC
    EC_VDD/VCC
    EC_VDD/VCC
    EC_VDD/VCC

    EC_VDD/VCC

    EC_VDD/AVCC
    R484 1 @ 2 100K_0402_5% EC_PME#
    EC_MUTE# R481 1 @ 2 10K_0402_5%

    1 21
    10 EC_SLP_S3#_1P8 EC_KBRST# 2 GATEA20/GPIO00 GPIO0F 23 BEEP# BATT_4S 39
    +3VALW_EC 7 EC_KBRST# 3 KBRST#/GPIO01 BEEP#/GPIO10 26 FAN_PWM1 BEEP# 28 Reserve EC_CLR_CMOS for clear CMOS
    0,34 EC_SERIRQ 4 SERIRQ GPIO12 27 EC_CLR_CMOS FAN_PWM1 35
    RP12 CLR_CMOS# 10
    1 8 EC_SMB_CK1 10,34 LPC_FRAME# 5 LPC_FRAME# ACOFF/GPIO13
    2 7 EC_SMB_DA1 10,34 LPC_AD3 7 LPC_AD3
    PWM Output C510 2 1 100P_0402_50V8J ECAGND
    3 6 EC_SMB_CK2 10,34 LPC_AD2 8 LPC_AD2 63 BATT_TEMP
    10,34 LPC_AD1 LPC_AD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP 38

    1
    4 5 EC_SMB_DA2 10 64 VCIN1_BATT_DROP D
    +3VS 10,34 LPC_AD0 LPC_AD0LPC & MISC AD1/GPIO39 ADP_I VCIN1_BATT_DROP 38 EC_CLR_CMOS
    65 2 Q51
    LPC_CLK_EC 12 ADP_I/AD2/GPIO3A 66 AD_BID0 ADP_I 38,39
    2.2K_0804_8P4R_5% AD Input G L2N7002LT1G_SOT23-3
    10
    LPC_CLK_EC CLK_PCI_EC AD3/GPIO3B

    2
    +1.8VALW_EC 13 75 S @

    3
    10,15,26,27,34 PLT_RS _BUF# 37 PCIRST#/GPIO05 AD4/GPIO42 76 VGG_IMON R483
    35 EC_RST# 20 EC_RST# IMON/AD5/GPIO43 VGG_IMON 45
    9 EC_SCI# EC_SCII#/GPIO0E 10K_0402_5%
    R488 1 2 10K_0402_5% EC_SMI# 38
    EC_SCI# 27 WLAN_ON GPIO1D @
    R492 1 @ 2 10K_0402_5%

    1
    R494 1 @ 2 10K_0402_5% EC_LID_OUT# 68 LAN_PWR_EN
    1 2 EC_KBRST# DAC_BRIG/GPIO3C 70 BT_ON LAN_PWR_EN 26
    R493 @ 10K_0402_5% DA Output
    KSI0 55 EN_DFAN1/GPIO3D 71 TP_EN BT_ON 27
    KSI0/GPIO30 IREF/GPIO3E DGPU_AC_DETECT TP_EN 34
    KSI1 56 72
    1 @EMC@2 LPC_CLK_EC KSI2 57 KSI1/GPIO31 CHGVADJ/GPIO3F DGPU_AC_DETECT 15
    1 KSI2/GPIO32 EC_MUTE#
    C1015 R149 33_0402_5% KSI3 58 83
    10P_0402_50V8J KSI4 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84 USB_PWR_EN EC_MUTE# 28
    2 60 KSI4/GPIO34 USB_EN#/GPIO4B 85 USB_PWR_EN 31 dGPU 2
    @EMC@ KSI5 R509 1 @ 2 0_0402_5%
    ACIN 10,39
    2 KSI6 61 KSI5/GPIO35 CAP_INT#/GPIO4C 86 GPU_ALERT
    KSI6/GPIO36 PS2 Interface EAPD/GPIO4D TP_CLK GPU_ALERT 15
    KSI7 62 87 EMC@
    KSO0 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA TP_CLK 34 EC_ACIN 2 1 100P_0402_50V8J
    C512
    KSO1 40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA 34
    KSO2 41 KSO1/GPIO21
    KSI[0..7] KSO3 42 KSO2/GPIO22 97 ENBKL
    ESD request 0926 34 KSI[0..7] KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 ENBKL 7
    KSO4 43 98
    KSO[0..17] KSO5 44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 TP_PWR_EN 34
    @EMC@
    C511 1 2 0.01U_0402_16V7K PLT_RST_BUF# 34 KSO[0..17] KSO6 45 KSO5/GPIO25 Int K/B ME_EN/GPXIOA02 109 VCIN0_PH TXE_DBG 9
    KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 VCIN0_PH 38
    KSO7/GPIO27 SPI Device Interface
    1 @ 2 KSO8 47 For Thermal Portect Shutdown
    R490 100K_0402_5% KSO9 48 KSO8/GPIO28 119 D23
    KSO10 49 KSO9/GPIO29 SPIDI/GPIO5B 120 RB751V-40_SOD323-2
    KSO11 50 KSO10/GPIO2A SPIDO/GPIO5C 126 MAINPWON 1 2 3V_EN
    KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58 3V_EN 40
    KSO12 51 128
    KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A R497
    ESD request 0926 KSO13/GPIO2D 3V_EN_R
    EMC@ KSO14 53 R1174 0_0402_5% 1 2 R4901 1 2
    C1157 2 1 0.047U_0402_25V7K PMC_CORE_PWROK KSO15 54 KSO14/GPIO2E 73 1 @ 2 1M_0402_5%
    KSO16 81 KSO15/GPIO2F ENBKL/AD6/GPIO40 74 TP_INT#_EC EC_SUSPWRDNACK 42
    1K_0402_5%
    KSO17 82 KSO16/GPIO48 PECI_KB930/AD7 GPIO41 89 GPU_OVERT TP_INT#_EC 29,34
    KSO17/GPIO49 FSTCHG GPIO50 90 BATT_B UE_LED# GPU_OVERT 15
    Charger and BATT BATT_CHG_LED# GPIO52 BATT_BLUE_LED# 34
    91 WLAN_PME#
    77 GPIO
    CAPS_LED#/GPIO53 92 PWR_LED_R# WLAN_PME#
    PWR_LED_R#
    27
    34
    Change to #
    38,39 EC_SMB_CK1 78 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 93 BATT_AMB_LED#
    To SOC 38,39 EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_AMB_LED# 34
    79 SM Bus 95 SYSON
    15,27 EC_SMB_CK2 80 EC_SMB_CK2/GPIO46 SYSON/GPIO56 121 VR_ON SYSON 29,41
    TSI@
    1 2 TS_RST# 15,27 EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 127 PMC_SUSPWRDNACK_R VR_ON 45
    R636 PM_SLP_S4#/GPIO59
    100K_0402_5% SW_PROCHOT# R1169 1 @ 2 0_0402_5%
    6 100 EC_RSMRST#
    14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 EC_LID_OUT# EC RSMRST# 10
    3 26EC_PME# 15 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 102 VCIN1_PROCHOT EC_LID_OUT# 7 3
    R482 1 @ 2 0_0402_5% H_PROCHOT# 10,15
    9
    EC_SMI# 16 EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 103 H_PROCHOT#_EC VCIN _PROCHOT 38 44,45 VR_HOT#
    EVT ESD request 24TS_RST# GPIO0A H_PROCHOT#_EC/GPXIOA06
    17 104 MAINPWON
    24TS_EN GPIO0B VCOUT0_PH/GPXIOA07 EC_BKOFF# MAINPWON 35,38,40
    2 1 @EMC@ SUSP# 18 GPO BKOFF#/GPXIOA08 105 Latest design guide suggest change to
    27WL_OFF# GPIO0C LAN_PHY_EN EC_BKOFF# 24
    C3 .1U_0402_16V7K 19 GPIO 106
    36EC_SUSP 25 GPIO0D PBTN_OUT#/GPXIOA09 107 MOIC_PG LAN_PHY_EN 26 74LVC1G06.
    2 1 @EMC@ VR_ON 40SPOK 28 EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 108 3V_EN_R MOIC_PG 42
    C4 .1U_0402_16V7K 35 FAN_SPEED1 29 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 R4960
    42 EC_EN_1.05VALW EC_PME#/GPIO15
    30 0_0402_5%
    27 E51TXD_P80DATA 31 EC_TX/GPIO16 110 EC_ACIN 1 2 H_PROCHOT#_EC
    2 1 @EMC@ MAINPWON 27 E51RXD_P80CLK 32 EC_RX/GPIO17 AC_IN/GPXIOD01 112 EC_ON
    6,10 PMC_CORE_PWROK 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 EC_ON 40 DGPU_AC_DETECT SW_PROCHOT#
    C5 .1U_0402_16V7K ON/OFFBTN#
    34 PWR_SUSP_LED# 36 SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 115 LID_SW# ON/OFFBTN# 34
    NUM_LED#/GPIO1A GPI LID_SW#/GPXIOD04 LID_SW# 34
    116 SUSP#
    2 1 @EMC@ VCIN0_PH SUSP#/GPXIOD05 117 SUSP# 36,39,41,42,43 +1.8VALW_EC
    VGATE @ Q2616B @ Q2616A
    GPXIOD06 118 SW_PROCHOT# VGATE 44
    C6 .1U_0402_16V7K PJT138KA 2N SOT363-6 PJT138KA 2N SOT363-6
    PECI_KB9012/GPXIOD07

    4
    AGND/AGND

    122 SB000016K00 SB000016K00


    10 PBTN_OUT# 123 XCLKI/GPIO5D 124 H_PROCHOT#_EC S
    5 H_PROCHOT#_EC
    R1092 1 2 0_0603_5% 2
    D
    +V18R @
    GND/GND
    GND/GND
    GND/GND
    GND/GND

    2 1 @EMC@ SYSON 10 EC_SLP_S4# XCLKO/GPIO5E V18R G


    1 S D
    GND0

    C7 .1U_0402_16V7K For 9022 +V18R +EC VCCLPC can be

    3
    @ C509 changed to 1 8V if supports 1 8V I/F

    2 1 @EMC@ VGATE 2
    .1U_0402_16V7K 2015/1/9 acer require Vgs= 1.1V
    KB9022QD_LQFP128_14X14
    reserved protect circuit when
    11
    24
    35
    94
    113

    69

    C8 .1U_0402_16V7K Part Number SA000075S30 20mil


    adaptor 107% happen
    ECAGND 1 2 KB 9022 VCC IO2 Power groups 1 2 117 119 123 126 128
    L32
    +3VALW_EC BLM15AG121SN1D_L0402_2P +3VS
    +3VALW_EC
    Board ID PMC_SUSPWRDNACK_R 1 @ 2
    PMC_SUSPWRDNACK 10
    Analog Board ID definition, R489 0_0402_5%
    2

    2
    Please see page 3.
    2

    GPU_ALERT R4917 1 2 10K_0402_5% @


    Ra R503 @ @ R1054 2 @ 1
    GPU_OVERT R4918 1 +1.8VALW
    100K_0402_1% Phase Revision BID0 R696 R697 2 10K_0402_5% 100K_0402_5% R698
    10K_0402_5% 10K_0402_5% 10K_0402_5%
    1

    1
    AD_BID0
    EVT 0.1 01
    1

    VCIN0_PH
    1

    VCIN1_PROCHOT
    R507
    1
    @
    PVT 1.0 02
    Rb 15K_0402_1% C517 Security Classification Compal Secret Data Compal Electronics, Inc.
    .1U_0402_16V7K @EMC@ Issued Date 2015/12/24 2017/12/24 Title
    2 EC_RSMRST# C1156 1 2 22P_0402_50V8J Deciphered Date
    EC ENE KB9012/KB9022
    2

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    For ESD request AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 33 of 52
    A B C D E
    A B C D E

    TOUCH PAD
    +3VALW
    Lid Switch
    +3V_PTP
    UK1 W=20mils (Hall Effect Switch)
    5 1
    IN OUT +3V_PTP
    2 1
    GND
    4 3 CK1 +3VLP
    1 EN OC 4.7U_0603_6.3V6K
    1 CK3 SY6288C20AAC_SOT23-5 2 UG1 1
    U_0402_6.3V6K TP_INT#_EC 2 1 3 LID_SW#
    2 OUT LID_SW# 33
    RK4 10K_0402_5% 2
    VDD 1
    TP_PWR_EN 33 GND
    1
    APX8132AI_TSOT-23-3
    CG2
    .1U_0402_16V7K
    2

    SA00008K800, S IC APX8132AI-TRG SOT-23 3P HALL SENSOR

    3V_PTP +3V_PTP

    RK2 1 @ 2 0_0402_5%
    +3VALW
    TP module Conn. RK3 1 @ 2 0_0402_5%
    +3VS

    2
    JTP1 RK5 RK6
    1
    1 CK2
    TP_CLK
    1 2 .1U_0402_16V7K 4.7K_0402_5% 4.7K_0402_5% LED
    2
    2
    3
    3
    4
    TP_DATA Bat t er y LE D

    1
    4 5 TP_CLK LED1
    RG4
    5 6 I2C5_SDA_TP 9 TP_DATA TP_CLK 33
    1.24K_0402_1%
    6 7 TP_INT#_EC I2C5_SCL_TP 9 TP_DATA 33 BATT_AMB_LED# 1 2 3 A 4
    7 TP_EN TP_INT#_EC 29,33 33 BATT_AMB_LED# +5VALW
    8
    8 TP_EN 33
    9 1 1
    GND 10 @EMC@ @EMC@ BATT_BLUE_LED# 1 2 1 B 2
    2 GND 33 BATT_BLUE_LED# 2
    CK4 CK5
    ACES_51524-00801-001 100P_0402_50V8J 100P_0402_50V8J RG6
    CONN@ 2 2 820_0402_5%
    LTST-C295TBKF-CA_AMBER-BLUE
    SP01001A910

    Power LED
    LED2
    RG11
    1.24K_0402_1%
    PWR_SUSP_LED# 1 2 3 A 4
    33 PWR_SUSP_LED#

    KB Conn. PWR_LED# 1

    RG10
    2 1 B 2
    +5VALW

    820_0402_5%
    LTST-C295TBKF-CA_AMBER-BLUE

    @ RG8
    JKB1
    0_0402_5%
    30 1 2 PWR_LED#
    29 GND2
    GND1

    1
    D
    28 QG2
    ON/OFFBTN# 27 28 2 L2N7002LT1G_SOT23-3
    27 33 PWR_LED_R#
    KSO0 26 G @
    26

    1
    KSO1 25 S

    3
    KSO2 24 25 RG9
    KSO3 23 24 100K_0402_5% @
    KSO4 22 23
    KSO5 21 22 avoid flash issue when

    2
    3 KSO6 20 21 abnormall shutdown 3
    KSO7 19 20
    KSO8 18 19
    KSO9 17 18
    KSO10 16 17
    KSI[0..7] KSO11 15 16
    KSI[0..7] 33 14 15
    KSO12
    KSO[0..17] KSO13 13 14
    KSO[0..17] 33 KSO14 12 13 Follow B5W1A, prevent leakage
    KSO15 11 12
    11
    +3VALW RW5 TPM Reserve +3VALW_TPM
    KSO16 10 0_0603_5%
    KSO17 9 10 1 TPM@ 2 +3VALW_TPM
    KSI0 8 9 UW1 TPM@
    KSI1 7 8 +3VS RW2 +3VS_TPM 1 +3VS_TPM
    7 VSB

    1
    KSI2 6 0_0603_5% 29
    KSI3 5 6 1 @ 2 RW10 30 XOR_OUT/SDA/GPIO0 8
    KSI4 4 5 @ 3 SCL/GPIO1 VDD1 14
    4 10K_0402_5% GPX/GPIO2 VDD2
    TPM_BADD
    10U_0603_6.3V6M

    .1U_0402_16V7K
    CW4

    .1U_0402_16V7K
    CW5

    .1U_0402_16V7K
    CW6

    KSI5 3 1 1 1 1 10K_0402_5%1 @ 2 RW3 6 22


    3 GPIO3/BADD VDD3
    CW3

    KSI6 2
    2

    KSI7 1 2 LPC_CLKRUN# 24 2
    1 10,33 LPC_AD0 21 LAD0/MISO NC1 7
    2 2 2 2 10,33 LPC_AD1 18 LAD1/MOSI NC2 10
    TPM@ TPM@ TPM@ TPM@
    ACES_85201-2805 10,33 LPC_AD2 15 LAD2/SPI_IRQ# NC3 11
    CONN@ 10,33 LPC_AD3 LAD3 NC4 25
    RW9 1 TPM@ 2 LPC_CLK_TPM_R 19 NC5 26
    SP01000GO00 10
    10,33
    LPC_CLK_TPM
    LPC_FRAME# 0_0402_5% 20 LCLK/SCLK NC6 31
    17 LFRAME#/SCS# NC7
    near pin10, 19, 24 10,15,26,27,33 PLT_RST_BUF#
    27 LRESET#/SPI_RST#/SRESET# 9
    BADD SELECTION 10,33 EC_SERIRQ
    13 SERIRQ GND1 16
    ON/OFF BTN +3VALW +3VALW_TPM * 1 AEh(write), AFh(read)
    10 LPC_CLKRUN#
    28 CLKRUN#/GPIO4/SINT#
    LPCPD#
    GND2
    GND3
    23
    RW1 32
    Test only 0_0603_5% 4
    PP
    GND4
    PGND
    33
    1 @ 2 5 12
    TEST Reserved
    10U_0603_6.3V6M

    .1U_0402_16V7K
    CW2

    1 1 @EMC@ @EMC@ NPCT650LA0YX_QFN32_5X5


    RK1 LPC_CLK_TPM
    CW1

    RW4 1 2 33_0402_5% CW7 1 2 22P_0402_50V8J


    2 1
    +3VLP
    SWK1 near pin5
    EVQPLDA15_4P 2 TPM@ 2 TPM@
    1 3 100K_0402_5%
    Security Classification Compal Secret Data Compal Electronics, Inc.
    2 4 ON/OFFBTN# 2015/12/24 2017/12/24 Title
    ON/OFFBTN# 33 Issued Date Deciphered Date
    KB/TP/LED/TPM/Screw Hole

    WWW.AliSaler.Com
    DBG@
    6
    5

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRONICS NC. AND CONTAINS CONF DENTIAL
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE NFORMATION IT CONTA NS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 34 of 52
    A B C D E
    FAN1 Conn
    Screw Hole
    +5VS
    40mil
    RF1 1 @ 2 0_0603_5% +VCC_FAN1
    1 1
    @EMC@ CF2 CF1 H3 H4 H5 H6 H9 H10 H11 FD1 FD2
    1000P_0402_50V7K 4.7U_0603_10V6K H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0
    2 2
    @ @

    1
    1

    1
    FIDUCIAL_C40M80 FIDUCIAL_C40M80

    FD3 FD4
    @ @ @ @ @ @ @

    H13 H14 H15 H26 H27 H28 H29 @ @

    1
    H_3P6 H_3P6 H_3P6 H_4P0 H_4P0 H_3P0 H_3P0
    +3VS FIDUCIAL_C40M80 FIDUCIAL_C40M80

    1
    1

    RF2
    10K_0402_5%
    @ @ @ @ @ @ @
    40mil
    JFAN1
    2

    +VCC_FAN1 1
    FAN_SPEED1 2 1
    33 FAN_SPEED1 FAN_PWM1 3 2
    33 FAN_PWM1 4 3
    1 4
    CF3 5 H23 H25 H12
    1000P_0402_50V7K 6 G1 H_3P3X3P0N H_3P0N H_2P8X2P5N
    @EMC@ G2
    2 ACES_50278-00401-001
    CONN@ @ @ @

    1
    SP02000RR00

    Reset Circuit
    +3VLP

    RG1 1 @ 2 0_0402_5%
    MAINPWON 33,38,40

    2
    RG3 RG2 1 @ 2 0_0402_5%
    EC_RST# 33
    10K_0402_5%

    6
    BI_GATE# 2 G
    D

    BI_GATE PH to +RTCVCC at PWR side S QG1B


    DMN66D0LDW-7_SOT363-6

    1
    3
    BI_GATE
    1
    5
    D

    Vgs= 2V
    G

    38 BI_GATE S C70
    QG1A .1U_0402_16V7K

    4
    DMN66D0LDW-7_SOT363-6 2

    Vgs= 2V

    BI SW
    Reset But t on
    3 SWG1 1

    SWG2

    1 2 BI_GATE BI_S 38
    4 2

    SKPMAME010_2P ATE-2-V TR_4P

    H : 3.8mm

    Release : Bat t er y Of
    Push : Bat t er y ON

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS INC. AND CONTA NS CONFIDENTIAL
    FAN & Screw Hole & Sensor/B
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 35 of 52
    A B C D E

    Rise Time:
    3.3V@330pF = 889.68us
    5.0V@330pF = 1348us
    .1U_0402_16V7K
    VIH=1.2~5.5V C984 @ +5VS_OUT
    3.3V@100k/0.1uF=3.538ms 1 2 1
    3.3V@120k/0.1uF=4.272ms U11 C982
    1 14 JP37JP@ .1U_0402_16V7K
    2 VIN1 VOUT1 13 +5VS_OUT
    +5VALW VIN1 VOUT1 +5VS 2
    R926 1 @ 2 0_0402_5% 5VS_ON 3 12 2 1 C967 JUMP_43X118
    1 2 ON1 CT1 1000P_0402_50V7K
    SUSP# C979 @ +5VALW 4 11
    1 .1U_0402_16V7K VBIAS GND C976 +3VS_OUT 1
    11/25 SWAP @ 2 3VS_ON 5 10 2 1 1000P_0402_50V7K
    ON2 CT2 1
    R927 0_0402_5% JP36JP@ C981
    @ 6 9 +3VS_OUT .1U_0402_16V7K
    VIN2 VOUT2 +3VS
    C980 2 1 +3VALW 7 8
    VIN2 VOUT2 JUMP_43X118 2
    .1U 0402_16V7K 15
    1 2 GPAD
    EM5209VF_DFN14_3X2
    @ .1U_0402_16V7K
    C983

    +1.8VALW +1.8VS +1.5VS +5VALW +1.8VS +1.5VS +0.675VS

    @ Q2614

    1
    AO3413_SOT23-3 R4922

    1
    0_0603_5% @ R4914 @ R4913
    S

    D
    3 1 1 2 100K_0402_5% 470_0603_5% R4923 R4921
    470_0603_5% 470_0603_5%
    1 1 @ @
    +1.8VS_R

    2
    G
    2

    2
    @ C2 @ C1 SUSP +1.5VS_R +0.675VS_R
    41 SUSP
    0.1U_0402_16V7K 0.01U_0402_16V7K

    6
    2 2

    1
    D D
    5 2 SUSP SUSP 2 Q2615 SUSP 2 Q2516
    1.8VS_ON 33,39,41,42,43 SUSP#
    SUSP 2 @ 1 G L2N7002LT1G_SOT23-3 G L2N7002LT1G_SOT23-3

    1
    R25 1K_0402_5% @ @ Q2515A S @ S @

    3
    R4912 Q2515B DMN66D0LDW-7_SOT363-6
    10K_0402_5%
    2 EC_SUSP
    Vgs= 2V Vgs= 2V 2
    2 @ 1 DMN66D0LDW-7_SOT363-6
    33 EC_SUSP

    2
    R28 1K_0402_5%
    Vgs= 2V

    +3VS to +3VSDGPU_AON for GPU +3VS +3VSDGPU_AON


    U2616

    +3VSDGPU_AON 1 7 +3VSDGPU_AON
    2 VIN VOUT 8
    +3VS VIN VOUT
    U2615 DGPU_PWR_EN 3 6 1 2 C977
    5 1
    100mil(1.5A) ON CT 1000P_0402_50V7K
    IN OUT @
    2 2 +5VALW 4
    GND VBIAS 5
    DGPU_PWR_EN 4 3 C2725 GND 9
    EN OC VGA@ GND
    2 1 4.7U_0603_6.3V6K
    C2724 SY6288C20AAC_SOT23-5 +5VALW +1.05VSDGPU
    4.7U_0603_6.3V6K 1.8V from SOC VGA@ AOZ1336_DFN8_2X2
    VGA@ @

    2
    1
    R4916 R574
    100K_0402_5% 47_0603_5%
    VGA@ VGA@

    1
    VGA_PWROK# +1.05VSDGPU_R

    6
    3 3

    +3VS to +3VSDGPU_MAIN for GC6-2.0 VGA_PWROK 5 2 VGA_PWROK#


    15,29,48,49 VGA_PWROK
    Q2008A
    +3VS +3VSDGPU_AON R2633 +3VSDGPU_MAIN Q2008B DMN66D0LDW-7_SOT363-6

    1
    +3VSDGPU_MAIN 0_0603_5% DMN66D0LDW-7_SOT363-6 VGA@
    U14 1 2 VGA@
    5 1
    IN OUT NGC6@
    2
    100mil(1.5A)
    GND 2

    2 4
    EN OC
    3 C625 V0.2 modify Vgs= 2V
    C624 GC6@
    GC6@ SY6288C20AAC_SOT23-5 1 4.7U_0603_6.3V6K Vgs= 2V
    1U_0402_6.3V6K GC6@
    1 +5VALW +1.5VSDGPU
    2

    @
    3VSDGPU_MAIN_EN 15,49
    R1007 R571
    3VSDGPU MAIN EN From GPU 100K_0402_5% 47_0603_5%
    @
    1

    +5VALW +VGA_CORE 1.5VS_DGPU_PWR_EN# +1.5VSDGPU_R


    3

    6
    2

    R4911 R4910
    100K_0402_5% 47_0603_5% 1.5VS_DGPU_PWR_EN 5 2 1.5VS_DGPU_PWR_EN#
    15,47 1.5VS_DGPU_PWR_EN
    @ @ Q2513A
    2

    @ Q2513B DMN66D0LDW-7_SOT363-6
    1

    DGPU_PWR_EN# +VGA_CORE_R R1005 DMN66D0LDW-7_SOT363-6 @


    100K_0402_5% @

    SB000016K00 SB000016K00
    1

    @ Q2007A @ Q2007B
    Vgs= 2V
    3

    PJT138KA 2N SOT363-6 PJT138KA 2N SOT363-6


    5 S
    2 DGPU_PWR_EN#
    D
    G
    10 DGPU_PWR_EN G
    S D

    1.8V from SOC


    4

    6
    2

    R4909 Security Classification Compal Secret Data Compal Electronics, Inc.


    100K_0402_5% 2015/12/24 2017/12/24 Title
    Issued Date

    WWW.AliSaler.Com
    @ Deciphered Date
    Vgs= 1.1V DC INTERFACE
    1

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 36 of 52
    A B C D E
    A B C D

    +19V_VIN
    @ PJP101
    ACES_50305-00441-001_4P
    +19V_ADPIN 5A_Z120_25M_0805_2P
    +19V_ADPIN 1 2
    1
    2 EMI@ PL101
    3
    4
    GND
    GND

    1
    EMI@ PC102
    100P 0603_50V8 EMI@ PC103

    2
    1000P_0603_50V7K

    2
    2 2
    @ PR101
    0_0402_5%
    1 2
    +3VLP +CHGRTC

    - PBJ101 @ + PR102
    560_0603_5%
    PR103
    560_0603_5%
    2 1 1 2 1 2 +RTCBATT

    ML1220T13RE

    3 3

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    DCIN / RTC
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Custom
    B5V1L_Braswell-M/B_LA-D921P 1.0

    Date Wednesday May 11 2016 Sheet 37 of 54


    A B C D
    A B C D

    +3VLP
    PR208 100_0402_1%
    1 2
    EC_SMB_DA1 33,39
    PR210 100_0402_1%
    1 2
    EC_SMB_CK1 33,39

    1
    @ PC202
    0.1U_0603_25V7K

    1
    @ PJP201 PR211 @ PR204 @ PR205
    1 6.49K_0402_1% 10K_0402_1% 10K_0402_1%
    1 2 1 2

    2
    2 3 +3VLP

    1
    EC_SMB_DA1-1 @ PU201
    3 4 EC_SMB_CK1-1 @ PR206 1 8
    4 5 BAT _TS 1 2 100K_0402_1% VCC TMSNS1
    5 6 BATT_B/I PR209
    BATT TEMP 33 2 7 2 1
    6 7 1K_0402_1% GND RHYST1

    2
    7 8 MAINPWON 3 6 @ PR207
    8 9 33,35,40 MAINPWON OT1 TMSNS2

    1
    +RTCVCC 47K_0402_1%
    GND 10 4 5
    GND OT2 RHYST2 @ PH201
    CVILU_CI9908M2HR0-NH G718TM1U_SOT23-8 100K_0402_1%_NCP15WF104F03RC

    2
    PR212
    100K_0402_5% Close to fan

    1
    D
    2 PQ201
    35 BI_GA E G BSS138LT1G_SOT23-3
    S

    3
    +17.4V BATT+ 5A_Z120_25M_0805_2P
    1 2

    EMI@ PL202
    1 2 BI_S 35
    +17.4V BATT

    2
    EMI@ PL201 @ PR217
    EMI@ 0_0402_1%
    1

    1
    2
    5A_Z120_25M_0805_2P @EMI@ For KB9022 Need confirm the setting 2

    PC201 PC204
    OTP

    1
    1000P_0603_50V7K 0.01U_0603_50V7K
    2

    2
    For KB9022
    sense 20mΩ Active Recovery PR202
    92℃ 1.0V
    65W 0.61V(58.5W) 0.47V(45W) 19.1KΩ
    56℃ 2.0V
    45W 0.61V(58.5W) 0.47V(45W) 10KΩ
    PR216 16.9K ohm

    +EC_VCCA
    PR202=PW/19*20*0.02*PR202(10K+PR202)
    ADP I 33,39
    3 3

    1
    PR216
    16.9K_0402_1% PR202
    19.1K_0402_1%

    2
    33 VCIN0_PH

    +19VB 5V
    VCIN1 PROCHOT 33

    1
    PH202
    1

    @ PR230 100K_0402_1%_NCP15WF104F03RC
    80.6K_0402_1%

    COMMON PART

    2
    @ PR231
    2

    0_0402_5%
    1 2 @
    VCIN1 BATT DROP 33 T280
    @

    1
    T281
    2

    @ PC203
    1

    PR203
    0.1U_0402_25V6 @ PR229 10K_0402_1%
    1

    Close to CPU

    2
    10K_0402_1%
    2

    4 4

    33 ECAGND

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 T tle
    BATTERY CONN / OTP

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPR ETARY PROPERTY OF COMPAL ELECTRON CS, INC. AND CONTAINS CONF DENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTA NS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L Braswell-M/B LA-D921P
    Date Wednesday May 11 2016 Sheet 38 of 54
    A B C D
    A B C D

    Protection for reverse input

    Vgs = 20V

    1
    PQ301 D
    2
    Vds = 60V +19VB
    G Id = 250mA
    S 2N7002KW _SOT323-3

    3
    PR302
    PR301 max Power loss 0.22W for 90W;0.12W for 65W system
    1 2 1 2 Rds(on) typ = 15.8mohm max Rds(on) = 15.8mohm max
    CSR rating: 1W
    1M_0402_5% 3M_0402_5%
    Vgs = 20V VACP-VACN spec < 80.64mV Vgs = 20V
    Need check the SOA for inrush Vds = 30V Vds = 30V
    ID = 10.5A (Ta=70C) @ PJ301 ID = 10.5A (Ta=70C)
    +19V_VIN MDU1512RH_POW ERDFN56-8-5 JUMP_43X79
    +19V_P1 +19V_P2 1 2
    1 1 PR303 1 2 +19VB_CHG
    2 2 0.02_1206_1% 1
    5 3 3 5 1 4 1 2 2
    Isat: 4A DCR: 27mohm 5 3

    2200P_0402_25V7K
    10U_0805_25V6K

    10U_0805_25V6K
    2 3 EMI agree reserved
    2200P_0402_50V7K

    0.1U_0402_25V6
    0.1U_0402_25V6
    PQ302 @EMI@ PL301
    4

    @EMI@ PC306
    1

    1
    PC303

    PC304

    EMI@ PC305
    0_0402_5% PQ303 1UH_2.8A_30%_4X4X2_F

    0.01U_0402_50V7K
    PC301

    @ PR304

    4
    1

    1
    AON7506_DFN33-8-5 +19V_VIN PQ304

    PC302

    PC307
    AON7506_DFN33-8-5

    2
    2

    VF = 0.5V
    2

    2
    3

    2
    PD301
    ACDRV_CHG_R
    BAS40CW _SOT323-3

    0.1U_0402_25V6
    BATDRV_CHG 1 2BATDRV_CHG_R

    0.1U_0402_25V6

    1
    1
    PC308
    PR305

    PC310

    1 1
    1 2

    10_1206_1%
    PC311 4.12K_0603_1%
    0.047U_0402_25V7K

    PR306
    2
    PC309 1 2 BST_CHG_R
    0.1U_0402_25V6 VF = 0.37V

    5
    2.2_0603_5%
    PR307
    PD302 PQ305
    COMMON PART

    2
    RB751V-40_SOD323-2 AON7506_DFN33-8-5
    PR308

    ACP_CHG
    0_0603_5% 7X7X3

    VCC_CHG

    2
    UG_CHG 1 2UG_CHG_R
    4
    2
    Isat: 3.8A Power loss: 0.32W for 3.5A 2
    4.12K_0603_1%

    4.12K_0603_1%

    CSR rating: 1W
    1

    REGN_CHG
    PC312 +17.4V_BATT

    BST_CHG
    PR309

    PR310

    VSRP-VSRN spec < 81.28mV

    UG_CHG
    1 2 PL302

    LX_CHG
    4.7UH_3.5A_20%_7X7X3_M PR311

    3
    2
    1
    1U_0603_25V6K 1 2 0.01_1206_1%

    ACN_CHG
    LX_CHG 1 2 CHG 1 4
    2

    PC313

    SRN_CHG_R
    SRP_CHG_R
    5

    @EMI@ PR312
    1U_0603_25V6K 2 3

    4.7_1206_5%
    20

    19

    18

    17

    16
    PU301

    AON7506_DFN33-8-5

    1
    VCC

    PHASE

    HIDRV

    BTST

    REGN

    10U_0805_25V6K

    10U_0805_25V6K
    21
    PAD

    0.1U_0402_25V6

    0.1U_0402_25V6

    PC314

    PC315
    1

    1
    1 15 LG_CHG 4
    ACN LODRV

    PQ306

    PC316

    PC317
    2

    2
    2 4

    680P_0402_50V7K
    ACP GND

    @EMI@ PC319
    PR313

    3
    2
    1

    2
    1
    BQ24735RGRR_QFN20_3P5X3P5 10_0603_1%
    CMSRC_CHG 3 13 SRP_CHG 2 SRP_CHG_R
    CMSRC SRP

    1
    PR3 4

    2
    6 8_0603_1%
    ACDRV_CHG 4 12 SRN_CHG
    1 2 SRN_CHG_R

    2
    ACDRV SRN PC318
    0 U_0603_16V7K
    For 4S per cell 4.35V battery 1 2 5 11 BATDRV_CHG
    +3VLP ACOK BATDRV
    PR315 100K_0402_1%
    ACDET

    IOUT

    SDA

    SCL

    ILIM
    ACDET_CHG 1 2
    PR321 +3VLP
    10,33 ACIN
    316K_0402_1%
    6

    10
    1

    3 3
    +3VALW
    PR328 ILIM_CHG 1 2
    2M_0402_1% @ PR316

    100K_0402_1%
    316K_0402_1%

    0.01U_0402_25V7K
    ACDET_CHG

    1
    IOUT_CHG

    PC320
    PR317
    2

    1
    PR318
    422K_0402_1%
    1

    1 2
    +19V_VIN

    2
    @ PR329
    2

    0_0402_5%

    PR329(PVT R short)
    1 2

    PQ307
    PR330 LTC015EUBFS8TL_UMT3F
    33 BATT_4S
    100K_0402_1%
    0.22U_0402_16V7K

    66.5K_0402_1%

    1 2 2
    EC_SMB_CK1 33,38
    100P_0402_50V8J
    1

    1
    PC321

    1
    PC322
    PR319
    3

    EC_SMB_DA1 33,38
    1

    PQ308 D @ PR320
    2

    2 0_0402_5%
    33,36,4 ,42,43 SUSP#
    2

    G
    1 2
    S 2N7002KW _SOT323-3 ADP_I 33,38
    3

    @ PC323
    100P_0402_50V8J
    2

    Vin Dectector
    4
    Close EC chip 4

    Min. Typ Max.


    L-->H 17.16V 17.63V 18.12V
    H-->L 16.76V 17.22V 17.70V
    VILIM = 20*ILIM*Rsr
    ILIM = 3.3*100/(100+316)/20/0.01
    = 3.966 A Security Classification Compal Secret Data Compal Electronics, Inc.
    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title
    ILIM*0.01*20(IC Current sense amplifier gain)= Charger
    VPR311*20=+3VALW*100(PR317)/(100+316) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, NC. AND CONTA NS CONFIDENTIAL
    Size Document Number R ev
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L Braswell-M/B LA-D921P
    Date W ednesday, May 11, 2016 Sheet 39 of 54
    A B C D
    A B C D E

    Module model information


    SY8208B_V2.mdd
    SY8208C_V2.mdd

    1 1

    PR402
    499K_0402_1%
    ENLDO_3V5V 1 2
    PU401 +19VB
    SY8286BRAC_QFN20_3X3

    1
    +19VB_5V BST_3V1

    150K_0402_1%
    2 1 2 PC403

    PR404
    @ PR401 0.1U_0402_25V6

    2200P_0402_50V7K
    0_0603_5%

    1
    5*5*3

    2
    10U_0805_25V6K
    @EMI@ PC401

    EMI@ PC404
    0.1U_0402_25V6

    BS
    IN

    IN

    IN

    IN
    1

    1
    LX_3V 6

    PC405
    20 PL402
    LX LX
    2

    2
    7 19 LX_3V 1 2
    GND LX +3VALWP

    @EMI@ PR405
    8 18 1.5UH_PCMB053T-1R5MS_6A_20%
    GND GND

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    4.7_1206_5%

    1
    9 17
    PG LDO +3VLP

    PC407

    PC408

    PC409

    PC410
    COMMON PART

    1
    10 16

    2
    NC NC PC411

    OUT
    EN2

    EN1
    21

    NC
    FF
    4.7U_0603_6.3V6M

    2
    GND

    1 3V_SN 2
    PR412

    12

    13

    14

    15

    680P_0603_50V7K
    1
    100K_0402_5% 3.3V LDO 150mA~300mA

    @EMI@ PC412
    1 2
    2 +3VALWP 2

    ENLDO_3V5V
    Vout is 3.234V~3.366V Ipeak=7A
    Imax=4.9A

    2
    33 SPOK Iocp=10A
    Check pull up resistor of
    SPOK at HW side @ PJ401
    PC402 PR403 +3VALWP 1 2 +3VALW
    1000P_0402_25V8J 1K_0402_5% 1 2
    33 3V_EN 3V_FB 1 2 2 JUMP_43X118

    +19VB EMI agree reserved @ PJ402


    5A_Z120_25M_0805_2P +19VB 5V +5VALWP 1 2 +5VALW
    1 2
    1 2 +19VB_5V BST_5V 1 2 1 2 PC416 JUMP_43X118
    0.1U 0402_25V6
    2200P_0402_50V7K
    10U_0805_25V6K

    10U_0805_25V6K

    0.1U_0402_25V6

    @EMI@ PL403 PU402 SY8286CRAC_QFN20_3X3 @ PR407


    0_0603_5%
    @ PJ404
    1

    1
    PC414

    PC415

    EMI@ PC417

    @EMI@ PC418

    JUMP_43X79
    1 2 5*5*3
    BS
    IN

    IN

    IN

    IN

    1 2
    2

    LX_5V 6 20
    LX LX PL404
    @ 7 19 LX_5V 2
    GND LX +5VALWP
    3 8 18 1.5UH_PCMB053T-1R5MS 6A_20% 3
    GND GND

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    680P_0603_50V7K 4.7_1206_5%
    PR408
    PC419

    1
    @EMI@
    SPOK 1 2 9 17 1 2
    PG VCC

    PC420

    PC421

    PC422

    PC423

    @ PC428

    @ PC427
    @ PR413 10 16
    COMMON PART

    2
    NC NC 4.7U_0603_6.3V6M

    1 5V_SN
    0_0402_5%
    OUT

    LDO

    2
    EN2

    EN1

    21
    FF

    GND
    11

    12

    13

    14

    15

    PC425
    VL

    @EMI@

    2
    Vout is 4.998V~5.202V
    ENLDO_3V5V

    5V LDO 150mA~300mA
    1
    5V_EN

    PC424
    4.7U_0603_6.3V6M

    Ipeak=7A
    PR409 Imax=4.9A
    2

    2.2K_0402_5%
    1 2 Iocp=10A
    33 EC_ON @ PR410
    0_0402_5%
    1 2
    33,35,38 MAINPWON
    PC413 PR406
    5V_EN 1000P_0402_25V8J 1K_0402_5%
    5V_FB 1 2 1 2
    1M_0402_1%

    4.7U_0402_6.3V6M
    1

    EC VDD0 is +3VL, PC426 UNPOP


    1
    PR411

    PC426

    EC VDD0 is +3VALW, PC426 POP


    2
    2

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title
    3VALW/5VALW

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAW NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY TH RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, NC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 40 of 54
    A B C D E
    5 4 3 2 1

    D D

    Pin19 need pull separate from +1.35VP.


    EMI agree reserved If you have +1.35V and +0.675V sequence question, 0.675Volt +/- 5%
    EMI@ PL501 you can change from +1.35VP to +1.35VS. TDC 0.84A
    5A_Z120_25M_0805_2P
    +19VB 1 2 +19VB_ .35V PR501 Peak Current 1.2A
    2.2_0603_5%
    BST_1.35V_R 1 2 BST_1.35V
    +1.35VP

    2200P_0402_50V7K

    10U_0805_25V6K

    10U_0805_25V6K
    0.1U_0402_25V6
    @ PJ504 1

    1
    JUMP_43X79
    1 2 @EMI@ PC502 UG_1.35V +0.675VSP

    EMI@ PC503

    PC504

    PC505
    1 2
    2

    1
    PC501 LX_1.35V

    10U_0805_6.3V6K

    10U_0805_6.3V6K
    0.1U_0603_25V7K

    1
    PC506

    PC507
    16

    17

    18

    19

    20
    5
    PU501
    C PQ50 C

    VLDOIN
    PHASE

    UGATE

    BOOT

    VTT

    2
    21
    PAD
    7*7*3 LG_1.35V 15 1
    4 LGATE VTTGND
    COMMON PART 14
    PGND VTTSNS
    2
    PR502
    +1.35VP PL502 AON7408L_DFN8-5 9.1K_0402_1%

    1
    2
    3
    1UH_PCMC063T-1R0MN_11A_20% 1 2 CS_1.35V 13 3
    1 2 PC508 CS RT8207KGQW _W QFN20_3X3 GND
    1U_0603_10V6K
    PC516

    PC517

    PC518

    PC519

    PC520

    PC521

    +5VALW
    1

    1 2 12 4 VTTREF_1.35V
    2 1 VDDP VTTREF
    1 1 1 1 1 1

    5
    @EMI@ PR503 PR504 PR511

    1
    4.7_1206_5% PQ502 5.1_0603_5% 2.2_0402_5% 11 5
    VDD_1.35V VDD VDDQ
    +1.35VP

    PGOOD
    1 2 PC510
    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    1 2

    2 2 2 2 2 2 +5VALW 0.033U_0402_16V7K

    TON

    2
    FB
    S5

    S3
    1
    @EMI@ PC512 4
    680P_0402_50V7K PC513
    2

    10

    6
    1U_0603_10V6K PR505

    2
    1 2
    SI7716ADN-T1-GE3_POW ERPAK8-5 +1.35VP 100K_0402_ %
    1
    2
    3

    S3_0.675VSP

    FB_1.35V
    S5_1.35V
    PR506

    TON_1.35V
    8.2K_0402_1%
    6 DDR_PW ROK 2 1 +1.35VP
    PR507
    B 470K_0402_1% B
    +19VB 1 2 Output 1.35*1.01 more 1%

    1
    @ PR509 PR508
    0_0402_5% 10K_0402_1%
    1 2
    29,33 SYSON

    2
    順
    順 +19VB_1.35V-->+19V
    B

    1
    @ PC514
    0.1U_0402_16V7K

    2
    @ PR510
    0_0402_5%

    1 2 @ PJ501
    Mode Level +0.675VSP VTTREF_1.35V 33,36,39,42,43 SUSP# +1.35VP 1 2 +1.35V
    1 2
    S5 L off off

    1
    JUMP_43X118

    1
    S3 L off on D
    @ PC515
    S0 H on on 2 0.1U_0402_16V7K

    2
    36 SUSP G

    Note: S3 - sleep ; S5 - power off @ PQ503 S

    3
    2N7002KW _SOT323-3 @ PJ503
    1 2
    +0.675VSP 1 2 +0.675VS
    A
    JUMP_43X39 A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    1.35VP/0.675VSP
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date W ednesday May 11 2016 Sheet 41 of 54
    5 4 3 2 1
    A B C D

    PU601
    Function Field : RT5041AGQW _W QFN28_4X4
    +3VALW
    17 20
    Regulator 35.5 IN_3P3A IN_1P05A +3VALW

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M
    2.2U_0603_6.3V6K
    +3V SOCP 21
    Support 35.6 IN_1P05A

    1
    +3V_SOCP 18 3.2*2.5*1.2

    PC601

    PC632

    PC633

    PC634
    2.2U_0603_6.3V6K
    O_3P3A

    1
    Output Current : 4.4A

    PC603
    2

    2
    Frequency : 1.2MHz
    +1.8VALW PMICP +1.05VALWP Current limit : 5A
    PL601

    2
    0.47UH +-30% MLV-FY12NR47N-O1L 3.7A
    22 LX_1P05A 1 2
    14 LX_1P05A
    SWIN_1P8A 23

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    2.2U_0603_6.3V6K
    +1.8VALWP LX_1P05A

    1
    16

    PC604

    PC624

    PC625

    PC626

    PC627

    PC628

    PC629

    PC630

    PC631
    2.2U_0603_6.3V6K
    SWO_1P8A @ PR605

    1
    0_0402_5%

    PC602
    2

    2
    19 +1.05VALW _SENSE 1 2
    O_1P05A @ @

    2
    9
    IN_1P5S

    22U_0603_6.3V6M
    +1.5VSP 26 EC_EN_1.05VALW _R 1 2

    22U_0603_6.3V6M
    EN_1P05A EC_EN_1.05VALW 33

    1
    10

    PC605
    O_1P5S @ PR608

    1
    0_0402_5%

    PC606
    2

    2
    1.5V
    Output Current : 0.1A 1
    Current limit : 0.2A
    7 IN_1P8 +3VALW

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    10U_0603_6.3V6M
    IN_1P24A 2

    10U_0603_6.3V6M
    +1.24VALWP IN_1P8

    1
    PC621

    PC622

    PC623
    1
    5
    PC607

    10U_0603_6.3V6M
    1.24V O_1P24A

    2
    1
    Output Current : 0.9A

    PC608
    +1.8VALW PMICP
    2

    Current limit : 1.4A


    PL602
    1uH_MLV-FY12N1R0M-O1L

    2
    27 LX_1P8 1 2 Output Current : 4.1A
    2
    LX_1P8 Frequency : 1.2MHz 2
    Current limit : 5A
    1.15V 8 28

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    Output Current : 2.2A IN_1P15A LX_1P8
    10U_0603_6.3V6M

    10U_0603_6.3V6M

    +1.15VLAWP

    1
    Current limit : 3.2A

    PC615

    PC616

    PC617

    PC618

    PC619

    PC620
    1

    6 @ PR604
    PC609

    @ PC610

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    O_1P15A 0_0402_5%

    2
    1

    3 +1.8VALW _SENSE 1 2
    @ PC611

    PC612

    PC613
    2

    O_1P8 @ @
    2

    1 2 @ PJ607
    +1.8VALW PMICP PR606 100K_0402_1% JUMP_43X118
    25 1 2
    2 1 SLP_S0iX_B +1.8VALW PMICP 1 2 +1.8VALW
    PR603
    1 @ 2 PC635 .1U_0402_16V7K
    10 PMC_SLP_S0#
    PR607 0_0402_5% SUSP# 4 11 1 2 @
    33,36,39,41,43 SUSP# SLP_S3_B VCC +5VALW PJ601
    1 2
    24 12 2.2_0402_1% +1.8VALWP 1 2 +1.8VALW

    1U_0402_10V6K
    33 EC_SUSPWRDNACK SUSPWRDNACK GND

    1
    1 2

    PC614
    JUMP_43X39

    PGND_EX
    PR601 100K_0402_1%
    13 15 @ PJ602

    2
    33 MOIC_PG RSMRST PGND JUMP_43X118
    1 2
    +1.05VALWP 1 2 +1.05VALW
    1

    SLP_S0iX_B PR602

    29
    100K_0402_1%
    SA00007ZX00
    When SLP_S0iX_B = High, LDO_V1P15A_VOUT = 1.15V. @
    When SLP_S0iX_B = Low, LDO_V1P15A_VOUT = 0.75V. PJ603
    2

    3 1 2 3
    +1.15VLAWP 1 2 +1.15VALW
    EC_SLP_S3#_1P8
    Enable Signal for V1P5S LDO. JUMP_43X39
    +3VALW
    SUSPWRDNACK @
    PJ604
    HIGH:Disable Signal for All Power Rails. 1 2
    +1.24VALWP 1 2 +1.24VALW
    JUMP_43X39
    @
    PJ605
    1 2
    +3V SOCP 1 2 +3V SOC
    JUMP_43X39

    @
    PJ606
    1 2
    +1.5VSP 1 2 +1.5VS
    JUMP_43X39

    4 4

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PWR-MOIC SYSTEM
    Size Document Number Rev

    WWW.AliSaler.Com
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A3 B5V1L_Braswell-M/B_LA-D921P 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date W ednesday, May 11, 2016 Sheet 42 of 54
    A B C D
    A B C D E

    schematic from A4WAS


    IC change to G971

    1 1

    +3VALW

    1
    +3VALW
    @ PJ701

    1
    JUMP_ 3X79

    2
    2

    1
    PC702
    VIN_1.5VP @ PJ702
    1U_0 02_6.3V6K JUMP_ 3X79

    2
    1
    PC701 1 2
    +1.5VSP LDO 1 2 +1.5VS
    .7U_0603_6.3V6K
    2

    6
    PU701
    5 VIN_1.5VP

    VPP
    7 VIN
    2 2
    POK 9
    TPAD
    3
    VO
    1 2 EN_1.5VP 8 4
    33,36,39, 1, 2 SUSP# VEN VO +1.5VSP LDO

    GND

    0.01U_0 02_25V7K
    1
    @ PR702 2

    1
    0_0 02_5% ADJ PR70

    PC70
    PR703 @ PC703 G971ADJF 1U_SO8 20K_0 02_1%
    Rup

    1
    1M_0 02_1% 0.1U_0 02_16V7K

    2
    2

    1
    FB_1.5VS PC705

    2
    22U_0603_6.3V6M

    2
    1
    PR705
    22.6K_0 02_1%
    Rdown

    2
    Vout=0 8V* (1+Rup/Rdown)
    Vout=0.8V* (1+(12.7/10)) = 1.816V
    Vout=0.8V* (1+(20/22.6)) = 1.507V

    3 3

    Security Classification
    2015/12/24
    Compal Secret Data
    2017/12/24 Title
    Compal Electronics, Inc
    Issued Date Deciphered Date
    THIS SHEET OF ENGINEERING DRAWING S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, NC. AND CONTAINS CONFIDENTIAL
    +1.5VSP
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV SION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTA NS C 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date: Wednesday, May 11, 2016 Sheet 3 of 5
    A B C D E
    5 3 2 1

    +1.05VALW

    1
    200_0402_1%

    200_0402_1%

    301_0402_1%
    D D

    1
    PC8102

    PR8102

    PR8103

    PR8104
    0.1U_0402_25V6

    2
    2

    2
    PR8105
    20_0402_1%
    10,45 VR_SVID_DATA 1 2

    PR8106 +19VB_VCC
    49.9_0402_1%
    10,45 VR_SVID_ALERT# 1 2

    PR8107
    200_0402_1%
    10,45 VR_SVID_CLK 1 2

    +1.8VALW VGATE 33 @ PJ801


    JUMP_43X79
    PR8108 1 2
    1 2
    1

    10K_0402_1%
    @ PR8101 1 2
    56.2_0402_1% +1.8VALW
    1 2
    +19VB

    ALERT_VCC
    SCLK_VCC

    10U_0805_25V6K

    10U_0805_25V6K
    10U_0805_25V6K
    SDIO_VCC
    2

    2200P_0402_50V7K
    0.1U_0402_25V6
    33,45 VR_HOT# EMI@ PL8102

    @EMI@ PC8106

    EMI@ PC8107
    5A_Z120_25M_0805_2P

    1
    1

    1
    PC8103

    PC8105
    PC8104
    C PR8110 C
    1

    VRMP_VCC
    @ PC8101 @ PR8109 1K 0402_1%
    47P_0402_50V8J 45 VGG_PWRGD 1 2 ENABLE_VCC 2 +19VB_VCC

    2
    2

    2
    2

    0_0402_5%
    PC8 08 PR8111 @
    PU8101 0.01U_0402_25V7K 0_0603_5%

    2
    1
    2
    3
    4
    5
    6
    7
    NCP81201MNTXG_QFN28_4X4 1 2UG_VCC_R
    ENABLE
    VR_HOT
    SDIO
    ALERT
    SCLK
    VR_RDY
    VRMP
    +SOC_VCC

    4
    PR8112 29 PR8113 PC8109 PQ8101
    2.2_0603_5% AGND 2.2_0603_5% 0 22U_0603_25V7K
    0.36uH (DCR 1.4)7*7*4

    G1

    D1

    D1

    D1
    1 2 VCC_VCC 28 8 BST_VCC 1 2 BST_VCC_R 1 2
    +5VALW VSP_VCC 27 VCC
    VSP
    BST
    HG
    9 UG_VCC PL8101
    1

    VSN_VCC 26 10 LX_VCC 9 10 LX_VCC 1 4


    PC8110 DIFFOUT_VCC 25 VSN SW 11 D2/S1 D1
    1U_0603_10V6K FB_VCC 24 DIFFOUT PGND 12 LG_VCC SWN1_VCC 2 3CSN1_VCC
    2

    FB LG

    1
    COMP_VCC TSNS_VCC

    100K_0402_1%_TSM0B104F4251RZ
    23 13

    G2

    S2

    S2

    S2
    ROSC_VCC 22 COMP TSENSE 14 VBOOT/ADDR_VCC
    ROSC VBOOT/ADDR
    1

    @ PR8115 AON7934_DFN3X3A8-10 @EMI@ PR8114 0.36UH_PCMB063T-R36MS_24A_20%


    CSCOMP

    5
    1
    0_0402_5% PR8116 4.7_1206_5%
    CSSUM

    Close to MOSFET
    CSREF

    1
    PVCC

    1 2 16.2K_0402_1% @ PR8117
    IMAX
    IOUT

    10 VCC_SENSE

    SNUB_VCC_1 2
    ILIM

    1
    0_0402_5% PR8119 PR8120

    PH8101
    78.7K_0603_1% 10_0402_5%
    2

    PC8111 PR8118
    21
    20
    19
    18
    17
    16
    15

    2
    1

    PC8112 .01U_0402_16V7K 13K_0402_1%

    2
    1000P_0402_50V7K

    2
    IMAX_VCC
    CSSUM_VCC
    CSREF_VCC
    CSCOMP_VCC

    +5VALW
    ILIM_VCC
    2

    CSSUM_VCC

    CSREF_VCC
    @ PR8121
    B 0_0402_5% @ B

    1
    10 VSS_SENSE 1 2 1 2
    PR8122
    0_0402_5% @EMI@ PC8113
    680P_0603_50V7K

    2
    @ PC8114
    2200P_0402_50V7K
    1

    1 2
    PC8115 PR8123
    1000P_0402_50V7K 165K_0402_1%
    2

    PR8124 2 1
    1

    49.9_0402_1% PC8116

    75K_0402_1%

    47P_0402_50V8J
    1 2 1 2 PC8117 2.2U_0603_10V6K
    2

    1
    470P_0402_50V7K PR8125

    1
    PR8126

    PC8119
    PR8127 31.6K_0402_1% PH8102
    1K_0402_1% 220K_0402_5%_ERTJ0EV224J
    2

    1 2 PC8118
    Close to choke

    2
    PR8128 @

    2
    6.04K_0402_1% 1200PF_0402_50V7K
    1

    ILIM_VCC 1 2 CSCOMP_VCC
    1

    FB_VCC 1 2 PC8121 PC8120 PR8129


    100P_0402_50V8J
    PC8122 PR8130 470P_0402_50V7K
    Close to IC side
    27.4K_0402_1%
    2

    1.3K_0402_1%
    2

    1 2 1 2
    0.015U_0402_25V7K

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 T tle
    +SOC_VCC

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    B5V1L_Braswell-M/B_LA-D921P 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date Monday April 25 2016 Sheet 44 of 54
    5 3 2 1
    5 3 2 1

    +1.05VALW

    200_0402_1%

    301_0402_1%
    D D
    0.1U_0402_25V6

    1
    PC8202

    PR8202

    PR8203

    2
    2

    2
    PR8204
    20_0402_1%
    10,44 VR_SVID_DATA 1 2

    PR8205
    49.9_0402_1%
    1 2
    10,44 VR_SVID_ALERT# +19VB_VGG
    PR8206
    200_0402_1%
    10,44 VR_SVID_CLK 1 2
    @ PJ8201
    +1.8VALW JUMP_43X79
    VGG_PWRGD 44 1 2
    1 2
    PR8207
    1

    10K_0402_1%
    @ PR8201 1 2
    56.2_0402_1% +1.8VALW
    +19VB_VGG 1 2
    +19VB

    10U_0805_25V6K

    10U_0805_25V6K

    10U_0805_25V6K

    2200P_0402_50V7K
    2

    0.1U_0402_25V6
    33,44 VR_HOT# 1 EMI@ PL8202

    @EMI@ PC8207
    5A_Z120_25M_0805_2P

    EMI@ PC8208
    ALERT_VGG

    1
    SCLK_VGG
    +

    PC8204

    PC8205

    PC8206
    SDIO_VGG
    C PR8209 C

    VRMP_VGG
    1

    @ PC8201 @ PR8208 0_0402_5% 1K 0402_1%


    47P_0402_50V8J 33 VR_ON 1 2ENABLE_VGG 2 +19VB_VGG PR8210 @ PC8203

    2
    0_0603_5% 2 33U_25V_M
    2

    1 2UG_VGG_R @
    PC8209 Height 4.5 mm
    0.01U_0402_25V7K

    2
    1
    2
    3
    4
    5
    6
    7
    PU8201
    NCP81201MNTXG_QFN28_4X4 ENABLE
    VR_HOT
    SDIO
    ALERT
    SCLK
    VR_RDY
    VRMP
    0.22uH (DCR 0.97 )7*7*4 +SOC_VGG

    4
    PR8211 29 PR8212 PC8210
    2.2_0603_5% AGND 2.2_0603_5% 0 22U_0603_25V7K 0.22UH_PCMB063T-R22MS_23A_20%

    G1

    D1

    D1

    D1
    1 2 VCC_VGG 28 8 BST_VGG 1 2 BST_VGG_R 1 2
    +5VALW VSP_VGG 27 VCC
    VSP
    BST
    HG
    9 UG_VGG PL8201
    1

    VSN_VGG 26 10 LX_VGG 9 10 LX_VGG 1 4


    PC8211 DIFFOUT_VGG 25 VSN SW 11 D2/S1 D1
    DIFFOUT PGND

    1
    1U_0603_10V6K FB_VGG 24 12 LG_VGG SWN1_VGG 2 3 CSN1_VGG
    2

    COMP_VGG 23 FB LG 13 TSENSE_VGG

    G2

    S2

    S2

    S2
    ROSC_VGG 22 COMP TSENSE 14 VBOOT/ADDR_VGG COMMON PART

    100K_0402_1%_TSM0B104F425 RZ
    PR8213@EMI@
    ROSC VBOOT/ADDR
    1

    @ PR8214 4.7_1206_5%
    CSCOMP

    5
    1
    0_0402_5% PR8215
    CSSUM
    CSREF

    Close to MOSFET

    1SNUB_VGG_12

    1
    1
    PVCC

    1 2

    .01U_0402_16V7K
    14.7K_0402_1% PR8216
    IMAX
    IOUT

    10 VGG_SENSEP
    ILIM

    1
    13K_0402_1%
    47K_0402_5% PR8217 PR8218

    PH8201
    78.7K_0603_1% 10_0402_5%
    2

    PC8212

    PR8219
    PQ8201
    2
    21
    20
    19
    18
    17
    16
    15
    1

    PC8213 AON7934_DFN3X3A8-10

    2
    2

    2
    2

    2
    CSSUM_VGG

    IMAX_VGG

    1000P_0402_50V7K
    CSREF_VGG
    CSCOMP_VGG
    ILIM_VGG
    2

    CSSUM_VGG
    PC8214@EMI@

    CSREF_VGG
    @ PR8220 680P_0603_50V7K

    2
    B 0_0402_5% @ B

    10 VGG_SENSEN 1 2 1 2
    PR8221 +5VALW
    0_0402_5%

    @ PC8216
    2200P_0402_50V7K
    1

    1 2
    PC8215 PR8222
    1000P_0402_50V7K 165K_0402_1%
    2

    PR8223 PC8217 2 1
    1

    49.9_0402_1%

    75K_0402_1%

    47P_0402_50V8J
    1 2 1 2 PC8218 2.2U_0603_10V6K
    2

    1
    470P_0402_50V7K PR8224

    1
    PR8225

    PC8220
    PR8226 33 VGG_IMON 38.3K_0402_1% PH8202
    1K_0402_1% 220K_0402_5%_ERTJ0EV224J PC8219
    2

    1 2 000PF_0402_50V7K
    Close to choke

    2
    2

    2
    @
    1

    ILIM_VGG 1 2 CSCOMP_VGG
    1

    FB_VGG 1 2 PC8222 PC8221 PR8228


    100P_0402_50V8J PR8227 7.5K_0402_1%
    PC8223 PR8229 470P_0402_50V7K
    Close to IC side
    31.6K_0402_1%
    2

    1.3K_0402_1%
    2

    1 2 1 2

    0.015U_0402_25V7K

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 T tle
    +SOC_VGG
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    B5V1L_Braswell-M/B_LA-D921P 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    Date Monday April 25 2016 Sheet 45 of 54
    5 3 2 1
    3
    2
    1

    A
    A

    +SOC_VCC
    4.7U_0402 *6

    4.7U_0402_6.3V6M PC952 22U_0603_6.3V6M PC901


    2 1
    2
    1

    22U_0603_6.3V6M PC902
    4.7U_0402_6.3V6M PC953
    2
    1

    2 1
    22U 0603_6.3V6M PC903
    2
    1

    4.7U_0402_6.3V6M PC954
    2 1 22U_0603_6.3V6M PC904
    2
    1

    @
    4.7U_0402_6.3V6M PC955 22U_0603_6.3V6M PC906 22U_0603_6.3V6M PC909
    2 1
    2
    1
    2
    1

    @
    22U_0603_6.3V6M PC932 22U_0603_6.3V6M PC910
    4.7U_0402_6.3V6M PC956
    2
    1
    2
    1

    2 1
    22U_0603_6.3V6M PC927
    @ 22U_0603_6.3V6M PC928
    2
    1

    WWW.AliSaler.Com
    4.7U_0402_6.3V6M PC957
    2
    1

    2 1 22U_0603_6.3V6M PC933
    @ 22U_0603_6.3V6M PC936

    B
    B

    2
    1

    2
    1

    22U_0603_6.3V6M PC934
    2
    1
    +22U_0603 * 15 + 4 reserved

    +SOC_VGG

    22U_0603_6.3V6M PC937 22U_0603_6.3V6M PC962

    Issued Date
    2
    1
    2
    1

    C
    C

    22U_0603_6.3V6M PC938 22U_0603_6.3V6M PC919

    Security Classification
    2
    1
    2
    1

    22U_0603_6.3V6M PC939 22U_0603_6.3V6M PC920


    2
    1
    2
    1

    22U_0603_6.3V6M PC940 22U_0603_6.3V6M PC917


    2
    1
    2
    1

    22U_0603_6.3V6M PC941 22U_0603_6.3V6M PC915


    2
    1
    2
    1

    22U_0603_6.3V6M PC958 22U_0603_6.3V6M PC916

    2015/12/24
    2
    1
    2
    1

    @ 22U_0603_6.3V6M PC961
    22U_0603_6.3V6M PC945
    2
    1

    2
    1

    @ 22U_0603_6.3V6M PC965
    22U_0603 * 24 + 4 reserved

    2
    1

    22U_0603_6.3V6M PC966
    @ 22U_0603_6.3V6M PC946
    2
    1
    2
    1

    @ 22U_0603_6.3V6M PC960
    2
    1

    Compal Secret Data


    Deciphered Date

    D
    D

    MAY BE USED BY OR DISCLOSED TO ANY TH RD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, NC.
    +1.05VALW

    2017/12/24

    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    THIS SHEET OF ENGINEERING DRAW NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS INC. AND CONTAINS CONFIDENTIAL

    @ 22U_0603_6.3V6M PC921
    2 1
    2
    1

    PC947 22U_0603_6.3V6M PC922


    Date
    Title
    1U_0402 * 5+

    1U_0402_6.3V6K
    Custom
    2
    1

    2 1
    @ 22U_0603_6.3V6M PC923
    PC948
    2
    1

    1U_0402_6.3V6K
    2 1 22U_0603_6.3V6M PC924
    2
    1

    PC949
    1U_0402_6.3V6K 22U_0603_6.3V6M PC925
    Size Document Number

    2 1
    2
    1

    PC950 @ 22U_0603_6.3V6M PC926


    1U_0402_6.3V6K
    Wednesday May 11 2016
    2
    1

    2 1
    22U_0603*6

    PC951
    1U_0402_6.3V6K
    E
    E

    Sheet
    reserved

    46
    PROCESSOR DECOUPLING
    Compal Electronics, Inc.

    of
    B5V1L_Braswell-M/B_LA-D921P
    54
    R ev
    1.0
    3
    2
    1
    5 4 3 2 1

    D D

    EN pin don't floating


    If have pull down resistor at HW side, pls delete PR2

    PL1001 VGA_EMI@
    +19VB 5A_Z120_25M_0805_2P PU1001 VGA@ @VGA@ VGA@ @VGA_EMI@ @VGA_EMI@
    1 2 +19VB_1.5VSDGPUP 2 9 PR1001 PC1001 PR1004 PC1006
    IN PG 0_0603_5% 0.1U_0603_25V7K 4.7_1206_5% 680P_0603_50V7K
    10U_0805_25V6K

    3 1 BST_1.5VSDGPUP
    1 2 1 2 1 2 SNB_1.5VSDGPUP 1 2
    VGA_EMI@ PC1003

    @VGA_EMI@ PC1004

    1.527V 1.018%
    2200P_0402_50V7K

    0.1U_0402_25V6

    IN BS
    1

    1
    VGA@ PC1005

    4 6 TDC 8A
    IN LX
    +1.5VSDGPUP
    2

    C 5 19 VGA@ PL1002 C
    IN LX
    7 20 LX_1.5VSDGPUP 1 2
    GND LX
    8 14 FB_1.5VSDGPUP PCMB063T-1R0MS 12A

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    VGA@ GND FB

    1
    PR1002 18 17 LDO_3V_1.5VSDGPUP
    GND VCC PL1002 from SH00000PJ00
    40.2K_0402_1%

    @VGA@ PC1010

    VGA@ PC1011

    VGA@ PC1012

    VGA@ PC1013

    @VGA@ PC1016

    VGA@ PC1017
    (R1)

    330P_0402_50V7K
    change to common part

    1
    15,36 1.5VS_DGPU_PWR_EN 1 2 11 10 VGA@

    2
    EN NC PC1014 SH00000YE00 2013/10/23 VGA@

    VGA@ PC1008
    ILMT_1.5VSDGPUP 13 12 2.2U_0402_6.3V6M PR1005

    2
    ILMT NC 30.9K_0402_1%
    1

    VGA@ 15 16
    +3VALW

    2
    BYP NC
    1

    VGA@ VGA@ PC1015


    1U_0402_6.3V6K
    1M_0402_1% PC1002 21
    PAD
    1

    PR1003 0.1U_0402_16V7K GM4G need 1.35V


    2

    SY8288RAC_QFN20_3X3
    GT/GM2G need 1.5V
    2

    LDO_3V_1.5VSDGPUP FB = 0.6V
    VFB=0.6V
    1

    1
    @ VGA@
    PR1007
    Vout=0.6V* (1+R1/R2) PR1006
    20K_0402_1%
    0_0402_5% Rup=25.5K Vout=1.365V
    2

    2
    ILMT_1.5VSDGPUP
    The current limit is set to 8A, 12A or 16A when this pin Rup=30.9K Vout=1.527V (R2)
    is pull low, floating or pull high
    1

    B @ B
    PR1008
    0_0402_5%
    2

    @
    PJ1002
    +1 5VSDGPUP 1 2 +1.5VSDGPU
    1 2
    JUMP_43X118

    Module model information


    SY8208D_V1.mdd

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    2015/12/24 Title
    Issued Date Deciphered Date 1.5VSDGPUP
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date W ednesday May 11 2016 Sheet 47 of 54
    5 4 3 2 1
    A B C D E

    1 1

    Module model information


    SY8032_V2.mdd

    @ PJ1 02
    JUMP_ 3X79
    1 2
    +1.05VSDGPUP 1 2 +1.05VSDGPU

    VIN 1.05VS
    VGA@
    PC1 02 (Common Part)
    22U_0603_6.3V6M
    2 VGA@ SH00000YG00 4*4*2 2
    1 2 PU1 01
    SY8032ABC_SOT23-6
    @ PJ1 01 PL1 01 VGA@
    JUMP_ 3X79 1UH_2.8A_30%_ X X2_F
    1 2 VIN_1 05VS 4 3 LX_1.05VS 1 2
    +3VS 1 2 IN LX +1.05VSDGPUP Imax= 0.7A, Ipeak= 1.1A

    VGA@
    5 2 PR1 02

    1
    PG GND

    68P_0 02_50V8J
    6 1 @VGA_EMI@

    VGA@ PR1 03
    7.68K_0 02_1%

    22U_0603_6.3V6M

    22U_0603_6.3V6M
    FB EN

    1
    PC1 03

    1
    @ PR1 0 .7_0603_5%

    PC1 05
    PC1 0
    0_0 02_5%

    2
    1 2 EN_1.05VS
    15,29,36, 9 VGA_PWROK

    2
    1SNUB_1.05VS
    Rup

    VGA@

    VGA@
    1

    @ PR1 05
    10K_0 02_1% PR1 01 1 @ PC1 01 FB_1.05VS
    1 2
    +3VSDGPU_AON 1M_0 02_1% 0.1U_0 02_16V7K PC1 06 VGA@
    2

    1
    @VGA_EMI@
    Function Field :
    2

    VGA@ PR1 06
    680P_0 02_50V7K
    Rdown PWR.Plane.Regulator_1.05VDGPU - 43.7

    2
    10K_0 02_1%
    Rest of support elements - 43.8

    2
    Note:
    When design Vin=5V, please stuff snubber
    to prevent Vin damage
    Vout=0.6V* (1+Rup/Rdown)
    =>0.6V*(1+(7.68/10)=1.061 (1.01%)
    =>0.6V*(1+(7.87/10)=1.072 (2.1%)
    3 3

    Security Classification
    2015/12/24
    Compal Secret Data
    2017/12/24 Title
    Compal Electronics, Inc
    Issued Date Deciphered Date

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, NC. AND CONTAINS CONFIDENTIAL
    SY8032
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV SION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTA NS C 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date: Wednesday, May 11, 2016 Sheet 8 of 5
    A B C D E
    B

    Vboot=Vvref*Rref2/(Rref1+Rref2+Rboot) Current Limit threshold setting Different VGA Chip (different EDP-Peak Current) need select different solution
    Rocset= (Ivalley * Rds(on) + 40 mV) / 10uA
    Rt=Rrefadj // (Rboot+Rref2)
    Module model information
    Vmin= Vvref*[Rref2/(Rref2+Rboot)]*[Rt/(Rref1+Rt)] I_ripple=(19-0.9)*0.9/ VGA N16S-GTR N16S-GT N16V-GMR1 N16V-GM N14P-GE N14P-GS N14P-GT N15S-GT N15V-GM
    RT8813A V1A for IC module (304.89Khz*0.36u*19)=7.811A Chip
    RT8813A V1B for SW module Vmax=Vvref*Rref2/[(Rref1//Rrefadj)+Rboot+Rref2]
    OpenVReg Config Config Config Config Config Config Config Config Config
    Vout=Vmin+N*Vstep OCP=54A/2=27A per phase Configurations B B B B B B B B C
    Ivalley=27A-7.811A/2=23.1A
    Vstep=(Vmax-Vmin)/Nmax Rated TDP Power at 23W 23W 16W 24W 25W 25.6W 35.5W 18W 18.16W
    Tj 102C
    PWM-VID Spec and component Values Boosted GPU Total at N/A 30W 40W 25W 24.72W
    H-side MOS:AON6552 L-side MOS:AON6554 Tj=102C
    Rds(on): Rds(on):
    PWM-VID Config Config Config 5.6mohm@Vgs=10V 3.2mohm@Vgs=10V EDP-Continuous at 26A 26A 18.5A 29.62A 27A 38A 45A 31A 29.2A
    Spec B C D 6.7mohm@Vgs=4.5V 3~3.8mohm@Vgs=4.5V Tj 102C
    Vmin 0.6V 0.65V 0.9V
    Id :20A@Ta=25 degC Id :85A@Ta=25 degC EDP-Peak at 51A 51A 30A 40.97A 40A 60A 75A 60A 44.3A
    Vmax 1.2V 1.15V 1.15V Tj=102C
    Vboot 0.9V 0.9V 1.028V Istep max 38.5A 36.36A 20A 33.31A 12A 31.5A 35A
    (E aluation)
    Voltage 6.25mV 25mV 12.5mV Choke: 0.22uH (Size:7*7*4)
    step Rdc=0.97mohm +-5% OCP Setting 48A 72A 90A 72A 54A
    N of Voltage 96 20 20 Heat Rating Current=34A Current
    PSI : le el
    Rrefadj PR1209 20K 39K 27K Saturation Current=25A Rocset 9.83K 8.3K 9.39K 13K 10.2K
    1 phase with DEM 0V to 0.8V
    1 phase with CCM 1.2V to 1.8V Rref1 PR1208 20K 30K 7.5K
    Recommendation 2phase 2phase 2phase 2phase 2phase 2phase 2phase 2phase 2phase
    2 phase with CCM 2.4V to 5.5V Rboot PR1211 2K 3K 0 C=3*330uF (9mohm)=990uF 1H1L 1H1L 1H1L 1H1L 1H1L 1H2L 1H2L 1H1L 1H1L
    Vripple=Iripple*ESR(min)=7.811A*3mohm=23.4mV
    Rref2=PR1210 PR1210 18K 24K 6.2K 6mohm * 3 4.5mohm *
    PR1224 Polymer Cap 6mohm * (L=0.22uH) 3
    PR1224 0 3K 1.74K (330uF) 2 (L=0.15uH)
    EN High Threshold = 1.6V
    C PC1210 2.7nf 1.8nf 5.6nf
    Or OSCON 10mohm NULL NULL GT@ GM@
    N15S-GT N15V-GL N15V-GM (390uF) *3
    N16S-GT
    N16V-GM
    N16V-GMR1
    N16S-GTR

    +19VB VGA
    unmount PRV5 for 2 phase select VGA_EMI@ PL1201
    PSI 15
    5A_Z120_25M_0805_2P

    NGC6 for DIS GM 2 1


    3VS +19VB
    GC6 for DIS GT

    15
    VGA@ PR1208 NGC6@ PR1202

    DGPU_VID

    10U_0805_25V6K

    10U_0805_25V6K

    10U_0805_25V6K

    10U_0805_25V6K

    10U_0805_25V6K

    10U_0805_25V6K
    20K_0 02_1% 20K_0 02_1%

    VGA@ PC1220

    VGA@ PC1221

    @VGA@ PC1202

    @VGA@ PC1203

    VGA@ PC1207
    2014/10/09

    0.1U_0 02_25V6

    2200P_0 02_50V7K
    VGA@ PC120
    1

    1
    2 1 VGA_EN 1 2

    @VGA_EMI@ PC1205
    0_0 02_5%
    3VSDGPU_AON
    Vout=14.8V

    VGA_EMI@ PC1208
    10K_0 02_5%

    10K_0 02_5%

    .1U_0 02_16V7K
    PR120
    2

    2
    VGA@ PR1211 VGA@ PR1209 GC6@ PR1206

    @VGA@ PR1203

    @VGA@ PR1205
    Imax=4.071A

    2
    1
    2K_0 02_1% 20K_0 02_1% 20K_0 02_1%

    VGA@
    PC1209

    5
    2 1 2 1 1 2
    3VSDGPU_MAIN_EN 15,36
    VGA@ Via=10
    PQ1201

    @VGA@

    2
    1

    1
    1

    @VGA@

    AON6 28L_DFN8-5
    PR1210 PR1207
    18K_0 02_1% 0_ 603_5% 4
    VGA@ UG1_VGA 1 2 UG1_ GA_R
    1
    1 2

    PC1210 @VGA@
    @VGA@ 2700P_0 02_50V7K PR1201
    2

    3
    2
    1
    PR122 VGA@ 0_0603_5% PL1202
    0_0 02_5% BST1_VGA 1 2 BST1_VGA_R VGA@
    0.36UH_PDME06 T-R36MS1R 05_2 A_20%
    LX1_VGA
    +VGA_CORE
    1 2
    2

    1
    NVVDD_GND_SENSE_R VGA@ PC1201

    UGATE1

    BOOT1
    VID

    PSI

    EN

    2
    0.1U_0603_25V7K

    @VGA_EMI@
    .7_1206_5%
    2

    5
    REFADJ 6 20 LX1_VGA VGA@

    PR1212
    REFADJ PHASE1 PQ1202

    AON679 _DFN5X6-8-5

    1SNUB_VGA1 1
    REFIN_VGA 7 19
    REFIN LGATE1 @VGA@ PR1213

    680P_0 02_50V7K
    LG1_VGA 0_0 02_5% 4

    1
    VREF_VGA 8 PU1201 18 PVCC_VGA 1 2

    VGA@ PR1225

    @VGA_EM @
    13K_0 0 _1%
    VREF VGA@ PVCC +5VS
    1

    1
    RT8812AGQW_WQFN20_3X3 VGA@ PC121

    PC1215
    PC1213 VGA@ PR1215 TON_VGA 9 17 LG2_VGA
    2014/10/09

    3
    2
    1U_0 02_6.3V6K 99K_0 02_1% TON LGATE2 1U_0603_10V6K
    2

    2
    VGA@ 19VB_VGA 2 1 Vout=1.35V
    +19VB VGA

    2
    10 16
    RGND PHASE2 Imax=35.7A
    UGATE2
    PGOOD

    BOOT2
    VSNS

    PR1214: OCP setting Via=72


    GND

    +19VB VGA
    SS

    VGA@ PR1216
    from 50A to 25A LX2_VGA
    100_0 02_1%
    21

    11

    12

    13

    14

    15

    1 2

    5
    VGA@ PC1216 VGA@
    @VGA@ PR1218 @VGA@ PQ1203

    AON6 28L_DFN8-5
    0_0 02_5% PR1217 0.1U_0603_25V7K
    2

    1 2 NVVDD_GND_SENSE_R 0_0603_5%
    17 VSSSENSE_VGA BST2_VGA 1 2 BST2_VGA_R
    1

    @VGA@ PC1218 UG2_VGA_R 4


    1

    @VGA@ PC1217 @VGA@ PR1219


    .1U_0 02_16V7K 0_0603_5%
    2

    @VGA@ PR1220 1000P_0 02_50V7K UG2_VGA 1 2 UG2_VGA_R


    2

    0_0 02_5% PL1203

    3
    2
    1
    1 2 NVVDD_SENSE_R VGA@
    17 VCCSENSE_VGA
    VGA_PWROK 15,29,36, 8 LX2_VGA
    0.36UH_PDME06 T-R36MS1R 05_2 A_20 +VGA_CORE
    1 2
    VGA@ PR1221

    @VGA_EM @
    .7_1206_5%
    2
    100_0 02_1% VGA@ PR1223 VGA@

    5
    1 2 10K_0 02_5% PQ120

    PR1222
    +VGA_CORE 2 1 3VS N16S-GT EDP continuous:26A peak: 51A

    AON679 _DFN5X6-8-5
    L side Rds(on): 3mohm(Typ), 3.8mohm(Max)
    Idsm: 11A@Ta=25C, 14A@Ta=70C

    1SNUB_VGA2 1
    LG2_VGA 4
    CHOKE:0.36uH, DCR 1.4m ohm, L/2 over 36A

    680P_0 02_50V7K
    @VGA_EMI@
    FSW = 304Khz
    (R=499K-->304Khz) (R=620K-->245Khz)

    PC1219
    3
    2
    1 Imax=35A
    Ipeak-51A
    OCP = 61A

    2
    OVP=Vout*(145%~155%)

    Remove GPU OTP circuit for HW request

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    RT8812
    AND TRADE SECRET NFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIV SION OF R&D Size Document Number Rev
    1.0
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH S SHEET NOR THE INFORMATION IT CONTA NS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR OR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    B5V1L_Braswell-M/B_LA-D921P
    Date: Wednesday, May 11, 2016 Sheet 9 of 5
    B
    5 4 3 2 1

    D D

    +VGA_CORE Under GPU Core GB4-128 package +VGA_CORE


    N15x 2013/12/10
    4.7U_0603_6.3V6M

    4.7U_0603_6.3V6M

    4.7U_0603_6.3V6M

    4.7U_0603_6 3V6M

    4.7U_0603_6.3V6M

    4.7U_0603_6.3V6M

    4.7U_0603_6.3V6M

    4.7U_0603_6.3V6M

    4.7U_0603_6.3V6M

    4.7U_0603_6.3V6M
    VGA@ PC1320

    VGA@ PC1338

    VGA@ PC1322

    VGA@ PC1323

    VGA@ PC1325

    VGA@ PC1326

    VGA@ PC1327

    VGA@ PC1328

    VGA@ PC1329
    Under

    VGA@ PC132
    1

    1
    4.7uF_0603_10pcs
    1uF_0402_4pcs
    Near
    2

    2
    1 1
    47uF_0805_1pcs
    22uF_0603_1pcs(2PCS unpop)

    560U_2.5V_M

    560U_2.5V_M
    + +

    PC1211

    PC1212
    4.7uF_0805_5pcs
    1U_0402_10V7

    1U_0402_10V7

    1U_0402_10V7

    1U_0402_10V7
    VGA@ PC1334

    VGA@ PC1335

    VGA@ PC1336

    VGA@ PC1337

    2 2
    1

    VGA@

    VGA@
    N15x 2013/10/17
    Under
    2

    4.7uF_0603_15pcs
    1uF_0402_8pcs
    C
    Near C
    47uF_0805_0pcs
    22uF_0603_9pcs(2PCS unpop)
    4.7uF_0805_5pcs

    N15x 2013/10/07
    Under
    4.7uF_0603_15pcs
    1uF_0402_8pcs
    Near
    47uF_0805_0pcs
    +VGA_CORE 22uF_0805_9pcs(2PCS unpop)
    4.7uF_0805_5pcs
    PC1330

    PC1331

    PC1332

    PC1333

    PC1346

    PC1347

    PC1348

    PC1349
    0.1U_0402_25V6

    0.1U_0402_25V6

    0.1U_0402_25V6

    0.1U_0402_25V6

    0.1U_0402_25V6

    0.1U_0402_25V6

    0.1U_0402_25V6

    0.1U_0402_25V6
    1

    +VGA_CORE Near GPU Core N15x 2013/10/02


    Under
    2

    B B

    47U_0805_6.3V6M
    4.7uF_0603_15pcs

    4.7U_0603_6.3V6M

    4.7U_0603_6.3V6M

    4.7U_0603_6.3V6M

    4.7U_0603_6.3V6M

    4.7U_0603_6.3V6M

    4.7U_0603_6.3V6M
    @VGA@

    @VGA@

    @VGA@

    @VGA@

    VGA@ PC1339

    VGA@ PC1340

    VGA@ PC1341

    VGA@ PC1342

    VGA@ PC1343

    VGA@ PC1344

    VGA@ PC1345
    ESD_VGA@

    ESD_VGA@

    ESD_VGA@

    ESD_VGA@

    1uF_0402_8pcs
    22U_0603_6.3V6M
    PC1321
    Near
    1

    1
    47uF_0805_0pcs
    22uF_0805_14pcs
    2

    2
    4.7uF_0805_5pcs
    VGA@

    N14x
    Under
    4.7uF_0603_10pcs
    0.1uF_0402_4pcs
    Near
    47uF_0805_1pcs
    22uF_0805_1pcs
    4 7uF_0805_5pcs
    B5V1L_Braswell-M/B_LA-D921P

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    VGA CORE CAP
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    Custom 1.0

    WWW.AliSaler.Com
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    B5V1L_Braswell-M/B_LA-D921P
    Date: Wednesday, May 11, 2016 Sheet 50 of 54
    5 4 3 2 1
    A B C D E

    Version change list (P.I.R. List) Page 1of 3 for PWR

    Item Page Title Date Issue Description Solution Description Phase Rev.
    1 ESD request 3/2 add PC1346~1349 A
    2 TOP red ink failed 3/2 add PC1220,PC1221 location A
    3 CPU core OCP setting PR8129: 28.7k 27.4k
    3/7 A
    1 PR8228: 30.9k 31.6k 1

    4 DDR IC change 3/7 change 8207K SA000096O00 A


    5 TOP red ink failed 3/7 POP PC1220,PC1221, unpop PC1202,PC1203 A
    6 PR507 change 887K to 470K C
    3D mark hang issue 4/25

    2 2

    3 3

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    PWR_PIR
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON CS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 51 of 52
    A B C D E
    5 3 2 1

    Version change list (P.I.R. List) Page 1of 1 for HW

    Item Page Title Date Issue Description Solution Description Phase Rev.
    1 8,9,12,26,28 Other 02/26 Change 0 ohm to R-Short 0_0402 to R-short: RL5,R1033,RA24,RA27,R1044,RG8,R1057,R1058,R4919
    29,30,33,34 0_0603 to R-short: R1091,R1208 PVT 1.0
    0 0805 to R-short: RL1,RL13,RO3
    D 2 33 Others 02/26 Board ID Change for PVT Change R507 from 12K to 15K PVT 1.0 D

    3 33 EC 02/26 For abnormal shutdown Add D2002 between SPOK and PMC CORE PWROK PVT 1.0
    4 29 USB HUB 02/26 For USB2.0 eye Change R267 from 680 to 619 PVT 1.0
    5 31 USB 03/02 SMT require delete un-use 0 ohm to avoid USB chock solder issue Del RS458,RS459,RS460,RS461 PVT 1.0
    6 31 USB 03/02 Follow B5W1S Sub/b cap PN Change CS25 P/N PVT 1.0
    7 24,25,31 Others 03/07 Change 0 ohm to R-Short RS21,RS22,RS24,RS25,RX10,RX11,RY2,RY3,RY4,RY5,RY6,RY7,RY8,RY9 PVT 1.0
    8 12 SOC 03/08 EMI reqirement C1074 footprint to 0402 PVT 1.0
    9 12 SOC 03/09 EMI reqirement Pop C1107,C1108,C1074 330P PVT 1.0
    10 6 Others 03/09 Add CPU PN PVT 1.0
    11 15 VGA 03/09 X2000 Drive level to high Add R4961 for 27M PVT 1.0
    12 36 LAN 03/09 Change Material of tranfrom Change T2507 PN to MHPC PVT 1.0
    13 34 LED 03/15 Follow B5W1S LED test result Change RG4,RG11 from 910 to 1.24K
    PVT 1.0
    Change RG6,RG10 from 680 to 820
    14 9 TP 04/18 Modify TP hold time Change R2563/R2564 from 2.2K to 4.7K

    C C

    B B

    A A

    Security Classification Compal Secret Data Compal Electronics, Inc.


    Issued Date 2015/12/24 Deciphered Date 2017/12/24 Title
    HW PIR

    WWW.AliSaler.Com
    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS INC. AND CONTA NS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON CS, INC. B5V1L_Braswell-M/B_LA-D921P
    Date Wednesday May 11 2016 Sheet 52 of 52
    5 3 2 1

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