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    Task 5

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    Fajri Rahman
    The document defines RISC and CISC instruction sets and compares their characteristics. RISC uses a small, highly optimized set of instructions that can operate at a higher speed using fewer transistors. It has simple instructions, fixed instruction length, and one cycle execution. CISC uses a more complex set of variable length instructions that can perform multi-step operations in one instruction but takes longer to execute. The key differences between RISC and CISC are that RISC has faster and more precise calculations while CISC has more complex decoding but can implement complex instructions in hardware.

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    Task 5

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    Fajri Rahman
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    The document defines RISC and CISC instruction sets and compares their characteristics. RISC uses a small, highly optimized set of instructions that can operate at a higher speed using fewer transistors. It has simple instructions, fixed instruction length, and one cycle execution. CISC uses a more complex set of variable length instructions that can perform multi-step operations in one instruction but takes longer to execute. The key differences between RISC and CISC are that RISC has faster and more precise calculations while CISC has more complex decoding but can implement complex instructions in hardware.

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    The document defines RISC and CISC instruction sets and compares their characteristics. RISC uses a small, highly optimized set of instructions that can operate at a higher speed using fewer transistors. It has simple instructions, fixed instruction length, and one cycle execution. CISC uses a more complex set of variable length instructions that can perform multi-step operations in one instruction but takes longer to execute. The key differences between RISC and CISC are that RISC has faster and more precise calculations while CISC has more complex decoding but can implement complex instructions in hardware.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    20 views3 pages

    Task 5

    Uploaded by

    Fajri Rahman
    The document defines RISC and CISC instruction sets and compares their characteristics. RISC uses a small, highly optimized set of instructions that can operate at a higher speed using fewer transistors. It has simple instructions, fixed instruction length, and one cycle execution. CISC uses a more complex set of variable length instructions that can perform multi-step operations in one instruction but takes longer to execute. The key differences between RISC and CISC are that RISC has faster and more precise calculations while CISC has more complex decoding but can implement complex instructions in hardware.

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    FAJRI FATHUR RAHMAN - IT CLASS 4 - 001202200064

    1. Define what is RISC instruction set?


    2. How is the concept of RISC?
    3. How the characteristic of RISC are?
    4. Define what is CISC instruction set?
    5. How the characteristic of CISC are?
    6. How is the concept of CISC?
    7. Define what the differences between RISC and CISC are!

    ANSWER
    1.Reduced Instruction Set Computer is a designed microprocessor that run and utilize a
    small, highly-optimized set of instructions rather than the highly-specialized set of
    instructions typically found so that it can operate at a higher speed (in MIPS or Millions of
    Instructions per Second).
    2. Basically, RISC run a simpler instruction set with a fewer transistor which means it
    consume less power and take up less die space. It doesn’t mean it is useless for it run with
    low power, but it is specifically meant to run a relative architecture by making it ARM
    processors suitable for low power applications. It has the priorities to prepare and compile
    rather than the analytical process of a computational task from the execution so it can run all
    the essential operations.
    3. The characteristics are:
    a) Simple Instructions are used in RISC architecture.
    b) RISC helps and supports few simple data types and synthesizes complex data types.
    c) RISC utilizes simple addressing modes and fixed-length instructions for pipelining.
    d) RISC permits any register to use in any context.
    e) One Cycle Execution Time
    f) The amount of work that a computer can perform is reduced by separating “LOAD”
    and “STORE” instructions.
    g) RISC contains a Large Number of Registers to prevent various interactions with
    memory.
    h) In RISC, Pipelining is easy as the execution of all instructions will be done in a
    uniform interval of time i.e. one click.
    i) In RISC, more RAM is required to store assembly-level instructions.
    j) Reduced instructions need a less number of transistors in RISC.
    k) RISC uses the Harvard memory model means it is Harvard Architecture.
    l) A compiler is used to perform the conversion operation means converting a high-
    level language statement into the code of its form.
    4. Group of instructions given to execute the program and they direct the computer by
    manipulating the data. Instructions are in the form – Opcode (operational code) and
    Operand. Where, the opcode is the instruction applied to load and store data, etc. The
    operand is a memory register where instruction is applied.
    5. CISC
     Large number of instrument.
     Large variety of addressing modes.
     It offers variable-length instruction formats
     Instruction is larger than one-word size.
     Various CISC designs are set up with two special registers for the stack pointer
    for managing interrupts.
     More data types.
     Institution decoding logic will be complex
     Instruction for special tasks used infrequently.
     As operations are performed in memory, there are fewer general-purpose
    registers.
     It’s possible that instruction would take more than one clock cycle to complete.
    6. CISC stands for “Complex Instruction Set Computer”.
    CPU design plan based on single commands, which are skilled in executing
    multi-step operations. CISC has small programs with huge number of a compound instruction
    that takes a long time to perform. The CISC machines have good acts, based
    on the overview of program compilers; as the range of innovative instructions
    are simply obtainable in one instruction set. They design compound instructions
    in a single, simple set of instructions. They achieve low-level processes, which
    makes it easier to have huge addressing nodes and additional data types in the
    hardware of a machine. But, CISC is considered less efficient than RISC,
    because of its incompetence to eliminate codes which leads to wasting of
    cycles. Also, microprocessor chips are difficult to understand and program for,
    because of the complexity of the hardware.
    7 .Comparison for each components are:

     Memory Unit: RISC has no memory unit and uses separate hardware to
    implement instructions. CISC has a memory unit to implement complex
    instructions.
     Program: RISC has a hard-wired unit of programming. CISC has a
    microprogramming unit
     Design: RISC is a complex compiler design. CISC is an easy compiler design
     Calculations: RISC calculations are faster and more precise. CISC calculations
    are slow and precise
     Decoding: ISC decoding of instructions is simple. CISC decoding of instructions
    is complex
     Time: Execution time is very less in RISC. Execution time is very high in CISC.
     External Memory: RISC does not require external memory for calculations. CISC
    requires external memory for calculations.
     Pipelining: RISC Pipelining does function correctly. CISC Pipelining does not
    function correctly.
     Stalling: RISC stalling is mostly reduced in processors. CISC processors often
    stall.
     Code Expansion: Code expansion can be a problem in RISC whereas, in CISC,
    Code expansion is not a problem.
     Disc Space: Space is saved in RISC whereas in CISC space is wasted.

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