UPF Example

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UPF Example with 5 Power Domains

The Design

The design contains the following 5 blocks connected together

 » 2:1 Mux
 » Linear Feedback Shift Register
 » Sequence Detector
 » Counter
 » Binary to BCD Converter

The UPF Strategy

Power Domains
The upf code for the same is shown below:

set_design_top tb/TOP

create_power_domain top_PD
create_power_domain clk_mux_PD -elements {CM}
create_power_domain lfsr_PD -elements {LFSR}
create_power_domain sq_det_PD -elements {SD}
create_power_domain counter_PD -elements {CNT}
create_power_domain bcd_conv_PD -elements {BCD}

In this example, we have created 5 power domains, i.e. each domain consists of one of 5 individual blocks in the
design. Also, there is top_PD which is the top power domain consisting of whole design.

Power Network
The part of the upf file used to create power network consists of the following steps:

Creating Power Ports

The ports created in the example are shown by .

Check the following part of the upf file:

create_supply_port VDD_port -domain top_PD create_supply_port VSS_port -domain top_PD

Creating Power nets for all the domains

The following example is a part of upf file which creates power nets for all domains:

create_supply_net VDD_rail -domain top_PD


create_supply_net VSS_rail -domain top_PD
create_supply_net Vck_mx -domain clk_mux_PD
create_supply_net Vss1 -domain clk_mux_PD

Connecting power nets with power ports

The following example is a part of upf file connects ground net for counter domain to top power port VSS_port:

connect_supply_net Vss4 -ports {VSS_port}

Setting primary supply and ground nets for all the domains

The primary power and ground nets for all the domains must be set before we can run the power-aware
simulation. The following examples are the part of the upf file does the required:
set_domain_supply_net top_PD -primary_power_net VDD_rail -primary_ground_net VSS_rail
set_domain_supply_net clk_mux_PD -primary_power_net Vck_mx -primary_ground_net Vss1

Power Switches

The following example shows the switch declarations for domain 1:

#1 Clock Mux
create_power_switch clk_mux_SW \
-domain clk_mux_PD \
-input_supply_port {vin1 VDD_rail} \
-output_supply_port {vout1 Vck_mx} \
-control_port {ctr_sig1 ck_mx_sw_ctr} \
-on_state {CK_MX_ON vin1 {ctr_sig1==0}} \
-off_state {CK_MX_OFF {ctr_sig1==1}}

The above code means the switch and its connection to power domain and supply nets as follows:
Isolation Strategies

The isolation strategies are meant to introduce isolation cells for the power domains so that the
inputs/outputs/both for the particular domain would be isolated from the rest of the design.

The sample isolation strategy and the corresponding code are shown below:

set_isolation iso_strategy1 -domain clk_mux_PD -isolation_power_net VDD_rail -isolation_ground_net VSS_rail -


clamp_value 1 -applies_to inputs -elements {CM/sel_clk}
set_isolation_control iso_strategy1 -domain clk_mux_PD -isolation_signal iso1 -isolation_sense high

Here represents the isolation cell that controls the isolation mechanism based on the control signal polarity.

Retention Strategies
The retention strategy shown figure above can be expressed in upf file as shown below:

set_retention ret_strategy4 -domain counter_PD -retention_power_net VDD_rail -retention_ground_net VSS_rail


set_retention_control ret_strategy4 -domain counter_PD -save_signal {save_cnt high} -restore_signal {restore_cnt
high}
map_retention_cell ret_strategy4 -domain counter_PD -lib_cell_type LIB_CELL_NAME

The symbol represents the retention cell.

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