Unit 6: A/D and D/A Converters: - 3130907 - Analog and Digital Electronics
Unit 6: A/D and D/A Converters: - 3130907 - Analog and Digital Electronics
Unit 6: A/D and D/A Converters: - 3130907 - Analog and Digital Electronics
Table of Contents
7.1 Introduction
Digital-to-analog (D/A) and analog-to-digital (A/D) converters constitute an essential link when
digital devices interface with analog devices, and vice versa. They are important building blocks
of any digital system, including both communication and non-communication systems, besides
having other applications.
Fig. shows the block diagram of a typical digital-to-analog (D/A) converter, which accepts an n-
bit parallel digital code as an input and provides an analog current or voltage as an output.
For an ideal D/A converter, the analog output for an n-bit binary code is given by;
Vo = Vref (− Rf/R) (b0 + b1 × 2−1 + b2 × 2−2 +· · ·+bn−1 × 2−n+1)
Where;
V0 - Analog output voltage
Vref - Reference analog input voltage
b0 - Most significant bit of binary input code
bn−1 - Least significant bit of binary input code
7.3.2 Accuracy
The accuracy of a D/A converter is the difference between the actual analog output and the
ideal expected output when a given digital input is applied.
Sources of error include the gain error (or full-scale error), the offset error (or zero-scale
error), nonlinearity errors and a drift of all these factors.
7.3.6 Monotonocity
A D/A converter is considered as monotonic if its analog output either increases or remains
the same but does not decrease as the digital input code advances in one-LSB steps.
Fig. shows a 4-bit weighted-resistor D/A converter which includes a reference voltage source, a
set of four electronically controlled switches, a set of four binary-weighted precision resistors,
and an Op-Amp.
Each binary bit of digital input code controls its own switch. The switch closes with a bit value of
1, and the switch stays open with binary 0. The resistor connected to the most significant bit
(MSB), b0, has a value of R; b1 is connected to 2R, b2 to 4R, and b3 to 8R.
Thus, each low-order bit is connected to a resistor that is higher by a factor of 2. For a 4-bit D/A
converter, the binary input range is from 0000 to 1111.
The analog output voltage can be shown to be;
Vref R f
Vout n
(2 n1 bn1 2 n2 bn2 ... 2b1 b0 )
2 R
Advantages:
1. Simple in Construction.
2. Fast conversion.
Disadvantage:
1. The range of resistor values becomes impractical for binary words longer than 4 bits.
2. The dynamic range of the Op-Amp limits the selection of resistance values.
3. Expensive.
Fig. shows a 4-bit R–2R ladder D/A converter, which contains a reference voltage source, a set of
four switches, two resistors per bit, and an op amp.
The analog output voltage can be shown to be;
Vo = Vref (− Rf/R) (b0 × 2−1 + b1 × 2−2 +· · ·+ bn−1 × 2−n)
Advantages:
1. Because only two resistor values (R and 2R) are used, the R–2R ladder converter networks
are relatively simple to manufacture
2. Low cost.
3. Practical and reliable.
Disadvantage:
1. More precise resistors required
2. Slower conversion rate compare to weighted resistor DAC.
| EE & EC Department | 3130907 – Analog and Digital Electronics 6
Unit 6 : A/D and D/A Converters
A unit-gain amplifier is connected to the output in order to prevent loading of the voltage divider.
Advantages:
1. Because only single resistor values (R) are used, the 2n – R converter networks are relatively
simple to manufacture
2. Practical and reliable.
Disadvantage:
1. 2n − R D/A converters are economically manufactured as LSI packages in spite of the large
number of components needed.
E.g. For R – 2R DAC analog output voltage = − 𝑉𝑟𝑒𝑓 (− Rf/R) (b0 × 2−1 + b1 × 2−2 +· · ·+ bn−1× 2−n)
A BCD-input D/A converter accepts the BCD equivalent of decimal digits at its input. A two-digit
BCD D/A converter for instance is an eight-bit D/A converter.
Fig. shows the circuit representation of an eight-bit BCD-type D/A converter. Such a converter
has 99 steps and accepts decimal digits 00 to 99 at its input. A 12-bit converter will have 999
steps.
The weight of the different bits in the least significant digit (LSD) will be 1 (for A0), 2 (for B0), 4
(for C0) and 8 (for D0).
The weights of the corresponding bits in the next higher digit will be 10 times the weights of
corresponding bits in the lower adjacent digit.
For the D/A converter shown in Fig. the weight of the different bits in the most significant digit
(MSD) will be 10 (for A1), 20 (for B1), 40 (for C1) and 80 (for D1).
In general, an n-bit D/A converter of the BCD input type will have (10n/4 − 1) steps.
The percentage resolution of such a converter is given by [1/(10 n/4 − 1)]×100.
Fig.: DAC-08 for positive output operation Fig.: DAC-08 for negative output operation
Advantages:
1. Less settling time
2. High voltage compliance
3. Wide power supply range
4. High linearity
Applications:
o Waveform generators, servomotor driver, audio encoders and attenuators, analog meter
drivers, programmable power supplies, high-speed modems, CRT display drivers, etc.
Advantages:
1. Less settling time
2. More accuracy
3. Wide power supply range
4. High linearity
5. Direct interface with TTL, CMOS logic families
Applications:
o Voltage output DAC
Advantages:
1. Direct interface with many 3. Monotonocity
microprocessor 4. High linearity
2. Less power dissipation 5. Wide power supply range
Applications:
o Microprocessor-controlled gain setting and signal control applications.
2. A certain eight-bit D/A converter has a full-scale output of 5 mA and a full-scale error of ±0.25%
of full scale. Determine the range of expected analogue output for a digital input of 10000010.
Sol.:
7.12.2 Accuracy
The accuracy specification describes the maximum sum of all errors, both from analog
sources and from the digital sources of the A/D converter.
Resetting the binary counter to zero produces D/A output voltage V2 = 0 and initiates the analog-
to-digital conversion.
When the analog input V1 is larger than the DAC (D/A converter) output voltage, the comparator
output will be high, thereby enabling the AND gate and incrementing the counter.
V2 is increased as the counter gets incremented; when V2 is slightly greater than the analog input
signal, the comparator signal becomes low, thereby causing the AND gate to stop the counter.
The counter output at this point becomes the digital representation of the analog input signal.
The relatively long conversion time needed to encode the analog input signal is the major
disadvantage of this method.
This converter, shown in Fig., also contains a D/A converter, but the binary counter is replaced by
a successive-approximation register (SAR), which makes the analog-to-digital conversion much
faster.
On the other hand, if the signal to be converted is larger than the D/A computer output, then the
MSB remains 1. This procedure is repeated for each bit until the binary equivalent of the input
analog signal is obtained at the end.
This method requires only n clock periods, compared to the 2n clock periods needed by the
counter-controlled A/D converter, where n is the number of bits required to encode the analog
signal.
After a start-of-conversion pulse, the counter is cleared and the analog input V in becomes the
input of the ramp generator (integrator). When the output of the ramp generator V o reaches
zero, the counter starts to count.
After a fixed amount of time T, as shown in Fig., the output of the ramp generator is proportional
to the analog input signal. At the end of T, the reference voltage V ref is selected, when the
integrator gives out a ramp with a positive slope.
As Vo increases, the counter is incremented until Vo reaches the comparator threshold voltage of
0 V, when the counter stops being incremented again.
The value of the counter becomes the binary code for the analog voltage Vin, since the number
of clock pulses passing through the control logic gate for a time t is proportional to the analog
signal Vin.
Dual-ramp A/D converters can provide accuracy at low cost, even though the process is slow
because a double clock pulse count is an inherent part of the process.
Flash Type ADC is based on the principle of comparing analog input voltage with a set of reference
voltages.
To convert the analog input voltage into a digital signal of n-bit output, (2n – 1) comparators are
required.
The seven (2n - 1) op-amps are used as comparators. The non-inverting inputs of all the seven
comparators are connected to the analog input voltage. The inverting terminals are connected
to a set of resistive divider network and power supply +V.
The output of the comparator is in positive saturation (i.e. logic 1), when voltage at non-inverting
terminal is greater than voltage at inverting terminal and is in negative saturation otherwise.
A Priority Encoder is used to transform the comparator outputs to the correct digital binary
output.
Advantages:
1. It is the fastest type.
2. Typical conversion time is 100ns or less.
3. The construction is simple and easier to design.
Disadvantages:
1. It is not suitable for higher number of bits.
2. To convert the analog input voltage into a digital signal of n-bit output, (2n – 1) comparators
are required. The number of comparators required doubles for each added bit.
2. The data sheet of a certain eight-bit A/D converter lists the following specifications: resolution
eight bits; full-scale error 0.02% of full scale; full-scale analogue input +5 V. Determine (a) the
quantization error (in volts) and (b) the total possible error (in volts).
Sol.:
No._Pg. No.
Summer-15
Summer-16
Summer-17
Summer-18
Winter-15
Winter-16
Winter-17
Winter-18
Answer
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