AWR Visual System Simulator Getting Started Guide: Product Version 16.02
AWR Visual System Simulator Getting Started Guide: Product Version 16.02
AWR Visual System Simulator Getting Started Guide: Product Version 16.02
Cadence Design Systems, Inc. (Cadence), 2655 Seely Ave., San Jose, CA 95134, USA.
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Table of Contents
1. Introduction .................................................................................................................................... 1–1
Introducing the AWR Design Environment Platform .......................................................................... 1–1
About This Guide ....................................................................................................................... 1–2
Prerequisites ...................................................................................................................... 1–2
Contents of this Guide ......................................................................................................... 1–2
Conventions Used in This Guide ............................................................................................ 1–2
Getting Additional Information ...................................................................................................... 1–3
Cadence AWR Knowledge Base ............................................................................................ 1–3
Documentation ................................................................................................................... 1–3
Online Help ....................................................................................................................... 1–4
Online Support ................................................................................................................... 1–4
2. AWR Design Environment Platform .................................................................................................... 2–1
Starting AWR Software Programs .................................................................................................. 2–2
AWR Design Environment Platform Components ............................................................................. 2–3
Basic Operations ......................................................................................................................... 2–4
Working with Projects ......................................................................................................... 2–4
Project Contents ......................................................................................................... 2–5
Creating, Opening, and Saving Projects ........................................................................... 2–5
Opening Example Projects ........................................................................................... 2–5
Importing Test Benches ................................................................................................ 2–6
Working with Schematics and Netlists in Microwave Office ........................................................ 2–7
Adding Data to Netlists ................................................................................................ 2–8
Working with System Diagrams in VSS .................................................................................. 2–8
Connecting Element and System Block Nodes .......................................................................... 2–9
Using the Elements Browser ................................................................................................ 2–10
Adding Subcircuits to Schematics ................................................................................ 2–11
Adding Subcircuits to System Diagrams ........................................................................ 2–12
Adding Ports to Schematics and System Diagrams .......................................................... 2–12
Creating EM Structures ...................................................................................................... 2–12
Adding EM Structure Drawings ................................................................................... 2–13
Creating a Layout with Microwave Office ............................................................................. 2–14
Modifying Layout Attributes and Drawing Properties ....................................................... 2–15
Using the Layout Manager .......................................................................................... 2–16
Creating Output Graphs and Measurements ........................................................................... 2–17
Setting Simulation Frequency and Performing Simulations ........................................................ 2–18
Tuning and Optimizing Simulations .............................................................................. 2–19
Using Command Shortcuts ................................................................................................. 2–19
Using Scripts and Wizards .......................................................................................................... 2–20
Using Online Help ..................................................................................................................... 2–20
3. VSS: System Simulation in VSS ......................................................................................................... 3–1
Overview of VSS Theory ............................................................................................................. 3–1
Data Types ........................................................................................................................ 3–1
Complex Envelope Signal Representation ................................................................................ 3–1
Center Frequency and Sampling Frequency ............................................................................. 3–3
Parameter Propagation ......................................................................................................... 3–4
Amplitude Modulation (AM) Example ........................................................................................... 3–4
Creating a Project ............................................................................................................... 3–5
Setting Default System Settings ............................................................................................. 3–5
Setting Default Project Units With Layout ....................................................................... 3–5
• The Microwave Office Getting Started Guide provides step-by-step examples that show you how to use Microwave
Office software to create circuit designs.
• The AWR Analyst Getting Started Guide provides step-by-step examples that show you how to use Analyst software
to create and simulate 3D EM structures from the Microwave Office program.
• Microwave Office MMIC Getting Started Guide provides step-by-step examples that show you Monolithic Microwave
Integrated Circuit (MMIC) features and designs.
• AWR Visual System Simulator Getting Started Guide provides step-by-step examples that show you how to use VSS
software to create system simulations and to incorporate Microwave Office software circuit designs.
To set up the AWR Design Environment software for PCB style design, choose Tools > Create New Process to display
the Create New Process dialog box, then click the Help button for details on using this tool.
VSS software enables you to design and analyze end-to-end communication systems. You can design systems composed
of modulated signals, encoding schemes, channel blocks and system level performance measurements. You can perform
simulations using the VSS software predefined transmitters and receivers, or you can build customized transmitters and
receivers from basic blocks. Based on your analysis needs, you can display BER curves, ACPR measurements,
constellations, and power spectrums, to name a few. VSS software provides a real-time tuner that allows you to tune the
designs and then see your changes immediately in the data display.
Microwave Office software enables you to design circuits composed of schematics and electromagnetic (EM) structures
from an extensive electrical model database, and then generate layout representations of these designs. You can perform
simulations using any of the Cadence AWR simulation engines, such as a linear simulator; the Cadence APLAC® HB
simulator for nonlinear frequency-domain simulation and analysis; the AXIEM 3D-planar EM simulator; the Analyst
3D-FEM simulator; or transient circuit simulators (the APLAC transient simulator or an optional Spectre simulator), and
display the output in a wide variety of graphical forms based on your analysis needs. You can then tune or optimize the
designs and your changes are automatically and immediately reflected in the layout. Statistical analysis allows you to
analyze responses based on statistically varying design components.
The tool set spans the entire IC design flow, from system-level to circuit-level design and verification, including design
entry and schematic capture, time- and frequency-domain simulation and analysis, physical layout with automated
device-level place and route and integrated design rule checker (DRC), 3D full-field solver-based extraction with industry
gold standard high-speed extraction technology from OEA International, and a comprehensive set of waveform display
and analysis capabilities supporting complex RF measurements.
At the core of the AWR Design Environment platform capability is advanced object-oriented technology. This technology
results in software that is compact, fast, reliable, and easily enhanced with new technology as it becomes available.
Prerequisites
You should be familiar with Microsoft® Windows® and have a working knowledge of basic circuit and/or system design
and analysis.
This document is available as a download from the Cadence AWR Knowledge Base.
If you are viewing this guide as online Help and intend to work through the examples, you can download and print out
the PDF version for ease of use.
In the Microwave Office Getting Started Guide the subsequent chapters take you through hands-on examples that show
you how to use Microwave Office software to create circuit designs including layout and AXIEM 3D planar EM layout
and simulation.
In the Analyst Getting Started Guide the subsequent chapters take you through hands-on examples that show use of the
Analyst 3D Electromagnetic simulator for 3D EM simulation within Microwave Office software. Use of 3D parametric
layout cells and a 3D Layout Editor is included.
In the Microwave Office MMIC Getting Started Guide the subsequent chapters take you through hands-on examples that
allow you to work with Monolithic Microwave Integrated Circuit (MMIC) features and designs.
In the AWR Visual System Simulator Getting Started Guide the subsequent chapters take you through hands-on examples
that show you how to use VSS software to create system simulations and to incorporate Microwave Office software
circuit designs.
Item Convention
Anything that you select (or click on) in the AWR Design Shown in a bold alternate font. Nested menu selections are
Environment program, such as menus, nested submenus, shown with a ">" to indicate that you select the first menu
menu options, dialog box options, buttons, and tab names item and then select the submenu item:
Item Convention
Press Alt+F1.
File names and directory paths Shown in italics:
• Application Notes - Technical papers on various topics written by Cadence or our partners.
• Examples - Pages explaining project examples in the installed software or available for download.
• Licensing - A step-by-step guide to resolving most licensing problems.
• Questions - Frequently Asked Questions (FAQs) and answers for common customer issues.
• Scripts - Scripted utilities to help solve specific problems.
• Documentation - Downloadable copies of the latest released documentation.
• Videos - Short technical videos on how to accomplish specific tasks.
Documentation
Documentation for the AWR Design Environment platform includes:
• What's New in AWR Design Environment v16? presents the new or enhanced features, elements, system blocks, and
measurements for the current release. This document is available in the Help by clicking the Windows Start button
and choosing AWRDE 16 > AWR Design Environment Help and then expanding the Cadence AWR Design Environment
node on the Contents tab, or by choosing Help > What's New while in the program.
• The AWR Design Environment Installation Guide describes how to install the AWR Design Environment platform
and configure it for locked or floating licensing options. It also provides licensing configuration troubleshooting tips.
This document is downloadable from the Cadence AWR Knowledge Base.
• The AWR Design Environment User Guide provides an overview of the AWR Design Environment platform including
chapters on the user interface; using schematics/system diagrams, data files, netlists, graphs, measurements, and output
files; using variables and equations in projects, and more. In addition, an appendix providing guidelines for starting a
new design is included.
• The AWR Design Environment Simulation and Analysis Guide discusses simulation basics such as swept parameter
analysis, tuning/optimizing/yield, and simulation filters; and provides simulation details for DC, linear, AC, harmonic
balance, transient, and EM simulation/extraction theory and methods.
• The AWR Design Environment Dialog Box Reference provides a reference of many program dialog boxes with dialog
box graphics, overviews, option details, and information on how to access each dialog box.
• The AWR API Scripting Guide explains the basic concepts of AWR Design Environment scripting and includes coding
examples. It also provides information on the most useful objects, properties, and methods for creating scripts in the
AWR Script Development Environment (AWR SDE). In addition, this guide contains the AWR Design Environment
Component API list.
• The Quick Reference document lists keyboard shortcuts, mouse operations, and tips and tricks to optimize your use
of the AWR Design Environment platform. This document is available within the program by choosing Help > Quick
Reference. This is an excellent document to print and keep handy at your desk.
• Context sensitive Help is available for most operations or phases of design creation. To view an associated Help topic,
press the F1 key during design creation.
• The AWR Microwave Office Layout Guide, which contains information on creating and viewing layouts for schematics
and EM structures, including use of the Layout Manager, Layout Process File, artwork cell creation/editing/properties,
Design Rule Checking, and other topics.
• The AWR Microwave Office Element Catalog, which provides complete reference information on all of the electrical
elements that you use to build schematics.
• The AWR Microwave Office Measurement Catalog, which provides complete reference information on the
"measurements" (for example, computed data such as gain, noise, power, or voltage) that you can choose as output
for your simulations.
• The AWR Visual System Simulator System Block Catalog, which provides complete reference information on all of
the system blocks that you use to build systems.
• The AWR Visual System Simulator Measurement Catalog, which provides complete reference information on the
measurements you can choose as output for your simulations.
• The AWR Visual System Simulator Modeling Guide, which contains information on simulation basics, RF modeling
capabilities, and noise modeling.
Documentation for the 3D Editor and Cadence Analyst™-MP multi-physics simulator (stand-alone product for
multi-physics types of EM problems) includes:
• The What's New in Analyst-MP v16 (Analyst_Whats_New.pdf), which presents the new or enhanced features for both
the 3D Layout Editor and Analyst-MP simulator software.
• The Analyst-MP Getting Started Guide (Analyst_Getting_Started.pdf), which provides step-by-step examples that
show you how to use Analyst-MP simulator software.
• The Analyst User Guide (Analyst_User_Guide.pdf), which provides an overview of the 3D Editor and Analyst-MP
simulator software; including chapters on the user interface, structures, simulations, post-processing, variables, data
files, and scripting.
Online Help
All AWR Design Environment documentation is available as on-line Help.
To access online Help, choose Help from the menu bar or press F1 anywhere in the program. Context sensitive help is
available for elements and system blocks in the Elements Browser and within schematics or system diagrams, and for
measurements from the Add/Modify Measurement dialog box.
Online Support
The Cadence Learning and Support System is available from the Cadence Support website. You can navigate to this site
from the AWR Design Environment platform by choosing Help > Get Technical Support.
Create Project
File > New Project or File > New with Library
Create Graphs/Measurements
Project > Add Graph
Project > Add Measurement
Simulate Circuit
(Microwave Office) Simulate > Analyze
(VSS) Simulate > Run Sys. Sim.
Automatically: Automatically:
*Updates Schem./Sys. Diagrams *Updates Schem./Sys. Diagrams
*(Microwave Office) Updates Layout *(Microwave Office) Updates Layout
*Simulates *Simulates
*Updates Results/Graphs *Updates Results/Graphs
This chapter describes the windows, menus and basic operations for performing the following tasks in the AWR Design
Environment platform:
NOTE: The Quick Reference document lists keyboard shortcuts, mouse operations, and tips and tricks to optimize your
use of the AWR Design Environment platform. Choose Help > Quick Reference to access this document.
Title bar
Menu bar
Toolbar
Project Browser
System diagrams
Circuit schematics
Workspace
Tabs
Status Window
Status bar
If the AWR Design Environment platform was not configured during installation to display in your Start menu, start the
application by double-clicking the This PC icon on your desktop, opening the drive and folder where you installed the
program, and double-clicking on MWOffice.exe, the AWR Design Environment platform application.
Component Description
Title bar The title bar displays the name of the open project and any Process Design Kit (PDK) used with
the project.
Menu bar The menu bar comprises the set of menus located along the top of the window for performing
a variety of Microwave Office and VSS tasks.
Toolbar The toolbar is the row of buttons located just below the menu bar that provides shortcuts to
frequently used commands such as creating new schematics, performing simulations, or tuning
parameter values or variables. The buttons available depend on the functions in use and the
active window within the design environment (as well as any customization of toolbar button
groups). Position the cursor over a button to view the button name/function.
Workspace The workspace is the area in which you design schematics and diagrams, draw EM structures,
view and edit layouts, and view graphs. You can use the scrollbars to move around the workspace.
You can also use the zoom in and zoom out options from the View menu.
Project Browser Located by default in the left column of the window, this is the complete collection of data and
(Project tab) components that define the currently active project. Items are organized into a tree-like structure
of nodes and include schematics, system diagrams and EM structures, simulation frequency
settings, output graphs, user folders and more. The Project Browser is active when the AWR
Design Environment platform first opens, or when you click the Project tab. Right-click a node
in the Project Browser to access menus of relevant commands.
Elements Browser The Elements Browser contains a comprehensive inventory of circuit elements for building your
(Elements tab) schematics, and system blocks for building system diagrams for simulations. The Elements
Browser displays by default in the left column in place of the Project Browser when you click
the Elements tab.
Layout Manager The Layout Manager contains options for viewing and drawing layout representations, creating
(Layout tab) new layout cells, and working with artwork cell libraries. The Layout Manager displays by
default in the left column in place of the Project Browser when you click the Layout tab.
Status Window (Status The Status Window displays error, warning, and informational messages about the current
Window tab) operation or simulation. The Status Window displays by default at the bottom of the workspace
when you click the Status Window tab.
Status bar The bar along the very bottom of the design environment window that displays information
dependent on what is highlighted. For example, when an element in a schematic is selected, the
element name and ID displays. When a polygon is selected, layer and size information displays,
and when a trace on a graph is selected, the value of a swept parameter displays.
You can invoke many of the functions and commands from the menus and on the toolbar, and in some cases by
right-clicking a node in the Project Browser. This guide may not describe all of the ways to invoke a specific task.
Basic Operations
This section highlights the windows, menu choices, and commands available for creating simulation designs and projects
in the AWR Design Environment platform. Detailed use information is provided in the chapters that follow.
Project Contents
Because Microwave Office software and VSS software are fully integrated in the AWR Design Environment platform,
you can start a project based on a system design using VSS software, or on a circuit design using Microwave Office
software. The project may ultimately combine all elements. You can view all of the components and elements in the
project in the Project Browser. Modifications are automatically reflected in the relevant elements.
A project can include any set of designs and one or more linear schematics, nonlinear schematics, EM structures, or
system level blocks. A project can include anything associated with the designs, such as global parameter values, imported
files, layout views, and output graphs.
When you first start the AWR Design Environment platform, a default empty project titled "Untitled Project" is loaded.
Only one project can be active at a time. The name of the active project displays in the main window title bar.
After you create (name) a project, you can create your designs. You can perform simulations to analyze the designs and
see the results on a variety of graphical forms. Then, you can tune or optimize parameter values and variables as needed
to achieve the desired response. You can generate layout representations of the designs, and output the layout to a DXF,
GDSII, or Gerber file. See Appendix B, New Design Considerations in AWR Design Environment User Guide in the
AWR Design Environment User Guide for advanced guidelines on starting a new design. You can also transfer technology
and design information with Virtuoso and DE-HDL/Allegro platforms through a Cadence Unified Library. See Appendix E,
AWR Design Environment Interoperability with Virtuoso and Allegro in AWR Design Environment User Guide in the
AWR Design Environment User Guide for details.
To create a project choose File > New Project. Name the new project and the directory you want to write it to by choosing
File > Save Project As. The project name displays in the title bar.
To open an existing project, choose File > Open Project. To save the current project, choose File > Save Project. When you
save a project, everything associated with it is automatically saved. Cadence AWR® projects are saved as *.emp files.
Cadence provides a number of project examples (*.emp files) in the installation directory to demonstrate key concepts,
program functions and features, and show use of specific elements.
The Open Example Project dialog box displays with columns for the project name and keywords associated with each
example project.
2. Filter the list using "getting_started" as a keyword by Ctrl-clicking the Keywords column header and typing
"getting_started" in the text box at the bottom of the dialog box.
As shown in the following figure, the example list is filtered to display only those projects that have the "getting_started"
keyword associated with them.
NOTE: You can filter examples by keyword or by file name. An inverted triangle in the column header indicates the
column on which your search is filtered. Press the Ctrl key while clicking a column header to change which column is
used to filter.
Cadence provides several test bench examples that can serve as design guides for various applications such as mixers,
amplifiers, and oscillators. These test benches are set up for import into your working project.
To create a schematic, right-click Circuit Schematics in the Project Browser, choose New Schematic, and then specify a
schematic name.
To create a netlist, right-click Netlists in the Project Browser, choose New Netlist, and then specify a netlist name and
type.
After you name the schematic or netlist, a window for it opens in the workspace and the Project Browser displays the
new item as a subnode under Circuit Schematics or Netlists. In addition, the menu bar and toolbar display new command
choices and buttons particular to building and simulating schematics or netlists.
A Schematic window or
Netlist window opens in
the workspace
or
When you create a netlist, an empty netlist window opens into which you type a text-based description of a schematic.
Netlist data is arranged in blocks in a particular order, where each block defines a different attribute of an element such
as units, equations, or element connections. For more information about creating netlists, see “Creating a Netlist” in AWR
Design Environment User Guide.
After you name the system diagram, a window for it opens in the workspace and the Project Browser displays the new
item as a subnode under System Diagrams. In addition, the menu bar and toolbar display new command choices and
buttons particular to building and simulating systems.
• To connect element or system block nodes with a wire, position the cursor over a node. The cursor displays as a wire
coil symbol. Click at this position to mark the beginning of the wire and drag the mouse to a location where a bend is
needed. Click again to mark the bend point. You can make multiple bends.
• Right-click to undo the last wire segment added.
• To start a wire from another wire, select the wire, right-click and choose Add wire, then click to mark the beginning
of the wire.
• To terminate a wire, click on another element node or on top of another wire.
• To cancel a wire, press the Esc key.
• When placing or positioning an element, alignment guidelines automatically display when the element nodes align
with another element. To automatically add a wire between the nodes, press the Shift key when placing the element.
Circuit elements include models, sources, ports, probes, measurement devices, data libraries, and model libraries that
can be placed in a circuit schematic for linear and non-linear simulations.
System blocks include channels, math tools, meters, subcircuits, and other models for system simulations.
• To view elements or system blocks, click the Elements tab. The Elements Browser replaces the Project Browser
window.
• To expand and collapse the model categories, click the + or - symbol to the left of the category name to view or hide
its subcategories. When you click on a category/subcategory, the available models display in the lower window pane.
If there are more models than the window can show, a vertical scroll bar displays to allow you to scroll down to see
all of the models.
• To place a model into a schematic or system diagram, simply click and drag it into the window, release the mouse
button, right-click to rotate it if needed, position it, and click to place it.
• To edit model parameters, double-click the element graphic in the schematic or system diagram window. An Element
Options dialog box displays for you to specify new parameter values. You can also edit individual parameter values
by double-clicking the value in the schematic or system diagram and entering a new value in the text box that displays.
Press the Tab key to move to the next parameter when editing.
NOTE: Choose Draw > More Elements to display the Add Circuit Element or Add System Block dialog box to search for
elements. Press the Ctrl key while clicking a column header to change which column is used to filter.
Subcircuits allow you to construct hierarchical circuits by including a subcircuit block in a schematic (insert a schematic
inside of another schematic). The circuit block can be a schematic, a netlist, an EM structure, or a data file.
• To add a subcircuit to a schematic, click Subcircuits in the Elements Browser. The available subcircuits display in the
lower window pane. These include all of the schematics, netlists, and EM structures associated with the project, as
well as any imported data files defined for the project.
• To use a data file as a subcircuit, you must first create or add it to the project. To create a new data file, choose Project
> Add Data File > New Data File. To import an existing data file, choose Project > Add Data File > Import Data File. Any
new or imported data files automatically display in the list of available subcircuits in the Elements Browser.
• To place the desired subcircuit, simply click it and drag it into the schematic window, release the mouse button, position
it, and click to place it.
• To edit subcircuit parameters, select the subcircuit in the schematic window, right-click, and choose Edit Subcircuit.
Either a schematic, netlist, EM structure, or data file opens in the workspace. You can edit it in the same way that you
would edit the individual circuit block types.
Subcircuits allow you to construct hierarchical systems and to import results of circuit simulation directly into the system
block diagram.
• To create a subcircuit to a system diagram, choose Project > Add System Diagram > New System Diagram or Import
System Diagram and then click Subcircuits under System Blocks in the Element Browser. The available subcircuits
display in the lower window pane.
• To place the desired subcircuit, simply click and drag it into the system diagram window, release the mouse button,
position it, and click to place it.
• To edit subcircuit parameters, select the subcircuit in the system diagram window, right-click, and choose Edit Subcircuit.
• To add a system diagram as a subcircuit to another system diagram, you must first add ports to the system that is
designated as a subcircuit.
To add ports to a schematic or system diagram, expand the Ports category in the Elements Browser. Under Circuit Elements
or System Blocks, click Ports or one of its subgroups, for example, Harmonic Balance. The available models display in
the lower window pane.
Drag the port into the schematic or system diagram window, right-click to rotate it if needed, position it, and click to
place it.
For a shortcut when placing ports and ground, click the Ground or Port buttons on the toolbar, position the ground or
port, and click to place it.
To edit port parameters, double-click the port in the schematic or system diagram window to display an Element Options
dialog box.
NOTE: You can change the port type after placing it by double-clicking the port and selecting a Port type on the Port
tab of the dialog box.
Creating EM Structures
EM structures are arbitrary multi-layered electrical structures such as spiral inductors with air bridges.
To create an EM structure, right-click the EM Structures node in the Project Browser, and choose New EM Structure.
After you specify an EM structure name and select a simulator, an EM structure window opens in the workspace and
the Project Browser displays the new EM structure under EM Structures. In addition, the menu and toolbar display new
choices particular to drawing and simulating EM structures.
An EM structure window
opens in the workspace
NOTE: The EM structure examples presented in this guide use Cadence AXIEM® 3D planar EM analysis.
Before you draw an EM structure, you must define an enclosure. The enclosure specifies things such as boundary
conditions and dielectric materials for each layer of the structure.
To define an enclosure, double-click Enclosure under your new EM structure in the Project Browser to display a dialog
box in which you can specify the required information.
After you define the enclosure, you can draw components such as rectangular conductors, vias, and edge ports in the
Layout Manager.
You can view EM structures in 2D (double-click the EM structure node in the Project Browser) and 3D (right-click the
EM structure node in the Project Browser and choose View 3D EM Layout), and you can view currents and electrical fields
using the Animate buttons on the EM 3D Layout toolbar.
Display 2D and 3D
views of the structure
Double-click to define
an Enclosure
To create a layout representation of a schematic, click the schematic window to make it active, then choose View > Layout.
A layout window tab opens with an automatically-generated layout view of the schematic.
With a schematic window active, you can also click the View Layout button on the toolbar to view the layout of a schematic.
The resulting layout contains layout cells representing electrical components floating in the layout window. Choose Edit
> Select All then choose Edit > Snap Objects > Snap Together to snap the faces of the layout cells together. The following
figure shows the layout view from the previous figure after a snap together operation.
When you choose View > View Layout, corresponding schematic components with default layout cells are automatically
generated for common electrical components such as microstrip, coplanar waveguide, and stripline elements. After the
layout is generated, the schematic window displays in blue the components that do not map to default layout cells, and
displays in magenta the components that do have default layout cells. You must use the Layout Manager to create or
import layout cells for components without them. For more information see “Using the Layout Manager”.
You can draw in the schematic layout window using the Draw tools to build substrate outlines, draw DC pads for biasing,
or to add other details to the layout. In this mode, the layout is not part of a schematic element and therefore does not
move as part of the snapping process.
To modify layout attributes and drawing properties, and to create new layout cells for elements without default cells,
click the Layout tab to open the Layout Manager.
The Layer Setup node in the Layout Manager defines layout attributes such as drawing properties (for example, line color
or layer pattern), 3D properties such as thickness, and layer mappings. To modify layer attributes, double-click the node
(named "default.lpf" in the previous figure) below the Layer Setup node. You can also import a layer process file (LPF)
to define these attributes by right-clicking Layer Setup and choosing Import Process Definition.
The Cell Libraries node in the Layout Manager allows you to create artwork cells for elements that do not have default
layout cells. The powerful Cell Editor includes such features as Boolean operations for subtracting and uniting shapes,
coordinate entry, array copy, arbitrary rotation, grouping, and alignment tools. You can also import artwork cell libraries
such as GDSII or DXF into the AWR Design Environment platform by right-clicking the Cell Libraries node and choosing
Import Cell Library.
After creating or importing cell libraries, you can browse through the libraries and select the desired layout cells to
include in your layout. Click the + and - symbols to expand and contract the cell libraries, and click the desired library.
The available layout cells display in the lower window pane.
After you define a cell library, you can assign cells to schematic elements. You can also use a cell directly in a schematic
layout by clicking and dragging the cell into an open schematic layout window, releasing the mouse button, positioning
it, and clicking to place it.
To export a schematic layout to GDSII, DXF, or Gerber formats, click the layout window to make it active, and choose
Layout > Export Layout. To export a layout cell from the cell libraries, select the cell node in the Layout Manager, right-click
and choose Export Layout Cell.
To create a graph, right-click Graphs in the Project Browser and choose New Graph to display a dialog box in which to
specify a graph name and graph type. An empty graph displays in the workspace and the graph name displays under
Graphs in the Project Browser. The following graph types are available:
To specify the data that you want to plot, right-click the new graph name in the Project Browser and choose Add
Measurement. An Add Measurement dialog box similar to the following displays to allow you to choose from a
comprehensive list of measurements.
To set VSS system simulation frequency, double-click the System Diagrams node in the Project Browser or choose Options
> Default System Options, and then specify frequency values on the Basic tab in the System Simulator Options dialog box.
To run a simulation on the active project, choose Simulate > Analyze. The simulation runs automatically on the entire
project, using the appropriate simulator (for example, linear simulator, harmonic balance nonlinear simulator, or 3D-planar
EM simulator) for the different documents of the project.
When the simulation is complete, you can view the measurement output on the graphs and easily tune and/or optimize
as needed.
You can perform limited simulations by right-clicking the Graphs node or its subnodes to simulate only the graphs that
are open, only a specific graph, or simulate for just one measurement on a graph.
The real-time tuner lets you see the effect on the simulation as you tune. The optimizer lets you see circuit parameter
values and variables change in real-time as it works to meet the optimization goals that you specified. These features are
shown in detail in the linear simulator chapter.
You can also click the Tune Tool button on the toolbar. Select the parameters you want to tune and then click the Tune
button to tune the values. As you tune or optimize, the schematics and associated layouts are automatically updated!
When you re-run the simulation, only the modified portions of the project are recalculated.
Scripts are Visual Basic programs that you can write to do things such as automate schematic-building tasks within the
AWR Design Environment platform software. To access scripts, choose Tools > Scripting Editor or any of the options on
the Scripts menu.
Wizards are Dynamic Link Library (DLL) files that you can author to create add-on tools for the AWR Design Environment
platform; for example, a filter synthesis tool or load pull tool. Wizards display under the Wizards node in the Project
Browser.
To access online Help, choose Help from the main menu bar or press the F1 key anytime during design creation. The
Help topic that displays is context sensitive-- it depends on the active window and/or type of object selected. The following
are examples:
Data Types
All VSS blocks have input and output nodes which handle (and operate on) data belonging to one of four basic data
types: Digital, Real, Complex or Complex Envelope, or Unset. Each VSS block node color corresponds to its data type:
green for Digital, yellow for Real, red for Complex or Complex Envelope (CE), and white for an Unset data type. Unset
nodes indicate the block supports two or more data types. You can double-click an unset node to redefine it as a specific
node type. For example, ADD, an n-input adder (located in the Element Browser under System Blocks in the Math Tools
category) has Unset nodes by default, signifying that it adds the data coming into its nodes and provides the sum at its
output node regardless of the data type. Another example is the behavioral amplifier AMP_B (located in the Element
Browser under System Blocks in the RF Blocks > Amplifiers category), which also has its ports unset. The amplifier block
supports both real and complex signals, but does not support digital signals.
Digital data types comprise streams of digital data with abrupt transitions (such as a pseudo-random sequence of bits
generated by a source to perform a Monte-Carlo simulation of a digital communication system). Real data refers to any
real waveform observed in communication systems, for example, sinusoids, real passband noise, or possibly a sawtooth
waveform. You can use these two data types to represent any waveform encountered in natural system design. Complex
data deserves more attention because it is a compact way to represent complex baseband data (with frequency content
concentrated around DC, as required by modern communication systems), as well as real passband waveforms via the
CE signal representation.
Parameter details include the following Data Types: Integer, Real, Complex, Data Model, Name Element, String,
Enumeration, and Vector.
In general, sampling an analog signal into a discrete time representation is an information-lossless operation only if the
sampling frequency exceeds two times the highest frequency content of the analog signal. In such cases, recovery of the
original analog waveform from its sampled stream is typically perfect via an ideal lowpass filter. Otherwise, a phenomenon
known as aliasing occurs, and it is not possible to reconstruct the original analog waveform based on the sampled stream.
This concept places a significant burden on any time-domain systems simulator, because in a simulated transmitter/receiver
chain it forces the overall sampling frequency to be at least twice the highest frequency component anywhere in the
system. This is somewhat wasteful, since up- or down-conversion chains usually include carrier-modulated passband
signals of relatively low frequency content (bandwidth) concentrated around a very high frequency carrier. In principle,
the signal of interest is the modulating signal and not the carrier, and assuming an interest in a narrow band of frequencies
around a center frequency, this modulating signal can be more efficiently represented by its Complex Envelope (CE),
assuming the frequencies very far away from the carrier are filtered out anyway. For example, consider a GSM signal,
which has a bandwidth of a few hundred kHz, but is modulated on a 1.9 GHz carrier. In principle, a sampling frequency
of 5 MHz (more correctly, 5 Msamples/sec) can adequately describe the signal in its CE form, but to also comfortably
sample the carrier, the sampling frequency must be at least 3.8 GHz, and more comfortably 5 GHz, or 5 Gsamples/sec.
It is obvious how the two different approaches can result in a simulation speed difference of three orders of magnitude.
VSS software utilizes the CE representation of signals whenever possible to gain the tremendous advantage in simulation
speed discussed here, without compromising simulation accuracy. Specifically, a real passband signal x (t), representing
a narrowband modulation centered about a high frequency sinusoidal carrier with frequency fc is mathematically represented
as:
where xc(t) and xs(t) are real lowpass signals, with bandwidth much smaller than the carrier frequency fc, and are called
the in-phase and quadrature components of the real passband signal x (t). The signal can be represented by its Complex
Envelope (CE) form c (t), where:
j2π f ct
x(t) = Re{c(t) ⋅ e }
VSS software utilizes the CE lowpass equivalent signal c (t) wherever possible to allow for orders-of-magnitude-faster
narrowband simulation. To this end, each signal at any point in the simulation has a sampling frequency, and a center
frequency tag associated with it. For example, a plain tone at frequency 2 GHz for which the real passband signal is
x(t)=cos2πfct, can be easily generated using the SINE block (located under System Blocks in the Sources > Waveforms
category) with its output node set to complex and represented in CE form:
• by leaving the center frequency (CTRFRQ) empty and setting frequency (FRQ) to 2GHz resulting in c(t) = 1.0 + j0.0
bearing a center frequency tag of 2 GHz, or
• by having a center frequency (CTRFRQ) of, for example, 1 GHz and frequency (FRQ) of 2 GHz, in which case c(t)
= exp(j2π·(FRQ - CTRFRQ)t) bears a center frequency tag of 1 GHz, or
• by having a center frequency (CTRFRQ) of 0 and a FRQ of 2 GHz, in which case c(t) = exp(j2π·2e9·t) bears a center
frequency tag of 0.
When working with RF tones, the TONE block, located under System Blocks in the RF Blocks > Sources category, is
preferred, as all frequencies are specified in absolute frequency and power is specified in dB/dBm.
All of these CE forms show the same spectrum plot (the 2 GHz tone corresponding to the real passband signal
x(t)=cos2πfct), although the time domain waveform generated by VSS software is internally different. The center frequency
tag is a parameter propagated implicitly, but internally the signal is modeled as a CE lowpass equivalent.
As another example, the GSM signal previously discussed would also be in CE lowpass equivalent form in VSS software;
a sequence of complex numbers sampled at 5 MHz and bearing only a center frequency tag of 1.9 GHz, and not a series
of real samples taken at a rate of 5 Gsamples/sec. Of course, if the latter more cumbersome approach is desired, VSS
software provides the capability to switch any signal to real passband representation via the CE-to-Real block (CE2R)
located under System Blocks in the Converters > Complex Envelope category.
Note that VSS software treats complex signals depending on their context, their center frequency, and the block performing
the operation. For example, blocks found under the System Blocks Math Tools > Math Functions category simply perform
standard complex arithmetic on their input complex signals, treating them as ordinary complex numbers. Modulation
mapper and detection blocks in the Modulation category treat the series of complex samples as baseband I/Q symbols.
Blocks designed to operate on RF signals, such as those in the Filters or RF Blocks categories treat complex signals with
non-zero center frequency as CE representations of a real signal centered around a carrier at the center frequency. When
the center frequency is 0, by default the RF amplifier, RF mixer and circuit filter blocks treat the complex signal as a
pair of real signals representing separate I and Q channels.
f f
[ f c − 2s , f c + 2s ]
where f c is the center frequency of the signal, and f s is the sampling frequency.
Therefore, to examine the frequency content (for example, the Adjacent Channel Power Ratio, or ACPR) of the previous
GSM signal at a frequency offset of 30 MHz from the 1.9 GHz carrier (the signal's center frequency tag), you must make
sure the sampling frequency is at least fs≥60 MHz, so that the signal exists between 1.87 GHz and 1.93 GHz, or
[fc-fs/2,fc+fs/2] .
Because VSS software is geared towards digital communication applications, many of its blocks (and the entire system
diagram) have Data Rate and Oversampling associated with them.
The Data Rate is the number of digital communication symbols per second. Inside an VSS system diagram the default
data rate is denoted _DRATE. A symbol can differ in meaning, depending on the modulation specifics. For example,
for the previous GSM, the symbol rate or data rate is set by the standard as 270.833 ksymbols/sec, and since in this case
every symbol is one bit, it translates to 270.833 kbits/sec. To simulate a satellite link using Quadrature Phase Shift Keying
(QPSK) modulation to transmit 100 Mbits/sec, you set the symbol rate (or data rate) of the QPSK source block to 50
Msymbols/sec (because each QPSK symbol corresponds to 2 bits). The QPSK_SRC block is found under the System
Blocks Modulation > QPSK category.
Each of these symbols can be represented with any number of samples (oversampling). Inside an VSS system diagram
the default number of samples per symbol is denoted _SMPSYM. For the QPSK example, you can have 10 samples per
symbol, which is a total sampling frequency of:
As previously explained, if the center frequency tag of this QPSK signal is 5 GHz, the signal will exist for 250 MHz on
either side of the 5 GHz carrier (from 4.75 GHz to 5.25 GHz).
For digital communications, the data rate and oversampling values, and the center frequency tag of each signal are
important. You can set these values on the Basic tab of the System Simulator Options dialog box (as shown in the
following example) or in the source blocks in the simulation (usually at the beginning of a simulated chain) and they are
subsequently propagated along any constructed simulation chain. At any point in the system diagram you can use the
System Tools measurements or annotations to check the propagated parameters.
Most of the blocks that have either a DRATE or SMPFRQ parameter have a default value of empty for these parameters.
When the value is empty, the blocks will automatically determine their data rate or sampling frequency. If a downstream
block somehow specifies the sampling frequency, either directly or due to other blocks connected to it, that value is used.
Otherwise, the rate is determined from the default settings from the Options dialog box of a system diagram.
Parameter Propagation
An important VSS feature for increasing ease of use is parameter propagation, introduced briefly when previously
discussing propagation of the sampling frequency and the center frequency by all VSS blocks to other blocks further
downstream in the simulation chain. This procedure of parameter propagation is bidirectional, and also occurs from the
end to the beginning of a simulation chain. In VSS software, the forward and backward parameter propagation occurs
for a variety of parameters, a small set of which are center frequency, sampling frequency, oversampling, signal and
noise levels, and delay and phase distortion.
For example, you can place a QPSK transmitter inside a system diagram, configure it for the properties of the specific
transmission scenario (data rate, pulse shaping, power, etc.), and not repeat the corresponding settings in a receiver block.
This is done automatically via parameter propagation by the simulator at the start-up phase of each simulation. Even
more impressively, you can place an amplifier block and/or a filter somewhere in the simulation chain between the
transmitter and receiver, and then not need to adjust the signal arriving at the receiver for delay and phase rotation
introduced by the filter, or for gain introduced by the amplifier. All of these parameters are automatically propagated
forward by the simulator, thus allowing the receiver block to adjust the received signal for them. As a result, even the
first time, you can set up and run a relatively involved BER simulation of a transmitter/receiver chain in just a few
minutes.
The details of parameter propagation for each individual block are explained in the block Help and AWR Visual System
Simulator Modeling Guide. For instance, an amplifier doesn't alter the propagated value of the center frequency tag at
its input, but does alter the propagated signal and noise levels, according to its gain (and possibly noise figure). A mixer
block with a center frequency f m,c arriving at its input node, and a center frequency f LO,c arriving at its LO node propagates
as a center frequency either the sum
f m,c + f LO,c
| f m,c − f LO,c |
(if it is in down-conversion mode). A filter block increases the propagated value of delay at its output by adding to the
propagated delay at its input the amount of delay it introduces itself to the signal.
X AM (t) = C ⋅ [A + m(t)]cosωc ⋅ t
where m(t) is the message data signal; a sinusoidal signal of frequency 2 GHz given by:
m(t) = Bcosω ⋅ t
A represents the DC level of the message signal and B and C represent the amplitudes of the carrier and the message
signal respectively.
• Creating a project
• Setting default system settings
• Creating a system diagram
• Placing blocks in the system diagram
• Specifying System Simulator options
• Adding graphs and measurements
• Running the simulation and analyzing the results
NOTE: The Quick Reference document lists keyboard shortcuts, mouse operations, and tips and tricks to optimize your
use of the Cadence AWR Design Environment® platform. Choose Help > Quick Reference to access this document.
Creating a Project
The first step in building and simulating your designs is to create a project. You use a project to organize and manage
related designs, and everything associated with them, in a tree-like directory structure.
The example you create in this chapter is available in its complete form as AM.emp. To access this file from a list of
Getting Started example projects, choose File > Open Example to display the Open Example Project dialog box, then
Ctrl-click the Keywords column header and type "getting_started" in the text box at the bottom of the dialog box. You
can use this example file as a reference.
To create a project:
1. Start the VSS program if not already started by clicking Start on your desktop, choosing All Programs > AWRDE 16 >
AWR Design Environment 16, or by double-clicking the corresponding shortcut on your desktop. For information on
installing, setting up shortcuts and starting the program, see the Installation Guide.
2. Choose File > New Project.
3. Choose File > Save Project As. The Save As dialog box displays.
4. Navigate to the directory in which you want to save the project, type "AM" as the project name, and then click Save.
The project name displays in the title bar.
1. Choose Options > Drawing Layers. The LPF Options dialog box displays.
2. Under the General folder in the left pane, click Units. Verify that your settings match those in the following figure.
You can choose units by clicking in the Multiplier column.
1. Choose Options > Project Options. The Project Options dialog box displays.
2. Click the Global Units tab and verify that your settings match those in the following figure. You can choose units by
clicking the arrows to the right of the display boxes.
1. Choose Project > Add System Diagram > New System Diagram. The New System Diagram dialog box displays.
2. Type "AM", and click Create. A system diagram window displays in the workspace and the "AM" system diagram
displays under System Diagrams in the Project Browser.
1. Click the Elements tab to display the Element Browser. The Elements Browser replaces the Project Browser window.
2. If necessary, click the + symbol to the left of the System Blocks node to expand the system blocks tree.
3. Click the Sources category. A Real Source block (SRC_R) displays in the lower pane.
4. Select the SRC_R block and drag it onto the system diagram, release the mouse button, and then click to position the
element as shown in the following figure. This serves as the DC level of the message signal.
NOTE: You can view the full name of a system block in the Elements Browser before dragging it to the system
diagram by moving the mouse over the block or right-clicking it and choosing Details.
5. Expand the Sources category, then click the Waveforms group. Select the SINE block and place it as shown in the
following figure.
NOTE: Before clicking to position a block, you can rotate the block in 90-degree increments by right-clicking it.
6. Expand the Math Tools category, then select the ADD block and place it as shown in the following figure.
7. Expand the Modulation category, then click the Analog group. Select the AM_MOD block and place it as shown in
the following figure.
8. Select the SINE block in the system diagram. Choose Edit > Copy then Edit > Paste. Place the duplicated block as
shown in the following figure.
1. Place the cursor over the node of the SRC_R block. The cursor displays as a wire coil symbol.
2. Click and drag the displayed wire to input node 2 of the ADD block, then click to place the wire.
3. Repeat steps 1 and 2 to complete the connections shown in the following figure.
SINE
ID=A2
FRQ=1 GHz
AMPL=1
PHS=0 Deg
CTRFRQ=
SMPFRQ= ADD
ID=A3 AM_MOD
PRIMINP=0 ID=A4
NIN=2 MODIDX=1
1 3 1 3
SRC_R 2
ID=A1
2
VAL=1
COL=1
TCOL=
SMPFRQ= SINE
ID=A5
FRQ=1 GHz
AMPL=1
PHS=0 Deg
CTRFRQ=
SMPFRQ=
4. In the Elements Browser, click the Meters category. Individually select three Test Points (TP) and place them as shown
in the following figure. You can also click the Test Point button on the toolbar. While placing the test points, right-click
to rotate them as needed. The simulation results can be displayed at these test points.
SINE
ID=A2 TP
FRQ=1 GHz ID=TP2
AMPL=1
PHS=0 Deg
CTRFRQ=
SMPFRQ= ADD
ID=A3 AM_MOD
PRIMINP=0 ID=A4
NIN=2 MODIDX=1
1 3 1 3 TP
ID=TP1
SRC_R 2
ID=A1
2
VAL=1
COL=1
TCOL= TP
SMPFRQ= SINE ID=TP3
ID=A5
FRQ=1 GHz
AMPL=1
PHS=0 Deg
CTRFRQ=
SMPFRQ=
NOTE: You can also connect blocks by moving them to snap their nodes together. When they are properly connected
a small green square displays and the connection wire extends if you move either block. If you do not see the green
square, try to drag one of the blocks into place again.
1. In the system diagram, double-click the SINE block connected to the ADD block. The Element Options dialog box
displays.
2. Click Show Secondary to display the secondary parameters. Edit the parameters to the values shown in the following
figure, then click OK.
3. Double-click the SINE block connected to the AM_MOD block. If the secondary parameters are not visible, click
Show Secondary. Change the FRQ parameter value to "40", the AMPL parameter to "3", the CTRFRQ parameter to
"0", and the SMPSYM parameter to "10", then click OK.
4. Double-click the SRC_R block and change the SMPSYM parameter to "10", then click OK.
5. Double-click the AM_MOD block and change the MODIDX parameter to "2", then click OK.
NOTE: You can also simply double-click the parameter value displayed on the system diagram to modify a single
parameter.
1. Choose Options > Default System Options. The System Simulator Options dialog box displays.
2. Click the Basic tab, and type "160" GHz as the Sampling Frequency Span and "160" as the Oversampling Rate, then
click OK.
To create a graph:
Adding a Measurement
To add a measurement to the graph:
1. Right-click the "Amplitude Mod" graph in the Project Browser, and choose Add Measurement. The Add Measurement
dialog box displays. You can also right-click anywhere in the graph window and choose Add New Measurement, or
click the Add New Measurement button on the toolbar.
2. For measurement type, select System under Measurement Type and select WVFM under Measurement.
3. Type "2" as the Time Span and select ns as the Units and select Real as the Complex Modifier.
4. Ensure that Test Point is TP.TP1, then click Add. The AM:Re(WVFM(TP.TP1,2,5,1,0,0,0,0,0)) measurement displays
under the "Amplitude Mod" graph in the Project Browser.
NOTE: You can custom name a test point by double-clicking its ID number.
1. Choose Simulate > Run/Stop System Simulators. Let the simulation run for 5 seconds, then choose Simulate > Run/Stop
System Simulators again to stop the simulation. You can also click the Run/Stop System Simulators button on the
toolbar. The simulation response in the following graph should display.
Amplitude Mod
30
20
10
-10
-20
Re(WVFM(TP.TP1,2,5,1,0,0,0,0,0))
AM
-30 Re(WVFM(TP.TP2,2,5,1,0,0,0,0,0))
AM
8597.938 8598.438 8598.938 8599.438 8599.938
Re(WVFM(TP.TP3,2,5,1,0,0,0,0,0))
Time (ns)
AM
NOTE: The Quick Reference document lists keyboard shortcuts, mouse operations, and tips and tricks to optimize your
use of the Cadence® AWR Design Environment® platform. Choose Help > Quick Reference to access this document.
To create a project:
1. Choose Options > Drawing Layers. The LPF Options dialog box displays.
2. Under the General folder in the left pane, click Units. Verify that your settings match those in the following figure.
You can choose units by clicking in the Multiplier column.
1. Choose Options > Project Options. The Project Options dialog box displays.
2. Click the Global Units tab and verify that your settings match those in the following figure. You can choose units by
clicking the arrows to the right of the display boxes.
1. Choose Project > Add System Diagram > New System Diagram. The New System Diagram dialog box displays.
2. Type "QAM" as the diagram name and click Create.
3. Click the Elements tab to display the Elements Browser.
4. Expand the Sources category, then click the Random group. Select the RND_D block and place it on the system
diagram as shown in the following figure.
5. Expand the Modulation category, then click the QAM group. Select the QAM_TX block and place it on the system
diagram as shown in the following figure.
6. Click the Channels category, then select the AWGN block and place it on the system diagram as shown in the following
figure.
7. In the Modulation category, click the General Receivers group. Select the RCVR block and place it on the system
diagram as shown in the following figure.
8. In the Meters category, select a Test Point (TP) or click the Test Point button on the toolbar and add a Test Point (TP)
between the QAM_TX and AWGN blocks. Add another Test Point (TP) at the output of the RCVR block as shown
in the following figure.
9. Connect the blocks and test points as shown in the following figure.
TP
ID=TP1
QAM_TX
ID=A2
M=16
OUTLVL=0
OLVLTYP=Avg. Power (dBm)
SYMRATE=_DRATE Hz AWGN
RND_D CTRFRQ=0 GHz ID=A3
ID=A1 PLSTYP=Root Raised Cosine PWR=0
M=2 ALPHA=0.35 PWRTYP=Auto
RATE= PLSLN= LOSS=0 dB RCVR
ID=A4
1 2
R D
IQ 3 TP
ID=TP2
5 4
10. Double-click the RND_D block in the system diagram and verify that the M parameter is "2".
Because M = 2, RND_D is set by default to generate a digital signal that varies between "0" and "1". Leave all other
secondary parameters at their default settings.
11. Double-click the QAM_TX block and change the parameters as shown in the following figure.
In this dialog box you can control several parameters as well as the pulse shaping filter used on the in-phase and
quadrature-phase signals.
12. RCVR automatically adjusts its parameters to agree with the transmitter parameters, so maintain the default settings.
13. Choose Options > Default System Options. The System Simulator Options dialog box displays. Verify that your settings
match those in the following figure, then click OK.
1. In the Project Browser, right-click Graphs and choose New Graph, or click the Add New Graph button on the toolbar.
Type "Complexbaseband" as the graph name, select Rectangular as the graph type, and click Create.
2. Repeat step 1 to create a second graph named "Receiver Constellation". For graph type select Constellation , then
click Create.
3. To view all of the windows, choose Window > Tile Vertical.
4. In the Project Browser, right-click "Complexbaseband" and choose Add Measurement. The Add Measurement dialog
box displays.
5. Select System as the Measurement Type and select WVFM as the Measurement.
6. Select TP.TP1 as the Test Point, and ensure that Time Span is "10" and Units is Symbols, then click OK.
7. In the Project Browser, right-click "Receiver Constellation" and choose Add Measurement.
8. Create an IQ measurement using the settings in the following figure, then click OK.
1. Choose Simulate > Run/Stop System Simulators. Let the simulation run for few seconds, then choose Simulate > Run/Stop
System Simulators again to stop the simulation. Simulation responses similar to the following graphs should display.
Receiver Constellation
2
-1
IQ(TP.TP2,50,1,0,0,0,0)
-2 QAM
-1.5 -1 -0.5 0 0.5 1 1.5 2
Complexbaseband
10
-5
Re(WVFM(TP.TP1,10,1,1,0,0,0,0,0))
QAM
-10
367356 367361 367366 367371 367376 367381 367386 367391 367396
Time (ns)
The received constellation does not appear as expected because the power spectral density of the noise source is set
to 0 dB. Note that the time waveform of the complex baseband signal does not show eight samples per symbol as
specified in the System Simulator Options dialog box.
2. Select the Complexbaseband graph window and click the Options button on the toolbar. The Rectangular Plot Options
dialog box displays.
3. Click the Traces tab.
4. Using the drop-down symbol and line selectors, specify a triangle as the symbol and a solid line as the line style, as
shown in the following figure. (The lines will display on the Complexbaseband waveform).
Line selector
Symbol selector
Notice how the scatter plot changes. The simulation responses in the following graphs should display. On the
Complexbaseband graph the triangular symbols display on the waveform. There are now eight samples per symbol.
You can choose Options > Default System Options to return to the System Simulator Options dialog box and change
the values under Sampling Frequencies/Data Rates to observe the different results.
Complexbaseband
10
-5
Re(WVFM(TP.TP1,10,1,1,0,0,0,0,0))
QAM
-10
96056 96060 96064 96068 96072 96076 96080 96084 96088 96092 96096
Time (ns)
Receiver Constellation
1
0.5
-0.5
IQ(TP.TP2,50,1,0,0,0,0)
QAM
-1
-1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1
Note that your graphs may not look identical to these examples due to printed size limitations.
NOTE: Right-click in the graph to zoom in and zoom out or to choose Options to edit the appearance of any graph.
You can also click the Options button on the toolbar.
7. To observe the impact of the noise level, set the Upper and Lower values to "0" and "-50" respectively. Click the tuning
bar and slide it to adjust the values while observing the results on the constellation graph.
8. Click the "x" at the upper right of the Tuner to close it.
9. Stop the simulation by choosing Simulate > Run/Stop System Simulators or clicking the Run/Stop System Simulators
button on the toolbar.
10. To de-tune the PWR parameter of the AWGN block, choose Simulate > Tune Tool or click the Tune Tool button on the
toolbar and then click the PWR parameter value again. The parameter value displays in color. To disengage the Tune
Tool, click anywhere in the design area.
11. Double-click the PWR parameter and change the value to 0.
The BER block is now set to test 1e7 (MXTRL * TBLKSZ) bits. It registers a minimum of 25 errors before a BER
computation is generated for each value of Eb_NO. The BER block internally generates the original data source and
compares the received bits to the transmitted bits. The last point on the BER curve (the 11th value of Eb_NO) takes
the longest to plot.
9. To add a BER plot to the project, add a rectangular graph named "BER".
10. In the Project Browser, right-click "BER" and choose Add Measurement.
11. Create a BER measurement using the settings in the following figure, then click Add to save the measurement.
12. To verify the obtained results with the theoretical results, add another measurement to the BER graph using the settings
in the following figure, then click OK.
13. Verify that the PWR parameter value of the AWGN block is 0dB.
14. Select the BER graph window, then right-click and choose Options, or click the Options button on the toolbar.
15. Click the Axes tab and set Left1 to Log scale by selecting Left1 under Choose Axis and selecting the Log Scale check
box, then click OK.
16. Choose Simulate > Run/Stop System Simulators or click the Run/Stop System Simulators button on the toolbar to start
the simulation. As the simulation runs, the BER curve is generated. Note that the size of the received constellation
becomes clearer as the power is increased or, as Eb_NO is swept from 0 dB to 10 dB.
The simulation stops when 25 errors are counted at Eb_NO = 10dB. The simulation response in the following graph
should display.
BER
1
BER(BER.BER1,0,0)
QAM
QAM_BERREF(BER.BER1,0,0)
QAM
.1
.01
.001
0 1 2 3 4 5 6 7 8 9 10
In this example the signal power was swept to plot the BER. You can sweep the noise power, keeping the signal power
constant. Change the PWR parameter of the AWGN block to -Eb_NO and the OUTLVL parameter of the QAM_TX
block to 0 to get the same BER curve achieved here.
17. Choose File > Save Project.
18. Similar to the BER version, you can create a SER vs Eb/N0 graph. In the Project Browser, select "QAM" under System
Diagrams, then drag and drop the QAM icon onto the System Diagrams node. A "QAM 1" system diagram is created
under System Diagrams.
19. Click the "QAM 1" window to make it active, then delete the BER block.
20. In the Elements Browser, expand the Meters category, then click the BER group. Select the SER block, drag it to the
"QAM 1" system diagram, and connect it to the "D" node of the RCVR block.
21. Add a rectangular graph named "SER" to the project.
22. Add a measurement to the "SER" graph using the settings in the following figure.
23. Add another measurement to the "SER" graph using the settings in the following figure.
24. Select the "SER" graph window, then right-click and choose Options or click the Options button on the toolbar.
25. Click the Axes tab and set Left1 to Log scale by selecting Left1 under Choose Axis and selecting the Log Scale check
box, then click OK.
26. Choose Simulate > Run/Stop System Simulators or click the Run/Stop System Simulators button on the toolbar to start
the simulation. As the simulation runs, the SER curve is generated. The simulation response in the following graph
should display.
SER
1
.1
.01
BER(SER.SER1,0,0)
QAM_1
QAM_BERREF(SER.SER1,0,0)
QAM_1
.001
0 1 2 3 4 5 6 7 8 9 10
You can also plot BER and SER against Es/N0 by specifying Es/N0 as the SWPTYP parameter in BER and SER
blocks.
1. In the Project Browser select the "BER" graph, right-click and choose Duplicate As > Tabular. A new table (graph)
named "BER 1" displays under Graphs.
2. To change the numerical precision of the table, right-click inside the "BER 1" graph window and choose Options. to
display the Tabular Graph Options dialog box. Make any desired changes , then click OK. To edit a measurement,
right-click the measurement column header and choose Edit Measurement.
3. Save and close the project.
This exercise presents features of the VSS environment and demonstrates its integration with the Microwave Office
circuit simulation environment. You add an actual Microwave Office filter circuit to the QAM system that you built in
the previous example, and then you measure the impact of the filter on BER performance as you change filter parameters.
NOTE: The Quick Reference document lists keyboard shortcuts, mouse operations, and tips and tricks to optimize your
use of the Cadence AWR Design Environment suite. Choose Help > Quick Reference to access this document.
1. Open your QAM project if it is not already open. (Choose File > Open Project and select the directory in which you
saved QAM.emp). If you did not build this project, you can get the project file from the C:\Program
Files\AWR\AWRDE\16\Examples or C:\Program Files (x86)\AWR\AWRDE\16\Examples directory.
2. In the Project Browser, right-click Circuit Schematics and choose Import Schematic. Select the Ideal_filter.sch schematic
from the C:\Program Files\AWR\AWRDE\16\Examples or C:\Program Files (x86)\AWR\AWRDE\16\Examples
directory. The following filter schematic displays.
1. Choose Options > Project Options and click the Frequencies tab to set the project frequency.
2. Specify the Start,Stop, and Step values shown in the following figure, click Apply to display the values in Current
Range, and then click OK.
8. Expand the Meters category, then click the Network Analyzers group. Select the VNA block, place it on the system
diagram, and connect it across the BPFB block as shown in the following figure.
9. Repeat the previous step to connect a VNA block across the LIN_S block as shown in the following figure.
VNA VNA
ID=M1 ID=M2
PSTART=0 dBm PSTART=0 dBm
PSTOP= PSTOP=
PSTEP= PSTEP=
PVARNAME="" PVARNAME=""
FSTART=1 GHz FSTART=1 GHz
FSTOP=10 GHz FSTOP=10 GHz
FSTEP=0.2 GHz FSTEP=0.2 GHz
FVARNAME="" FVARNAME=""
CTRFRQ=5.5 GHz CTRFRQ=5.5 GHz
BPFB
ID=F1
LIN_S
LOSS=0 dB
ID=S1
N=10
NET="Ideal filter"
FP1=4 GHz
INPORT={1}
FP2=6 GHz
OUTPORT={2}
AP=3.0103 dB
NOISE=RF Budget only
NOISE=RF Budget only
10. Double-click the BPFB block to display the Element Options dialog box. On the Parameters tab, set the N parameter
to "10", the FP1 parameter to "4" GHz, and the FP2 parameter to "6" GHz.
11. On the Filter Design tab, set the Impl. display frequencies, Expected source resistance, and Expected load resistance
options as shown in the following figure, then select the Design, IIR Implementation, and S21 check boxes. Click the
Axis Limits button and in the Axis Settings dialog box, set the Frequency (GHz) option Left/Top column to "1" and the
Right/Bottom column to "9". On the graph space, click Click to view response to view the resulting graph.
12. In both of the VNA blocks, set FSTART to "1" GHz, FSTOP to "10" GHz, FSTEP to "0.2" GHz, CTRFRQ to "5.5"
GHz, and the NOISE secondary parameter to "RF Budget only".
13. Create a rectangular graph named "Ideal Filter Response" and add a measurement to the graph using the settings in
the following figure, then click Add.
14. Add another measurement to the same graph using the settings in the following figure, then click Add. Click Close.
15. Run both the Harmonic Balance simulator and System simulator. The simulation response in the following graph
should display.
-50
-100
-150
-200
DB(|S(2,1)|)
Ideal_filter
-250 DB(|S21_PS(VNA.M2,1,0,1,-1,1,0,1,0,0,1000,0,10,0,-1,0,-1,0,0.5,0,0,0)|)[x]
Filter Test
-300
1 2 3 4 5 6 7 8 9 10
Frequency (GHz)
16. Create another rectangular graph named "Filter Response 1" and add a measurement to the graph using the settings
in the following figure, then click Apply.
17. Add another measurement to the same graph except select Angle as the Complex Modifier and deselect dB, then click
OK.
18. Run the System Simulator. The simulation response in the following graph should display after making some axes
changes: Double-click the legend in the graph. In the Rectangular Plot Options dialog box, click the Measurements
FilterResponse1
0 200
-50 133
-100 66.7
-150 0
-200 -66.7
-250 -133
-300 -200
1 2 3 4 5 6 7 8 9 10
Frequency(GHz)
DB(|S21_PS(VNA.M1,1,0,1,-
1,1,0,1,0,0,1000,0,10,0,-
1,0,-1,0,0.5,0,0,0)|)[x](L)
Filter Test
Ang(S21_PS(VNA.M1,1,0,1,-
1,1,0,1,0,0,1000,0,10,0,-
1,0,-1,0,0.5,0,0,0))[x](R, Deg)
Filter Test
1. On the "QAM" system diagram, double-click the QAM_TX block CTRFRQ parameter and set the value to "5" GHz.
2. In the Elements Browser, expand the RF Blocks category, then expand the Linear Filters group and click the Simulation
Based subgroup. Select the LIN_S block and place it on the system diagram between the AWGN and RCVR blocks.
Connect the blocks, moving them as necessary.
3. Change the LIN_S block NET parameter to "Ideal filter"and the NOISE parameter to "RF Budget only" as shown
in the following figure, then click OK.
4. Add a test point at the output of the LIN_S block as shown in the following figure.
Eb_NO=sweep(stepped(0,10,1))
QAM_TX BER
ID=A2 ID=BER1
M=16 VARNAME=""
OUTLVL=Eb_NO VALUES=
RND_D OLVLTYP=Bit Energy (dB) LIN_S OUTFL=""
ID=A1 SYMRATE= TP AWGN ID=S1
M=2 CTRFRQ=5 GHz ID=TP1 ID=A3 NET="Ideal filter" TP
RATE= PLSTYP=Rectangular PWR=0 INPORT=1 ID=TP3 BER
ALPHA=0.35 PWRTYP=Auto OUTPORT=2
PLSLN= LOSS=0 dB NOISE=RF Budget only RCVR
ID=A4
1 2
R D
3 TP
IQ ID=TP2
5 4
Specifying "TP.TP3" for Test Point places the measurement after the LIN_S block.
3. Add another PWR_SPEC measurement with the same settings, but choose TP.TP1 (the test point prior to the AWGN
block) for Test Point, then click Add. Click Close.
4. Run the System Simulator. Note that the BER performance has slightly degraded. The simulation response in the
following graph should display.
Power Spectrum
40
20
DB(PWR_SPEC(TP.TP3,1000,0,10,0,-1,0,-1,1,0,0,0,0,0)) (dBm)
-20 QAM
DB(PWR_SPEC(TP.TP1,1000,0,10,0,-1,0,-1,1,0,0,0,0,0)) (dBm)
QAM
-40
4 4.2 4.4 4.6 4.8 5 5.2 5.4 5.6 5.8 6
Frequency (GHz)
Note that as you change the filter parameters, you can improve or severely degrade the system's BER performance. You
may also want to experiment with other filters.
• Importing a Cadence Microwave Office® software amplifier model into a system project
• Working with the VSS Vector Signal Analyzer block
NOTE: The Quick Reference document lists keyboard shortcuts, mouse operations, and tips and tricks to optimize your
use of the Cadence AWR Design Environment® platform. Choose Help > Quick Reference to access this document.
To import an amplifier:
1. Open the QAM_ Filter.emp project you saved in the previous chapter if not already open. If you did not build this
project, you can find the project file in the Program Files\AWR\AWRDE\16\Examples or C:\Program Files
(x86)\AWR\AWRDE\16\Examples directory.
2. In the Project Browser, right-click Circuit Schematics and choose Import Schematic. Select the amplifier.sch schematic
from the Program Files\AWR\AWRDE\16\Examples directory
4. In the QAM system diagram, separate the QAM_TX block and the TP1 test point and disconnect the wire between
them.
5. In the Elements Browser under System Blocks, expand the RF Blocks category, then expand the Amplifiers group and
click the Simulation Based subgroup. Select the NL_S block and place it between the QAM_TX and AWGN blocks
as shown in the following figure.
6. Connect the NL_S block to the QAM_TX and AWGN blocks.
7. Double-click the NL_S block and set its NET parameter to "amplifier" to reference the amplifier schematic (include
the quotes) and set the other parameters as shown in the following figure, then click OK.
Eb_NO=sweep(stepped(0,10,1))
QAM_TX TP TP BER
ID=A2 ID=TP1 ID=TP3 ID=BER1
M=16 VARNAME=""
OUTLVL=Eb_NO NL_S VALUES=
RND_D OLVLTYP=BitEnergy(dB) ID=S2 LIN_S OUTFL=""
ID=A1 SYMRATE= NET="amplifier" AWGN ID=S1
M=2 CTRFRQ=5GHz SIMTYP=AplacHB (AP_HB) ID=A3 NET="Idealfilter"
RATE= PLSTYP=Rectangular DCPOUT=No PWR=0 INPORT={1} BER
ALPHA=0.35 NOISE=RFBudgetonly PWRTYP=Auto OUTPORT={2}
PLSLN= RFIFRQ= LOSS=0dB NOISE=RFBudgetonly RCVR
ID=A4
1 2
R D
3 TP
IQ ID=TP2
5 4
8. Start the simulation. Note that in the BER graph the X-axis now spans from 2dB to 12dB because the BER Meter
with its Auto setting now picks up on the propagated signal-to-noise ratio (SNR). Recall that the gain of the amplifier
is 2dB.
For information about propagated parameters such as SNR, as well as group delay and phase rotation, see the online
Help for the System Tools measurements in the VSS Measurement Catalog.
9. Save the project as "QAM_Filter_Amp".
1. In the Elements Browser under System Blocks, expand the Meters category, then click the Network Analyzers group.
Select the VSA block and place it above the NL_S block in the QAM system diagram.
2. Connect the two ports of the VSA block to either side of the NL_S block as shown in the following figure.
VSA
ID=M1
VARNAME=""
VALUES=0
Eb_NO=sweep(stepped(0,10,1))
SRC MEAS
QAM_TX TP TP BER
ID=A2 ID=TP1 ID=TP3 ID=BER1
M=16 VARNAME=""
OUTLVL=Eb_NO NL_S VALUES=
RND_D OLVLTYP=BitEnergy(dB) ID=S2 LIN_S OUTFL=""
ID=A1 SYMRATE= NET="amplifier" AWGN ID=S1
M=2 CTRFRQ=5GHz SIMTYP=AplacHB (AP_HB) ID=A3 NET="Idealfilter"
RATE= PLSTYP=Rectangular DCPOUT=No PWR=0 INPORT={1} BER
ALPHA=0.35 NOISE=RFBudgetonly PWRTYP=Auto OUTPORT={2}
PLSLN= RFIFRQ= LOSS=0dB NOISE=RFBudgetonly RCVR
ID=A4
1 2
R D
3 TP
IQ ID=TP2
5 4
6. Add a System > NW Analyzer category AMtoAM INST measurement to the graph using the following settings, then
click OK.
7. In the Project Browser, right-click the "amplifier" schematic and choose Options to display the Options dialog box.
8. Click the Frequencies tab and verify that your settings match those shown in the following figure, then click OK.
9. Start the harmonic balance simulation by choosing Simulate > Analyze or clicking the Analyze button on the toolbar.
This updates the AMtoAM graph with harmonic balance results.
10. For best graph appearance, select the AMtoAM graph window, right-click and choose Options or click the Options
button on the toolbar, click the Traces tab, and on trace 1 change the symbol from a triangle to none.
11. Start the system simulation by choosing Simulate > Run/Stop System Simulators or clicking the Run/Stop System
Simulators button on the toolbar. As the simulation runs, a marker moves along the plot that resulted from the harmonic
balance simulation. The marker moves because you are sweeping the Eb_NO variable. The marker indicates the
operating point of the system relative to the 1dB compression point of the amplifier. As you decrease the value of the
1dB compression point, the operating point of this system moves into the nonlinear region of the amplifier.
AMtoAM
60
p1
50
40
30
20 AMtoAM(PORT_2)[1,X] (dBm)
amplifier
10
DB(AMtoAM_INST(VSA.M1,1024,0,0,0,0)) (dBm)
QAM
0
0 5 10 15 20 25 30 35 40 45 50 55 60
Power (dBm) p1: Freq = 5 GHz
For information on the LIN_S, NL_S and VSA blocks, see the online Help for the Meters and RF Blocks categories
of System Blocks in the VSS System Block Catalog.
Note that these examples use ideal behavioral models for the filter and amplifier. You can also use actual circuit
models for the filter and amplifier.
• Creating an RF chain
• Setting up measurements
• Performing yield analysis
NOTE: The Quick Reference document lists keyboard shortcuts, mouse operations, and tips and tricks to optimize your
use of the Cadence AWR Design Environment® platform. Choose Help > Quick Reference to access this document.
Creating an RF Chain
The complete example is available as RF_Budget_Analysis.emp. To access this file from a list of Getting Started example
projects, choose File > Open Example to display the Open Example Project dialog box, then Ctrl-click the Keywords column
header and type "getting_started" in the text box at the bottom of the dialog box. You can use this example file as a
reference.
To create an RF chain:
For both PORT_SRC elements change the SpecType parameter to "Specify freq", the Freq parameter to "1" GHz,
the Pwr parameter of the port connected to AMP_B to "-10" dBm, and the Pwr parameter of the port connected to
MIXER_B to "10" dBm.
The other system blocks are located in groups under the RF Blocks category. AMP_B is under the Amplifiers group;
change its NOISE parameter to "RF Budget only" and leave the other parameters as shown. RFATTEN is under the
Passive >Attenuators group; change its NOISE parameter to "RF Budget only" and leave the other parameters as
shown. MIXER_B is under the Mixers group; change its NOISE parameter to "RF Budget only", the NF parameter
to "6 dB", and leave the other parameters as shown.
nf=3
MIXER_B
ID=A3
MODE=SUM
LOMULT=1
FCOUT=
RFIFRQ=
GCONV=-10 dB
P1DB=10 dBm
IP3=30 dBm
LO2OUT=-25 dB
PORT_SRC AMP_B IN2OUT=-20 dB
P=1 ID=A2 LO2IN=-25 dB
ZS=_Z0 Ohm GAIN=10 dB OUT2IN=-25 dB
Signal=Sinusoid P1DB=10 dBm PLO=10 dBm
SpecType=Specify freq IP3= PLOUSE=Spur reference only
SpecBW=Use doc freq span IP2= RFATTEN PIN=-10 dBm
Sweep=None MEASREF= ID=S1 PINUSE=IN2OUTHOnly
Freq=1 GHz OPSAT= LOSS=3 dB NF=6 dB PORT
Pwr=-10 dBm NF=nf dB NOISE=RF Budget only NOISE=RF Budget only P=3
Ang=0 Deg NOISE=RF Budget only Z=_Z0 Ohm
RFIFRQ= IN OUT
LO
PORT_SRC
P=2
ZS=_Z0 Ohm
Signal=Sinusoid
SpecType=Specify freq
SpecBW=Use doc freq span
Sweep=None
Freq=1 GHz
Pwr=10 dBm
Ang=0 Deg
7. Select Complex or Complex Envelope as the Node data type and click OK.
Adding Measurements
1. Add a rectangular graph named "RF Budget Analysis".
2. Add a cascaded noise figure measurement using the settings shown in the following figure.
3. Add a cascaded operating point gain measurement using the settings shown in the following figure.
4. In the "RF Budget Analysis" graph options, click the Measurements tab and set the C_GP measurement to display on
the Right axis.
5. Choose Options > Default System Options to display the System Simulator Options dialog box. Click the RF Options
tab and select the Impedance Mismatch Modeling check box.
6. Choose Simulate > Analyze, or click the Analyze button on the toolbar.
RF Budget Analysis
7 p1 10
DB(C_NF(PORT_1,PORT_3,1,0,0,0))[1] (L)
RF Chain
6 6.25
DB(C_GP(PORT_1,PORT_3,0,0,0))[1] (R)
RF Chain
5 2.5
3 -5
2. Choose Simulate > Yield Analysis. The Yield Analysis dialog box displays. Ensure that the Analysis Method is Yield
Analysis.
3. Click Start to start yield analysis. The response in the following graph should display. To stop the analysis at any time
click Stop.
RF Budget Analysis
8 10
p1
DB(C_NF(PORT_1,PORT_3,1,0,0,0))[1] (L)
RF Chain
6 6.25
DB(C_GP(PORT_1,PORT_3,0,0,0))[1] (R)
RF Chain
4 2.5
0 -5
4. To change the display of the yield data, open the graph options dialog box by right-clicking the graph window and
choosing Options, then clicking the Yield Data tab to specify settings.
Fixed-point signals in VSS software are supported by a set of modules which are listed under the Fixed Point category
in the Element Browser, and contain a set of properties that are propagated and/or modified by these modules. Modules
that have more than one fixed-point input propagate the properties of the signal connected to its primary node, unless
otherwise specified in the module Help.
Fixed-Point Properties
Fixed-point signals contain a number of properties that are propagated and/or modified by individual blocks. They fall
into one of two categories: configuration properties and state properties.
Configuration Properties
Configuration properties are associated with fixed-point signals; they are the same for all samples of a fixed-point signal.
The configuration properties of a fixed-point signal are:
• Bit Width: the bit width of the fixed-point values. This value cannot be larger than 64.
• Decimal Width: decimal width of the fixed-point values. This value cannot be larger than the bit width property.
• Double Scale: the scale that is applied to the real value before being converted to fixed-point.
• OvrFloMgmt: overflow management determines how overflow is handled if it occurs. Available options are:
• Saturate
• Allow roll-over.
• UndrFloMgmt: underflow management determines how underflow is handled if it occurs. Available options are:
• Truncate
• Round-off.
• Binary Format: binary format of the fixed-point values. Available options are:
• Two's Complement
• Unsigned
• Sign & Magnitude
• One's Complement
• Offset Binary
The following table illustrates the binary representation methods with 4-bit patterns. Note that Sign & Magnitude and
One's Complement formats have two representations for zero (+0 and -0), while they do not have a representation for
the smallest negative number that can be represented by other formats (-8, in this case).
State Properties
State properties are associated with fixed-point samples, i.e., they may be different for each sample of a fixed-point
signal. The state properties of a fixed-point signal are:
• Bit Content: the binary representation of the fixed-point value in the appropriate binary format.
• Overflow Flag: a flag that indicates that an overflow has occurred during the calculation of the fixed-point value, and
that action was taken according to the OvrFloMgmt setting.
Annotations
To facilitate fixed-point designs, a number of annotations are provided in the Annotate/System/Fixed Point measurement
category. These annotations display the configuration properties of the fixed-point signals at output nodes of modules
that support fixed-point signals. They can be very useful in creating and debugging fixed-point designs. Fixed-point
annotations are:
Fixed-Point Example
The example you create in this chapter is available in its complete form as FxP_FIR.emp. To access this file from a list
of Getting Started example projects, choose File > Open Example to display the Open Example Project dialog box, then
Ctrl-click the Keywords column header and type "getting_started" in the text box at the bottom of the dialog box. You
can use this example file as a reference.
This example demonstrates a few of the fixed-point capabilities of VSS software by building a simple 12-tap FIR filter
using discrete modules. A tone of 31.25 kHz is converted to fixed-point, squared, filtered, and then converted back to
real. The filter is designed as a symmetric 12-tap FIR with 8-bit coefficients.
NOTE: The Quick Reference document lists keyboard shortcuts, mouse operations, and tips and tricks to optimize your
use of the Cadence® AWR Design Environment® platform. Choose Help > Quick Reference to access this document.
1. Choose Options > Drawing Layers. The LPF Options dialog box displays.
2. Under the General folder in the left pane, click Units. Verify that your settings match those in the following figure.
You can choose units by clicking in the Multiplier column.
1. Choose Options > Project Options. The Project Options dialog box displays.
2. Click the Global Units tab and verify that your settings match those in the following figure. You can choose units by
clicking the arrows to the right of the display boxes.
1. Choose Project > Add Data File > New Data File > Text Data File. The New Text Data File dialog box displays.
2. Type "FIR_coeffs" as the file name and click Create.
3. Enter the following filter coefficients in the file, then close it:
53
55
76
96
111
129
These represent only half of the filter coefficients, since the filter is symmetric. They are calculated for a 12-tap
equiripple low-pass FIR filter with a cutoff frequency of 10 kHz, stop band frequency of 100 kHz, passband ripple 1
dB, and minimum stopband attenuation of 50 dB. The coefficients are quantized to 8-bits and stored in a Two's
Complement format.
1. Choose Project > Add System Diagram > New System Diagram. The New System Diagram dialog box displays.
2. Type "FxP FIR" as the diagram name and click Create.
3. Click the Elements tab to display the Elements Browser.
4. Expand the Fixed Point category, then click the Signal Processing group. Select the DELAY_FP block and place it on
the system diagram. Repeat this step ten times (there will be 11 delay blocks in a 12-tap FIR filter) and connect them
in series as shown in the following figure.
5. Click the Fixed Point > Math Tools group and add 6 ADD_FP and 6 SCALE_FP blocks to the system diagram, connecting
them as shown in the following figure. As mentioned previously, the FIR filter is designed to be symmetric, allowing
use of only half the number of multiplications compared to a non-symmetric filter.
6. Add one more ADD_FP block to the system diagram and double-click it. Change the NIN parameter to "6" and click
OK. Connect its inputs as shown in the following figure.
7. Add one more SCALE_FP block and connect its input to the output of the last ADD_FP block.
8. Select a REFMT block and place it on the system diagram. Connect its input to the output of the last SCALE_FP
block.
9. Choose Draw > Add Data Input Port or click the Add Data Input Port button on the toolbar and add a Data Input Port.
Connect it to the input of the left-most DELAY_FP block.
10. Choose Draw > Add Data Output Port or click the Add Data Output Port button on the toolbar and add an Data Output
Port. Connect it to the output of the REFMT block.
11. Choose Draw > Add Equation or click the Equation button on the toolbar and add the following equation to the system
diagram to load the filter coefficients to the Taps variable, then click OK:
Taps = DataFile("FIR_coeffs")
12. Add the following two equations:
Tbw = 8
Tdw = 0
These two variables are used to set the bit and decimal widths for the FIR filter.
13. Double-click the bottom left SCALE_FP block. Change the SCL parameter to Taps[1], click the Show Secondary
button if secondary parameters are hidden, change SCLBITW to Tbw and SCLDECW to Tdw, then click OK.
14. Repeat the previous step with the remaining SCALE_FP blocks by using increasing indices for the SCL values, i.e.,
Taps[2], Taps[3], etc.
15. Double-click the SCALE_FP block connected to the ADD_FP output and set the SCL parameter to "1/1024", SCLBITW
to "11" and SCLDECW to "10".
16. Double-click the REFMT block and set the OUTBITW parameter to "14", OUTDECW to "7", UNDRFLOMGMT
to Truncate and OUTSCALE to "2", then click OK.
SCALE_FP
DELAY_FP DELAY_FP DELAY_FP DELAY_FP DELAY_FP DELAY_FP DELAY_FP DELAY_FP DELAY_FP DELAY_FP DELAY_FP ID=A26 REFMT
ID=A8 ID=A9 ID=A10 ID=A11 ID=A12 ID=A13 ID=A14 ID=A15 ID=A16 ID=A17 ID=A18 ADD_FP PRESCL=0 ID=A24
DLY=1 DLY=1 DLY=1 DLY=1 DLY=1 DLY=1 DLY=1 DLY=1 DLY=1 DLY=1 DLY=1 ID=A7 SCL=1/1024 OUTBITW=14
PORTDIN IVAL=0 IVAL=0 IVAL=0 IVAL=0 IVAL=0 IVAL=0 IVAL=0 IVAL=0 IVAL=0 IVAL=0 IVAL=0 PRIMINP=0 PSTSCL=0 OUTDECW=7 PORTDOUT
P=1 NIN=6 P=2
1 (x+a)*b+c 5 1 2
1 7
a b c
2 2 3 4
3
4
SCALE_FP
5
ID=A19
ADD_FP PRESCL=0 6
ID=A1 SCL=Taps[6]
PRIMINP=0 PSTSCL=0
NIN=2
1 3 1 (x+a)*b+c 5
SCALE_FPa b c
ID=A20
ADD_FP PRESCL=02 3 4
2
ID=A6 SCL=Taps[5]
PRIMINP=0 PSTSCL=0
NIN=2
1 3 1(x+a)*b+c 5
SCALE_FPa b c
ID=A21
ADD_FP PRESCL=02 3 4
2
ID=A5 SCL=Taps[4]
PRIMINP=0 PSTSCL=0
NIN=2
1 3 1
(x+a)*b+c 5
SCALE_FPa b c
ID=A22
ADD_FP PRESCL=02 3 4
2
ID=A4 SCL=Taps[3]
PRIMINP=0 PSTSCL=0
NIN=2
1 3
(x+a)*b+c 5
1
SCALE_FPa b c
ID=A23
ADD_FP PRESCL=02 3 4
2
ID=A3 SCL=Taps[2]
PRIMINP=0 PSTSCL=0
NIN=2
1 3
(x+a)*b+c 5
1
SCALE_FPa b c
ID=A25
ADD_FP PRESCL=02 3 4
ID=A2 2 SCL=Taps[1]
PRIMINP=0 PSTSCL=0
NIN=2
1 3 1
(x+a)*b+c 5
a b c
2 3 4
2
1. Choose Project > Add System Diagram > New System Diagram. The New System Diagram dialog box displays.
2. Type "Main Diagram" as the diagram name and click Create.
3. Click the Elements tab to display the Elements Browser.
4. Expand the Sources category, then click the Waveforms group. Select the SINE block and place it on the system
diagram as shown in the following figure.
5. Expand the Fixed Point category, then click the Converters group. Select the R2FPR block and place it on the system
diagram. Double-click it and set the BITW parameter to "8", and DECW to "7".
6. From the same category, select the FPR2R block and place it on the system diagram.
7. Under the Fixed Point category, click the Math Tools group , then select the SQR_FP block and place it on the system
diagram. Double-click it and set the OUTDECW parameter to "7".
8. Double-click the SINE block in the system diagram, change the value of the FRQ parameter to "0.03125", and click
OK. This corresponds to a frequency of 31.25 kHz, as the FRQ units are MHz.
9. Choose Draw > Add Subcircuit or click the Subcircuit button on the toolbar. The Add Subcircuit Element dialog box
displays. Select Fxp_FIR and click OK. Place the subcircuit on the main system diagram.
10. In the Meters category, select a Test Point (TP) or click the Test Point button on the toolbar and add a Test Point (TP).
Rename it TP_fxp_in. Repeat this step for three other test points named TP_fxp_sqr, TP_fxp_flt, and TP_fxp_out,
as shown in the following figure.
11. Connect all of the blocks as shown in the following figure.
TP TP TP TP
SINE ID=TP_fxp_in ID=TP_fxp_sqr ID=TP_fxp_flt ID=TP_fxp_out
ID=A8
FRQ=0.03125 MHz R2FPR
AMPL=1 ID=A4 SUBCKT
PHS=0 Deg SCALE=1 ID=S1 FPR2R
CTRFRQ= BITW=8 SQR_FP NET="FxP FIR" ID=A33
SMPFRQ= DECW=7 ID=A2 SCALE=
R 2 1 2 FP(R)
x
FP(R) R
12. Choose Options > Default System Options. The System Simulator Options dialog box displays. Verify that your settings
match those in the following figure, then click OK.
1. In the Project Browser, right-click Graphs and choose New Graph, or click the Add New Graph button on the toolbar.
Select Rectangular as the graph type, type "Fixed Point Signals" as the graph name, and then click Create.
2. Repeat step 1 to create a second rectangular graph named "Real Value Signals" and click Create.
3. To view all of the windows, choose Window > Tile Vertical.
4. In the Project Browser, right-click "Fixed Point Signals" and choose Add Measurement. The Add Measurement dialog
box displays.
5. Select System as the Measurement Type and WVFM as the Measurement. Select Real as the Complex Modifier. Select Main
Diagram under the Block Diagram, TP.TP_fxp_in as the Test Point, set the Time Span to "60" and the Units to Symbols,
then click Add.
6. Select TP.TP_fxp_sqr as the Test Point, leave all other settings the same, and then click Add.
7. Select TP.TP_fxp_flt as the Test Point, leave all other settings the same, and click Add then Close.
8. Similarly, add a measurement to the "Real Value Signals" graph using the settings above, but using test point
TP.TP_fxp_out.
Adding Annotations
Fixed-point annotations may be used to facilitate design, implementation, and verification of fixed-point arithmetic.
To add annotations:
1. Right-click "Main Diagram" under the System Diagrams node in the Project Browser and choose Add Annotation. In
the Add System Diagram Annotation dialog box, ensure that "Main Diagram" is selected in Top Level Block Diagram.
2. Double-click System under Measurement Type and then select Fixed Point.
3. Select the desired annotation under Measurement and then click Add. After adding all desired annotations, click Close.
When the simulation is run, annotations display at every fixed-point type node.
1. Right-click on the "Fixed Point Signals" graph window and choose Options. The Rectangular Plot Options dialog box
displays. Click the Traces tab. Set Color, Symbol, and Line settings for all curves as shown in the following figure.
Under Symbol, set the Interval value to "1", and click OK.
2. Repeat these settings for the curve of the "Real Value Signals" graph.
3. Choose Simulate > Run/Stop System Simulators. Let the simulation run for a few seconds, then choose Simulate >
Run/Stop System Simulators again to stop the simulation. The simulation results should be similar to the results in the
following two figures.
4. In the "Fixed Point Signals" graph, the blue curve represents the input signal converted to fixed-point. The red curve
is the output of the SQR_FP block, and the purple curve is the output of the FIR filter.
FxP Input
Fixed Point Signals
200 Mag Squared
FxP FIR output
100
-100
-200
180139 180149 180159 180169 180179 180189 180199
Time (us)
5. The curve in the "Real Value Signals" graph represents the output of the FPR2R block (the real-valued signal that is
obtained after the conversion from fixed point of the signal represented by the purple curve in the "Fixed Point Signals"
graph).
0.35
0.3
0.25
0.2
0.15
0.1
180139 180149 180159 180169 180179 180189 180199
Time (us)
FSK Example
In this example you build and simulate a complete transmitter-channel-receiver chain for a Binary Frequency Shift
Keying (BFSK) transmission. The example shows how to generate a frequency shift keying (FSK) source using elementary
blocks or a "black box" FSK modulator (called FSK_SRC) in Cadence® Visual System Simulator™ (VSS) communications
and radar systems design software. It is not always necessary to construct a receiver and transmitter using elementary
blocks. For many common modulation methods, corresponding black boxes already exist in VSS software. This exercise,
however, is intended to show that using the black box or creating one using the elementary blocks produces identical
results. You will also construct an FSK demodulator using basic blocks, and verify the performance of the system by
setting different parameters. For more information and application notes on FSK modulation visit our website at
www.awr.com.
NOTE: The Quick Reference document lists keyboard shortcuts, mouse operations, and tips and tricks to optimize your
use of the Cadence AWR Design Environment® platform. Choose Help > Quick Reference to access this document.
Prior to starting the following projects, ensure your system options are correctly set by right-clicking the System Diagrams
node in the Project Browser and choosing Options. On the System Simulator Options dialog box Basic tab, under Simulation
Bandwidth Options set the Sampling Frequency Span to "8 GHz" and the Oversampling Rate to "8".
4. Add and connect a Test Point (TP) as shown in the following figure.
FSK_SRC
ID=A1
MOD=2-FSK
OUTLVL=0
OLVLTYP=Bit Energy (dB)
RATE=1000
CTRFRQ=1 GHz TP
MODIDX=.707 ID=TP1
PLSTYP=Rectangular
ALPHA=0.35
L=
PLSLN=
7. Run the System Simulator and then stop it after a few moments. The power spectrum of the FSK signal generated by
the block displays as shown in the following graph.
Spectrum
20
-20
-40
-60
DB(PWR_SPEC(TP.TP1,1000,0,10,0,-1,0,-1,1,0,0,0,1,0)) (dBm)
CP_BFSK
-80
0.999996 0.999998 1 1.000002 1.000004
Frequency (GHz)
1. In the Elements Browser, expand the Sources category, then click the Random group. Select the RND_D block and
place it on the CP_BFSK system diagram as shown in the following figure.
2. Double-click the RND_D block and set the RATE parameter to "1000" and the RSEED parameter to "{0}" (with the
brackets).
3. Expand the Converters category, then click the Analog-Digital group. Select the DAC block and place it on the system
diagram as shown in the following figure. Set the OVRSMP parameter to _SMPSYM. SMPSYM is automatically set
to 8. Eight samples per symbol is the default setting defined in the System Simulator Options dialog box on the Basic
tab. Thus, output of the DAC is a real signal with 8 samples per bit and at a rate of 1KHz.
4. Expand the Modulation category, then click the Analog group. Select the FM_MOD block and place it on the system
diagram as shown in the following figure.
5. Set the FM_MOD block KF parameter to "353.5" = (0.707/2*1000).
6. Expand the Sources category, then click the Waveforms group. Select the SINE block and place it on the system as
shown in the following figure.
7. Set the SINE block AMPL parameter to "5". Leave the FRQ parameter at 1GHz.
8. Add a second Test Point (TP) named "BFSK" to the system as shown in the following figure.
TP
DAC FM_MOD ID=BFSK
ID=A3 ID=A4
KF=353.5
D A 1 3
2
RND_D
ID=A2
M=2
RATE=1000
SINE
ID=A5
FRQ=1 GHz
AMPL=5
PHS=0 Deg
CTRFRQ=
SMPFRQ=
9. From the System > Spectrum category, add a power spectrum measurement (PWR_SPEC) at test point BPSK to the
"Spectrum" graph.
10. Run the System Simulator. Note that there is no change in the graph since the waveform from the cascade of these
blocks is identical to the waveform of the FSK_SRC block, hence the overlap.
To view the spectrum of each setup separately, you can display them in separate graphs or toggle the measurements
one at a time under Graphs in the Project Browser (right-click and choose Toggle Enable). These steps confirm that
the two methods for setting up the transmitter create identical BFSK waveforms.
11. Add a third Test Point (TP) named "Data" between the RND_D block and the DAC block.
14. Add a measurement to the graph for the phase produced by the FSK modulator using the settings in the previous step,
but select BFSK as the Test Point and Angle as the Complex Modifier, then click OK.
15. Select the "TX Waveforms" graph and click the Options button on the toolbar or right-click the graph and choose
Options.
16. Click the Axes tab and select Left 1. Clear the Auto limits check box and enter "-1" as the Min and "2" as the Max. Under
Divisions, clear the Auto divs. check box and enter "1" as the Step.
17. Select Right 1. Clear the Auto limits check box and enter "-200" as the Min and "200" as the Max, then click Apply.
18. Click the Measurements tab and under Select Measurement to edit, select BFSK:Ang(WVFM(TP.BFSK,20,3,1,0,0,0,0,0)],
then under Choose axis, select Right 1 and click Apply.
19. Click the Traces tab and under Style, select measurement 1, then under Weight select a heavier line from the
corresponding drop-down box at the bottom of the dialog box. Select measurement 2, then select a square as the
Symbol style from the corresponding drop-down box at the bottom of the dialog box.
20. Run the System Simulator. Observe that the transmitted phase behaves exactly as expected in a binary FSK transmission
scheme with rectangular frequency shaping pulse.
Your simulation response should look similar to the following graph, which shows that the phase of the modulated
waveform increases in a ramp when the input bit is "1", and decreases in a ramp with the same slope when the input
bit is "0". The phase remains continuous between different bit intervals, and the phase jumps in the plot are only the
effect of the wrap-around when the phase exceeds +/- 180-degrees. The data waveform (binary 1's and 0's) is plotted
on the left axis while the phase waveform is shown on the right axis.
Re(WVFM(TP.Data,20,3,1,0,0,0,0,0)) (L)
CP_BFSK
TX Waveforms Ang(WVFM(TP.BFSK,20,3,1,0,0,0,0,0)) (R, Deg)
2 CP_BFSK 200
1.5 133
1 66.7
0.5 0
0 -66.7
-0.5 -133
-1 -200
9479000000 9484000000 9489000000 9494000000 9499000000
Time (ns)
To complete the channel-receiver chain for BFSK (using the following figure as a reference):
1. In the Elements Browser, click the Channels category. Select the AWGN block and place it on the CP_BFSK system
diagram.
2. Click the Filters category, then select the PLSSHP block and place it on the system diagram.
3. Expand the Modulation category, then click the Analog group. Select the FM_DSCRM block and place it on the system
diagram.
4. Click the Signal Processing category, then select the INTG_DMP block and place it on the system diagram.
5. Expand the Converters category, then click the Analog-Digital group. Select the ADC block and place it on the system
diagram.
6. Add a 4th, 5th and 6th test point at the outputs of the FM_DSCRM, INTG_DMP and ADC blocks respectively, and
label them (in order) "Discrim", "INT_Dump", and "ADC" as shown in the following figure.
7. Click the Signal Processing category, then select the ALIGN block and place it on the system diagram. Connect node
2 to the ADC test point.
8. Expand the Meters category, then click the BER group. Select the BER_EXT block and place it on the system diagram.
FSK_SRC
ID=A1 TP
MOD=2-FSK ID=INT_Dump
OUTLVL=0 NFFT=
OLVLTYP=Bit Energy (dB) TP NAVG=
RATE=1000 ID=Discrim WNDTYP=Auto
CTRFRQ=1 GHz TP NFFT= WNDPAR=
MODIDX=.707 ID=TP1 NAVG= WNDWHN=Auto
PLSTYP=Rectangular WNDTYP=Auto SLDFRC=0.5
ALPHA=0.35 SMPSYM= SMPSYM=
L= MSKTYP=Pass-Symmetric
PLSLN= PLSSHP
ID=F1 TP
Eb_No = sweep(stepped(1,13,2)) PLSTYP=Gaussian (BT) ID=ADC
AWGN ALPHA=0.5 NFFT=
PLSLN= INTG_DMP
ID=A6 FM_DSCRM ADC NAVG=
NRMTYP=Unit Pulse Gain ID=A8
PWR=-Eb_No ID=A7 ID=A9 WNDTYP=Auto
N=8
PWRTYP=Normalized N0/2 (dBW/Hz) IMPTYP=Auto GAIN=1/353.5 M=2 BUFSZ=
INTGTYP=Sum*Time Step
LOSS=0 dB IPHS= SMPSYM=
A D
CPFSK dt
Digital TP
ID=Data
DLYCOMP=Yes
INTRPSPN=0
GAINCOMP=None
VALUES=
OUTFL=""
Source TP
PHSCOMP=Reversal only
SMPLPTS=
1 3
BER
(RND_D) DAC
ID=A3
FM_MOD
ID=A4
ID=BFSK
KF=353.5 2 4
D A 1 3 5 6
BER Meter
2
RND_D
ID=A2
M=2 DAC ALIGN
RATE=1000
FM Modulator (Compensate for system delay)
SINE
ID=A5
FRQ=1 GHz
AMPL=5
PHS=0 Deg
CTRFRQ=
SMPFRQ= Tx LO
Eb_No = sweep(stepped(1,13,2))
10. Set the AWGN block PWR parameter to "-Eb_No" and its PWRTYP parameter to Normalized N0/2(dBW/Hz).
11. Set the PLSSHP block PLSTYP parameter to Gaussian (BT), NRMTYP parameter to Unit Pulse Gain, and its ALPHA
parameter to "0.5".
12. Set the FM_DSCRM block GAIN parameter to "1/353.5".
13. Set the INTG_DMP block N parameter to "8". Recall that the DAC is set to 8 samples per symbol.
14. Set the ADC block M parameter to "2".
15. On the Parameters tab of the ALIGN block, set GAINCOMP to None, PHSCOMP to Reversal only, and leave
DLYCOMP set to Basic. The ALIGN block is used to align the original data with the received data prior to the BER
detector.
16. Verify that the BER_EXT block parameters match those in the following figure.
RX Waveforms
3 0.002
2 0.0012
1 0.0004
0 -0.0004
-1 Re(WVFM(TP.Discrim,10,1,1,0,0,0,0,0)) (L)
CP_BFSK
-0.0012
Re(WVFM(TP.INT_Dump,10,1,1,0,0,0,0,0)) (R)
CP_BFSK
Re(WVFM(TP.ADC,10,3,0,0,0,0,0,0)) (L)
CP_BFSK
-2 -0.002
9469000000 9474000000 9479000000
Time (ns)
9. Add another measurement to this graph to represent the performance of a non-coherent receiver, using the settings in
the following figure, then click Add.
10. Repeat step 9 but select Coherent as Demodulation Type. This represents the performance of a coherent linear (correlation)
receiver.
11. Repeat step 9 but select Discriminator as Demodulation Type, then click Close. This represents the performance of the
nonlinear discrimination receiver, under an ideal assumption.
12. Set the BER_EXT block TXTOUT parameter to Trial statistics.
13. Run the System Simulator. A text window displays with the statistics of BER simulation.
14. Select the BER graph window, then right-click and choose Options or click the Options button on the toolbar. Click
the Traces and Axes tabs and make the appropriate changes to your graph so it looks similar to the following graph.
Make sure you select Log scale for the left axis, and set Min to "1e-7" and Max to "1".
BER
1
.1
.01
BER .001
.0001
BER(BER_EXT.BER1,0,0)
CP_BFSK
1e-005 FSK_BERREF(BER_EXT.BER1,0,1,1)
CP_BFSK
FSK_BERREF(BER_EXT.BER1,0,0,1)
1e-006 CP_BFSK
FSK_BERREF(BER_EXT.BER1,0,2,1)
CP_BFSK
1e-007
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Eb/No
The procedure in this example analyzes the effect of I/Q imbalance in a QAM signal. The complete example is available
as 16QAM_IQ_Imbalance.emp. To access this file from a list of Getting Started example projects, choose File > Open
Example to display the Open Example Project dialog box, then Ctrl-click the Keywords column header and type
"getting_started" in the text box at the bottom of the dialog box. You can use this example file as a reference.
1. Create a new project named "16QAM_IQ_Imbalance" and add a system diagram named "QAM System".
2. In the Elements Browser under System Blocks, expand the RF Blocks category. Click the Impairments subgroup, then
select the IMBAL_IQ block and place/connect it on the "QAM System" system diagram as follows. Set the DCOFFSET
parameter to "20e-3", the AMPIMBAL parameter to "0.6", and the PHIMBAL parameter to "6".
3. Expand the Modulation category, then click the QAM group. Select the QAM_SRC block and place it on the system
diagram as shown in the following system diagram figure. Set the MOD parameter to 16-QAM (Gray), the OUTLVL
parameter to "-10", the OLVLTYP parameter to Avg. Power (dBm), and the PLSTYP parameter to Raised Cosine. Set
the RATE parameter to "1e9" and the secondary parameter SMPSYM to "10". To see secondary parameters, click
Show Secondary in the lower right hand corner of the Parameters tab. The sampling frequency of the system is now
set to 10 GHz. Note that sampling frequency = data rate * samples per symbols.
4. Expand the RF Blocks category, then click the Mixers group. Add a MIXER_B block and set the parameters as shown
in the following figure. Click the secondary parameters button to show the secondary parameters, then scroll to the
bottom of the dialog box and set LOHMAX and INHMAX to "5", and IMPROD to "{1,1}", leaving other parameters
at their defaults. Note that when the secondary parameter IMPROD is set to "{1,1}" the mixer in this configuration
only generates the m=n=1 product; higher order products are not generated. See the online Help for further details on
the MIXER_B block.
5. Expand the RF Blocks category, then click the Sources group. Select the TONE block and place it on the system
diagram as shown in the following figure.
6. Set the TONE block FRQ parameter to "5.2 GHz" and the NOISE parameter to "RF Budget Only".
7. Expand the Modulation category, then click the QAM group. Select two QAM_RX blocks and place them on the system
diagram as shown in the following figure.
8. Add three test points, as shown, to complete the system diagram.
TP
ID=TP1
QAM_RX
ID=A4
1 2
R D
MIXER_B 3
ID=A2 IQ
MODE=SUM 5 4
LOMULT=1
FCOUT=
RFIFRQ= TP
GCONV=-6 dB ID=TP3
P1DB=10 dBm
IP3=30 dBm
QAM_SRC LO2OUT=-125 dB
ID=A1 IN2OUT=-20 dB
MOD=16-QAM (Gray) LO2IN=-25 dB
OUTLVL=-10 OUT2IN=-25 dB
OLVLTYP=Avg. Power (dBm) PLO=10 dBm TP
RATE=1e9 IMBAL_IQ PLOUSE=Spurreference only ID=TP2
CTRFRQ=0GHz ID=A6 PIN=-10 dBm
PLSTYP=RaisedCosine DCOFFSET=20e-3 PINUSE=IN2OUTHOnly
ALPHA=0.35 AMPIMBAL=.6 dB
NF=6 dB
PLSLN= PHIMBAL=6 Deg QAM_RX
NOISE=RFBudget only
ID=A5
1 2
IN OUT 1 2
R D
3
LO IQ
TONE 5 4
ID=A3
FRQ=5.2 GHz
PWR=10 dBm
PHS=0 Deg
CTRFRQ=
SMPFRQ=
ZS=_Z0 Ohm
TN=_TAMB DegK
NOISE=RFBudget only
PNMASK=
PNOISE=Nophase noise
5. Run the System Simulator. The simulation responses shown in the following graphs should display.
IQ(TP.TP1,200,1,0,0,0,0)
IQ QAM System
2 IQ(TP.TP2,200,1,0,0,0,0)
QAM System
-1
-2
-2 -1 0 1 2
DB(PWR_SPEC(TP.TP3,1000,0,10,0,-1,0,-1,1,0,0,0,1,0))
Power Spectrum (dBm)
0 QAM System
-50
-100
-150
-200
0.2 1.2 2.2 3.2 4.2 5.2 6.2 7.2 8.2 9.2 10.2
Frequency (GHz)
NOTE: The constellation at the output is slightly skewed. You may alter the AMPIMBAL and PHIMBAL parameters
and analyze the effect on the constellation even further. The system thus simulated has a "dirty" input signal (causing
imbalance) and a clean LO. You may also build the system with a clean input signal and a dirty LO (causing imbalance).
To do so you need to remove the IMBAL_IQ block from the MIXER_B block "IN" terminal and add it between the
TONE block and the "LO" terminal of the MIXER_B block. This also causes the output constellation to skew in a
similar pattern.
Next, you perform a phase imbalance vs. error vector magnitude (EVM) measurement using the vector signal analyzer
(VSA).
6. Expand the Meters category, then click the Network Analyzer group. Select the VSA block and place it on the system
diagram. Connect the source signal input of the VSA to the complex output of the QAM_RX that is directly connected
to the QAM_SRC. Connect the VSA's measured signal input to the complex output of the other QAM_RX.
7. Add an equation "PHASE=0" to the system diagram and set the PHIMBAL parameter of the IMBAL_IQ block to
"rad(PHASE)", and the DCOFFET and AMPIMBAL parameters to zero as shown in the following system diagram.
8. Set the VSA parameters as shown in the following figure. In this case, the PHASE variable is swept after 8000 samples
pass through the VSA. The PHASE variable is set to start at 0 degrees and sweep to 12 degrees in increments of 2
degrees.
TP
ID=TP1
QAM_RX
ID=A4
1 2
R D
3 VSA
MIXER_B IQ
ID=M1
ID=A2 VARNAME="PHASE"
5 4
MODE=SUM VALUES=stepped(0,12,2)
LOMULT=1
FCOUT=
PHASE=0 RFIFRQ=
SRC
GCONV=-6 dB TP
P1DB=10 dBm ID=TP3
IP3=30 dBm
MEAS
QAM_SRC LO2OUT=-125 dB
ID=A1 IN2OUT=-20 dB
MOD=16-QAM (Gray) LO2IN=-25 dB
OUTLVL=-10 OUT2IN=-25 dB
OLVLTYP=Avg. Power (dBm) PLO=10 dBm
RATE=1e9 IMBAL_IQ PLOUSE=Spur reference only TP
CTRFRQ=0 GHz ID=A6 PIN=-10 dBm ID=TP2
PLSTYP=Raised Cosine DCOFFSET=0 PINUSE=IN2OUTHOnly
ALPHA=0.35 AMPIMBAL=0dB NF=6 dB
PLSLN= PHIMBAL=rad(PHASE)Rad NOISE=RF Budget only QAM_RX
ID=A5
1 2
IN OUT 1 2
R D
TONE 3
ID=A3 IQ
FRQ=5.2 GHz
LO
PWR=10 dBm 5 4
PHS=0 Deg
CTRFRQ=
SMPFRQ=
ZS=_Z0 Ohm
TN=_TAMB DegK
NOISE=RF Budget only
PNMASK=
PNOISE=No phase noise
12. Run the System Simulator. The simulation response shown in the following graph should display.
EVM
0
-20
-40
-60
-80
DB(EVM_PS(VSA.M1,VSA.M1,1,1,0,200,2,0,5,0,1,1,0,0,1,0,1,0,0,1000,0,10,0))[x]
QAM System
-100
0 1 2 3 4 5 6 7 8 9 10 11 12
1. Create a new project and add a new system diagram named "IPn".
2. Expand the RF Blocks category, then click the Sources group. Select the TONE block and place it on the system
diagram. Set the TONE source FRQ parameter to "{1,1.1}" and its PWR parameter to "-10", then click OK. The tone
source will generate tone at 1GHz and 1.1GHz each with a power level of -10dBm. Note that the sampling frequency
parameter (SMPFRQ) of the TONE source is blank. The sampling frequency defaults to _SMPFRQ = 8GHz on the
System Simulator Options dialog box Basic tab.
3. Double-click on the output port (triangle) of the TONE source and set its port to Complex or Complex Envelope. The
output port displays in red.
4. Connect a test point to the output of the TONE source and name it "INPUT".
5. Expand the RF Blocks category, then click the Amplifiers group. Select and place an AMP_B block on the system
diagram. Double-click AMP_B and click Show Secondary in the Element Options dialog box that displays. Set the
IP3 parameter to "20" dBm. Leave all other parameters at their default values and click OK.
6. Connect the TONE source to AMP_B.
7. Set the NOISE parameter in all of the blocks to RF Budget only.
8. Add a test point named OUTPUT, and connect it the AMP_B output.
9. Expand the Meters category, then click the Network Analyzer group. Select and place a vector signal analyzer VSA on
the system diagram. Connect the VSA SRC input to the output of the TONE source and its MEAS input to the AMP_B
output. Your system diagram should look similar to the following figure. Leave all VSA parameters at their default
values.
VSA
ID=M1
VARNAME=""
VALUES={0}
SRC MEAS
TONE
ID=A1 AMP_B
FRQ={1,1.1} GHz TP ID=A2 TP
PWR=-10 dBm ID=INPUT GAIN=10 dB ID=OUTPUT
PHS=0 Deg P1DB=10 dBm
CTRFRQ= IP3=20 dBm
SMPFRQ=
IP2=
ZS=_Z0 Ohm
MEASREF=
T=_TAMB DegK
OPSAT=
NOISE=RF Budget only
NF=3 dB
PNMASK=
NOISE=RF Budget only
PNOISE=No phase noise
RFIFRQ=
10. Add a rectangular graph named "Input", then from the System > Spectrum category of measurements, add a power
spectrum measurement (PWR_SPEC) to the graph at test point INPUT. Set RBW/#Bins to "0.01 GHz" and set Y-Axis
Output to Power Spectrum (Pwr/Bin). Make sure to select the dBm check box, and leave all other parameters at their
default settings.
11. Run the System Simulator. The simulation response in the following graph should display.
Input
0
-100
-200
-300
DB(PWR_SPEC(TP.INPUT,0.01,5,10,0,-1,0,-1,1,0,0,0,1,0)) (dBm)
IPn
-400
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
Frequency (GHz)
12. Add another rectangular graph named "Output". Add a power spectrum measurement to the graph at the test point
OUTPUT. Set RBW/#Bins to "0.01 GHz". Make sure to check the dBm check box, and leave all other parameters at
their default settings.
13. Run the System Simulator. The simulation response in the following graph should display.
Output
0
-100
-200
-300
DB(PWR_SPEC(TP.OUTPUT,0.01,5,10,0,-1,0,-1,1,0,0,0,1,0)) (dBm)
IPn
-400
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
Frequency (GHz)
14. Add a tabular graph named "IP3". Add an IPn measurement to the graph from the System > NW Analyzer category.
Click Show Secondary, and set the parameters of the IPn measurement as shown in the following figure. Make sure
to select the dBm check box, specify the Input fc (x-axis) as "1 GHz" and the Input BW as "1 RBW (bin)". Leave all
other parameters at their default settings and click OK.
15. Run the System Simulator. The resulting measurement is displayed on the "IP3" table. The first column is the power
of the 1GHz input tone (-10dBm) and the second column is the Output IP3 of the amplifier (20dBm). The IPn
measurement can autodetect the frequency of the intermodulation product specified (in this case 1.2GHz) and make
the corresponding calculation. Of course, you can also specify the frequency of interest. The VSA can straddle an RF
link and be used to measure an nth order intermodulation product at any given point in the RF link. For more information
on the IPn measurement see the Microwave Office Measurement Catalog online Help.
PWR= -10
5. Expand the Filters category, then click the Bandpass group. Select and place a Bandpass Butterworth Filter (BPFB)
on the system diagram just after the QAM_SRC.
6. Double-click the BPFB block to display the Element Options dialog box, and click the Filter Design tab to open the
Filter Wizard.
7. Set the filter parameters as shown in the following figure.
8. Click in the window where "Click to View Response" is displayed. After the response is plotted, click OK.
9. Expand the Signal Processing category and place a DLYCMP block just after the filter. DLYCMP adjusts a signal
with signal delay present so the signal delay falls on a sample boundary. It interpolates to compensate for fractional
sample signal delays. DLYCMP is particularly useful when working with circuit filter blocks such as BPFB, which
typically introduce signal delays that do not fall on a sample boundary. The DLYCMP ensures that VSS software
properly compensates for the filter's group delay prior to making the EVM measurement.
10. Place an amplifier block (AMP_B) just after DLYCMP and leave its parameters at their default values. Connect the
blocks and place a test point named AMPOUT at the output of the amplifier.
11. Expand the Meters category, then click the Network Analyzers group. Select and place a vector signal analyzer VSA
block on the system diagram. Connect its SRC input to the output of the QAM_SRC and its MEAS input to the output
of AMP_B.
12. Set the NOISE parameter in all the blocks to RF Budget only.
13. Set the VSA VARNAME parameter to "PWR" (including the quotes) and its VALUES parameter to "stepped
(-10,10,2)". Next, set its secondary parameter SWPCNT to "5000". The VSA is used to sweep the signal's average
power from -10dBm to 10dBm in increments of 2dB, and make an EVM measurement for each power level. The
VSA sweeps the power after 5000 samples pass through the amplifier. Your system diagram should look like the
following figure.
VSA
ID=M1
VARNAME="PWR"
VALUES=stepped(-10,10,2)
SRC MEAS
AMP_B TP
QAM_SRC ID=A3 ID=AMPOUT
PWR=-10
ID=A1 GAIN=10 dB
MOD=16-QAM (Gray) P1DB=10 dBm
BPFB
OUTLVL=PWR IP3=
ID=F1
OLVLTYP=Avg. Power (dBm) IP2=
LOSS=0 dB
RATE=_DRATE MEASREF=
N=3
CTRFRQ=5.2 GHz OPSAT=
FP1=4.6 GHz
PLSTYP=Rectangular DLYCMP NF=3 dB
FP2=5.8 GHz
ALPHA=0.35 ID=A2 NOISE=RF Budget only
AP=0.01 dB
PLSLN= INTRPSPN=20 RFIFRQ=
NOISE=RF Budget only
DLYCMP
The EVM_PS measurement displays the amplifier's output power on the x-axis, and the EVM measurement (%RMS
average in dBs) on the y-axis. The VSA takes in 100 symbols at a time and makes an EVM on each symbol. The end
result is an EVM measurement based on the average of 5 blocks of 100 symbols each. The Delay Comp. setting of the
EVM_PS measurement automatically delays the reference signal relative to the measured signal prior to making the
EVM measurement. The Mag/Phase setting automatically scales the measured signal's magnitude relative to the
reference signal's magnitude, as well as compensates for the phase distortion due to the filter prior to making the EVM
measurement. AMP_B does not characterize the AM/PM effects of an amplifier. See the online Help for more
information on EVM_PS.
16. Add a constellation graph named "IQ" to the project. Add a System IQ measurement to this graph and set the Time
Span to "100" symbols. Run the System Simulator. After the simulation stops your graphs should look similar to those
shown in the following figure. Note, as the simulation is running you will see the IQ plot begin to distort as the
amplifier goes into compression. As the amplifier goes into compression, the EVM degrades.
EVM
-6.5
DB(EVM_PS(VSA.M1,TP.AMPOUT,1,1,0,100,2,0,5,0,1,1,0,0,1,0,1,0,0,1000,0,10,0))
EVM
-7
-7.5
-8
-0.2958 1.704 3.704 5.704 7.704 9.704 11.67
Power (dBm)
IQ
2
IQ(TP.AMPOUT,100,1,1,0,0,0)
EVM
-1
-2
-2 -1 0 1 2
Swept Variables
This example illustrates how to use a swept variable block. The complete example is available as SWPVAR.emp. To
access this file from a list of Getting Started example projects, choose File > Open Example to display the Open Example
Project dialog box, then Ctrl-click the Keywords column header and type "getting_started" in the text box at the bottom
of the dialog box. You can use this example file as a reference.
1. Create a new project and a new system diagram. Name the system diagram "Swept Variable". Leave all system
options at their default settings. The sampling frequency of the system is automatically set to 8GHz.
2. Expand the RF Blocks category, then click the Sources group. Select and place a TONE source on the system diagram.
Set its FRQ parameter to the variable "F" (note that after you click OK it defaults to Hz), the PWR parameter to
"-10dBm", and the NOISE parameter to RF Budget only. Click OK.
3. Double-click on the output port (triangle) of the TONE source and set its port to Complex or Complex Envelope. The
output port displays in orange.
4. Choose Draw > Add Equation or click the Equation button on the toolbar and add the following equation (without
quotation marks) to the system diagram: "F=.1e9"
5. Expand the RF Blocks category, then click the Amplifier group. Select and place an AMP_B block after the TONE
source. Set the NOISE parameter to RF Budget only and leave all other parameters at their default settings.
6. Place a test point named "AMP" at the output of the amplifier.
7. Click the Simulation Control node and then select and place a Swept Variable Control block (SWPVAR) on the system
diagram.
8. Set the SWPVAR block parameters as shown in the following figure. The SWPVAR is now set to sweep the TONE's
frequency (F) from 0.1GHz to 0.5GHz in steps of 0.1GHz.
SWPVAR
ID=SWP1
VARNAME="F"
VALUES=stepped(.1,.5,.1)*1e9
Xo . . .Xn
F=.1e9
TONE
ID=A1 AMP_B
FRQ=F Hz ID=A2 TP
PWR=-10 dBm GAIN=10 dB ID=AMP
PHS=0 Deg P1DB=10 dBm
CTRFRQ= IP3=
SMPFRQ= IP2=
ZS=_Z0 Ohm MEASREF=
TN=_TAMB DegK OPSAT=
NOISE=RF Budget only NF=3 dB
PNMASK= NOISE=RF Budget only
PNOISE=No phase noise RFIFRQ=
10. Add a rectangular graph named "Spectrum" to the project. From the System > Spectrum category of measurements,
add a power spectrum measurement (PWR_SPEC) at the AMP test point.
11. Select dBm as the Complex Modifier, set RBW/#Bins to "0.1GHz", and set Y-Axis Output to Power Spectrum (Pwr/Bin).
Leave all other spectrum measurement parameters at their default settings.
12. Run the System Simulator. Note in the spectrum graph plot that the fundamental frequency is sweeping from 0.1GHz
to 0.5GHz. You can also see the corresponding harmonics. After the simulation stops your graph should look similar
to the graph in the following figure.
Spectrum
0
DB(PWR_SPEC(TP.AMP,0.1,5,10,0,-1,0,-1,1,0,0,0,1,0)) (dBm)
Swept Variable
-100
-200
-300
-400
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5
Frequency (GHz)
13. Save the project as "SWPVAR". You may also want to review the parameters available to you in the Spectrum
measurement. In particular, you may want to explore the use of the settings of the SWPVAR.SWP1 parameter.
14. Depending on the RBW/#Bins and VBW/#Avg. settings, the frequencies of interest, and the complexity of the system,
you may have to change the SWPCNT parameter of the SWPVAR block. In addition, you may have to change the
sampling frequency of the system to view all frequencies of interest. See the online Help for the SWPVAR block and
the power spectrum (PWR_SPEC) measurement, and the AWR Visual System Simulator Modeling Guide for more
information.
D K
Data Keyboard shortcuts, 2–19
types, 3–1 Knowledge Base; AWR, 1–3
Default
system settings, 3–5 L
Demodulation, 9–6 Layer process file (LPF); importing, 2–16
Documentation; AWR, 1–3 Layout
creating, 2–14
E Layout Manager, 2–4, 2–16
Element Catalog, 3–7 LPF; importing, 2–16
Elements
adding to schematics, 2–10 M
Elements Browser, 2–4, 2–10 Measurements
R W
Wizard, 2–20
Receiver, 9–6
Resources; AWR, 1–3
RF Budget Analysis, 7–1
RF chain; creating, 7–1
S
Sampling frequency, 3–1
Scripts, 2–20