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AM26LS31, AM26LS31C, AM26LS31I, AM26LS31M

SLLS114L – JANUARY 1979 – REVISED OCTOBER 2018

AM26LS31x Quadruple Differential Line Driver

1 Features 3 Description
1• Meets or Exceeds the Requirements of ANSI The AM26LS31 family of devices is a quadruple
TIA/EIA-422-B and ITU complementary-output line driver designed to meet
the requirements of ANSI TIA/EIA-422-B and ITU
• Operates From a Single 5-V Supply (formerly CCITT) Recommendation V.11. The 3-state
• TTL-Compatible outputs have high-current capability for driving
• Complementary Outputs balanced lines such as twisted-pair or parallel-wire
transmission lines, and they are in the high-
• High Output Impedance in Power-Off Conditions
impedance state in the power-off condition. The
• Complementary Output-Enable Inputs enable function is common to all four drivers and
• Available MIL-PRF-38535-Qualified Options (M): offers the choice of an active-high or active-low
All Parameters Are Tested Unless Otherwise enable (G, G) input. Low-power Schottky circuitry
Noted. On All Other Products, Production reduces power consumption without sacrificing
Processing Does Not Necessarily Include Testing speed.
of All Parameters.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
2 Applications
AM26LS31MFK LCCC (20) 8.89 mm × 8.89 mm
• Motor Encoders
AM26LS31MJ CDIP (16) 19.60 mm × 6.92 mm
• Field Transmitters: Pressure Sensors and AM26LS31MW CFP (16) 10.30 mm × 6.73 mm
Temperature Sensors
AM26LS31CD SOIC (16) 9.90 mm × 3.91 mm
• Military and Avionics Imaging AM26LS31CDB SSOP (16) 6.20 mm × 5.30 mm
• Temperature Sensors or Controllers Using AM26LS31CN PDIP (16) 19.30 mm × 6.35 mm
Modbus AM26LS31xNS SO (16) 10.30 mm × 5.30 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.

Schematic (Each Driver)

Input A

V
22 kΩ

9Ω
9Ω
Output Z
Output Y

Common to All Four Drivers

VCC

V 22 kΩ
22 kΩ To Three Other Drivers

Enable G

Enable G

GND

All resistor values are nominal. Copyright © 2016, Texas Instruments Incorporated

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
AM26LS31, AM26LS31C, AM26LS31I, AM26LS31M
SLLS114L – JANUARY 1979 – REVISED OCTOBER 2018 www.ti.com

Table of Contents
1 Features .................................................................. 1 8.3 Feature Description................................................... 9
2 Applications ........................................................... 1 8.4 Device Functional Modes........................................ 10
3 Description ............................................................. 1 9 Application and Implementation ........................ 11
4 Revision History..................................................... 2 9.1 Application Information............................................ 11
9.2 Typical Application ................................................. 11
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4 10 Power Supply Recommendations ..................... 13
6.1 Absolute Maximum Ratings ..................................... 4 11 Layout................................................................... 13
6.2 ESD Ratings.............................................................. 4 11.1 Layout Guidelines ................................................. 13
6.3 Recommended Operating Conditions....................... 4 11.2 Layout Example .................................................... 13
6.4 Thermal Information .................................................. 4 12 Device and Documentation Support ................. 14
6.5 Electrical Characteristics .......................................... 5 12.1 Documentation Support ........................................ 14
6.6 Switching Characteristics – AM26LS31 .................... 5 12.2 Related Links ........................................................ 14
6.7 Switching Characteristics – AM26LS31M ................. 5 12.3 Receiving Notification of Documentation Updates 14
6.8 Typical Characteristics .............................................. 6 12.4 Community Resources.......................................... 14
7 Parameter Measurement Information .................. 8 12.5 Trademarks ........................................................... 14
12.6 Electrostatic Discharge Caution ............................ 14
8 Detailed Description .............................................. 9
12.7 Glossary ................................................................ 14
8.1 Overview ................................................................... 9
8.2 Functional Block Diagram ......................................... 9 13 Mechanical, Packaging, and Orderable
Information ........................................................... 14

4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision K (July 2016) to Revision L Page

• Changed VCC pin number From: 8 To: 16 in the Pin Functions table .................................................................................. 3
• Changed GND pin number From: 16 To: 8 in the Pin Functions table ................................................................................. 3

Changes from Revision J (January 2014) to Revision K Page

• Added Applications section, the Device Information table, ESD Ratings table, Feature Description section, Device
Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout
section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ..... 1
• Split up Switching Characteristics table into two tables specified for each part..................................................................... 5

Changes from Revision I (February 2006) to Revision J Page

• Updated document to new TI data sheet format - no specification changes. ........................................................................ 1

• Deleted Ordering Information table. ....................................................................................................................................... 1
• Updated Features. .................................................................................................................................................................. 1
• Added Device and Documentation Support section............................................................................................................. 14

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5 Pin Configuration and Functions

D, DB, N , NS, J, or W Package

SOIC, SSOP, PDIP, SO, CDIP, or CFP FK Package
Top View 20-Pin LCCC
Top View

V CC
1A 1 16 VCC

NC
1Y
1A

4A
1Y 2 15 4A
1Z 3 14 4Y 3 2 1 20 19
G 4 13 4Z 1Z 4 18 4Y
2Z 5 12 G G 5 17 4Z
2Y 6 11 3Z
NC 6 16 NC
2A 7 10 3Y
2Z 7 15 G
GND 8 9 3A
2Y 8 14 3Z
9 10 11 12 13

GND
NC
2A

3A
3Y
Pin Functions
PIN
SOIC, SSOP, I/O DESCRIPTION
NAME PDIP, SO, CDIP, LCCC
or CFP
1A 1 2 I Logic Data Input to RS422 Driver number 1
1Y 2 3 O RS-422 Data Line (Driver 1)
1Z 3 4 O RS-422 Data Line (Driver 1)
G 4 5 I Driver Enable (active high)
G 12 15 I Driver Enable (active Low)
2A 7 9 I Logic Data Input to RS422 Driver number 2
2Y 6 8 O RS-422 Data Line (Driver 2)
2Z 5 7 O RS-422 Data Line (Driver 2)
3A 9 12 I Logic Data Input to RS422 Driver number 3
3Y 10 13 O RS-422 Data Line (Driver 3)
3Z 11 14 O RS-422 Data Line (Driver 3)
4A 15 19 I Logic Data Input to RS422 Driver number 4
4Y 14 18 O RS-422 Data Line (Driver 4)
4Z 13 17 O RS-422 Data Line (Driver 4)
VCC 16 20 – Power Input. Connect to 5-V Power Source.
GND 8 10 – Device Ground Pin

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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
VCC Supply voltage (2) 7 V
VI Input voltage 7 V
Output off-state voltage 5.5 V
Lead temperature 1,6 mm (1/16 in) from case for 10 s 260 °C
Lead temperature 1,6 mm (1/16 in) from case for 60 s J package 300 °C
Tstg Storage temperature –65 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential output voltage VOD, are with respect to network GND.

6.2 ESD Ratings

VALUE UNIT
Electrostatic Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000
V(ESD) V
discharge Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) ±1000

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN NOM MAX UNIT
AM26LS31C 4.75 5 5.25
VCC Supply voltage V
AM26LS31M 4.5 5 5.5
VIH High-level input voltage 2 V
VIL Low-level input voltage 0.8 V
IOH High-level output current –20 mA
IOL Low-level output current 20 mA
AM26LS31C 0 70
TA Operating free-air temperature AM26LS31I –40 85 °C
AM26LS31M –55 125

6.4 Thermal Information

AM26LS31x
THERMAL METRIC (1) D (SOIC) DB (SSOP) N (PDIP) NS (SO) UNIT
16 PINS 16 PINS 16 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance (2) 73 82 67 64 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 38.1 – – 32.6 °C/W
RθJB Junction-to-board thermal resistance 34.7 – – 36.8 °C/W
ψJT Junction-to-top characterization parameter 7.1 – – 4.2 °C/W
ψJB Junction-to-board characterization parameter 34.4 – – 36.5 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(2) The package thermal impedance is calculated in accordance with JESD 51-7.

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6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted) (1)
PARAMETER TEST CONDITIONS MIN TYP (2) MAX UNIT
VIK Input clamp voltage VCC = MIN, II = –18 mA –1.5 V
VOH High-level output voltage VCC = MIN, IOH = –20 mA 2.5 V
VOL Low-level output voltage VCC = MIN, IOL = 20 mA 0.5 V
Off-state (high-impedance-state) VO = 0.5 V –20
IOZ VCC = MIN, μA
output current VO = 2.5 V 20
II Input current at maximum input voltage VCC = MAX, VI = 7 V 0.1 mA
IIH High-level input current VCC = MAX, VI = 2.7 V 20 μA
IIL Low-level input current VCC = MAX, VI = 0.4 V –0.36 mA
IOS Short-circuit output current (3) VCC = MAX –30 –150 mA
ICC Supply current VCC = MAX, all outputs disabled 32 80 mA

(1) For C-suffix devices, VCC min = 4.75 V and VCC max = 5.25 V. For M-suffix devices, VCC min = 4.5 V and VCC max = 5.5 V.
(2) All typical values are at VCC = 5 V and TA = 25°C.
(3) Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second.

6.6 Switching Characteristics – AM26LS31

TA = 25°C, VCC = 5 V (see Figure 11)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Propagation delay time, low- to
tPLH 14 20
high-level output
CL = 30 pF, S1 and S2 open ns
Propagation delay time, high- to
tPHL 14 20
low-level output
tPZH Output enable time to high level RL = 75 Ω 25 40
CL = 30 pF ns
tPZL Output enable time to low level RL = 180 Ω 37 45
tPHZ Output disable time from high level 21 30
CL = 10 pF, S1 and S2 closed ns
tPLZ Output disable time from low level 23 35
tSKEW Output-to-output skew CL = 30 pF, S1 and S2 open 1 6 ns

6.7 Switching Characteristics – AM26LS31M

TA = 25°C, VCC = 5 V (see Figure 11)
PARAMETER TEST CONDITIONS MIN MAX UNIT
Propagation delay time, low- to high-
tPLH 30
level output
CL = 30 pF, S1 and S2 open ns
Propagation delay time, high- to low-
tPHL 30
level output
tPZH Output enable time to high level RL = 75 Ω 60
CL = 30 pF ns
tPZL Output enable time to low level RL = 180 Ω 68
tPHZ Output disable time from high level 45
CL = 10 pF, S1 and S2 closed ns
tPLZ Output disable time from low level 53
tSKEW Output-to-output skew CL = 30 pF, S1 and S2 open 9 ns

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6.8 Typical Characteristics

4 4
Load = 470 Ω to GND VCC = 5.25 V VCC = 5 V
TA = 70°C
TA = 25°C Load = 470 Ω to GND
See Note A VCC = 5 V See Note A

3 3 TA = 0°C

VO − Y Output Voltage − V
VO − Y Output Voltage − V

VCC = 4.75 V
TA = 25°C

2 2

1 1

0 0
0 1 2 3 0 1 2 3
VI − Enable G Input Voltage − V VI − Enable G Input Voltage − V
A. The A input is connected to VCC during testing of the Y outputs A. The A input is connected to VCC during testing of the Y outputs
and to ground during testing of the Z outputs. and to ground during testing of the Z outputs.

Figure 1. Output Voltage vs Enable G Input Voltage Figure 2. Output Voltage vs Enable G Input Voltage
6 6
VCC = 5.25 V

5 5
VCC = 5 V

VCC = 4.75 V
VO − Output Voltage − V
VO − Output Voltage − V

4 4

TA = 70°C
3 3
TA = 25°C
TA = 0°C
2 2

1 Load = 470 Ω to VCC 1 VCC = 5 V

TA = 25°C Load = 470 Ω to VCC
See Note B See Note B
0 0
0 1 2 3 0 1 2 3
VI − Enable G Input Voltage − V VI − Enable G Input Voltage − V
B. The A input is connected to ground during testing of the Y B. The A input is connected to ground during testing of the Y
outputs and to VCC during testing of the Z outputs. outputs and to VCC during testing of the Z outputs.

Figure 3. Output Voltage vs Enable G Input Voltage Figure 4. Output Voltage vs Enable G Input Voltage
5 4
VCC = 5 V VCC = 5.25 V
See Note A
VCC = 5 V
VOH − High-Level Output Voltage − V

VOH − High-Level Output Voltage − V

4
IOH = −20 mA 3

3 VCC = 4.75 V
IOH = −40 mA
2

1
1

TA = 25°C
See Note A
0 0
0 25 50 75 0 −20 −40 −60 −80 −100
TA − Free-Air Temperature − °C IOH − High-Level Output Current − mA
A. The A input is connected to VCC during testing of the Y outputs A. The A input is connected to VCC during testing of the Y outputs
and to ground during testing of the Z outputs. and to ground during testing of the Z outputs.

Figure 5. High-Level Output Voltage vs Free-Air Figure 6. High-Level Output Voltage vs High-Level Output
Temperature Current

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Typical Characteristics (continued)

0.5 1
VCC = 5 V TA = 25°C
IOL = 40 mA 0.9 See Note B
See Note B

VOL− Low-Level Output Voltage − V

0.4 0.8
VOL− Low-Level Output Voltage − V

0.7

0.3 0.6

0.5 VCC = 4.75 V

0.2 0.4
VCC = 5.25 V
0.3

0.1 0.2

0.1

0 0
0 25 50 75 0 20 40 60 80 100 120
TA − Free-Air Temperature − °C IOL − Low-Level Output Current − mA
B. The A input is connected to ground during testing of the Y B. The A input is connected to ground during testing of the Y
outputs and to VCC during testing of the Z outputs. outputs and to VCC during testing of the Z outputs.

Figure 7. Low-Level Output Voltage vs Free-Air Temperature Figure 8. Low-Level Output Voltage vs Low-Level Output
Current
5 5
No Load No Load
TA = 25°C

4 VCC = 5.25 V 4 TA = 70°C

VO − Y Output Voltage − V

VO − Y Output Voltage − V
VCC = 5 V
VCC = 4.75 V
TA = 0°C
3 3
TA = 25°C

2 2

1 1

0 0
0 1 2 3 0 1 2 3
VI − Data Input Voltage − V VI − Data Input Voltage − V
Figure 9. Y Output Voltage vs Data Input Voltage Figure 10. Y Output Voltage vs Data Input Voltage

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7 Parameter Measurement Information

Input A 3V
(see Notes B 1.3 V 1.3 V
and C) 0V
Test Point VCC
tPLH tPHL

180 Ω VOH
S1 Output Y 1.5 V
From Output VOL
Under Test
Skew Skew
CL 75 Ω tPHL tPLH
(see Note A) S2
VOH
Output Z 1.5 V
VOL
PROPAGATION DELAY TIMES AND SKEW TEST CIRCUIT

Enable G 3V
(see Note D) 1.5 V See Note D 1.5 V
Enable G 0V
tPZL tPLZ S1 Closed
≈4.5 V S2 Closed
Waveform 1 S1 Closed 1.5 V ≈1.5 V
(see Note E) S2 Open VOL
0.5 V
tPZH tPHZ
0.5 V
S1 Open VOH
Waveform 2
(see Note E) S2 Closed 1.5 V ≈1.5 V
≈0 V
S1 Closed
S2 Closed
ENABLE AND DISABLE TIME WAVEFORMS

NOTES: A. CL includes probe and jig capacitance.

B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω, tr ≤ 15 ns, tf ≤ 6 ns.
C. When measuring propagation delay times and skew, switches S1 and S2 are open.
D. Each enable is tested separately.
E. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.

Figure 11. Test Circuit and Voltage Waveforms

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8 Detailed Description

8.1 Overview
The AM26LS31x differential bus transmitter is a monolithic integrated circuit designed for unidirectional data
communication on transmission lines. It is designed for balanced transmission lines and meets ANSI Standard
EIA/TIA-422-B and ITU Recommendation V.11.
The AM26LS31x has a four 3-state differential line drivers that operate from a single 5-V power supply. The
driver also integrates active-high and active-low enables for precise device control.
The driver is designed to handle loads of a minimum of ±30 mA of sink or source current. The driver features
positive- and negative-current limiting for protection from line fault conditions.

8.2 Functional Block Diagram

4
G
12
G
2
1 1Y
1A 3
1Z
6
7 2Y
2A 5
2Z

10
9 3Y
3A 11
3Z

14
15 4Y
4A 13
4Z
Copyright © 2016, Texas Instruments Incorporated

8.3 Feature Description

8.3.1 Complementary Output-Enable Inputs
The AM26LS31x can be configured using the G and G logic inputs to control transmitter outputs. Setting either G
to a logic HIGH or G to an logic LOW enables the transmitter outputs. If G is set to logic LOW and G is set to
logic HIGH, the transmitter outputs are disabled. See Table 1 for a complete truth table.

8.3.2 High Output Impedance in Power-Off Conditions

When the AM26LS31x transmitter outputs are disabled using G and G, the outputs are set to a high impedance
state.

8.3.3 Complementary Outputs

The AM26LS31x is the driver half of a pair of devices, with the AM26LS32 being the complementary receiver. TI
recommends using these devices together for optimal performance, but any RS-422 compliant receive must
ensure proper RS-422 communication and logic level translation.

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8.4 Device Functional Modes

Table 1 lists the functional modes of the AM26LS31.

Table 1. Function Table (1)

(Each Driver)
INPUT ENABLES OUTPUTS
A G G Y Z
H H X H L
L H X L H
H X L H L
L X L L H
X L H Z Z

(1) H = high level, L = low level,

X = irrelevant,
Z = high impedance (off)

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9 Application and Implementation

NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.

9.1 Application Information

When designing a system that uses drivers, receivers, and transceivers that comply with RS-422 or RS-485,
proper cable termination is essential for highly reliable applications with reduced reflections in the transmission
line. Because RS-422 allows only one driver on the bus, if termination is used, it is placed only at the end of the
cable near the last receiver. In general, RS-485 requires termination at both ends of the cable. Factors to
consider when determining the type of termination usually are performance requirements of the application and
the ever-present factor, cost. The different types of termination techniques discussed are unterminated lines,
parallel termination, AC termination, and multipoint termination. Laboratory waveforms for each termination
technique (except multipoint termination) illustrate the usefulness and robustness of RS-422 (and, indirectly, RS-
485). Similar results can be obtained if 485-compliant devices and termination techniques are used. For
xxxxxxxxxxxxxx
laboratory experiments, 100 feet of 100-Ω, 24-AWG, twisted-pair cable (Bertek) was used. A single driver and
receiver, TI AM26LS31 and AM26LS32C, respectively, were tested at room temperature with a 5-V supply
voltage. Two plots per termination technique are shown. In each plot, the top waveform is the driver input and the
bottom waveform is the receiver output. To show voltage waveforms related to transmission-line reflections, the
xx
first plot shows output waveforms from the driver at the start of the cable; the second plot shows input waveforms
to the receiver at the far end of the cable.
x
x
x
9.2 Typical Application
x xx
x x x x xx
x

x x
x
x

Servo Drive Motion Controller

A
Encoder D R Encoder Phase A
B
Interpolation
Electronics Z
D R Encoder Phase B

D R Encoder Index

Status
D R Status

AM26LS31 AM26LS32

Copyright © 2016, Texas Instruments Incorporated

Figure 12. Encoder Application

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Typical Application (continued)

9.2.1 Design Requirements
This example requires the following:
• 5-V power source
• RS-485 bus operating at 10 Mbps or less
• Connector that ensures the correct polarity for port pins

9.2.2 Detailed Design Procedure

Place the device close to bus connector to keep traces (stub) short to prevent adding reflections to the bus line.
If desired, add external fail-safe biasing to ensure 200 mV on the A-B port, if the drive is in high impedance state
(see Failsafe in RS-485 data buses).

9.2.3 Application Curve

2
Voltage (V)

±1

±2
Y A/B
±3
0 0.1 0.2 0.3 0.4 0.5
Time ( s) C001

Figure 13. Differential 120-Ω Terminated Output Waveforms (Cat 5E Cable)

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10 Power Supply Recommendations

Place a 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high
impedance power supplies.

11 Layout

11.1 Layout Guidelines

For best operational performance of the device, use good PCB layout practices, including:
• Noise can often propagate into analog circuitry through the power supply of the circuit. Bypass capacitors are
used to reduce the coupled noise by providing low impedance power sources local to the analog circuitry.
– Connect low-ESR, 0.1-μF ceramic bypass capacitors between each supply pin and ground, placed as
close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single-
supply applications.
• Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective
methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes.
A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital
and analog grounds, paying attention to the flow of the ground current.
• To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If
it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as
opposed to in parallel with the noisy trace.
• Place the external components as close to the device as possible. Keeping RF and RG close to the inverting
input minimizes parasitic capacitance.
• Keep the length of input traces as short as possible. Always remember that the input traces are the most
sensitive part of the circuit.

11.2 Layout Example

VCC

Reduce logic
signal trace 1A 1 16 VCC
where possible
2 15 0.1uF

3 14

4 13
AM26LS31
5 12

6 11

7 10

GND 8 9

Figure 14. Layout Recommendation

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12 Device and Documentation Support

12.1 Documentation Support

12.1.1 Related Documentation
For related documentation, see the following:
Failsafe in RS-485 data buses (SLYT080)

12.2 Related Links

The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.

Table 2. Related Links

TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY
DOCUMENTS SOFTWARE COMMUNITY
AM26LS31 Click here Click here Click here Click here Click here
AM26LS31C Click here Click here Click here Click here Click here
AM26LS31I Click here Click here Click here Click here Click here
AM26LS31M Click here Click here Click here Click here Click here

12.3 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.

12.4 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.

12.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.6 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

12.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser based versions of this data sheet, refer to the left hand navigation.
14 Submit Documentation Feedback Copyright © 1979–2018, Texas Instruments Incorporated

Product Folder Links: AM26LS31 AM26LS31M

 PACKAGE OPTION ADDENDUM

www.ti.com 20-Oct-2021

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

5962-7802301M2A ACTIVE LCCC FK 20 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-
& Green 7802301M2A
AM26LS31
MFKB
5962-7802301MEA ACTIVE CDIP J 16 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-7802301ME
& Green A
AM26LS31MJB
5962-7802301MFA ACTIVE CFP W 16 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-7802301MF
& Green A
AM26LS31MWB
5962-7802301Q2A ACTIVE LCCC FK 20 1 Non-RoHS SNPB N / A for Pkg Type 5962-
& Green 7802301Q2A
AM26LS31M
AM26LS31CD ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 AM26LS31C

AM26LS31CDBR ACTIVE SSOP DB 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 SA31C

AM26LS31CDBRE4 ACTIVE SSOP DB 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 SA31C

AM26LS31CDE4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 AM26LS31C

AM26LS31CDG4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 AM26LS31C

AM26LS31CDR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 AM26LS31C

AM26LS31CDRE4 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 AM26LS31C

AM26LS31CDRG4 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 AM26LS31C

AM26LS31CN ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 AM26LS31CN

AM26LS31CNSR ACTIVE SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 26LS31

AM26LS31INSR ACTIVE SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 26LS31

AM26LS31MFKB ACTIVE LCCC FK 20 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-
& Green 7802301M2A
AM26LS31

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 20-Oct-2021

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
MFKB
AM26LS31MJB ACTIVE CDIP J 16 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-7802301ME
& Green A
AM26LS31MJB
AM26LS31MWB ACTIVE CFP W 16 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-7802301MF
& Green A
AM26LS31MWB

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

Addendum-Page 2
 PACKAGE OPTION ADDENDUM

www.ti.com 20-Oct-2021

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF AM26LS31, AM26LS31M :

• Catalog : AM26LS31
• Military : AM26LS31M

NOTE: Qualified Version Definitions:

• Catalog - TI's standard catalog product

• Military - QML certified for Military and Defense Applications

Addendum-Page 3
 PACKAGE MATERIALS INFORMATION

www.ti.com 10-Mar-2022

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
AM26LS31CDBR SSOP DB 16 2000 330.0 16.4 8.35 6.6 2.4 12.0 16.0 Q1
AM26LS31CDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
AM26LS31CDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
AM26LS31CDRG4 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
AM26LS31CDRG4 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
AM26LS31CNSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
AM26LS31INSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 10-Mar-2022

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
AM26LS31CDBR SSOP DB 16 2000 853.0 449.0 35.0
AM26LS31CDR SOIC D 16 2500 340.5 336.1 32.0
AM26LS31CDR SOIC D 16 2500 853.0 449.0 35.0
AM26LS31CDRG4 SOIC D 16 2500 853.0 449.0 35.0
AM26LS31CDRG4 SOIC D 16 2500 340.5 336.1 32.0
AM26LS31CNSR SO NS 16 2000 367.0 367.0 38.0
AM26LS31INSR SO NS 16 2000 853.0 449.0 35.0

Pack Materials-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 10-Mar-2022

TUBE

*All dimensions are nominal

Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
5962-7802301M2A FK LCCC 20 1 506.98 12.06 2030 NA
5962-7802301MFA W CFP 16 1 506.98 26.16 6220 NA
5962-7802301Q2A FK LCCC 20 1 506.98 12.06 2030 NA
AM26LS31CD D SOIC 16 40 506.6 8 3940 4.32
AM26LS31CD D SOIC 16 40 507 8 3940 4.32
AM26LS31CDE4 D SOIC 16 40 506.6 8 3940 4.32
AM26LS31CDE4 D SOIC 16 40 507 8 3940 4.32
AM26LS31CDG4 D SOIC 16 40 507 8 3940 4.32
AM26LS31CDG4 D SOIC 16 40 506.6 8 3940 4.32
AM26LS31CN N PDIP 16 25 506 13.97 11230 4.32
AM26LS31MFKB FK LCCC 20 1 506.98 12.06 2030 NA
AM26LS31MWB W CFP 16 1 506.98 26.16 6220 NA

Pack Materials-Page 3
 MECHANICAL DATA

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001

DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE

28 PINS SHOWN

0,38
0,65 0,15 M
0,22
28 15

0,25
0,09
5,60 8,20
5,00 7,40

Gage Plane

1 14 0,25

A 0°–ā8° 0,95
0,55

Seating Plane

2,00 MAX 0,05 MIN 0,10

PINS **
14 16 20 24 28 30 38
DIM

A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90

A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30

4040065 /E 12/01

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 PACKAGE OUTLINE
NS0016A SCALE 1.500
SOP - 2.00 mm max height
SOP

8.2 SEATING PLANE

TYP
7.4
A PIN 1 ID 0.1 C
AREA
14X 1.27
16
1

10.4 2X
10.0 8.89
NOTE 3

8
9
0.51
16X
5.4 0.35
B 0.25 C A B 2.00 MAX
5.2
NOTE 4

0.15 TYP

SEE DETAIL A
0.25 0.3
GAGE PLANE 0.1

0 - 10
1.05
0.55 DETAIL A
TYPICAL
(1.25)

4220735/A 12/2021

NOTES:

1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm, per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm, per side.

www.ti.com
 EXAMPLE BOARD LAYOUT
NS0016A SOP - 2.00 mm max height
SOP

16X (1.85) SEE

SYMM DETAILS

1 16

16X (0.6)

SYMM

14X (1.27)

8 9

(R0.05) TYP

(7)

LAND PATTERN EXAMPLE

SCALE:7X

SOLDER MASK SOLDER MASK METAL

METAL OPENING OPENING

0.07 MAX 0.07 MIN

ALL AROUND ALL AROUND

NON SOLDER MASK SOLDER MASK

DEFINED DEFINED

SOLDER MASK DETAILS

4220735/A 12/2021

NOTES: (continued)

5. Publication IPC-7351 may have alternate designs.

6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com
 EXAMPLE STENCIL DESIGN
NS0016A SOP - 2.00 mm max height
SOP

16X (1.85) SYMM

1 16

16X (0.6)

SYMM

14X (1.27)

8 9

(R0.05) TYP (7)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL
SCALE:7X

4220735/A 12/2021

NOTES: (continued)

7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.

www.ti.com
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