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Experiment No. 3

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Embedded Processors

Experiment no. 3
Aim: To write a program for Interfacing LEDs with LPC2148.

Apparatus: ARM LPC2148 board, USB cable and PC

Software used: Keil uVision4, Flash Magic

Interfacing Diagram:

Theory:

ARM processors are 32-bit RISC microprocessors based on a common architecture.


These processors are licensed to the manufacturers who want to build ARM-based
products. The two main types of licenses are the Implementation license and the
Architecture license. ARM licenses two types of cores: soft cores and hard cores. A
hard core is optimized for a specific manufacturing process, while a soft core can be
used in any process but is less optimal. The architecture license enables the licensee
to develop their own processors compliant with the ARM ISA.

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S.C.O.E. Department of E&TC Engineering (2021-22)
Embedded Processors
All ARM instructions are 32-bit long and have 3 operand encoding. All operands are
32 bits. It also supports multiply- accumulate instruction that gives 32- or 64-bit
results form 32-bit inputs. ARM has a load-store ISA. Most of the processors use a
3-stage pipeline consisting of fetch, decode and execution stages. The pipeline
executes one instruction per cycle. Newer versions of the ARM use 5- to 8-stage
pipelines which can operate at higher clock rate. Most of the ARM processors have
separate instruction and data caches.

ARM supports multiple-register-transfers which allow to load/store up to


16 registers simultaneously. The ARM architecture has 16, 32-bit general purpose
registers, the PC being one of them. There is a current program status register
(CPSR) which reflects the execution state of the processor, the execution modes,
the interrupt enable flag, the conditional flags, and to switch between ARM and
Thumb instruction sets. The Thumb-mode uses 16-bit instruction to reduce the code
density and increase the performance of the processor where smaller memory and
data buses are used. Some of the new processors allow Java byte code execution
directly from ARM pipeline called Jazelle. Also, ARM supports an addition of a co-
processor to extend its instruction set.

Based on RISC design principles, ARM processors are simple designs taking less
silicon area with performance comparable to the powerful CISC machines. ARM’s
goal is to optimize the price/performance ratio rather than building the most powerful
processor in market. Another design goal for ARM processors is to have minimum
design time. This is achieved by the modular nature of ARM processors. Because of
the small chip area and use of static CMOS technology makes this processor energy
efficient. These processor have the capability to shut down the clock which is
important for Hence, it finds applications in many embedded applications.

LPC214x Pin connect block

Features: Allows individual pin configuration.

Applications: The purpose of the Pin connect block is to configure the


microcontroller pins to the desired functions.

Description: The pin connect block allows selected pins of the microcontroller to
have more than one function. Configuration registers control the multiplexers to
allow connection between the pin and the on chip peripherals.

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S.C.O.E. Department of E&TC Engineering (2021-22)
Embedded Processors
Peripherals should be connected to the appropriate pins prior to being activated, and
prior to any related interrupt(s) being enabled. Activity of any enabled peripheral
function that is not mapped to a related pin should be considered undefined.
Selection of a single function on a port pin completely excludes all other functions
otherwise available on the same pin.

LPC214x GPIO Features:

• Every physical GPIO port is accessible via either the group of registers providing
enhanced features and accelerated port access or the legacy group of registers

• Accelerated GPIO functions:

– GPIO registers are relocated to the ARM local bus so that the fastest possible I/O
timing can be achieved

– Mask registers allow treating sets of port bits as a group, leaving other bits
unchanged

– All registers are byte and half-word addressable

– Entire port value can be written in one instruction

• Bit-level set and clear registers allow a single instruction set or clear of any number
of bits in one port

• Direction control of individual bits

• All I/O default to inputs after reset

• Backward compatibility with other earlier devices is maintained with legacy


registers appearing at the original addresses on the APB bus.

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S.C.O.E. Department of E&TC Engineering (2021-22)
Embedded Processors

Generic
Name Description Access Reset value
GPIO Port Pin value register. The current
IOPIN state of the GPIO configured port pins can R/W NA
always be read from this register, regardless of pin
direction.

GPIO Port Output Set register. This register


IOSET controls the state of output pins in conjunction R/W 0x0000
with the IOCLR register. Writing ones produces 0000
highs at the corresponding port pins. Writing
zeroes has no effect.

IODIR GPIO Port Direction control register. This R/W 0x0000


register individually controls the direction of each 0000
port pin.
GPIO Port Output Clear register. This register
controls the state of output pins. Writing ones
IOCLR produces lows at the corresponding port pins and WO 0x0000
clears the corresponding bits in the IOSET 0000
register. Writing zeroes has no effect.

On the board, 8 LED’s are provided in common cathode configuration. They are
interfaced to Port Pins P0.12 to P0.19. To make LED on, logic 1 is to be provided.

LED interfacing details


Device Pin Details
LED 1 P0.12
LED 2 P0.13
LED 3 P0.14
LED 4 P0.15
LED 5 P0.16
LED 6 P0.17
LED 7 P0.18
LED 8 P0.19
Peripheral Selection
SW 20 towards LED_ON
SW21 away from LCD_ON
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S.C.O.E. Department of E&TC Engineering (2021-22)
Embedded Processors
Algorithm:

1. Initialize the ports of LPC 2148.

2. Make the port lines high to glow LED.

3. Call delay.

4. Make the port lines low to glow LED off.

5. Call delay.

6. Go to step 2.

Procedure:

1. Click for Keil Icon which appearing after Installing Keil µVision 4.

2. Click on Project Menu, Then New Project.

3. Create New Project Folder named as “LED”.

4. Select Target Device Vendor (NXP) and then select specific chip LPC2148.

5. Add Startup code to project folder and add file to project.

6. Now Click on File Menu and Click on New.

7. Write Code for experiment in C and FileName.c Save.

8. Now you add FileName.c file by adding source Group 1 Add files to Group
‘Source Group 1’.

9. Now Click on Options for Target ‘Target 1’.

10. Go to Options for Target ‘Target 1’. Click on Check Box Create HEX File.

11. Then go to Linker. Click on Use Memory Layout for Target Dialog.

12. Then Click on Rebuild All Target Files

13. Now you see 0 Error(s), 0 Warning (s). Then Hex File will create in Specific
Folder. Now to download it for you target hardware using Flash Magic Utility.

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S.C.O.E. Department of E&TC Engineering (2021-22)
Embedded Processors
14. Connect USB cable to the board & detect which COM port is detected of your
PC.

15. Connect the power supply to the board and switch ON power Switch.

16. Start flash magic utility and select the appropriate device LPC2148 and serial
port settings.

17. Change the position of RUN/ISP switch to ISP mode. Ensure that you push the
Reset switch on the board before you click download button on the flash magic
utility.

18. Change the position of RUN/ISP switch to RUN mode & see the result.

Conclusion:

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S.C.O.E. Department of E&TC Engineering (2021-22)

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