Swapping in Allegro Design Entry CIS and PCB Editor Flow: Product Version 16.5 October 7, 2011
Swapping in Allegro Design Entry CIS and PCB Editor Flow: Product Version 16.5 October 7, 2011
Swapping in Allegro Design Entry CIS and PCB Editor Flow: Product Version 16.5 October 7, 2011
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Cadence logo are registered trademarks of Cadence Design Systems, Inc. All others
are the property of their respective holders.
Contents
Purpose ............................................................................. 5
Terms ................................................................................ 6
Audience ........................................................................... 8
Pin Swapping .................................................................... 9
Pin Swapping settings in Allegro Design Entry CIS ..................................................... 9
Pin Swapping in Allegro PCB Editor .......................................................................... 14
Creating a Pin Swap Report ...................................................................................... 15
Pin Swapping Using Placement Edit.......................................................................... 16
Back Annotate to Capture CIS ................................................................................... 17
Gate or Function Swapping ............................................. 19
Gate swapping settings in Allegro Design Entry CIS ................................................. 19
Gate Swapping in Allegro PCB Editor ........................................................................ 21
Back Annotate to Capture CIS ................................................................................... 23
Important points about Gate/Function Swap .............................................................. 24
In Capture CIS Schematic ...................................................................................... 24
Functions to be swapped must............................................................................... 25
Property assignments restrict swapping functions interactively.............................. 25
Component Swapping ..................................................... 27
To swap components interactively ............................................................................. 27
You cannot swap components ............................................................................... 27
Swap Functionality - Terms ............................................. 28
References: ..................................................................... 30
Purpose
Swapping is one of the key contributors to quicken the PCB design flow. Due to the
increase in design complexity and smaller board size, routing in PCB board has become
more challenging. Designers are always looking for ways to ease routing complexity
and hence reduce the time to market. Based on the different critical routing situations
like differential pairs, bus routings, critical nets, clock signal etc., PCB designers may
seek the possibility of swapping at different levels and at different stages of the design
flow.
In the Cadence PCB flow, there are fast and easy ways to perform Pin Swapping, Gate
Swapping and Package Swapping which helps designers to synchronize the schematic
and board. This application note describes the swapping techniques in the Cadence
PCB Flow using „Allegro Design Entry CIS‟ as front-end and „Allegro PCB Editor‟ as
back-end software.
Terms
HOMOGENEOUS PART: If all the parts in a package are identical except for the pin
numbers, the package is homogeneous. For example, IC 7400 is homogeneous: the
four NAND gates are identical, except for their pin numbers
PIN SWAPPING: Method to perform pin-swapping in Allegro PCB Editor among the
pins of specific group. Swaps can take place between two pins on the specified part.
Only pins of the same type and shape on the part can be swapped. The pins are
identified by name or number. The schematic designer needs to obey some rules so
that those set of pins could be swappable in Allegro PCB Editor. Ex: Referring Fig1, you
can perform pin swapping among input pin viz pin numbers 1-2, 4-5, 9-10 and 12-13 if
they belong to same PinGroup. Or you can perform pin swapping among input pins viz
1,2,4,5,9,10,12 & 13, if they belong to same PinGroup.
Examples:-
BACK-ANNOTATE: This is a process where the user updates the schematic design
with the board change. Due to different design constraints like adding/deleting
constraint property/renaming refdes/swapping/etc, PCB designer may modify the board
content. To synchronize the schematic with the modified board, users have to perform
back-annotation and update the schematic.
SWAP FILE: For PCB designs, a swap file is a text file containing old and new part
references for use with the Back Annotate command. Swap files are typically created by
another application, such as PCB Editor. You can also create a swap (.SWP) file using
any text editor that saves files in ASCII format.
SWAP_INFO: The SWAP_INFO property, allows the swapping of pins across split
symbols in the Allegro PCB Editor. A common example of pin swapping occurs for
devices that have a large pin count. In the example given below, the device symbol is
split across five smaller physical sections. These symbols are then grouped into two
logical sections using the SWAP_INFO property.
Example:-
SWAP_INFO=(S1+S2),(S3+S4+S5)
The SWAP_INFO property allows the swapping of pins with the same PIN_GROUP
property across split symbols that belong to the same logical section. For example, pins
with the same PIN_GROUP property in S1 and S2 can be swapped with each other.
Similarly, pins with the same PIN_GROUP property in S3, S4, S5 can be swapped with
each other, where S1, S2, S3, S4, and S5 represent physical.
Audience
The purpose of this Application Note is to reach the audience most likely for Capture
CIS-Allegro flow users who want to understand the different possibilities of swapping in
Cadence flow, all the properties involved in swapping and how those modifications can
be back-annotated to update the schematic. The Application Note includes a quick-set
of clear and concise basic steps that should be scrupulously followed to avoid a majority
of swapping problems. The focus is on understanding the importance of swapping and
the all steps involved in the Capture CIS-Allegro Flow.
Pin Swapping
To perform pin swaps in Allegro PCB Editor and then back annotate those changes, a
user must first setup the pin properties in Capture CIS. Pin swap specifications will be
produced only if the Swap ID properties are set correctly on pin-swappable parts.
1. In Capture CIS, open the part library containing the part for which the pins are to
be swapped. Choose File > Open > Library > Browse the part library.
2. Double click the part to open it in the library editor.
3. Open the package view for the part. Choose> View > Package.
4. Open Package Properties dialog box. Choose Edit > Properties.
5. Place a unique number in the PinGroup column for specific pins you want to
swap within the gate. Pins with same value of pin group can be swapped. Say, if
user wants to swap among all input pins then the user could assign 1 to all input
pins and 2 to all output pins, as shown in Fig 2.
If there is a multi-section homogenous part, then set the PinGroup value for one
section; the part editor adds the same value for all the other sections
automatically.
For example, on a 7400, set the PinGroup to 1 for pins 1 and 2. Leave the other
PinGroup values blank and they are filled in automatically when you click the
“Update” button. Set PinGroup = 1 for pins 1 & 2 and similarly set PinGroup = 2
for pin 3 and click “Update” button.
6. Select a pin in a Capture CIS schematic and edit its properties by opening the
property editor window. The value shows as the Swap Id property. The default
value is –1, meaning the pin is not swappable. So, the user must add the
PinGroup property to enable pin swapping for the part. If a pin swappable, and
later you decide to remove the swapability of the part, then just delete the
PinGroup property in the Package Properties (Fig 3). Any change done at library
level should be updated to the schematic page using Update Cache command.
Note: Swap Id value of 0 and greater implies that the pin is swappable.
ELSE
Here, you are allowed pin swap within all 4 sections. If you want to restrict pin
swapping within some sections then change the value of SWAP_INFO as follows. For
E.g. SWAP_INFO = (S1+S2),(S3+S4) will only allow pin swap of 1st section with 2nd
section or vice-versa and not with other 2 sections (i.e. S3 and S4). And pin of 3rd
section can only be swapped with pins of 4th section and vice-versa.
NOTE: Only pins with same pin group property can be swapped.
8. Go to your design and expand the “Design Cache” folder in Project Manager.
Locate the part. Right Mouse Click and choose Update Cache.
If there is any change at library level, to synchronize the change with the design you
have to perform “Update Cache” command.
11. Create the board automatically by checking "Create or Update PCB Editor Board
(NETREV)".
If you do not generate a board during netlisting by enabling this option in the Create
Netlist dialog box, you could import the schematic logic to Allegro PCB Editor using
the File > Import > Logic command in PCB Editor.
As you can see in Fig. 8, all input pins of other sections are also highlighted because
of SWAP_INFO=(S1+S2+S3+S4)
4. Select the pin to swap. Check the message in the command window for
successful swap. In this case, U1.1 is swapped with U1.2.
5. Rightclick and choose Done, to complete the operation.
6. Once the swapping is complete, repeat the same for other pins if needed. Save
the board.
Note: Updating an Allegro design from the schematic or third party netlist causes all
pin swap properties to be deleted.
To swap pins interactively, choose Place – Swap – Pins. You can also execute the
command from within Placement Edit application mode by selecting the first pin, then
clicking the right mouse button and choosing Swap Pins from the popup menu.
You can:
1. Choose the menu option Setup > Application Mode > Place Mode
2. Enter placemode in the Command Console window.
3. Click the appropriate toolbar icon (if added to your toolbar).
4. Right click and choose Application Mode – Placement Edit
1. Select the .dsn in Project Manager. Choose Tools > Back Annotate command in
Capture CIS and select the appropriate options in the Back-annotate dialog box.
2. Check for swapped pins in swap file (.SWP file) which clearly indicates about the
swapping of U1.1 and U1.2
Since “Update Schematic” option is checked, you can also see pin swapped for
U1A in the schematic, as highlighted in below screenshots
NOTE:
The examples shown here are only to demonstrate the tool functionality. User needs
to assign the PINGROUP property taking care of design requirements.
For Heterogeneous parts also you need to obey the basic rule as discussed in the “Pin
Swapping settings in Allegro Design Entry CIS” section. Below are few screenshots
which clarifies how a heterogeneous part looks like and how Gate swapping properties
have been assigned.
Fig 13 . Heterogeneous package with four parts with uneven pin count and pin
type.
3. Check for swapped Gate in swap file (.SWP file) which clearly indicates about the
swapping of U1.B and U1.D
Fig 19 . Content of Swap file (.swp) and Schematic connection after Swap.
- Gate swap is ONLY possible between parts with identical pin count and pin type.
- To perform Gate swap in Heterogeneous package, in addition to above point, pin
name of respective swappable part should be the same. Below figure shows that
pin name and pin type for part A & B and C & D are same and hence you could
perform Gate Swap.
- SWAP_INFO: Does not play any role for Gate and Component swapping. This
property is ONLY applicable for Pin swapping.
NOTE: When the layout editor swaps functions, it replaces any etch/conductor
connected to the functions with ratsnest lines.
Component Swapping
Swapping components interactively does not affect etch/conductor, so any
etch/conductor attached to a swapped component does not move with the
component. There is no specific property which is mandatory to be defined at
schematic level.
OR
You can also execute the command from within the Placement Edit application
mode, in which the command functions in a pre-selection use model:
You choose an element first, then right click and execute the command from the pop-
up menu.
In the pre-selection use model, the command is only available if the selection set
comprises exactly two components that you have chosen. If you choose components
and clines, for example, a warning displays for each invalid element, and the tool
ignores it.
If you swap a component with any of the constraints listed above, a message
prompts you that the swap has failed. When the layout editor performs the
component swap, it assigns to each swap candidate the X,Y coordinates, rotation,
and mirroring that, before the swap, were associated with the swap partner.
FIXED: The FIXED property, attached to components, symbols, nets, pins, vias, clines,
lines, filled rectangles, rectangles, shapes, and groups, indicates that the editor
prevents the following:
LAST_PIN_SWAP: All pin swaps will be tracked with the property LAST_PIN_SWAP.
The property will attach to the pin and the value will be the name of the pin with which it
was last swapped. Updating the Allegro design from the Front End or third party netin
will cause all pin swap properties to be deleted.
References:
OrCAD Capture CIS User Guide
<Installation_dir_SPB165>\doc\cap_ug\cap_ug.pdf
<Installation_dir_SPB165>\propref\propref.pdf