DATA SHEET

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Single Supply Quad

14
Comparators 14
1 1

LM339, LM339E, LM239, SOIC−14

D SUFFIX
TSSOP−14
DTB SUFFIX
LM2901, LM2901E, CASE 751A CASE 948G

LM2901V, NCV2901, PIN CONNECTIONS

MC3302
Output 2 1 14 Output 3
These comparators are designed for use in level detection, low−level
sensing and memory applications in consumer, automotive, and Output 1 2 13 Output 4
industrial electronic applications.
VCC 3 12 GND
Features - Input 1 4 11 + Input 4
* )
• Single Supply Operation: 3.0 V to 36 V )
1 4
*
• Split Supply Operation: ±1.5 V to ±18 V + Input 1 5 10 - Input 4

• Low Input Bias Current: 25 nA (Typ) - Input 2 6

*2 )
9 + Input 3
• Low Input Offset Current: ±5.0 nA (Typ) )
3
*
• + Input 2 - Input 3
7 8
Low Input Offset Voltage
• Input Common Mode Voltage Range to GND
• Low Output Saturation Voltage: 130 mV (Typ) @ 4.0 mA (Top View)

• TTL and CMOS Compatible

• ESD Clamps on the Inputs Increase Reliability without Affecting ORDERING INFORMATION
See detailed ordering and shipping information in the package
Device Operation dimensions section on page 7 of this data sheet.
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100 DEVICE MARKING INFORMATION
Qualified and PPAP Capable See general marking information in the device marking
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS section on page 8 of this data sheet.

Compliant

© Semiconductor Components Industries, LLC, 2016 1 Publication Order Number:

October, 2021 − Rev. 27 LM339/D
 LM339, LM339E, LM239, LM2901, LM2901E, LM2901V, NCV2901, MC3302

MAXIMUM RATINGS
Rating Symbol Value Unit
Power Supply Voltage VCC Vdc
LM239/LM339, E/LM2901, E, V +36 or ±18
MC3302 +30 or ±15
Input Differential Voltage Range VIDR Vdc
LM239/LM339, E/LM2901, E, V 36
MC3302 30
Input Common Mode Voltage Range VICMR −0.3 to 36 Vdc
Output Short Circuit to Ground (Note 1) ISC Continuous
Power Dissipation @ TA = 25°C PD
Plastic Package 1.0 W
Derate above 25°C 1/RqJA 8.0 mW/°C

Junction Temperature TJ 150 °C

Operating Ambient Temperature Range TA °C
LM239 −25 to +85
MC3302 −40 to +85
LM2901, LM2901E −40 to +105
−40 to +125
LM2901V, NCV2901
0 to +70
LM339, LM339E
Storage Temperature Range Tstg −65 to +150 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. The maximum output current may be as high as 20 mA, independent of the magnitude of VCC. Output short circuits to VCC can cause excessive
heating and eventual destruction.

ESD RATINGS
Rating HBM MM Unit
ESD Protection at any Pin (Human Body Model − HBM, Machine Model − MM)
NCV2901 2000 200 V
LM339E, LM2901E 1500 200 V
LM339DG/DR2G, LM2901DG/DR2G 250 100 V
All Other Devices 1500 200 V

VCC + Input - Input Output

GND

NOTE: Diagram shown is for 1 comparator.

Figure 1. Circuit Schematic

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 LM339, LM339E, LM239, LM2901, LM2901E, LM2901V, NCV2901, MC3302

ELECTRICAL CHARACTERISTICS (VCC = +5.0 Vdc, TA = +25°C, unless otherwise noted)

LM2901/2901E/2901V
LM239/339/339E /NCV2901 MC3302
Characteristic Symbol Min Typ Max Min Typ Max Min Typ Max Unit
Input Offset Voltage (Note 3) VIO − ±2.0 ±5.0 − ±2.0 ±7.0 − ±3.0 ±20 mVdc
Input Bias Current (Notes 3, 4) IIB − 25 250 − 25 250 − 25 500 nA
(Output in Analog Range)
Input Offset Current (Note 3) IIO − ±5.0 ±50 − ±5.0 ±50 − ±3.0 ±100 nA
Input Common Mode Voltage Range VICMR 0 − VCC 0 − VCC 0 − VCC V
(Note 5) −1.5 −1.5 −1.5

Supply Current ICC mA

RL = ∞ (For All Comparators) − 0.8 2.0 − 0.8 2.0 − 0.8 2.0
RL = ∞, VCC = 30 Vdc − 1.0 2.5 − 1.0 2.5 − 1.0 2.5
Voltage Gain AVOL 50 200 − 25 100 − 25 100 − V/mV
RL ≥ 15 kW, VCC = 15 Vdc
Large Signal Response Time − − 300 − − 300 − − 300 − ns
VI = TTL Logic Swing,
Vref = 1.4 Vdc, VRL = 5.0 Vdc,
RL = 5.1 kW
Response Time (Note 6) − − 1.3 − − 1.3 − − 1.3 − ms
VRL = 5.0 Vdc, RL = 5.1 kW
Output Sink Current ISink 6.0 16 − 6.0 16 − 6.0 16 − mA
VI (−) ≥ +1.0 Vdc, VI(+) = 0,
VO ≤ 1.5 Vdc
Saturation Voltage Vsat − 130 400 − 130 400 − 130 500 mV
VI(−) ≥ +1.0 Vdc, VI(+) = 0,
Isink ≤ 4.0 mA

Output Leakage Current IOL − 0.1 − − 0.1 − − 0.1 − nA

VI(+) ≥ +1.0 Vdc, VI(−) = 0,
VO = +5.0 Vdc
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. (LM239) Tlow = −25°C, Thigh = +85°
(LM339, LM339E) Tlow = 0°C, Thigh = +70°C
(MC3302) Tlow = −40°C, Thigh = +85°C
(LM2901), LM2901E Tlow = −40°C, Thigh = +105°
(LM2901V & NCV2901) Tlow = −40°C, Thigh = +125°C
NCV2901 is qualified for automotive use.
3. At the output switch point, VO ] 1.4 Vdc, RS ≤ 100 W 5.0 Vdc ≤ VCC ≤ 30 Vdc, with the inputs over the full common mode range
(0 Vdc to VCC −1.5 Vdc).
4. The bias current flows out of the inputs due to the PNP input stage. This current is virtually constant, independent of the output state.
5. Positive excursions of input voltage may exceed the power supply level. As long as one input voltage remains within the common mode range,
the comparator will provide a proper output state. Refer to the Maximum Ratings table for safe operating area.
6. The response time specified is for a 100 mV input step with 5.0 mV overdrive. For larger signals, 300 ns is typical.

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 LM339, LM339E, LM239, LM2901, LM2901E, LM2901V, NCV2901, MC3302

PERFORMANCE CHARACTERISTICS (VCC = +5.0 Vdc, TA = Tlow to Thigh [Note 7])

LM2901/2901E/2901V
LM239/339/339E /NCV2901 MC3302
Characteristic Symbol Min Typ Max Min Typ Max Min Typ Max Unit
Input Offset Voltage (Note 8) VIO − − ±9.0 − − ±15 − − ±40 mVdc
Input Bias Current (Notes 8, 9) IIB − − 400 − − 500 − − 1000 nA
(Output in Analog Range)
Input Offset Current (Note 8) IIO − − ±150 − − ±200 − − ±300 nA
Input Common Mode Voltage Range VICMR 0 − VCC 0 − VCC 0 − VCC V
−2.0 −2.0 −2.0

Saturation Voltage Vsat − − 700 − − 700 − − 700 mV

VI(−) ≥ +1.0 Vdc, VI(+) = 0,
Isink ≤ 4.0 mA
Output Leakage Current IOL − − 1.0 − − 1.0 − − 1.0 mA
VI(+) ≥ +1.0 Vdc, VI(−) = 0,
VO = 30 Vdc
Differential Input Voltage VID − − VCC − − VCC − − VCC Vdc
All VI ≥ 0 Vdc
7. (LM239) Tlow = −25°C, Thigh = +85°
(LM339, LM339E) Tlow = 0°C, Thigh = +70°C
(MC3302) Tlow = −40°C, Thigh = +85°C
(LM2901, LM2901E) Tlow = −40°C, Thigh = +105°
(LM2901V & NCV2901) Tlow = −40°C, Thigh = +125°C
NCV2901 is qualified for automotive use.
8. At the output switch point, VO ] 1.4 Vdc, RS ≤ 100 W 5.0 Vdc ≤ VCC ≤ 30 Vdc, with the inputs over the full common mode range
(0 Vdc to VCC −1.5 Vdc).
9. The bias current flows out of the inputs due to the PNP input stage. This current is virtually constant, independent of the output state.

+ VCC + VCC

R3
10 k Rref
10 k
Vin - Vref
Rref VO 10 k
+ VCC +
R1 -
R2 R2 VO
Vref Vin +
1.0 M 10 k
10k R1 VCC R1
Vref [ R3 VCC R1
Rref + R1 Vref =
1.0 M Rref + R1
R3 ] R1 / / Rref / / R2
R2 [ R1 / / Rref
R1 / / Rref
VH = [VO(max) - VO(min)] Amount of Hysteresis VH
R1/ / Rref + R2
R2
VH = [(V -V ]
R2 ơ Rref / / R1 R2 + R3 O(max) O(min)

Figure 2. Inverting Comparator Figure 3. Noninverting Comparator

with Hysteresis with Hysteresis

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 LM339, LM339E, LM239, LM2901, LM2901E, LM2901V, NCV2901, MC3302

Typical Characteristics
(VCC = 15 Vdc, TA = +25°C (each comparator) unless otherwise noted.)

1.40 48
NORMALIZED OFFSET VOLTAGE

42

I IB, INPUT BIAS CURRENT (nA)

1.20 36 TA = -55° C
TA = +25° C
30
1.00 24 TA = +125°C

18

0.80 12

6.0

0.60 0
-50 -25 0 25 50 75 100 125 0 4.0 8.0 12 16 20 24 28 32
TA, AMBIENT TEMPERATURE (°C) VCC, POWER SUPPLY VOLTAGE (Vdc)

Figure 4. Normalized Input Offset Voltage Figure 5. Input Bias Current

8.0
7.0
IO, OUTPUT CURRENT (mA)

TA = +25° C
6.0 TA = -55° C
5.0
TA = +125°C
4.0

3.0

2.0
1.0
0
0 100 200 300 400 500
Vsat, OUTPUT SATURATION VOLTAGE (mV)

Figure 6. Output Sink Current versus

Output Saturation Voltage

VCC VCC ≥ 4.0 V

10 k
100 k
RS RL
Vin + R1
-
Vref - +
C VO
R1 +
VCC
R2 R3
VCC
RS = Source Resistance 330 k 330 k
R4 330 k T1
R1 ] RS T2
T1 = T2 = 0.69 RC
VCC RL
7.2
Logic Device (V) kW f[
C(mF)
CMOS 1/4 MC14001 +15 100
R2 = R3 = R4
TTL 1/4 MC7400 +5.0 10
R1 [ R2 // R3 // R4

Figure 7. Driving Logic Figure 8. Squarewave Oscillator

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 LM339, LM339E, LM239, LM2901, LM2901E, LM2901V, NCV2901, MC3302

APPLICATIONS INFORMATION

These quad comparators feature high gain, wide addition of positive feedback (< 10 mV) is also
bandwidth characteristics. This gives the device oscillation recommended. It is good design practice to ground all
tendencies if the outputs are capacitively coupled to the unused input pins.
inputs via stray capacitance. This oscillation manifests itself Differential input voltages may be larger than supply
during output transitions (VOL to VOH). To alleviate this voltages without damaging the comparator’s inputs.
situation input resistors < 10 kW should be used. The Voltages more negative than −300 mV should not be used.

+15 V

R1 R4 R5
220 k 220 k 10 k Vin(min) ≈ 0.4 V peak for 1% phase distortion (Dq).
8.2 k
Vin *
6.8 k VO Vin(min)
) Vin
D1 R2

VCC q
15 k 10 M
R3
* 10 k
VO
Vin + VCC
D1 prevents input from going negative by more than 0.6 V.
R1 + R2 = R3 VO q
R5 VEE
R3 ≤ for small error in zero crossing Dq
10 VEE

Figure 9. Zero Crossing Detector Figure 10. Zero Crossing Detector

(Single Supply) (Split Supplies)

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 LM339, LM339E, LM239, LM2901, LM2901E, LM2901V, NCV2901, MC3302

ORDERING INFORMATION
Device Package Shipping†
LM239DR2G SOIC−14 (Pb−Free) 2500 / Tape & Reel
LM239DTBR2G TSSOP−14 (Pb−Free) 2500 / Tape & Reel
LM339DR2G SOIC−14 (Pb−Free) 2500 / Tape & Reel
LM339EDR2G SOIC−14 (Pb−Free) 2500 / Tape & Reel
LM339DTBR2G TSSOP−14 (Pb−Free) 2500 / Tape & Reel
LM2901DR2G SOIC−14 (Pb−Free) 2500 / Tape & Reel
LM2901EDR2G SOIC−14 (Pb−Free) 2500 / Tape & Reel
LM2901DTBR2G TSSOP−14 (Pb−Free) 2500 / Tape & Reel
LM2901VDR2G SOIC−14 (Pb−Free) 2500 / Tape & Reel
LM2901VDTBR2G TSSOP−14 (Pb−Free) 2500 / Tape & Reel
NCV2901DR2G* SOIC−14 (Pb−Free) 2500 / Tape & Reel
NCV2901DTBR2G* TSSOP−14 (Pb−Free) 2500 / Tape & Reel
NCV2901CTR* Bare Die 6000 / Tape & Reel
MC3302DR2G SOIC−14 (Pb−Free) 2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.

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7
 LM339, LM339E, LM239, LM2901, LM2901E, LM2901V, NCV2901, MC3302

MARKING DIAGRAMS

SOIC−14
D SUFFIX
CASE 751A

14 14 14 14 14

LM339DG LM239DG LM2901DG LM2901VDG * MC3302DG

AWLYWW AWLYWW AWLYWW AWLYWW AWLYWW

1 1 1 1 1

14 14

LM339EG LM2901EG
AWLYWW AWLYWW

1 1

TSSOP−14
DTB SUFFIX
CASE 948G

14 14 14 14
* 2901
239 339 2901
V
ALYW G ALYW G ALYW G
ALYW G
G G G
G
1 1 1 1

A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
*This marking diagram also applies to NCV2901.

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8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

PDIP−14
CASE 646−06
ISSUE S
DATE 22 APR 2015
1
SCALE 1:1 NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
D A 2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACK-
14 8 E AGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.
H 4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE
NOT TO EXCEED 0.10 INCH.
E1 5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
TO DATUM C.
6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE
1 7 LEADS UNCONSTRAINED.
c
NOTE 8 b2 B 7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
END VIEW LEADS, WHERE THE LEADS EXIT THE BODY.
TOP VIEW WITH LEADS CONSTRAINED 8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
NOTE 5 CORNERS).
A2
INCHES MILLIMETERS
A DIM MIN MAX MIN MAX
NOTE 3
A −−−− 0.210 −−− 5.33
L A1 0.015 −−−− 0.38 −−−
A2 0.115 0.195 2.92 4.95
b 0.014 0.022 0.35 0.56
SEATING
PLANE b2 0.060 TYP 1.52 TYP
A1 C 0.008 0.014 0.20 0.36
C M D 0.735 0.775 18.67 19.69
D1 D1 0.005 −−−− 0.13 −−−
e eB E 0.300 0.325 7.62 8.26
END VIEW E1 0.240 0.280 6.10 7.11
14X b
e 0.100 BSC 2.54 BSC
NOTE 6
0.010 M C A M B M eB −−−− 0.430 −−− 10.92
SIDE VIEW L 0.115 0.150 2.92 3.81
M −−−− 10 ° −−− 10 °

GENERIC
MARKING DIAGRAM*
14
XXXXXXXXXXXX
XXXXXXXXXXXX
AWLYYWWG
STYLES ON PAGE 2 1

XXXXX = Specific Device Code

A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42428B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: PDIP−14 PAGE 1 OF 2

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

 PDIP−14
CASE 646−06
ISSUE S
DATE 22 APR 2015

STYLE 1: STYLE 2: STYLE 3: STYLE 4:

PIN 1. COLLECTOR CANCELLED CANCELLED PIN 1. DRAIN
2. BASE 2. SOURCE
3. EMITTER 3. GATE
4. NO 4. NO
CONNECTION CONNECTION
5. EMITTER 5. GATE
6. BASE 6. SOURCE
7. COLLECTOR 7. DRAIN
8. COLLECTOR 8. DRAIN
9. BASE 9. SOURCE
10. EMITTER 10. GATE
11. NO 11. NO
CONNECTION CONNECTION
12. EMITTER 12. GATE
13. BASE 13. SOURCE
14. COLLECTOR 14. DRAIN

STYLE 5: STYLE 6: STYLE 7: STYLE 8:

PIN 1. GATE PIN 1. COMMON CATHODE PIN 1. NO CONNECTION PIN 1. NO CONNECTION
2. DRAIN 2. ANODE/CATHODE 2. ANODE 2. CATHODE
3. SOURCE 3. ANODE/CATHODE 3. ANODE 3. CATHODE
4. NO CONNECTION 4. NO CONNECTION 4. NO CONNECTION 4. NO CONNECTION
5. SOURCE 5. ANODE/CATHODE 5. ANODE 5. CATHODE
6. DRAIN 6. NO CONNECTION 6. NO CONNECTION 6. NO CONNECTION
7. GATE 7. ANODE/CATHODE 7. ANODE 7. CATHODE
8. GATE 8. ANODE/CATHODE 8. ANODE 8. CATHODE
9. DRAIN 9. ANODE/CATHODE 9. ANODE 9. CATHODE
10. SOURCE 10. NO CONNECTION 10. NO CONNECTION 10. NO CONNECTION
11. NO CONNECTION 11. ANODE/CATHODE 11. ANODE 11. CATHODE
12. SOURCE 12. ANODE/CATHODE 12. ANODE 12. CATHODE
13. DRAIN 13. NO CONNECTION 13. NO CONNECTION 13. NO CONNECTION
14. GATE 14. COMMON ANODE 14. COMMON 14. COMMON ANODE
CATHODE

STYLE 9: STYLE 10: STYLE 11: STYLE 12:

PIN 1. COMMON CATHODE PIN 1. COMMON PIN 1. CATHODE PIN 1. COMMON CATHODE
2. ANODE/CATHODE CATHODE 2. CATHODE 2. COMMON ANODE
3. ANODE/CATHODE 2. ANODE/CATHODE 3. CATHODE 3. ANODE/CATHODE
4. NO CONNECTION 3. ANODE/CATHODE 4. CATHODE 4. ANODE/CATHODE
5. ANODE/CATHODE 4. ANODE/CATHODE 5. CATHODE 5. ANODE/CATHODE
6. ANODE/CATHODE 5. ANODE/CATHODE 6. CATHODE 6. COMMON ANODE
7. COMMON ANODE 6. NO CONNECTION 7. CATHODE 7. COMMON CATHODE
8. COMMON ANODE 7. COMMON ANODE 8. ANODE 8. ANODE/CATHODE
9. ANODE/CATHODE 8. COMMON 9. ANODE 9. ANODE/CATHODE
10. ANODE/CATHODE CATHODE 10. ANODE 10. ANODE/CATHODE
11. NO CONNECTION 9. ANODE/CATHODE 11. ANODE 11. ANODE/CATHODE
12. ANODE/CATHODE 10. ANODE/CATHODE 12. ANODE 12. ANODE/CATHODE
13. ANODE/CATHODE 11. ANODE/CATHODE 13. ANODE 13. ANODE/CATHODE
14. COMMON CATHODE 12. ANODE/CATHODE 14. ANODE 14. ANODE/CATHODE
13. NO CONNECTION
14. COMMON ANODE

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42428B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: PDIP−14 PAGE 2 OF 2

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

SOIC−14 NB
14 CASE 751A−03
1
ISSUE L
DATE 03 FEB 2016
SCALE 1:1

D A NOTES:
1. DIMENSIONING AND TOLERANCING PER
B ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
14 8 3. DIMENSION b DOES NOT INCLUDE DAMBAR
A3 PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
H E 4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
L 5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
1 7 DETAIL A
MILLIMETERS INCHES
0.25 M B M 13X b DIM MIN MAX MIN MAX
A 1.35 1.75 0.054 0.068
0.25 M C A S B S A1 0.10 0.25 0.004 0.010
A3 0.19 0.25 0.008 0.010
DETAIL A b 0.35 0.49 0.014 0.019
h
A X 45 _
D 8.55 8.75 0.337 0.344
E 3.80 4.00 0.150 0.157
e 1.27 BSC 0.050 BSC
H 5.80 6.20 0.228 0.244
h 0.25 0.50 0.010 0.019
0.10 L 0.40 1.25 0.016 0.049
e A1 M
SEATING M 0_ 7_ 0_ 7_
C PLANE

GENERIC
SOLDERING FOOTPRINT* MARKING DIAGRAM*
6.50 14X 14
1.18
XXXXXXXXXG
1 AWLYWW

XXXXX = Specific Device Code

A = Assembly Location
1.27
WL = Wafer Lot
PITCH
Y = Year
WW = Work Week
G = Pb−Free Package
14X
*This information is generic. Please refer to
0.58
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.

DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

STYLES ON PAGE 2

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42565B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: SOIC−14 NB PAGE 1 OF 2

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

 SOIC−14
CASE 751A−03
ISSUE L
DATE 03 FEB 2016

STYLE 1: STYLE 2: STYLE 3: STYLE 4:

PIN 1. COMMON CATHODE CANCELLED PIN 1. NO CONNECTION PIN 1. NO CONNECTION
2. ANODE/CATHODE 2. ANODE 2. CATHODE
3. ANODE/CATHODE 3. ANODE 3. CATHODE
4. NO CONNECTION 4. NO CONNECTION 4. NO CONNECTION
5. ANODE/CATHODE 5. ANODE 5. CATHODE
6. NO CONNECTION 6. NO CONNECTION 6. NO CONNECTION
7. ANODE/CATHODE 7. ANODE 7. CATHODE
8. ANODE/CATHODE 8. ANODE 8. CATHODE
9. ANODE/CATHODE 9. ANODE 9. CATHODE
10. NO CONNECTION 10. NO CONNECTION 10. NO CONNECTION
11. ANODE/CATHODE 11. ANODE 11. CATHODE
12. ANODE/CATHODE 12. ANODE 12. CATHODE
13. NO CONNECTION 13. NO CONNECTION 13. NO CONNECTION
14. COMMON ANODE 14. COMMON CATHODE 14. COMMON ANODE

STYLE 5: STYLE 6: STYLE 7: STYLE 8:

PIN 1. COMMON CATHODE PIN 1. CATHODE PIN 1. ANODE/CATHODE PIN 1. COMMON CATHODE
2. ANODE/CATHODE 2. CATHODE 2. COMMON ANODE 2. ANODE/CATHODE
3. ANODE/CATHODE 3. CATHODE 3. COMMON CATHODE 3. ANODE/CATHODE
4. ANODE/CATHODE 4. CATHODE 4. ANODE/CATHODE 4. NO CONNECTION
5. ANODE/CATHODE 5. CATHODE 5. ANODE/CATHODE 5. ANODE/CATHODE
6. NO CONNECTION 6. CATHODE 6. ANODE/CATHODE 6. ANODE/CATHODE
7. COMMON ANODE 7. CATHODE 7. ANODE/CATHODE 7. COMMON ANODE
8. COMMON CATHODE 8. ANODE 8. ANODE/CATHODE 8. COMMON ANODE
9. ANODE/CATHODE 9. ANODE 9. ANODE/CATHODE 9. ANODE/CATHODE
10. ANODE/CATHODE 10. ANODE 10. ANODE/CATHODE 10. ANODE/CATHODE
11. ANODE/CATHODE 11. ANODE 11. COMMON CATHODE 11. NO CONNECTION
12. ANODE/CATHODE 12. ANODE 12. COMMON ANODE 12. ANODE/CATHODE
13. NO CONNECTION 13. ANODE 13. ANODE/CATHODE 13. ANODE/CATHODE
14. COMMON ANODE 14. ANODE 14. ANODE/CATHODE 14. COMMON CATHODE

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DOCUMENT NUMBER: 98ASB42565B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: SOIC−14 NB PAGE 2 OF 2

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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

TSSOP−14 WB
CASE 948G
14 ISSUE C
DATE 17 FEB 2016
1
SCALE 2:1
14X K REF NOTES:
1. DIMENSIONING AND TOLERANCING PER
0.10 (0.004) M T U S V S ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
0.15 (0.006) T U S 3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
N EXCEED 0.15 (0.006) PER SIDE.
0.25 (0.010)
14 8 4. DIMENSION B DOES NOT INCLUDE
2X L/2 INTERLEAD FLASH OR PROTRUSION.
M INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
L B 5. DIMENSION K DOES NOT INCLUDE DAMBAR
−U− N PROTRUSION. ALLOWABLE DAMBAR
PIN 1 PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IDENT. F IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
1 7
DETAIL E 6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
0.15 (0.006) T U S
A K
MILLIMETERS INCHES
K1

ÉÉÉ
ÇÇÇ
−V− DIM MIN MAX MIN MAX
A 4.90 5.10 0.193 0.200

ÇÇÇ
ÉÉÉ
B 4.30 4.50 0.169 0.177
J J1 C −−− 1.20 −−− 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
SECTION N−N G 0.65 BSC 0.026 BSC
H 0.50 0.60 0.020 0.024
J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
C −W− K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
0.10 (0.004) L 6.40 BSC 0.252 BSC
M 0_ 8_ 0_ 8_
−T− SEATING D G H DETAIL E
PLANE GENERIC
MARKING DIAGRAM*
14
SOLDERING FOOTPRINT XXXX
XXXX
7.06
ALYWG
G
1 1

A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
0.65 G = Pb−Free Package
PITCH
(Note: Microdot may be in either location)
*This information is generic. Please refer to
14X device data sheet for actual part marking.
14X
0.36 Pb−Free indicator, “G” or microdot “ G”,
1.26 may or may not be present.
DIMENSIONS: MILLIMETERS

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASH70246A Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: TSSOP−14 WB PAGE 1 OF 1

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

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