PD - 94639A

AUTOMOTIVE MOSFET IRF4104

IRF4104S
IRF4104L
Features HEXFET® Power MOSFET
● Advanced Process Technology
● Ultra Low On-Resistance D
● 175°C Operating Temperature VDSS = 40V
● Fast Switching
● Repetitive Avalanche Allowed up to Tjmax RDS(on) = 5.5mΩ
G
Description
Specifically designed for Automotive applications, ID = 75A
S
this HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low on-
resistance per silicon area. Additional features of
this design are a 175°C junction operating tempera-
ture, fast switching speed and improved repetitive
avalanche rating . These features combine to make
this design an extremely efficient and reliable device
for use in Automotive applications and a wide variety
of other applications. TO-220AB D2Pak TO-262
IRF4104 IRF4104S IRF4104L
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 120
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 84 A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package limited) 75
IDM Pulsed Drain Current c 470
PD @TC = 25°C Power Dissipation 140 W
Linear Derating Factor 0.95 W/°C
VGS Gate-to-Source Voltage ± 20 V
d
EAS (Thermally limited) Single Pulse Avalanche Energy 120 mJ
EAS (Tested ) Single Pulse Avalanche Energy Tested Value h 220
IAR Avalanche Current c See Fig.12a, 12b, 15, 16 A
EAR Repetitive Avalanche Energy g mJ
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting Torque, 6-32 or M3 screw i y
10 lbf in (1.1N m) y
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.05 °C/W
RθCS Case-to-Sink, Flat Greased Surface i 0.50 –––
RθJA Junction-to-Ambient i ––– 62
RθJA Junction-to-Ambient (PCB Mount) j ––– 40
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IRF4104S/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.032 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 4.3 5.5 mΩ VGS = 10V, ID = 75A e
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 63 ––– ––– V VDS = 10V, ID = 75A
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA VDS = 40V, VGS = 0V
––– ––– 250 VDS = 40V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 200 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200 VGS = -20V
Qg Total Gate Charge ––– 68 100 ID = 75A
Qgs Gate-to-Source Charge ––– 21 ––– nC VDS = 32V
Qgd Gate-to-Drain ("Miller") Charge ––– 27 ––– VGS = 10V e
td(on) Turn-On Delay Time ––– 16 ––– VDD = 20V
tr Rise Time ––– 130 ––– ID = 75A
td(off) Turn-Off Delay Time ––– 38 ––– ns RG = 6.8 Ω
tf Fall Time ––– 77 ––– VGS = 10V e
LD Internal Drain Inductance ––– 4.5 ––– Between lead,
nH 6mm (0.25in.)
LS Internal Source Inductance ––– 7.5 ––– from package
and center of die contact
Ciss Input Capacitance ––– 3000 ––– VGS = 0V
Coss Output Capacitance ––– 660 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 380 ––– pF ƒ = 1.0MHz
Coss Output Capacitance ––– 2160 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 560 ––– VGS = 0V, VDS = 32V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 850 ––– VGS = 0V, VDS = 0V to 32V f
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 75 MOSFET symbol
(Body Diode) A showing the
ISM Pulsed Source Current ––– ––– 470 integral reverse
(Body Diode) c p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 75A, VGS = 0V e
trr Reverse Recovery Time ––– 23 35 ns TJ = 25°C, IF = 75A, VDD = 20V
Qrr Reverse Recovery Charge ––– 6.8 10 nC di/dt = 100A/µs e
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

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 IRF4104S/L

1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
8.0V
ID, Drain-to-Source Current (A)

8.0V

ID, Drain-to-Source Current (A)

7.0V 7.0V
100 6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
BOTTOM 4.5V BOTTOM 4.5V

10 100

4.5V
1

20µs PULSE WIDTH 4.5V 20µs PULSE WIDTH

Tj = 25°C Tj = 175°C
0.1 10
0.1 1 10 100 0.1 1 10 100
VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 120

T J = 25°C
Gfs, Forward Transconductance (S)

T J = 25°C
ID, Drain-to-Source Current ( A)

100
T J = 175°C
100 80

60
TJ = 175°C

10 40

20 VDS = 10V
VDS = 15V
20µs PULSE WIDTH 380µs PULSE WIDTH
1 0
4 6 8 10 12 0 20 40 60 80 100
VGS, Gate-to-Source Voltage (V) ID, Drain-to-Source Current (A)

Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance

Vs. Drain Current
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IRF4104S/L

5000
VGS = 0V, f = 1 MHZ 20
ID= 75A
C iss = C gs + C gd, C ds SHORTED
VDS= 32V

VGS, Gate-to-Source Voltage (V)

C rss = C gd
4000 16
C oss = C ds + C gd VDS= 20V
C, Capacitance (pF)

Ciss
3000 12

2000 8

1000 Coss 4
Crss

0 0
1 10 100 0 20 40 60 80 100
VDS, Drain-to-Source Voltage (V) QG Total Gate Charge (nC)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000.0 10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)

100.0 1000
T J = 175°C

10.0 100
T J = 25°C 100µsec

1.0 10

Tc = 25°C 1msec
Tj = 175°C
VGS = 0V Single Pulse 10msec
0.1 1
0.2 0.6 1.0 1.4 1.8 0 1 10 100 1000
VSD, Source-toDrain Voltage (V) VDS , Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
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 IRF4104S/L

120 2.0

RDS(on) , Drain-to-Source On Resistance

LIMITED BY PACKAGE ID = 75A
100 VGS = 10V
ID , Drain Current (A)

80 1.5

(Normalized)
60

40
1.0

20

0
0.5
25 50 75 100 125 150 175
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T C , Case Temperature (°C)
T J , Junction Temperature (°C)

Fig 9. Maximum Drain Current Vs. Fig 10. Normalized On-Resistance

Case Temperature Vs. Temperature

10
Thermal Response ( Z thJC )

1
D = 0.50

0.20
Ri (°C/W) τi (sec)
0.1 0.10 R1 R2 R3
R1 R2 R3
0.05 τJ τC
τJ τ 0.371 0.000272
τ1 τ2 τ3
0.02 τ1 τ2 0.337 0.001375
τ3
0.01
0.01 Ci= τi/Ri 0.337 0.018713
Ci i/Ri
Notes:
SINGLE PULSE 1. Duty Factor D = t1/t2
( THERMAL RESPONSE ) 2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRF4104S/L

500
15V
ID

EAS, Single Pulse Avalanche Energy (mJ)

TOP 11A
16A
400 BOTTOM 75A
L DRIVER
VDS

RG D.U.T 300
+
V
- DD
IAS A
20V
VGS
tp 0.01Ω 200

Fig 12a. Unclamped Inductive Test Circuit

V(BR)DSS 100

tp

0
25 50 75 100 125 150 175

Starting T J, Junction Temperature (°C)

I AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
Vs. Drain Current
QG

10 V
QGS QGD 4.0
VGS(th) Gate threshold Voltage (V)

VG
ID = 250µA
3.0
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
2.0
50KΩ

12V .2µF
.3µF

+
V
D.U.T. - DS
1.0
VGS -75 -50 -25 0 25 50 75 100 125 150 175
3mA T J , Temperature ( °C )

IG ID
Current Sampling Resistors

Fig 13b. Gate Charge Test Circuit Fig 14. Threshold Voltage Vs. Temperature
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 IRF4104S/L

1000
Duty Cycle = Single Pulse

Allowed avalanche Current vs

100 avalanche pulsewidth, tav
assuming ∆ Tj = 25°C due to
Avalanche Current (A)

0.01
avalanche losses. Note: In no
case should Tj be allowed to
0.05
exceed Tjmax
10 0.10

0.1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02

tav (sec)

Fig 15. Typical Avalanche Current Vs.Pulsewidth

140 Notes on Repetitive Avalanche Curves , Figures 15, 16:

TOP Single Pulse (For further info, see AN-1005 at www.irf.com)
120 BOTTOM 1% Duty Cycle 1. Avalanche failures assumption:
ID = 75A Purely a thermal phenomenon and failure occurs at a
EAR , Avalanche Energy (mJ)

temperature far in excess of T jmax. This is validated for

100 every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
80 not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
60
4. PD (ave) = Average power dissipation per single
avalanche pulse.
40 5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I av = Allowable avalanche current.
20
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
0 tav = Average time in avalanche.
25 50 75 100 125 150 175 D = Duty cycle in avalanche = tav ·f
Starting T J , Junction Temperature (°C) ZthJC(D, tav ) = Transient thermal resistance, see figure 11)

PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC

Fig 16. Maximum Avalanche Energy Iav = 2DT/ [1.3·BV·Zth]
Vs. Temperature EAS (AR) = PD (ave)·tav
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IRF4104S/L

Driver Gate Drive

D.U.T Period D=
P.W.
Period
+ P.W.

ƒ
*
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
‚ Reverse
Recovery Body Diode Forward
- „ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG VDD Re-Applied

• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• I SD controlled by Duty Factor "D" - Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

RD
V DS

VGS
D.U.T.
RG
+
-VDD

10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

Fig 18a. Switching Time Test Circuit

VDS
90%

10%
VGS
td(on) tr t d(off) tf

Fig 18b. Switching Time Waveforms

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 IRF4104S/L
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415) 3.78 (.149) -B-
2.87 (.113) 10.29 (.405) 3.54 (.139) 4.69 (.185)
2.62 (.103) 4.20 (.165)
-A- 1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
1.15 (.045) LEAD ASSIGNMENTS
MIN 1 - GATE
1 2 3 2 - DRAIN
3 - SOURCE
4 - DRAIN
14.09 (.555)
13.47 (.530) 4.06 (.160)
3.55 (.140)

0.93 (.037) 0.55 (.022)

3X 3X
0.69 (.027) 0.46 (.018)
1.40 (.055)
3X
1.15 (.045) 0.36 (.014) M B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.

TO-220AB Part Marking Information

EXAMPLE: THIS IS AN IRF1010
LOT CODE 1789
AS S EMBLED ON WW 19, 1997 INTERNATIONAL PART NUMBER
IN THE AS S EMBLY LINE "C" RECTIFIER
LOGO
DAT E CODE
YEAR 7 = 1997
AS S EMBLY
LOT CODE WEEK 19
LINE C

For GB Production
EXAMPLE: THIS IS AN IRF1010
LOT CODE 1789
AS S EMBLED ON WW 19, 1997 INTERNATIONAL PART NUMBER
IN THE AS S E MBLY LINE "C" RECTIFIER
LOGO

DATE CODE
LOT CODE

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IRF4104S/L
D2Pak Package Outline
Dimensions are shown in millimeters (inches)

D2Pak Part Marking Information

T HIS IS AN IRF530S WIT H PART NUMBER
LOT CODE 8024 INT ERNAT IONAL
ASS EMBLED ON WW 02, 2000 RECT IFIER F 530S
IN T HE ASS EMBLY LINE "L" LOGO
DAT E CODE
YEAR 0 = 2000
ASS EMBLY
LOT CODE WEEK 02
LINE L
For GB Production
T HIS IS AN IRF530S WIT H PART NUMBER
LOT CODE 8024 INT ERNAT IONAL
ASS EMBLED ON WW 02, 2000 RECT IFIER F 530S
IN T HE ASS EMBLY LINE "L" LOGO

DAT E CODE
LOT CODE

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 IRF4104S/L
TO-262 Package Outline
Dimensions are shown in millimeters (inches)

IGBT
1- GATE
2- COLLEC-
TOR

TO-262 Part Marking Information

EXAMPLE: T HIS IS AN IRL3103L
LOT CODE 1789 PART NUMBER
INT ERNATIONAL
ASS EMBLED ON WW 19, 1997
RECTIFIER
IN THE ASS EMBLY LINE "C" LOGO
DATE CODE
YEAR 7 = 1997
AS SEMBLY
LOT CODE WEEK 19
LINE C

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IRF4104S/L
D2Pak Tape & Reel Information
TRR

1.60 (.063)
1.50 (.059)
1.60 (.063)
4.10 (.161) 1.50 (.059)
3.90 (.153) 0.368 (.0145)
0.342 (.0135)

FEED DIRECTION 1.85 (.073) 11.60 (.457)

1.65 (.065) 11.40 (.449) 24.30 (.957)
15.42 (.609)
23.90 (.941)
15.22 (.601)
TRL
1.75 (.069)
10.90 (.429) 1.25 (.049)
10.70 (.421) 4.72 (.136)
16.10 (.634) 4.52 (.178)
15.90 (.626)

FEED DIRECTION

13.50 (.532) 27.40 (1.079)

12.80 (.504) 23.90 (.941)

330.00 60.00 (2.362)

(14.173) MIN.
MAX.

30.40 (1.197)
NOTES : MAX.
1. COMFORMS TO EIA-418. 26.40 (1.039) 4
2. CONTROLLING DIMENSION: MILLIMETER. 24.40 (.961)
3. DIMENSION MEASURED @ HUB.
3
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

Notes:
 Repetitive rating; pulse width limited by … Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
max. junction temperature. (See fig. 11). avalanche performance.
‚ Limited by TJmax, starting TJ = 25°C, L = 0.04mH † This value determined from sample failure population. 100%
R G = 25Ω, IAS = 75A, VGS =10V. Part not tested to this value in production.
recommended for use above this value. ‡ This is only applied to TO-220AB pakcage.
ƒ Pulse width ≤ 1.0ms; duty cycle ≤ 2%. ˆ This is applied to D2Pak, when mounted on 1" square PCB (FR-
„ Coss eff. is a fixed capacitance that gives the 4 or G-10 Material). For recommended footprint and soldering
same charging time as Coss while VDS is rising
techniques refer to application note #AN-994.
from 0 to 80% VDSS .
TO-220AB package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101]market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 08/03
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/