Flip Flop

TOPIC : SR FLIP FLOP
EXPERIMENT: 02
OBJECTIVE : To define;
a) The output for SR Flip-flop and SR NAND Flip-flop.
b) The differential function for both of the flip-flop.
c) The waveforms layout for SR NOR Flip-flop and SR NAND flip-flop.
EQUIPMENT: 1) DC power supply

2) Logic trainer
3) IC 7400 and IC 7420
4) Jumper
PROCEURES:
A. SR FLIP-FLOP(Active high)
1. The circuit is connected by using IC 7420 as shown in figure 1.
2. SW1=SET and SW2=RESET is set.
3. Pin 14 is connected to dc power supply and pin 7 was grounded.
4. According to the truth table 1 the data switches is set and the output
was filled in the table.
SW1=S
2 1 L2=Q’
3
Figure1
5
SW2=R 4 LI=Q
INPUT OUTPUT OPERATION

S R Q Q’
0 0 0 1 HOLD
0 1 0 1 RESET
1 0 1 0 SET
1 1 0 0 INVALID
Truth table 1
B. SR NAND FLIP-FLOP(Active Low)

1. The circuit is connected by using IC 740 as shown in figure 2.
2. SW1=SET and SW2=RESET is set.
3. Pin 14 is connected to dc power supply and pin 7 was grounded.
4. According to the truth table 2 the data switches is set and the output
filled in the table.
FIGURE 2

S R Q Q’
0 0 1 1 INVALID
0 1 1 0 SET
1 0 0 1 RESET
1 1 1 0 HOLD
TRUTH TABLE 2
C. QUESTIONS
1. The waveforms of figure 3 are applied to the inputs of neither SR NOR Flip-flop.
. Assume that initially Q=0 and determine the Q and Q’ waveforms.
2. The waveforms of figure 4 are applied to the inputs of SR NAND Flip- .

flop. Assume that initially Q=1 and determine the Q and Q’ waveforms
D. DISCUSSION
This experiment is about SR Flip-flop active high and SR Flip-flop active low.
The main equipment in this experiment is IC7400 and IC7402. For SR Flip-flop active
high have to use get NOR so have to use IC 7420 but SR Flip-flop active low have to use
get NAND. Below here the is some diagram show how the SR flip-flop fix for SR active
high and active low.
Q’
B
A Q
SR flip-flop active high

SR flip-flop active low
The value of the output that obtained from the experiment when doing the procedure B
(Flip-Flop Active Low) are different with the actual value or output of Flip-Flop (Active
Low).Actually, when the input of S R are =1, the output values are 0 and 1but when
doing the experiment, the values of the output that obtained from the experiment are 1and
0 although the values of input S R are=1.
Truth Table Of FF SR Active Low

S R Q Q’ Operation
0 0 1 1 Invalid
0 1 1 0 Set
1 0 0 1 Reset
1 1 Q Q’ Hold
Truth Table Of FF SR Active Low
S R Q Q’ Operation
0 0 1 1 Invalid
0 1 1 0 Set
1 0 0 1 Reset
1 1 1 0 Hold
The Actual Truth Table OF SR Active Low The Truth Table That Obtained From The
Experiment
The values of flip-flop still the same although the IC 7400 and probe was changed. LED
and SW also changed to other LED and SW, but the value still remaining the same. The
problem that occurred may be from the Logic Trainer or the IC 7400. The Logic Trainer
must be having some problems with its electronic components such as LED, SW and
extra. Other than that, the IC 7400 may be contains or processed with incorrect inputs by
the manufacturer.
E. CONCLUSION:
SR NOR Flip-flop active high operate when the input at first time to S and R must be set
to 0, so the output for Q is 0 and Q’ is 1. When input for S and R is set to 0 from here get
NOR B will get 0 input so the output for Q’ is 1 and the logic 1 will be the input for
neither get NOR A. so the flip-flop in HOLD position when the input S=0 and R=0. If the
input for S=0 and R=1 , so get NOR A will get 1 and 0 input so the output will become
0.The 0 logic will be the input for the get NOR B from this time the input is 0,0 in
addition the output will be 1 for Q’. The flip-flop in RESET situation if the input S=0 and
R=1.For input S=1 and R=0 just same like the operation up there but the output will be
Q=1 and Q’=0 so it will be in set position. But for input S=1 and R=1 the output is
different .the output for this will be Q=0 and Q’=0 hence the flip-flop in INVALID
position. Whether the input is S=1 and R=0 means in SET condition.
For SR flip-flop active low the operation just same like SR flip-flop active high.
But the output is opposite if comparing to SR flip-flop active high. Below here the truth
table show the output for SR flip-flop active low

S R Q Q’
0 0 0 0 INVALID
0 1 1 0 SET
1 0 0 1 RESET
1 1 Q Q’ HOLD
Beside that, from this experiment also can learn how to draw waveforms layout
for SR flip-flop. According the waveform up there for the duration T1 input is S=1, R=0
so the flip-flop in SET condition, Q=1. It means the flip-flop kept binary 1. For duration
T2 input is S= 0 and R=0 so the flip-flop in HOLD condition means the flip-flop doesn’t
make any change

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What are SR flip-flops and how do they operate?

What is the difference between SR flip-flops with active high and active low?

TOPIC : SR FLIP FLOP

EQUIPMENT: 1) DC power supply

INPUT OUTPUT OPERATION

B. SR NAND FLIP-FLOP(Active Low)

INPUT OUTPUT OPERATION

2. The waveforms of figure 4 are applied to the inputs of SR NAND Flip- .

SR flip-flop active high

Truth Table Of FF SR Active Low

INPUT OUTPUT OPERATION

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