La 76070

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Ordering number : ENN5844

Monolithic Linear IC

LA76070

NTSC Color Television IC

Overview Package Dimensions


The LA76070 is an NTSC color television IC. In addition unit: mm
to providing IIC bus control based rationalization of IC 3128-DIP52S
control and the adjustment manufacturing process
associated with the TV tube itself, it also includes all [LA76070]

functions actually required in mass-produced television 52 27

sets. As such, it is an extremely practical bus control IC.

15.24
13.8
* The LA7840/41 or LA7845N/46N is recommended as the vertical output
IC for use with this product.

0.25
1 26
46.0
Functions

5.1max
4.25
• I 2 C bus control, VIF, SIF, Y, C, and deflection

3.8
integrated on a single chip.

0.51min
0.48 1.05 1.78 0.75

SANYO: DIP52S

Specifications
Maximum Ratings at Ta = 25°C
Parameter Symbol Conditions Rating Unit
V4 max 9.6 V
Maximum power supply voltage
V26 max 9.6 V
Maximum power supply current I21 max 25 mA
Allowable power dissipation Pd max Ta ≤ 65°C* 1.3 W
Operating temperature Topr –10 to +65 °C
Storage temperature Tstg –55 to +150 °C

Note: *Provided on a printed circuit board: 83.2 × 86.0 × 1.6 mm, material: Bakelite

Operating Conditions at Ta = 25°C


Parameter Symbol Conditions Rating Units
V4 7.6 V
Recommended power supply voltage
V26 7.6 V
Recommended power supply current I21 19 mA
V4 op 7.3 to 7.9 V
Operating power supply voltage range
V26 op 7.3 to 7.9 V
Operating power supply current range 121 op 16 to 25 mA

Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.

SANYO Electric Co.,Ltd. Semiconductor Company


TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
70999 RM (OT) No. 5844-1/27
LA76070

Electrical Characteristics at Ta = 25°C, VCC = V4 = V26 = 7.6 V, ICC = I21 = 19 mA


Ratings
Parameter Symbol Conditions Unit
min typ max
[Circuit Voltages and Currents]
Horizontal power supply voltage HVCC 7.2 7.6 8.0 V
IF power supply current (V4) I4 (IFICC) IF AGC: 5 V 38 46 54 mA

Video, chroma,
I26 (YCVICC) 79.5 93.5 107.5 mA
and vertical power supply current (V26)

[VIF Block]
AFT output voltage with no signal VAFTn With no input signal 2.8 3.8 4.8 Vdc
Video output voltage with no signal VOn With no input signal 4.7 4.9 5.1 Vdc
APC pull-in range (U) fPU After APC and PLL DAC adjustment 1.0 MHz
APC pull-in range (L) fPL After APC and PLL DAC adjustment 1.0 MHz
Maximum RF AGC voltage VRFH CW = 91 dBµ, DAC = 0 7.7 8.2 9.0 Vdc
Minimum RF AGC voltage VRFL CW = 91 dBµ, DAC = 63 0 0.2 0.4 Vdc
RF AGC Delay Pt (@DAC = 0) RFAGC0 DAC = 0 96 dBµ
RF AGC Delay Pt (@DAC = 63) RFAGC63 DAC = 63 86 dBµ
Maximum AFT output voltage VAFTH CW = 93 dBµ, variable frequency 6.2 6.5 7.6 Vdc
Minimum AFT output voltage VAFTL CW = 93 dBµ, variable frequency 0.5 0.9 1.2 Vdc
AFT detection sensitivity VAFTS CW = 93 dBµ, variable frequency 33 25 17 mV/kHz
Video output amplitude VO 93 dBµ, 87.5% Video MOD 1.8 2.0 2.2 Vp-p
Synchronization signal tip level VOtip 93 dBµ, 87.5% Video MOD 2.4 2.6 2.8 Vdc
Input sensitivity Vi Output at –3 dB 43 46 dBµ
Video-to-sync ratio (@100 dBµ) V/S 100 dBµ, 87.5% Video MOD 2.4 2.5 3.0
Differential gain DG 93 dBµ, 87.5% Video MOD 2 10 %
Differential phase DP 93 dBµ, 87.5% Video MOD 2 10 deg
Video signal-to-noise ratio S/N CW = 93 dBµ 55 58 dB
920 kHz beat level I920 V3.58 MHz/V920 kHz –50 dB
[Video and Switching Block]
External video gain AUXG Stair step, 1 V p-p 5.5 6.0 6.5 dB
External video sync signal tip voltage AUXS Stair step, 1 V p-p –0.2 0.0 +0.2 Vdc
External video crosstalk AUXC 4.2 MHz, 1Vp-p 60 dB
Internal video output level INTO 93 dBµ, 87.5% Video MOD –0.1 0.0 +0.1 Vp-p
[SIF Block]
FM detector output voltage SOADJ 464 474 484 mVrms
FM limiting sensitivity SLS Output at –3 dB 50 dBµ
FM detector output bandwidth SF Output at –3 dB 50 100 k Hz

FM detector output total


STHD FM = ±25 kHz 0.5 %
harmonic distortion

AM rejection ratio SAMR AM = 30 % 40 dB


SIF signal-to-noise ratio SSN 60 dB
[Audio Block]
Maximum gain AGMAX 1 kHz –2.5 0.0 +2.5 dB
Adjustment range ARANGE 60 67 dB
Frequency characteristics AF 20 kHz –3.0 +3.0 dB
Muting AMUTE 20 kHz 75 dB
Total harmonic distortion ATHD 1 kHz, 400 m Vrms, Vo1: MAX 0.5 dB
Signal-to-noise ratio ASN DIN.Audio 65 75 dB
[Chroma Block]
ACC amplitude characteristics 1 ACCM1 Input: +6 dB/0 dB, 0 dB = 40 IRE 0.8 1.0 1.2 times
ACC amplitude characteristics 2 ACCM2 Input: –14 dB/0 dB 0.7 1.0 1.1 times
B-Y/Y amplitude ratio CLRBY 100 125 140 %
Color control characteristics 1 CLRMN Color MAX/NOM 1.6 1.8 2.1 times
Color control characteristics 2 CLRMM Color MAX/MIN 33 40 50 dB

Continued on next page.

No. 5844-2/27
LA76070

Continued from preceding page.

Ratings
Parameter Symbol Conditions Unit
min typ max
Color control sensitivity CLRSE 1 2 4 %/bit
Tint center TINCEN TINT NOM –15 –3 deg
Tint control maximum TINMAX TINT MAX 30 45 60 deg
Tint control minimum TINMIN TINT MIN –60 –45 –30 deg
Tint control sensitivity TINSE 0.7 2.0 deg/bit
Demodulator output ratio R-Y/B-Y RB 0.75 0.85 0.95
Demodulator output ratio G-Y/B-Y GB 0.28 0.33 0.38
Demodulator angle B-Y/R-Y ANGBR 92 99 107 deg
Demodulator angle G-Y/B-Y ANGGB 227 237 247 deg
Killer operating point KILL 0 dB = 40 IRE –42 –37 –30 dB
Chrominance VCO free-running frequency CVCOF Deviation from 3.579545 MHz –350 +350 Hz
Chrominance pull-in range (+) PULIN+ 350 Hz
Chrominance pull-in range (–) PULIN– –350 Hz
Auto-flesh characteristic 73° AF 073 5 10 20 deg
Auto-flesh characteristic 118° AF 118 –7 0 +7 deg
Auto-flesh characteristic 163° AF 163 –20 –10 –5 deg
[Video Block]
Overall video gain
CONT63 10 12 14 dB
(Contrast set to maximum)

Contrast adjustment characteristic


CONT32 –7.5 –6.0 –4.5 dB
(Normal/maximum)

Contrast adjustment characteristic


CONT0 –17 –14 –11 dB
(Minimum/maximum)

Video frequency characteristic


Yf0 –6.0 –3.5 0.0 dB
Trap & D = 0

Chrominance trap level


Ctrap –20 dB
Trap & D = 1

DC propagation ClampG 95 100 105 %


Y delay, f0 = 1 YDLY 430 ns
Maximum black stretching gain BKSTmax 6 13 20 IRE
(normal) Sharp16 4 6 8 dB
Sharpness adjustment range (max) Sharp31 9.0 11.5 14.0 dB
(min) Sharp0 –6.0 –3.5 –1.0 dB
Horizontal/vertical blanking output level RGBBLK 1.4 1.6 1.8 V
[OSD Block]
OSD fast switch threshold FSTH 0.9 1.2 1.7 V
Red RGB output level ROSDH 220 250 280 IRE
Green RGB output level GOSDH 220 250 280 IRE
Blue RGB output level BOSDH 220 250 280 IRE

Analog OSD R output level


RRGB 1.5 1.9 2.3 Ratio
gain matching

Linearity LRRGB 45 50 60 %

Analog OSD G output level


GRGB 1.5 1.9 2.3 Ratio
gain matching
Linearity LGRGB 45 50 60 %

Analog OSD B output level


BRGB 1.5 1.9 2.3 Ratio
gain matching

Linearity LBRGB 45 50 60 %
[RGB Output (cutoff and drive) Block]
Brightness control (normal) BRT64 2.1 2.65 3.2 V
High brightness (maximum) BRT127 15 20 25 IRE
Low brightness (minimum) BRT0 –25 –20 –15 IRE

Continued on next page.

No. 5844-3/27
LA76070

Continued from preceding page.

Ratings
Parameter Symbol Conditions Unit
min typ max
(minimum) Vbias0 2.1 2.65 3.2 V
Cutoff control
(maximum) Vbias127 2.45 3.0 3.55 V
(Bias control)
Resolution Vbiassns 4 mV/Bit
RBout127 2.9 Vp-p
Maximum output
Drive adjustment Gout127 2.4 Vp-p
Output attenuation RBout0 7 9 11 dB
[Deflection Block]
Sync separator sensitivity Ssync 3 8 13 IRE

Horizontal free-running frequency


∆fH 15600 15734 15850 Hz
deviation
Horizontal pull-in range fH PULL ±400 Hz

Horizontal output pulse saturation


V Hsat 0 0.06 0.4 V
voltage

Horizontal output pulse phase HPHCEN 9.5 10.5 11.5 µs


Horizontal position adjustment range HPHrange 4 bits ±2 µs

Horizontal position adjustment


HPHstep 530 ns
maximum variability

X-ray protection circuit operating


VXRAY 0.54 0.64 0.74 V
voltage

[Vertical screen Size Adjustment]


Vertical ramp output amplitude @32 Vsize32 VSIZE: 100000 0.47 0.82 1.17 Vp-p
Vertical ramp output amplitude @0 Vsize0 VSIZE: 000000 0.13 0.48 0.83 Vp-p
Vertical ramp output amplitude @63 Vsize63 VSIZE: 111111 0.80 1.15 1.50 Vp-p
[Vertical screen Position Adjustment]
Vertical ramp DC voltage @32 Vdc32 VDC: 100000 3.6 3.8 4.0 Vdc
Vertical ramp DC voltage @0 Vdc0 VDC: 000000 3.2 3.4 3.6 Vdc
Vertical ramp DC voltage @63 Vdc63 VDC: 111111 4.0 4.2 4.4 Vdc

No. 5844-4/27
LA76070

LA76070 BUS: Initial Conditions

Initial test conditions Initial test conditions (continued)


Register Register
T Enable 0 HEX Video SW 0 HEX
Video Mute 1 HEX PLL Tuning 40 HEX
Sync Kill 0 HEX Audio Mute 1 HEX
AFC Gain 0 HEX APC Det Adjust 20 HEX
Horizontal Phase 4 HEX V CD Mode 0 HEX
IF AGC SW 0 HEX Vertical DC 20 HEX
AFT Defeat 0 HEX Vertical Kill 0 HEX
RF AGC Delay 20 HEX Col Kill 0 HEX
Vertical Size 20 HEX
Red Bias 00 HEX
Green Bias 00 HEX
Blue Bias 00 HEX
Blanking Defeat 0 HEX
Red Drive 7F HEX
Blue Drive 7F HEX
Color Difference Mode Enable 0 HEX
Brightness Control 40 HEX
Contrast Test Enable 0 HEX
Contrast Control 40 HEX
Trap & Delay Enable SW 0 HEX
Auto Flesh 0 HEX
Black Stretch Defeat 0 HEX
Sharpness Control 10 HEX
Tint Test Enable 0 HEX
Tint Control 40 HEX
Color Test Enable 0 HEX
Color Control 40 HEX
Vertical Test 0 HEX
Video Level 4 HEX
FM Level 10 HEX
BNI Enable 0 HEX
Audio SW 0 HEX
Volume Control 00 HEX

No. 5844-5/27
LA76070

LA76070 BUS: Control Register Descriptions

Control register descriptions


Register name Bits General descriptions
T Enable 1 Disable the Test SW & enable Video Mute SW
Video Mute 1 Disable video outputs
Sync Kill 1 Force free-run mode
AFC Gain 1 Select horizontal first loop gain
Horizontal Phase 3 Align sync to flyback phase
IF AGC SW 1 Disable IF and RF AGC
AFT Defeat 1 Disable AFT output
RF AGC Delay 6 Align RF AGC threshold
Video SW 1 Select Video Signal (INT/EXT)
PLL Tuning 7 Align IF VCO frequency
Audio Mute 1 Disable audio outputs
APC Det Adjust 6 Align AFT crossover
V Count Down Mode 1 Select vertical countdown mode
Vertical DC 6 Align vertical DC bias
Vertical Kill 1 Disable vertical output
Color Kill 1 Enable Color Killer
Vertical Size 6 Align vertical amplitude
Red Bias 7 Align Red OUT DC level
Green Bias 7 Align Green OUT DC level
Blue Bias 7 Align Blue OUT DC level
Blanking Defeat 1 Disable RGB output blanking
Red Drive 6 Align Red OUT AC level
Drive Test 1 Enable drive DAC test mode
Blue Drive 6 Align Blue OUT AC level
Color Difference Mode Enable 1 Enable color difference mode
Brightness Control 7 Customer brightness control
Contrast Test 1 Enable Contrast DAC test mode
Contrast Control 7 Customer Contrast control
Trap & Delay-SW 1 Select luma filter mode
Auto Flesh Enable 1 Enable autoflesh function
Black Stretch Defeat 1 Disable black stretch
Sharpness Control 5 Customer sharpness control
Tint Test 1 Enable tint DAC test mode
Tint Control 7 Customer tint control
Color Test 1 Enable color DAC test mode
Color Control 7 Customer color control
Vertical Test 3 Select vertical DAC test modes
Video Level 3 Align IF video level
FM Level 5 Align WBA output level
BNI Enable 1 Enable black noise inverter
Audio SW 1 Select Audio Signal (INT/EXT)
Volume Control 6 Customer volume control

No. 5844-6/27
LA76070

LA76070 BUS: Control Register Truth Table

Control register truth table


Register name 0 HEX 1 HEX
T Enable Test Enable Test Disable
Audio Mute Active Mute
Video Mute Active Mute
Sync Kill Sync active Sync Killed
AFC Gain Slow Fast
IF AGC SW AGC active AGC Defeat
AFT Defeat AFT active AFT Defeat
BNI Enable BNI active BNI Defeat
Count Down Mode Standard Non-Stand
Vertical Kill Vrt active Vrt Killed
F0 Select 3.58 trap 8.00 APF
Auto Flesh Enable AF Off AF On
Overload Enable Ovld Off Ovld On
Tint DAC Test Normal Test Mode
Color DAC Test Normal Test Mode
Contrast DAC Test Normal Test Mode
Drive DAC Test Normal Test Mode
Black Stretch Defeat Blk Str On Blk Str Off
Blanking Defeat Blanking No Blank
Color Diff Mode Enable RGB Mode C Diff Mode
Vertical Test Normal Ver Size Test

No. 5844-7/27
LA76070

LA76070 Bit Map (‘96.08.01)


IC address: BAH (101111010)
Sub address MSB DATA LSB
D0....D7 DA0 DA1 DA2 DA3 DA4 DA5 DA6 DA7
$00 * * * * T_Enable * Vid_Mute Sync_Kill
(tr0) 0 1 0
$01 * * * * AFC Gain H_Phase
(tr1) 0 1 0 0
$02 IFAGC SW AFT DEF RF_AGC_Delay
(tr2) 0 0 1 0 0 0 0 0
$03 VIDEO SW PLL TUNING
(tr3) 0 1 0 0 0 0 0 0
$04 * Aud_Mute APC DET ADJUST
(tr4) 1 1 0 0 0 0 0
$05 V CD MODE * Ver_dc
(tr5) 0 1 0 0 0 0 0
$06 Ver_kill Col_kill Ver_Size
(tr6) 0 0 1 0 0 0 0 0
$07 * R_Bias
(tr7) 0 0 0 0 0 0 0
$08 * G_Bias
(tr8) 0 0 0 0 0 0 0
$09 * B_Bias
(tr9) 0 0 0 0 0 0 0
$0A BLK_DEF R_Drive
(tr10) 0 1 1 1 1 1 1 1
$0B Drv_Test B_Drive
(tr11) 0 1 1 1 1 1 1 1
$0C C_Diff Bright
(tr12) 0 1 0 0 0 0 0 0
$0D Cot_Test Contrast
(tr13) 0 1 0 0 0 0 0 0
$0E Trap & D_SW A Fresh Black ST Sharpness
(tr14) 0 0 0 1 0 0 0 0
$0F Tint_Test Tint
(tr15) 0 1 0 0 0 0 0 0
$10 Col_Test Color
(tr16) 0 1 0 0 0 0 0 0
$11 * * * * * V_test
(tr17) 0 0 0
$12 VIDEO LEVEL FM LEVEL
(tr18) 1 0 0 1 0 0 0 0
$13 N/I SW AUDIO SW VOLUME
(tr19) 0 0 0 0 0 0 0 0

No. 5844-8/27
LA76070

Measurement Conditions at Ta = 25°C, VCC = V4 = V26 = 7.6 V, ICC = I21 = 19 mA

Measurement
Parameter Symbol Input signal Measurement method Bus conditions
point

[Circuit Voltages and Currents]

Apply a 19mA current to pin 21 and


Horizontal power supply voltage HVCC 21 measure the pin 21 voltage at that time
Initial conditions

Apply a voltage of 7.6 V to pin 4 and


I4
IF power supply current (pin 4)
(IFICC) 4 No signal measure (in mA) the DC current that flows into the IC.
(Apply 5 V to the IF AGC.)
Initial conditions

Video/vertical power supply current I26 Apply a voltage of 7.6 V to pin 26 and
(pin 26) (DEFICC) 26 measure (in mA) the DC current that flows into the IC
Initial conditions

No. 5844-9/27
LA76070

VIF Block Input Signals and Measurement Conditions


1. All input signals are applied to PIF IN (pin 10) as shown in the measurement circuit diagrams.
2. The input signal voltage values are all the value of VIF IN (pin 10) as shown in the measurement circuit diagrams.
3. The table below lists the input signals and their levels.

Input signal Waveform Condition

SG1 45.75 MHz

SG2 42.17 MHz

SG3 41.25 MHz

SG4 Variable frequency

45.75 MHz
87.5 % video modulation
SG5
10-step staircase waveform
(Subcarrier: 3.58 MHz)

45.75 MHz
87.5 % video modulation
SG6 Sweep signal
(APL: 50 IRE
Sweep signal level: 40 IRE)

45.75 MHz
SG7 87.5 % video modulation
Flat field signal

4. Perform the following D/A converter adjustments in the order listed before testing.

Item Measurement point Input signal Adjustment


APC DAC 13 No signal, IF.AGC.DEF = 1 Set up the DAC value so that the pin 13 DC voltage is as close to 3.8 V as possible
PLL DAC 13 SG1, 93 dBµ Set up the DAC value so that the pin 13 DC voltage is as close to 3.8 V as possible

Video 45 SG7, 93 dBµ Set up the DAC value so that the pin 45 output level is as close to 2.0 V p-p as
possible

No. 5844-10/27
LA76070

Measurement
Parameter Symbol Input signal Measurement procedure Bus conditions
point

[VIF Block]
Measure the pin 13 DC voltage when After performing the adjustments
AFT output voltage with no signal VAFTn 13 No signal
IF.AGC. DEF is "1" described in section 4
Measure the pin 45 DC voltage when After performing the adjustments
Video output voltage with no signal VOn 45 No signal
IF.AGC. DEF is "1" described in section 4
Connect an oscilloscope to pin 45 and modify
the SG4 signal to be a frequency above 45.75
MHz so that the PLL circuit becomes unlocked.
(Beating will occur in this state.) Gradually
lower the SG4 frequency and measure the
SG4 After performing the adjustments
APC pull-in range (U), (L) fPU, fPL 45 93 dBµ
frequency at which the PLL circuit locks.
described in section 4
Similarly, modify the frequency to a value
below 45.75 MHz so that the PLL circuit
becomes unlocked. Gradually raise the SG4
frequency and measure the frequency at which
the PLL circuit locks.
SG1 Set the RF AGC DAC to 0 and measure the pin After performing the adjustments
Maximum RF AGC voltage VRFH 6 91 dBµ 6 DC voltage described in section 4
SG1 Set the RF AGC DAC to 63 and measure the After performing the adjustments
Minimum RF AGC voltage VRFL 6 91 dBµ pin 6 DC voltage described in section 4
Set the RF AGC DAC to 0 and determine the
RF AGC Delay Pt After performing the adjustments
(@DAC = 0)
RFAGC0 6 SG1 input level such that the pin 6 DC voltage
described in section 4
becomes 3.8 V ±0.5 V
Set the RF AGC DAC to 63 and determine the
RF AGC Delay Pt After performing the adjustments
(@DAC = 63)
RFAGC63 6 SG1 input level such that the pin 4 DC voltage
described in section 4
becomes 3.8 V ±0.5 V
Set the SG4 signal frequency to 44.75 MHz
SG4 After performing the adjustments
Maximum AFT output voltage VAFTH 13 93 dBµ
and input that signal. Measure the pin 13 DC
described in section 4
voltage at that time.
Set the SG4 signal frequency to 46.75 MHz
SG4 After performing the adjustments
Minimum AFT output voltage VAFTL 13 93 dBµz
and input that signal. Measure the pin 13 DC
described in section 4
voltage at that time.
Modify the SG4 frequency to determine the
SG4 frequency deviation (∆f) such that the pin After performing the adjustments
AFT detection sensitivity VAFTS 13 93 dBµz 13 DC voltage changes from 2.5 V to 5.0 V. described in section 4
VAFTS = 2500/∆f [mV/kHz]
SG7 Observe pin 45 with an oscilloscope and After performing the adjustments
Video output amplitude VO 45 93 dBµ measure the p-p value of the waveform described in section 4
SG1 After performing the adjustments
Synchronization signal tip level VOtip 45 93 dBµ
Measure the pin 45 DC voltage
described in section 4
Observe pin 45 with an oscilloscope and measure
the peak-to-peak value of the waveform. Next,
Input sensitivity Vi 45 SG7 gradually lower the input level to determine the input After performing the adjustments
described in section 4
level such that the output becomes –3 dB below the
video signal amplitude VO.
Observe pin 45 with an oscilloscope and
determine the value of the Vy/Vs ratio by
SG7 After performing the adjustments
Video-to-sync ratio (@ 100 dBµ) V/S 45 100 dBµ
measuring the peak-to-peak value of the sync
described in section 4
waveform (Vs) and the peak-to-peak value of the
luminance signal (Vy).
SG5 After performing the adjustments
Differential gain DG 45 93 dBµ
Measure pin 45 with a vectorscope
described in section 4
SG5 After performing the adjustments
Differential phase DP 45 93 dBµ
Measure pin 45 with a vectorscope
described in section 4
Pass the noise voltage that occurs on pin
45 through a 10 kHz to 4 MHz bandpass filter,
SG1 After performing the adjustments
Video signal-to-noise ratio S/N 45 93 dBµ
measure that voltage (Vsn) with an rms
described in section 4
voltmeter. Use that value to calculate 20 × log
(1.43/Vsn).
Input SG1 at 93 dBµ and measure the pin
12 DC voltage (V12).Mix three signals: SG1 at
87 dBµ, SG2 at 82 dBµ, and SG3 at 63 dBµ,
SG1
and input that signal to VIF IN. Now, apply the After performing the adjustments
920 kHz beat level I920 45 SG2
V12 voltage to pin 12 using an external power described in section 4
SG3
supply. Measure the difference between the
3.58 MHz component and the 920 kHz
component with a spectrum analyzer.

No. 5844-11/27
LA76070

Video Switch Block - Input Signals and Measurement Conditions

1. Unless otherwise indicated, these measurements are to be performed with no signal applied to PIF IN (pin 10) and
with the D/A converter IF.ACG.SW set to "1".
2. The table below lists the input signals and their labels.
Input signal Waveform Condition

10-step staircase waveform


SG8
1 V p-p

4.2 MHz
SG9
1 Vp-p

Measurement
Parameter Symbol Input signal Measurement procedure Bus conditions
point

[VIF Block]
Observe pin 42 with an oscilloscope, measure
Pin 1 the peak-to-peak value of the waveform, and
External video gain AUXG 42 SG8 perform the following calculation. VIDEO.SW = "1"
AUXG = 20 × log (Vp-p) [dB]
Observe pin 42 with an oscilloscope and
measure the synchronizing signal tip voltage
External video sync signal tip Pin 1 in the waveform.
voltage
AUXS 42 SG8 Determine the voltage difference between this
VIDEO.SW = "1"
measured value and synchronizing signal tip
level (VOtip) measured in the VIF block.
Measure the 4.2 MHz component in the pin 42
signal with a spectrum analyzer.Convert this
Pin 1
External video crosstalk AUXC 42 SG8
measurement to a V peak-to-peak value and VIDEO.SW = "0"
perform the following calculation.
AUXG = 20 × log (1.4/Vp-p) [dB]
Observe pin 45 with an oscilloscope and
Pin 10 After performing the adjustments
measure the peak-to-peak value of the
SG7 described in section 4
Internal video output level INT0 42 (VIF block)
waveform. Determine the difference between
IF. AGC. SW = "0"
this measured value and the video output
93 dBµ VIDEO. SW = "0"
amplitude (VO) measured in the VIF block.

No. 5844-12/27
LA76070

SIF Block (FM Block) - Input Signals and Measurement Conditions

Unless otherwise indicated, set up the following conditions for each of the following measurements.
1. Bus control condition: IF.AGC.DEF = 1
2. SW: IF1 = off
3. Apply the input signal to pin 49 and use a 4.5 MHz carrier signal.
Measurement
Parameter Symbol Input signal Measurement procedure Bus conditions
point

Adjust the DAC (FM.LEVEL) so that the pin 7


90 dBµ, FM detector output 1kHz component is as
FM detector output voltage SOADJ 7 fm = 1 kHz, close to 474 mV rms as possible, and
FM = ±25 kHz measure the output at that time in mV rms.
Record this measurement as SV1.
Determine the input level (in dBµ) such that
fm = 1 kHz,
FM limiting sensitivity SLS 7 FM = ±25 kHz
the pin 7 FM detector output 1kHz component FM.LEVEL = adjusted value
is –3 dB down from the SV1 value
Determine the modulation frequency
90 dBµ,
FM detector output bandwidth SF 7 FM = ±25 kHz
bandwidth (Hz) that is –3 dB or higher relative FM.LEVEL = adjusted value
to the pin 7 FM detector output SV1 value
90 dBµ,
FM detector output total harmonic Determine the total harmonic distortion in the
distortion
STHD 7 fm = 1 kHz,
pin 7 FM detector output 1kHz component
FM.LEVEL = adjusted value
FM = ±25 kHz
Measure the pin 7 FM detector output 1kHz
90 dBµ, component (in mV rms).
AM rejection ratio SAMR 7 fm = 1 kHz, Record this measured value as SV2 and FM.LEVEL = adjusted value
AM = 30% perform the following calculation.
SAMR = 20 × log (SV1/SV2) [dB]
Set SW1:IF1 to the "ON"
Measure the pin 7 noise level (in mV rms).
90 dBµ,
SIF signal-to-noise ratio SSN 7 CW
Record this measured value as SV3 and FM.LEVEL = adjusted value
perform the following calculation.
SSN = 20 × log (SV1/SV3) [dB]

Audio Block - Input Signals and Test Conditions

Measurement
Parameter Symbol Input signal Measurement procedure Bus conditions
point

Measure the output pin 1kHz component


1 kHz, CW (V1: mV rms) and perform the following VOLUME = "111111"
Maximum gain AGMAX 51 400m Vrms calculation. AUDIO.MUTE = "0"
AGMAX = 20 × log (V1/400) [dB]
Measure the output pin 1kHz component
1 kHz, CW (V2: mV rms) and perform the following VOLUME = "000001"
Variability range ARANGE 51 400m Vrms calculation. AUDIO.MUTE = "0"
AGMAX = 20 × log (V1/V2) [dB]
Measure the output pin 20kHz component
20 kHz, CW (V3: mV rms) and perform the following VOLUME = "111111"
Frequency characteristics AF 51 400m Vrms calculation. AUDIO.MUTE = "0"
AF = 20 × log (V3/V1) [dB]
Measure the output pin 20kHz component
20 kHz, CW (V4: mV rms) and perform the following VOLUME = "000000"
Muting AMUTE 51 400m Vrms calculation. AUDIO.MUTE = "0"
AMUTE = 20 × log (V3/V4) [dB]
1 kHz, CW Determine the total harmonic distortion in VOLUME = "111111"
Total harmonic distortion ATHD 51 400m Vrms output pin 1kHz component AUDIO.MUTE = "0"
Measure the noise level (DIN.AUDIO) on
the output pin (V5: mV rms) and perform the VOLUME = "111111"
Signal-to-noise ratio ASN 51 No signal
following calculation. AUDIO.MUTE = "0"
ASN = 20 × log (V1/V5) [dB]

No. 5844-13/27
LA76070

Chrominance Block - Input Signals and Measurement Conditions

Unless otherwise indicated, set up the following conditions for each of the following measurements.

1. VIF and SIF blocks: No signal


2. Deflection block: Input a horizontal and vertical composite synchronizing signal, and assure that the deflection block
is locked to the synchronizing signal. (Refer to the “Deflection Block - Input Signals and Measurement Conditions”
section.)
3. Bus control conditions: All conditions set to the initial conditions unless otherwise specified.
4. Y input: No signal
5. C input: The C1IN input (pin 40) must be used.
6. The following describes the method for calculating the demodulation angle.
B-Y axis angle = tan-1 (B (0)/B (270) + 270°
R-Y axis angle = tan-1 (R (180)/R (90) + 90°
G-Y axis angle = tan-1 (G (270)/G (180) + 180°

R-Y axis

B-Y axis

G-Y axis

7. The following describes the method for calculating the AF angle.


BR ... The ratio between the B-Y and R-Y demodulator outputs.
θ ...... ANGBR: The B-Y/R-Y demodulation angle

AFXXX = tan-1 [R-Y/B-YSin× θBR-Cosθ ]


8. Attach a TV crystal externally to pin 15.

No. 5844-14/27
LA76070

Chrominance Input Signals

C-1

X IRE signal (L-X)

C-2

C-3
(However, if a frequency is specified that frequency must be used.)

C-4

C-5

No. 5844-15/27
LA76070

Measurement
Parameter Symbol Input signal Measurement procedure Bus and other conditions
point

[Chroma Block]
Bout Measure the output amplitudes when the
C-1
chrominance signal input is 0 dB and when
ACC amplitude characteristic 1 ACCM1 0 dB
30 +6 dB
that input is +6 dB and calculate the ratio.
ACCM1 = 20 × log (+6 dBdata/0dBdata)
Bout Measure the output amplitude when the
C-1 chrominance signal input is –14 dB and
ACC amplitude characteristic 2 ACCM2
–14 dB calculate the ratio.
30 ACCM2 = 20 × log (–14 dBdata/0dBdata)
YIN: L77
C-1: Measure the Y output level
No signal (Record this measurement as V1)

Next, input a signal to CIN, and (with YIN a


B-Y/Y amplitude ratio CLRBY 30 sync-only signal) measure the output level.
C-2 (Record this measurement as V2)
Calculate CLRBY from the following formula.
CLRBY = 100 × (V2/V1) + 15%
TR24:
Measure V1: the output amplitude when the
Saturation
color control is maximum, and V2: the output
Color control characteristic 1 CLRMN 30 C-3
amplitude when the color control is nominal.
01111111
Saturation
Calculate CLRMN as V1/V2.
01000000
Measure V3: the output amplitude when the TR28:
Color control characteristic 2 CLRMN 30 C-3 color control is minimum. Calculate CLRMM Saturation
as CLRMN = 20 × log (V1/V3). 00000000
Measure V4: the output amplitude when the TR24:
color control is 90, and V5: the output amplitude Saturation
Color control sensitivity CLRSE 30 C-3 when the color control is 38. Calculate CLRSE 01011010
from the following formula. Saturation
CLRSE = 100 × (V4 – V5)/(V2 × 52) 00100110
Measure all sections of the output waveform TR23: Tint
Tint center TINCEN 30 C-1
and calculate the B-Y axis angle 00111111
Measure all sections of the output waveform,
calculate the B-Y axis angle, and calculate TR23: Tint
Tint control maximum TINMAX 30 C-1
TINMAX from the following formula. 01111111
TINMAX = <the B-Y axis angle> – TINCEN
Measure all sections of the output waveform,
calculate the B-Y axis angle, and calculate TR23: Tint
Tint control minimum TINMIN 30 C-1
TINMIN from the following formula. 00000000
TINMIN = <the B-Y axis angle> – TINCEN
Measure A1: the angle when the tint control is 85,
TR23: Tint
and A2: the angle when the tint control is 42,
Tint control sensitivity TINSE 30 C-1
and calculate TINSE from the following formula.
01010101
00101010
TINSE = (A1 – A2) /43

30 Measure Vb: the BOUT output amplitude, TR24:


Demodulation output ratio
RB C-3 and Vr: the ROUT output amplitude. Saturation
R-Y/B-Y
Determine RB = Vr/Vb. 01000000
28
TR24:
Demodulation output ratio Measure Vg: the GOUT output amplitude and
G-Y/B-Y
GB
29 C-3
determine GB = Vg/Vb
Saturation
01000000

Continued on next page.

No. 5844-16/27
LA76070

Continued from preceding page.

Measurement
Parameter Symbol Input signal Measurement procedure Bus and other conditions
point

Measure the BOUT and ROUT output levels,


30 calculate the angles of the B-Y and R-Y axes,
Demodulation angle B-Y/R-Y ANGBR C-1
and determine ANGBR as
28 <the R-Y angle> – <the B-Y angle>.
Measure the GOUT output level, calculate the
Demodulation angle B-Y/G-Y ANGBG 29 C-1 angle of the G-Y axis, and determine ANGBG
as <the G-Y angle> – <the B-Y angle>
Gradually lower the input signal level, and
Killer operating point KILL 30 C-3 measure the input signal level at the point the
output level falls under 150 mV p-p
Measure the oscillator frequency f, and
Chrominance VCO free-running CIN
frequency
CVCOF 15 No signal
determine CVCOF from the following formula.
CVCOF = f – 3579545 (Hz)
Gradually lower the input signal subcarrier
frequency starting from 3.57545 MHz +
Chrominance pull-in range (+) PULIN + 30 C–1
2000 Hz, and measure the frequency when
the output waveform locks
Gradually raise the input signal subcarrier
frequency starting from 3.57545 MHz –
Chrominance pull-in range (–) PULIN – 30 C–1
2000 Hz, and measure the frequency when the
output waveform locks
With Auto Flesh = 0, measure the level that
corresponds to 73° for the BOUT and ROUT TR22:
30 output waveforms, and calculate the angle Auto flesh:
AF073A. 0*******
Auto flesh characteristic 73° AF073 C–4
With Auto Flesh = 1, determine the angle TR22:
AF073B in the same way. Auto flesh:
28 Calculate AF073 from the following formula. 1*******
AF073 = AF073B – AF073A
With Auto Flesh = 0, measure the level that
corresponds to 118° for the BOUT and ROUT TR22:
30 output waveforms, and calculate the angle Auto flesh:
AF118A. 0*******
Auto flesh characteristic 118° AF118 C–4
With Auto Flesh = 1, determine the angle TR22:
AF118B in the same way. Auto flesh:
28 Calculate AF118 from the following formula. 1*******
AF118 = AF118B – AF118A
With Auto Flesh = 0, measure the level that
corresponds to 163° for the BOUT and ROUT TR22:
30 output waveforms, and calculate the angle Auto flesh:
AF163A. 0*******
Auto flesh characteristic 163° AF163 C–4
With Auto Flesh = 1, determine the angle TR22:
AF163B in the same way. Auto flesh:
28 Calculate AF163 from the following formula. 1*******
AF163 = AF163B – AF163A

No. 5844-17/27
LA76070

Video Block - Input Signals and Measurement Conditions

• C IN input signal * chrominance burst signal: 40 IRE


• Y IN input signal 100 IRE: 714 mV
*0 IRE signal (L-0): Standard NTSC synchronizing signal

XIRE signal (L-X)

CW signal (L-CW)

Black stretch 0 IRE signal (L-BK)

• R/G/B input signal


RGB input signal 1 (O-1)

RGB input signal 2 (O-2)

No. 5844-18/27
LA76070

Measurement Bus conditions and


Parameter Symbol Input signal Measurement procedure
point input signals

[Video Block]
Measure the output signal 50 IRE amplitude
Overall video gain Contrast max
(contrast: maximum)
CONT127 30 L–50 (CNTHB V p-p) and calculate CONT127 as
20 × log (CNTHB/0.357).
1111111

Contrast adjustment Measure the output signal 50 IRE amplitude


Contrast center
characteristics
(normal/maximum)
CONT63 30 L–50 (CNTCB V p-p) and calculate CONT63 as
20 × log (CNTCB/CNTHB).
0111111

Contrast adjustment Measure the output signal 50 IRE amplitude


Contrast min
characteristics
(minimum/maximum)
CONT0 30 L–50 (CNTLB V p-p) and calculate CONT0 as
20 × log (CNTLB/CNTHB).
0000000

Video frequency characteristics


30

Brightness min
Measure the output signal 0 IRE DC level 0000000
L–0
(BRTPL V) Contrast max
1111111
DC propagation ClampG
30 Measure the output signal 0 IRE DC level Brightness min
(DRVPH V) and the 100 IRE amplitude (DRVH 0000000
L–100
V p-p), and calculate ClampG as Contrast max
100 × (1 + (DRVPH - BRTPL)/DRVH). 1111111

Y delay YDLY 30
Measure the output signal 0 IRE DC level at
point A when the black stretch function is BKST defeat on (1)
defeated (off). Record this value as BKST1 (V).
Measure the output signal 0 IRE DC level at
Maximum black stretching gain BKSTmax 30 L–BK
point A when the black stretch is enabled (on). BKST defeat off (0)
Record this value as BKST2 (V).
Calculate BKSTmax from the following formula.
BKSTmax = 2 × 50 × (BKST1 – BKST2)/ CNTHB

L–CW

Sharpness (peaking) 30 L–CW

L–CW

Horizontal/vertical blanking Measure the output signal blanking period DC


output level
RGBBLK 30 L–100
level. Record that value as RGBBLK V.

No. 5844-19/27
LA76070

Measurement Bus conditions and


Parameter Symbol Input signal Measurement procedure
point input signals

[OSD Block]
Apply a voltage to pin 36 and determine the pin
L–0
OSD fast switch threshold FSTH 30 O–2
36 voltage when the output signal switches to Pin 35: Apply O-2
the OSD signal
Measure the output signal 50 IRE amplitude
Red RGB output level ROSDH L–50
(CNTCR V p-p)
28 L–0 Measure the OSD output amplitude Pin 36: 2.0 V
O–2 (OSDHR V p-p) Pin 33: Apply O-2
Calculate ROSDH as 50 × (OSDHR/CNTCR)
Measure the output signal 50 IRE amplitude
Green RGB output level GOSDH L–50
(CNTCG V p-p)
29 L–0 Measure the OSD output amplitude Pin 36: 2.0 V
O–2 (OSDHG V p-p) Pin 34: Apply O-2
Calculate GOSDH as 50 × (OSDHG/CNTCG)
Measure the output signal 50 IRE amplitude
Blue RGB output level BOSDH L–50
(CNTCB V p-p)
30 L–0 Measure the OSD output amplitude Pin 36: 2.0 V
O–2 (OSDHB V p-p) Pin 35: Apply O-2
Calculate BOSDH as 50 × (OSDHB/CNTCB)
Measure the amplitude of points A (the 0.35 V
section in the input signal O-1) and B (the 0.7 V
L–0 Pin 36: 2.0 V
Analog OSD R output level 28 O–1
section in the input signal O-1) in the output
Pin 33: Apply O-1
signal and record those values as RGBLR and
RGBHR V p-p, respectively
Gain matching RRGB Calculate RRGB as RGBLR/CNTCR
Linearity LRRGB Calculate LRRGB as 100 × (RGBLR/RGBHR)
Measure the amplitude of points A (the 0.35 V
section in the input signal O-1) and B (the 0.7 V
L–0 Pin 36: 2.0 V
Analog OSD G output level 29 O–1
section in the input signal O-1) in the output
Pin 34: Apply O-1
signal and record those values as RGBLG and
RGBHG V p-p, respectively
Gain matching GRGB Calculate GRGB as RGBLG/CNTCG
Linearity LGRGB Calculate LGRGB as 100 × (RGBLG/RGBHG)
Measure the amplitude of points A (the 0.35 V
section in the input signal O-1) and B (the 0.7 V
L–0 Pin 36: 2.0 V
Analog OSD B output level 30 O–1
section in the input signal O-1) in the output
Pin 35: Apply O-1
signal and record those values as RGBLB and
RGBHB V p-p, respectively
Gain matching BRGB Calculate BRGB as RGBLB/CNTCB
Linearity LBRGB Calculate LBRGB as 100 × (RGBLB/RGBHB)

Measurement Bus conditions and


Parameter Symbol Input signal Measurement procedure
point input signals
[RGB Output Block] (Cutoff and Drive Blocks)
Measure the output signal 0 IRE DC levels for
28 the R output (28), G output (29), and B output Contrast max
(30). Record these values as BRTPCR, 1111111
Brightness control (normal)
BRT63 29 L–0
BRTPCG, and BRTPCB V, respectively.
Calculate BRT63 as
30 (BRTPCR + BRTPCG + BRTPCB)/3
(max) BRT127 Measure the output signal 0 IRE DC levels for Brightness max
the B output (30). Record this value as BRTPHB. 1111111
Calculate BRT127 as
50 × (BRTPHB – BRTPCB)/CNTHB
(min) BRT0
30 Measure the output signal 0 IRE DC levels for Brightness min
the B output (30). Record this value as BRTPLB. 0000000
Calculate BRT0 as
50 × (BRTPLB – BRTPCB)/CNTHB

No. 5844-20/27
LA76070

Measurement
Parameter Symbol Input signal Measurement procedure Bus and other conditions
point

[RGB Output Block] (Cutoff and Drive Blocks)


(minimum) Vbias0 Measure the output signal 0 IRE DC levels for
the R output (pin 28), G output (pin 29), and B Contrast max
L–50
output (pin 30). Record these values as Vbias0 1111111
*(V).Here, * is R, G, and B, respectively.
(maximum) Vbias127 R bias max
1111111
Bias (cutoff) control Measure the output signal 0 IRE DC levels for
G bias max
the R output (pin 28), G output (pin 29), and B
1111111
output (pin 30). Record these values as
B bias max
Vbias128*(V). Here, * is R, G, and B,
1111111
respectively.
Contrast max
28 1111111
R bias:
1010000
Measure the output signal 0 IRE DC levels for
29 the R output (pin 28), G output (pin 29), and B
G bias:
1010000
output (pin 30). Record these values as
B bias:
BAS80*.
1010000
30 Here, * is R, G, and B, respectively.
Contrast max
1111111
Bias (cutoff) control resolution Vbiassns R bias:
0110000
Measure the output signal 0 IRE DC levels for
G bias:
the R output (pin 28), G output (pin 29), and B
0110000
output (pin 30). Record these values as
B bias:
BAS48*(V).
0110000
Here, * is R, G, and B, respectively.
Contrast max
1111111
Vbiassns* = (BAS80* – BAS48*)/32
Drive adjustment: Maximum output RGBout127 Measure the output signal 100 IRE amplitudes Contrast max
for the R output (pin 28), G output (pin 29), and 1111111
B output (pin 30). Record these values as Brightness min
DRVH* (V p-p). 0000000
28 Here, * is R, G, and B, respectively.
Output attenuation RGBout0 Contrast max
1111111
L–100 Measure the output signal 100 IRE amplitudes
29 for the R output (pin 28), G output (pin 29), and
Brightness min
0000000
B output (pin 30). Record these values as
R drive min
DRVL* (V p-p).
0000000
30 Here, * is R, G, and B, respectively.
B drive min
0000000
RGBout0* = 20 × log (DRVH*/DRVL*)

No. 5844-21/27
LA76070

Deflection Block - Input Signals and Measurement Conditions

Unless otherwise indicated, set up the following conditions for each of the following measurements.

1. VIF and SIF blocks: No signal


2. C input: No signal
3. SYNC input: Horizontal and vertical composite synchronizing signal (40 IRE and other conditions, such as timing,
must conform to the FCC broadcast standards.)
Caution: The burst and chrominance signals must not be below the pedestal level.

4. Bus control conditions: All conditions set to the initial conditions unless otherwise specified.
5. The delay between the rise of the horizontal output (the pin 23 output) and the rise of the F.B.P IN (the pin 24 input)
must be 9 µs.
6. Unless otherwise specified, pin 25 (the X-ray protection circuit input) must be connected to ground.

Caution:
Perform the following operation if horizontal pulse output has stopped.
1. The bus data T_ENABLE bit must be temporarily set to 0 and then set to 1.
(If the X-ray protection circuit operates, an IC internal latch circuit will be set. To reset that latch circuit, the
T_ENABLE bit must be temporarily set to 0, even if there is no horizontal output signal being output.)

Notes on Video Muting


If horizontal pulse output has stopped, perform the operation described in item 1. above and then set the video mute bit
set to 0.
(This is because the video mute bit is forcibly set to the mute setting when the T_ENABLE bit is set to 0 or when the X-
ray protection circuit operates. This also applies when power is first applied.)

Measurement
Parameter Symbol Input signal Measurement procedure Bus conditions
point

[Deflection Block]
SYNC IN: Gradually lower the level of the synchronizing
horizontal and signal input to Y IN (pin 37) and measure the
Sync separator circuit sensitivity Ssync 37 vertical level of the synchronizing signal at the point
synchronizing synchronization is lost
signal
Connect a frequency counter to the pin 23
output (Hout) and measure the horizontal free-
Horizontal free-running SYNC IN:
∆fH 23 running frequency.
frequency deviation No signal
Calculate the deviation from the following formula.
∆fH = <measured value> – 15.734 kHz
SYNC IN:
Monitor the horizontal synchronizing signal input
horizontal and
to Y IN (pin 37) and the pin 23 output (Hout),
Horizontal pull-in range fH PULL 37 vertical
and measure the pull-in range by modifying the
synchronizing
horizontal synchronizing signal frequency
signal
SYNC IN:
horizontal and
Horizontal pulse output Measure the voltage during the low-level period
saturation voltage
V Hsat 23 vertical
in the pin 23 horizontal output pulse
synchronizing
signal

No. 5844-22/27
LA76070

Measurement
Parameter Symbol Input signal Measurement procedure Bus conditions
point

Measure the delay between the rise of the pin


23 horizontal output pulse and the fall of the Y
IN horizontal synchronizing signal
SYNC IN:
23 horizontal and
Horizontal output pulse phase HPHCEN vertical
synchronizing
37 signal

Measure the delay between the rise of the pin


23 horizontal output pulse and the fall of the Y
IN horizontal synchronizing signal when
HPHASE is set to 0 and when it is set to 7,
and calculate the difference between those
SYNC IN: measurements and HPHCEN
Hphase:
Horizontal position adjustment
23 horizontal and
000
HPHrange vertical
range Hphase:
synchronizing
37 signal
111

Measure the delay between the rise of the pin


23 horizontal output pulse and the fall of the
SYNC IN horizontal synchronizing signal as
HPHASE is set to each value from 0 to 7, and
calculate the amount of the change at each step.
SYNC IN: Find the step size with the largest change. Hphase:
23 horizontal and 000
Horizontal position adjustment
HPHstep vertical to
maximum deviation
synchronizing Hphase:
37 signal 111

SYNC IN:
Connect a DC voltage source to pin 25 and
X-ray protection circuit
23 horizontal and
gradually increase the voltage starting at 0 V.
VXRAY vertical
operating voltage Measure the pin 25 DC voltage at the point that
synchronizing
25 signal
the pin 23 horizontal pulse output stops.

No. 5844-23/27
LA76070

Measurement
Parameter Symbol Input signal Measurement procedure Bus conditions
point

[Vertical screen Size Adjustment]


Monitor the pin 17 vertical ramp output and
measure the voltages at the line 22 and line 262.
Calculate Vsize32 from the following formula.
SYNC IN:
horizontal
Vertical ramp output amplitude and
@32
Vsize32 17 vertical
synchronizing
signal

Monitor the pin 17 vertical ramp output and


measure the voltages at the line 22 and line 262.
Calculate Vsize32 from the following formula.
SYNC IN:
horizontal
Vertical ramp output amplitude and VSIZE:
@0
Vsize0 17 vertical 0000000
synchronizing
signal

Monitor the pin 17 vertical ramp output and


measure the voltages at the line 22 and line 262.
Calculate Vsize32 from the following formula.
SYNC IN:
horizontal
Vertical ramp output amplitude and VSIZE:
@63
Vsize63 17 vertical 1111111
synchronizing
signal

No. 5844-24/27
LA76070

Measurement
Parameter Symbol Input signal Measurement procedure Bus conditions
point

[Vertical screen Position Adjustment]


Monitor the pin 17 vertical ramp output and
measure the voltage at line 142

SYNC IN:
horizontal
and
Vertical ramp DC voltage @32 Vdc32 17 vertical
synchronizing
signal

Monitor the pin 17 vertical ramp output and


measure the voltage at line 142

SYNC IN:
horizontal
and
Vertical ramp DC voltage @0 Vdc0 17 vertical
VDC: 0000000
synchronizing
signal

Monitor the pin 17 vertical ramp output and


measure the voltage at line 142

SYNC IN:
horizontal
and
Vertical ramp DC voltage @63 Vdc63 17 vertical
VDC: 1111111
synchronizing
signal

No. 5844-25/27
LA76070

* For adjusting the crystal oscillator


characteristic

No. 5844-26/27
LA76070

Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer’s
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer’s products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO products (including technical data, services) described or contained
herein are controlled under any of applicable local export control laws and regulations, such products must
not be exported without obtaining the export license from the authorities concerned in accordance with the
above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification”
for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.

This catalog provides information as of July, 1999. Specifications and information herein are subject to
change without notice.

PS No. 5844-27/27

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