Philips Semiconductors liminary specification Dual top-performance bitstream DAC TDA1547 FEATURES ++ Top-grade audio performance = very low harmonic distortion + high signal-to-noise ratio + wide dynamic range of approximately 108 dB (not ‘Acweighted) + High crosstalk immunity « Bitstream concept + high over-sampiing rate up to 1924, + pulse-density modulation = inherently monotonic + no zero-crossing distortion GENERAL DESCRIPTION The TDA1547 is a dedicated one-bit digital-to-analog converter to facilitate a high fidelity sound eproduction of digital audio. The ‘TDA1847 is extremely suitable for Use in high quality audio systems such as Compact Disc and DAT players, or in digital amplifiers and digital signal processing systems. The TDA1547 is used in ‘combination with the SAA7350 bitstream circuit, which includes the third-order noise shaper. The excellent performance of the SAA7950 and TDA1547 bitstream conversion system is obtained by separating the noise shaping circuit and the one-bit conversion circuit ‘over two IC's, thereby reducing the crosstalk between the digital and analog parts. The TDA1547 one-bit ‘converter is processed in BIMOS. in the digital logic and drivers bipolar transistors are used to optimize speed and to reduce digital noise generation. In the analog part the bipolar transistors are used to obtain high performance of the operational amplifiers. Special layout precautions have been taken to achieve a high crosstalk immunity. ‘The layout of the TDA1547 has fully separated left and right channels September 1991 mun ial Mn ORDERING INFORMATION BITSTREAM CONVERSION PACKAGE PIN POSITION | MATERIAL EXTENDED TYPE NUMBER PINS CODE TDAI547 32 ‘SDIL plastic SOT232A no Vsue Yoon Ysso NR Ne ouKR ouKe Yooor Yooot Yesor Yesou Vrot Meat AGNDDACR GND DAG ~pacr ~pACL +0AcR +oact AGNOR ENOL +ourr +ourt -oure -ourt Vss0 Yooa Fig.t diagram. and supply voltage lines between the digital and analog sections. 1408 @™ 7110826 0081529 532Philips Semiconductors preliminary specification Dual top-performance bitstream DAC TDA1547 PINNING SYMBOL PIN DESCRIPTION DGND 1 OV digital supply Vooo 2 5 V digital supply for both channels INR 3 Serial one-bit data input for the right channel ne. 4 pin not connected; should preferably be connected to digital ground CiKR 5 lock input for the right channel Vooo 6 5 V digital supply for the right channel; this voltage determines the internal logic HIGH level in the right channel Veco n 7 3.5 V digital supply for the right channel; this voltage determines the intemal logic LOW level in the right channel Vai 8 4 V reference voltage for the right channel switched capacitor DAC "AGND DAC R 8 ‘OV reference voltage for the right channel switched capacitor DAG; this pin should be connected to analog ground =DACR 10 ‘output from the right negative switched capacitor DAG; feedback connection for the right negative operational amplifier +DACR 4 ‘output from the right positive switched capacitor DAC; feedback connection for the right positive operational amplifier ‘AGND R 12 ‘OV reference voltage for both right channel operational amplifiers ne 8 pin not connected: should preferably be connected to analog ground RG 14 + output of the switched capacitor operational ampifier -OUTR 15 output of the switched capacitor operational amplifier Vesa 16 BV analog supply Vou 7 5V analog supply OUTL 18 = output of the switched capacitor operational amplifier OUTL 19 “ouput of the switched capacitor operational amplifier ne 20 pin not connected; should preferably be connected to analog ground AGNDL, A OV reference voltage for both left channel operational ampitiers 4DACL 2 ‘output from the left positive switched capacitor DAC; feedback connection for the left positive operational amplifier ~DACL ‘output from the left negative switched capacitor DAG; feedback connection for the left negative operational amplifier ‘AGND DAC L 24 (OV reference voltage for the left channel switched capacitor DAG; this pin should be connected to analog ground Vert 3 —4 V reference voltage for the left channel switched capacitor DAC. Vsso e 26 8.5 V digital supply for the left channel; this voltage determines the internal logic LOW level in the left channel Vooo i 27 '5V digital supply for the left channel, this voltage determines the intemal logic HIGH level in the feft channel September 1991 407 ‘ MB 7110826 0081530 254 aPhilips Semiconductors preliminary specification . it m Dual top-performance bitstrea: TDA1547 DAC SYMBOL PIN DESCRIPTION CLK L 28 clock input for the left channel ne. 29 pin not connected; should preferably be connected to digital ground INL 30 serial one-bit data input for the left channel Vsso a =5 V digital supply for both channels Vous 32 5 V substrate voltage QUICK REFERENCE DATA ‘SYMBOL PARAMETER CONDITION ‘MIN ‘TYP, MAX UNIT ‘Supply voltages Vooo t. positive digital supply voltage 45 5.0 55 v for one channel; pins 27 and 6 Vooo digital supply voltage for both 45 5.0 55 v channels; pin 2 Vantin negative digital supply 4.0 35 3.0 Vv voltage for one channel; pins 26 and 7 Veso negative digital supply 55 —5.0 45 Vv voltage for both channels; pi 3t Von positive analog supply 45 6.0 6 Vv voltage; pin 17 Vesa negative analog supply 6.0 5.0 45 Vv voltage ; pin 16 ‘Supply current ooo ua positive digital supply current - 04 ~ mA) for one channel; pins 27 and 6 ooo. digital supply current for both > 29.0 7 mA channels; pin 2 lave negative digital supply > 0.4 > mA ‘current for one channel; pins 26 and 7 Isso negative supply current for 28.0 . mm! both channels; pin 31 Toon positive analog supply > BOO mA current; pin 17, Tosa negative analog supply E 51.0 > mA curtent; pin 16 Pr total power dissipation E ‘800 E mW Vous) | output voltage (RMS value) [fax.=8.46MHz; [0.85 10 is «((V notes 1 and 2 September 1991 408 mH 7110826 0081531 190Philips Semiconductors preliminary specification Dual top-performance bitstream TDA1547 DAC SYMBOL PARAMETER ‘CONDITION MIN TYP MAX UNIT. ‘Supply current (THD + NYS [THD + Noise; 0.8 kHz; : =104 96 B notes 2 and 3 : 0.0009 [oone |% (THD + NYS [THD + Noise; 0.8 120 Hz to 20 = =i04 - eB kHz; notes 2 and 4 0.0008 |= % (THD + NYS t= TkHz; = 88 |-84 8 notes 2 and 3 (THD + NYS | THD + Noise; -60 48 f= 1 kHz; - 48 44 8 notes 2 and 3 SIN signal-fo-noise ratio, pattern 010 109 my . ae notes 2 and 5 ‘SIN signal-to-noise ratio; pattern 0101..; - 113 0B "A*-weighting notes 2 and § eux ‘maximum clock frequency E : 10 MHz a channel separation tS 1 kHz [107 115: - B Ts ‘operating ambient 20 : 70 a temperature Notes to the quick reference data 4+. Output level tracks linearly with both the clock frequency and the reference voltage (Vie. OF Visa ith extemal components as shown in Fig 5. 2. Device measi sured in differential mode 3. Measured with a one-bit data signal generated by the SAA7350 from an 8 f, (352.8 kHz), 20-bit, 1 kHz digital sinewave. Measured over a 20 Hz to 20 KHz bandwidth. 4, Measured with a one-bit data signal generated by the SAA7350 from an 8 f, (352.8 kHz), 20-bit, 20 Hz to 20 kHz digital sinewave, Measured over a 20 Hz to 20 kHz bandwidth. 5. The specified signal-to-noise ratio includes noise introduced by the application components as shown in Fig.5. FUNCTIONAL DESCRIPTION = Switched capacitor network, this Both channels are completely separated to reach the desired high crosstalk suppression level Each channel consists of the following functional parts: = One-bit input, incoming data to the system clock. + Switch driver which latches the forms the actual DAC function, it supplies charge packets to the low-pass filer, under control of the incoming one-bit code. ‘THERMAL RESISTANCE = Two high performance ‘operational ampiiiers, that perform the charge packet to voltage conversion and deliver a ditferer ‘output signal. The first pole of the low-pass filter is built around them. ‘SYMBOL circu, which PARAMETER MAX. | UNIT generates the non-overlapping Bin sa clock: and dat {rom junction to ambient ta-signals that control the DAC switched capacitor networks September 1991 1 1409 Mm 7110826 0081532 Oc?preliminary specification TDA1547 Dual top-performance bitstream Philips Semiconductors DAC ‘wesBerp 401g Z614 135 ony nino ui, 000, (as-) siaertens ome (aod ‘OvC saebou tav~) (ase) Qu dro | wovaonoy | vase, andine enwebou ow OVO enissod tao) se- ot | st ve eb | i | oF 6| a] Z| a “TSNNWHO- =] QuOMLaN ‘SuaAI nani how J | *] wostovsvo Fey Botta s83N0 a t——{ HHOMISN: sano J = sung ane i wauaavo | WOLMS ie 3NO al af wl of J eel ve] se] oe] az] we, el «lf se] vdeo emtes| —3u wd no ase wounds ovoensset | rovaanoy | Sassy (499 doomed (no) aro wr aso ou 00, aonoy— owameou Shy 1090, M@™ 7110826 0081533 Th3 1410 September 1991Philips Semiconductors preliminary specification Dual top-performance bitstream DAC TDA1547 LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134) ‘SYMBOL PARAMETER conomions [MIN MAX. UNIT Ve negative substrate voltage; pin 32 [note 4 -70 - Vv Voor | positive digital supply voltage: - 55 Vv pins 27 and 6 Veoo Positive digital supply voltage; - 55 Vv pin 2 Vesoun | Negative digital supply voltage; 40 - v pins 26 and 7 Vaso negative digital supply voltage; -55 - Vv pin 31 Von positive analog supply voltage; - 60 v pin 17 Vaca ‘negative analog supply voltage; 60 - Vv pin 16 Vooo i n- | Supply voltage difference between - 80 Vv Vesoun | pins 27, 6 and pins 26, 7 Pex total power dissipation T= 70°C |- 1300) mW Vout ht input reference voltage; pins 25 60 v ands Vex. a | input voltage clock: pins 28 and 5 05 Vooot0.5 Vv Viv input voltage channel, pin 30 05 Voop+0.5 Vv Vin input voltage channel; pin 3 05 Voon#0-5 v Tas ‘operating ambient temperature 20) 70 °C Tag storage temperature =40 150 *0, Ti ‘maximum erystal temperature : 150 °C Ves electrostatic handling note 2 zi 2000 Vv Notes to the limiting values 1. The substrate voltage must be lower than or equal to the lowest supply voltage. 2, Equivalent to discharging a 100 pF capacitor through a 1.5 k® series resistor. September 1991 Vu M@™@ 7110826 0081534 STT mmPhilips Semiconductors preliminary specification Dual top-performance bitstream DAC TDA1547 CHARACTERISTICS Vooo: Vooo u n+ Voon = #5 Vi Vssor Vesa = 8 Vs Veso . n= —3.5 Vi Vet n=—4 Vi Toe = 25°C: fox = 8.46 MHZ; unless otherwise specified ‘SYMBOL PARAMETER conomions | win | Typ | MAX | UNIT SUPPLY Vax negative substrate voltage; rote 1 —70_|- 45 ‘Vv pin 32 Voor positive digital supply voltage for one 4s [50 (55 |v channel; pins 27 and 6 Vooo digital supply voltage for both 45 (50 (55 |V channels; pin 2 Vesou k negative digital supply voltage for one 40 [35 [-30 |v channel; pins 26 and 7 Veso negative digital supply voltage for 35 [50 [45 |v both channels; pin 31 Vooa positive analog supply voltage; pin 17 45 [50 [60 |v Vesa regative analog supply voltage; pin 16 60 [30 [45 [Vv Voooua- | Supply voltage difference between - a0 Vv Vssou pins 27, 6 and pins 26, 7 Veco. n= Veo | Supply voltage difference between 3 / - Vv pins 26, 7 and pin 31 Too0. positive digital supply current for one ~ ot |- mA channel pins 27 and 6 Too ‘digital supply current for both 290 [46 [mA channels; pin 2 lesou n Tregative digital supply current for one or [> ma channel; pins 26 and 7 Tse negative supply current for both —a5[-28.0 |- mA channels; pin 31 Hlooe positive analog supply current; pin 17 B10 [63 [mA Tosa negative analog supply current; pin 16 63.0 _[-510_|- mA Peso power supply rejection ratio Vou a notes [50 |- : fr) Pssne power supply rejection ratio Vooo: note 6 50 = 3B Poses power supply rejection ratio Vesorninotes [60 [- 5 3B Presna power supply rejection ratio Vso: note 6 50 | - B Pesrs power supply rejection ratio Vooui note 6 Co 5 3B Pssre power supply rejection ratio, Vscai note 6 0 |e : eB Pe total power dissipation 5 300 |= mW Clock - Input Vi input voltage LOW - 3 os fv Vou input voltage HIGH 45 |. 5 Vv he [input current LOW 7 =o 10 [nA September 1991 42 ME 7110826 0081535 636 mmPhilips Semiconductors preliminary specification Dual top-performance bitstream DAC TDA1547 SYMBOL PARAMETER conomions | min | Typ | MAX | UNIT Clock - Input Ie input current HIGH BV =0_‘[- 0 [wa c lock input capacitance : 5 pF foxx Glock input frequency - - 10 [MHz Channel leftright inputs Ve input voltage LOW = - os |v Vos input voltage HIGH = 45 | Vv he input current LOW a0 [- 10 [WA a input current HIGH =o | 10 _‘[wA C ‘channel input capacitance; - 5 - PF pins 3, 30 Vo reference input voltage; note 2 - 440.4 |- Vv pins 8, 25 Audio outputs Veursmoy ‘output voltage (RMS value); pins [notes 2 and S 08s [10 [its Vv 44, 19; pins 15, 18 (THD + NYS | THD+ Noise; 0d T= 1 KHz; : =101_[-96—‘([a8 otes 3 and 4 = (0.0008 [0.0016 |% (THD + NYS | THD + Noise; 008 20 Hz - 20 KHz; : 01 8 notes 3 and 5 5 0.0008 | % (THD + NYS [THD + Noise; -2008 t= 1 kHz; - a notes 3 and 4 (THD + NYS [THD + Noise; -60 03 t= 1 KHz, ~ 48 [aaa notes 3 and 4 SIN ‘signalto-noise ratio pattem 0101; oo [ats 8 notes 3 and 7 ‘SIN ‘signalto-noise ratio; pattern 0101; - 13 | 8 notes 3 and 7 @ ‘channel separation t= 1 kHz Ota (1S am = eB Timing t Tise time clock input C= 20 pF = 5 10 [ns 4 fall time clock input C,= 20 pF : 5 10 [ns tee lock input LOW time 4 [- 5 ns Tox lock input HIGH time 6 5 ns & ‘channel input rise time C= 20 pF zi 10 (15 [ns ‘ ‘channel input fall ime C= 20 pF - oO [15 (ns to. ‘channel input hold time 2 = ns tey ‘channel input set-up time 0 : As September 1991 1413, M@™ =71108eb 0081536 772 =Philips Semiconductors preliminary specification Dual top-performance bitstream DAC TDA1547 Notes to the characteristics 1. The substrate voltage must be lower than or to equal than the lowest supply voltage. 2. Output level tracks linearly with both the clock frequency and the reference voltage (Via. OF Vow a): 3. Device measured in differential mode with extemal components as shown in Fig 5. 4, Measured with a one-bit data signal generated by the SAA7350 from an 8 f, (352.8 kHz), 20-bit, 1 kHz digital sinewave, Measured over a 20 Hz to 20 kHz bandwidth. 5. Measured with a one-bit data signal generated by the SAA7350 from an 8 f, (352.8 kHz), 20-bit, 20 Hz to 20 kHz digital sinewave. Measured over a 20 Hz to 20 kHz bandwidth. 6. Power supply rejection ratio measured With frag = 1 KHZ ANd Voy, = 100 MV. 7. The specified signal-to-noise ratio includes noise introduced by the application components as shown in Fig.5. TIMING cK oar wut ara arab (CHANNEL Mu Fig.3. Timing waveform. September 1991 ae mB 7210826 0081537 bO9 aPhilips Semiconductors preliminary specification Dual top-performance bitstream DAC TDA1547 APPLICATION INFORMATION syst lock syst cok rico me ieee ' > Lona orca LTE saavaso oatse7 hese 20, + to da. ign sb20 Wiz fpebarwne nati cCHfp L- Renal 8 x upsampling digital (24 x upsamping by. +1-bit hagh-pertormance: Bor Atop» 1108 Zeoorer nod OAC cancer 2d onder nag Sorer nose shapng. Dossier fos 34H ‘ot ond qvantanton Bineri response Fig.4 CD-range bitstream reconstruction system ( 192 1, over-sampling). ‘September 1991 ad MH 7110826 0081538 SuS MmPhilips Semiconductors Dual top-performance bitstream DAC preliminary specification TDA1547 89 neg Sy — $0 Evy fi sowerrcen \ SE se | ae oe ~ on xsvs? eral S| | Er =a pets | cr a a Da ont oe) | eat eel e|' 2 i 1 a0 3 —$——] | es Lon 2, ligne ts seo ||| ene ey | fife | ete cede | YL] | aL — ce even 2 | a : . ; <1 eo ES | 5 eo < Gaered ome) | eee] = me t). | TERRELL t 10. | a CoS | ak | 5 | \ uous | | on | | | ale [a ev ne ¢ 2 ‘RMT CHANNEL Fig.5 Application diagram. Z (C= Wonk ep apa September 1991 416 gg 7 420826 0081539 48) apreliminary specification Philips Semiconductors Dual top-performance bitstream DAC TDA1547 “HY $6 = 4) uoneondde *} 261 40) eMW-IS0q 9613 vsz0on see utve-op I wok oxee vou anon ova ier aunove ‘let dino ‘pre M@™ 7110826 0081540 173 1417 September 1991Philips Semiconductors preliminary specification Dual top-performance bitstream TDA1547 DAC 80 W TT oot 7 t cmo.09/8 | 0/8 on | Hi HI | | | 1 “wf } Ic con PN Ti ‘sa ~ 120 ___] i i 0.0001 ‘ora woe 7 1968 vent ‘a Fig.7 (THD + NYS as a function of signal frequency. Note ; Graph constructed from average measuremonts values of @ ‘small amount of engineering samples. No guarantee for typical values is implied, -10 7 wenn avosmi8 re) -% -70f “0 “2 aa a re er) Note : Graph constructed from _ average measurement values of a smail amount of engineering Fig.8 (THD + NYS as a function of test signal level. ‘samples. No guarantee for typical values is implied. September 1991 1418 MM 7110826 0081541 03T aPhilips Semiconductors Preliminary specification Dual top-performance bitstream TDA1547 DAC 7 7 | — | L4sel 2 M™ | ML | Hr ov Ui L | ra RL 125 + o 40 Hz 100 Hz The AORHZ 100 kHz frost signal Fig.9 Inter-channel crosstalk as a function of signal frequency. Note : Graph constructed from average measurements values of a small amount of engineering samples. No guarantee for typical values is implied. September 1991 1419 M™ 7110826 0081542 Teh