C H A P T E R 11 Fundamentals of the MetaMxlde-Semiconductor Fleld-EffectTrans~stor

1
that the semiconductor substrate is not inverted directly under the oxide with zerogate
voltage. Apositive gate voltage induces the electroil inversion layer, which then "con-
!
nects" the n-type source and the n-type drain regions. The source terminal is the source 1
of carriers that flow through the channel to the drain terminal. For this n-channel de-:
vice, electrons flow from the source to the drain so the conventional current will cnter;
the drain and leave the source. The conventional circuit symbol for this n-channel
enhancement mode device is also shown in this figure.
Figure 11.36 shows an n-channel depletion mode MOSFET. An n-channel re-
gion exists under the oxide with zero volts applied to the gate. However, we have;
shown that the threshold voltage of an MOS device with a p-type substrate may be:

Snurcc (S) Gate ( C ) Drain ID)

D
? ? ?

-
Subsliatr ut
body (B)

Figure 11.35 1 Cross section and circuit symbol for an

n-channel enhancement-mode MOSFET.

Source (S) Gate IG) Drain (Dl

&
Bod) IB)

Figure 11.36 1 Cross sectiun and circuit symbol for an

n-channel depletion-mode MOSFET.
 i 1.3 The Basic M O S F n Operatton

negative; this means that an electron inversion layer already exists with zero gate
voltage applied. Such a device is also considered to be a depletion mode device. The
n-channel shown in this figure can be an electron inversion layer or an intentionally
doped n-region. The conventional circuit symbol for the n-channel depletion mode
MOSFET is also shown in the tigure.
Figures 11.37a and 11.37h show a p-channel enhancement mode MOSFET and a
p-channel depletion mode MOSFET. In the p-channel enhancement mode device, a
negative gate voltage must he applied to create an inversion layer of holes that will
"connect" thep-type source and drain regions. Holes flow from the source to the drain,
so the conventional current will enter the source and leave the drain. A p-channel
region exists in the depletion mode device even with zero gate voltage. The conven-
tional circuit symbols are shown in the figure.

Source (SJ Gate (GI Drain (Dl

Q Q

6
Body (9)
(a)

Source (S) Gate ( G ) Drain (D)

Q ? Q

Figure 11.37 1 Cross section and circuit symbol for (a) a p-chanrlel en-
hancement mode MOSFET and (b) a p-channel depletio~lrnode MOSFET
 C H A P T E R 11 Fundamentals of the Metal-Oxide-Semiconductor Feld-Effect Transistor

11.3.2 Current-Voltage Relationship-Concepts

Figure 1 I .38a shows an n-channel enhancement mode MOSFET with a gate-
source voltage that is less than the threshold voltage and with only a very srn
drain-to-source voltage. The source and substrate, or body, terminals are held
ground potential. With this bias configuration, there is no electron inversion lay
the drain-to-substrate pn junction is reverse biased, and the drain current is zero (di
regarding pn junction leakage currents).
Figure 11.38b shows the same MOSFET with an applied gate voltage such
Vr;s > VT. An electron inversion layer has been created so that, when a small dr
voltage is applied, the electrons in the inversion layer will Row from the source to
positive drain terminal. The conventional current enters the drain terminal and leav
the source terminal. In this ideal case, there is no current through the oxide to the ga
terminal.
For small V r ~ svalues, the channel region has the characteristics of a resistor,
we can write

where g d is defined as the channel conductance in the limit as VfIs -t 0. The chann
conductance is given by

where w,, is the mobility of the electrons in the inversion layer and / Q:, 1 is the magI
nitude of the inversion layer charge per unit area. The inversion layer charge is a
function of the gate voltage; thus, the basic MOS transistor action is the modulation
of the channel conductance by the gate voltage. The channel conductance. in t u .
determines the drain current. We will initially assume that the mobility is aconstanc;
we will discuss mobility effects and variations in the next chapter.

Figure 11.38 1 The n-channel enhancement mode MOSFET (a) with an applied gate voltage Vc5 < V T ,and (b) with an
applied gate voltage VG5 > V,.
 i i .3 The Baslc MOSFET Operation

The i n versus Vlls characteristics, for small values of VoS, are shown in Fig-
ure 11.39. When VGs c VT, the drain current is zero. As VGSbecomes larger than
VT, channel inversion charge density increases, which increases the channel con-
ductance. A larger value of g, produces a largcr initial slope of the ID versus VDS
characteristic as shown in the figure.
Figure 11.40a shows the basic MOS structure for the case when Vcs > V, and
the applied VnS voltage is small. The thickness of the inversion channel layer in the
figure qualitatively indicates the relative charge density, which is essentially constant
along the entire channel length for this case. The corresponding In versus V11.i curve
is shown in the figure.
Figure 1 1.40b shows the situation when the Vos value increases. As the drain volt-
age increases, the voltage drop across the oxide near the drain terminal decreases,
which means that the induced inversion charge density near the drain also decreases.
The incremental conductance of the channel at the drain decreases, which then means
that the slope of the IDversus VDs curve will decrease. This effect is shown in the
In versus VDScurve in the figure.
When VDs increases to the point where the potential drop across the oxide at the
drain terminal is equal to VT, the induced inversion charge density is zero at the drain
terminal. This effect is schematically shown in Figure 11 40c. At this point, the in-
cremental conductance at the drain is zero, which means that the slope of the I,, ver-
sus Vns curve is zero. We can write
VGS- V ~ ~ ( s a=t )VT (1 1.39a)
or

where Vns(sat) is the drain-to-source voltage producing zero inversion charge den-
sity at the drain terminal.

Figure 11.39 1 I , versus Vns charac

teristics for small values of V D Sat
three VGs voltages.
 Depletlun
reglo"
v...

OxlJr

Channel

Figure 11.40 1 Cmss section and l o versus VZ,Scurve when V c S c V , fo,r(a) asmall V,,
value, (b) a larger VDS value, (c) a value of Vns = V[,/(sat), and (d) a value of VDs > VDs(sal).
 1 1.3 The Bas~cMOSFFT Operation

When VDs becomes larger than the Vlls(sat) value, the point in the channel at
which the inversion charge is just zero moves toward the source lerminal. In this
case, electrons enter the channel at the source, travel through the channel toward the
drain, and then, at the point where the charge goes to zero, the electrons are injected
into the space charge region where they are swept hy the E-field to the drain contact.
If we assume that the change in channel length A L is small compared to the original
length L , then the drain current will be a constant for VDS > V~,(sat).The region of
the ID versus V D characteristic
~ is referred to as the saturrrtion region. Figure 11.40d
shows this region of operation.
When VGs changes, the I,, versus Vr,s curve will change. We saw that. if VGs
increases, the initial slope of ID versus V,I~ increases. We can also note from
Equation (1 1.39b) that the value of Vm(sat) is a function of VGS.We can generate
the family of curves for this n-channel enhancement mode MOSFET as shown in
Figure 11.41.
Figure 11.42 shows an n-channel depletion mode MOSFET. If the n-channel
region is actually an induced electron inversion layer created by the metal-
semiconductor work function difference and fixed charge in the oxide, the current-
voltage characteristics are exactly the same as we have discussed, except that VT
is a negative quantity. We may also consider the case when the n-channel region is
actually an n-type semiconductor region. In this type of device, a negative gate
voltage will induce a space charge region under the oxide, reducing the thickness
of the n-channel region. The reduced thickness decreases the channel conductance,
which reduces the drain current. A positive gate voltage will create an electron ac-
cumulation layer, which increases the drain current. One basic requirement for this
device is that the channel thickness I, must be less than the maximum induced
space charge width in order to be able to turn the device off. The general In ver-
sus i.'~s family of curves for an n-channel depletion mode MOSFET is shown in
Figure 11.43.

B
Figure 11.41 I Family of I,, versus V,,.?
curves fbr an n-channel enhancrment- Figure 11.42 1 Cross section of an
mods MOSFET. n-channel depletion-mode MOSFET,
C H A P T E R 11 Fundamentals of the Metal-OxidhSern~conductorFleld~EffectTransistor

Figure 11.43 1 Family 01I,, versus V D Y

curves for an n-channel depletion-mode
MOSFET.

In the next section we will derive the ideal current-voltage relation for then-
channel MOSFET. In the nonsaturation region, we will obtain

WFr>
Cur
I D = -[ 2 ( ~ t i-s VT)V,IS-
2L
v&]
and, in the saturation region, we will have

I D = --(VGS- V T ) (11.41)

The operation of a p-channel device is the same as that of the n-channel device.
except the charge carrier is the hole and the conventional current direction and volt-
age polarities are reversed.

"11.3.3 Current-Voltage Relationship-Mathematical Derivation

In the previous section, we qualitatively discussed the current-voltage characteris.
tics. In this section, we will derive the ~nathematicalrelation between the drain cur-
rent, the gate-to-source voltage, and the drain-to-source voltage. Figure 11.44 shows
the geometry of the device that we will use in this derivation.
In this analysis, we will make the following assumptions:
1. The current in the channel is due to drift rather than diffusion.
2. There is no current through the gate oxide.
3. A gradual channel approximation is used in which aE?/ay >> aE.,/ax.
This approximation means that Ex is essentially a constant.
4. Any fixed oxide charge is an equivalent charge density at the oxide-
semiconductor interface.
5. The carrier mobility in the channel is constant.