MODEL NO.: V460H1 - L04: TFT LCD Approval Specification

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Issue Date: Dec, 25 2007

Model No.: V460H1-L04
Approval
TFT LCD Approval Specification
MODEL NO.: V460H1 – L04
Customer:
Approved by:
Note:
TV Head Division
Approved By
LY Chen
QRA Dept. Product Development Div.

Reviewed By
Tomy Chen WT Lin
LCD TV Marketing and Product Management Div.

- Prepared By
Denise Shieh Vicky Ke
1
The information described in this technical specification is tentative and it is possible to be changed without prior
notice. Please contact CMO ’s representative while your product design is based on this specification. Version 1.0
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
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Approval
CONTENTS -
REVISION HISTORY ------------------------------------------------------- 3
1. GENERAL DESCRIPTION ------------------------------------------------------- 4

1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS
2. ABSOLUTE MAXIMUM RATINGS ------------------------------------------------------- 5

2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 ELECTRICAL ABSOLUTE RATINGS
2.2.1 TFT LCD MODULE
2.2.2 BACKLIGHT INVERTER UNIT
3. ELECTRICAL CHARACTERISTICS --------------------------------------------------------7

3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
3.2.1 CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS
3.2.2 BALANCE BOARD CHARACTERISTICS
4. BLOCK DIAGRAM -------------------------------------------------------12

4.1 TFT LCD MODULE
5. V460H1-L04 LCD INPUT TERMINAL PIN ASSIGNMENT --------------------------------------------------------13

5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 BALANCE BOARD UNIT
5.4 BLOCK DIAGRAM OF INTERFACE
5.5 LVDS INTERFACE
5.6 COLOR DATA INPUT ASSIGNMENT
6. INTERFACE TIMING -------------------------------------------------------21

6.1 INPUT SIGNAL TIMING SPECIFICATIONS
6.2 POWER ON/OFF SEQUENCE
7. OPTICAL CHARACTERISTICS -------------------------------------------------------24

7.1 TEST CONDITIONS
7.2 OPTICAL SPECIFICATIONS
8. PRECAUTIONS -------------------------------------------------------28
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
8.2 SAFETY PRECAUTIONS
9. DEFINITION OF LABEL ------------------------------------------------------29
10. PACKAGING ------------------------------------------------------30
11. MECHANICAL CHARACTERISTICS -----------------------------------------------------32
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REVISION HISTORY
Page
Version Date Section Description
(New)
Ver.1.0 Dec,25 ’07 All All Preliminary Specification was first issued.
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1. GENERAL DESCRIPTION
1.1 OVERVIEW
V460H1-L04 is a 46” TFT Liquid Crystal Display module with 24-CCFL Backlight unit and 2ch-LVDS
interface. This module supports 1920 x 1080 HDTV format and can display true 16.7M colors (8-bit/color).
The inverter module for backlight is built-in.
1.2 FEATURES
- High brightness (530nits)
- High contrast ratio (1800:1)
- Fast response time (Gray to Gray average 6.5 ms)
- High color saturation (72% NTSC)
- Full HDTV (1920 x 1080 pixels) resolution, true HDTV format
- DE (Data Enable) only mode
- LVDS (Low Voltage Differential Signaling) interface
- Optimized response time for 50/60 Hz frame rate
- Ultra wide viewing angle: Super MVA technology
1.3 APPLICATION
- Standard Living Room TVs.
- Public Display Application.
- Home Theater Application.
- MFM Application.
1.4 GENERAL SPECIFICATI0NS
Item Specification Unit Note
Active Area 1018.08(H) x 572.67(V) (46” diagonal) mm
(1)
Bezel Opening Area 1024.4(H) x 578.6(V) mm
Driver Element a-si TFT active matrix - -
Pixel Number 1920x R.G.B. x 1080 pixel -
Pixel Pitch(Sub Pixel) 0.53025(H) x 0.17675(V) mm -
Pixel Arrangement RGB vertical stripe - -
Display Colors 16.7M color -
Display Operation Mode Transmissive mode / Normally black - -
Anti-Glare coating (Haze 17%)
Surface Treatment - (2)
Hardness (3H)
Note (1) Please refer to the attached drawings in chapter 9 for more information about the front and
back outlines.
Note (2) The spec of the surface treatment is temporarily for this phase. CMO reserves the rights to
change this feature.
1.5 MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal (H) - 1083 - mm
Module Size Vertical (V) - 627 - mm (1), (2)
Depth (D) - 50.6 - mm
Weight - 15000 - g -
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Note (2) Module Depth does not include connectors.
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2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Value
Item Symbol Unit Note
Min. Max.
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 50 ºC (1), (2)
X, Y axis - 50 G (3), (5)
Shock (Non-Operating) SNOP
Z axis - 35 G (3), (5)
Vibration (Non-Operating) VNOP - 1.0 G (4), (5)
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in your product design to prevent the surface temperature
of display area from being over 65 ºC. The range of operating temperature may degrade in case of
improper thermal management in your product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, and ± Z.
Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that
the module would not be twisted or bent by the fixture. The module would not be twisted or bent by the
fixture.
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2.2 ELECTRICAL ABSOLUTE RATINGS

2.2.1 TFT LCD MODULE
Value
Min. Max.
Power Supply Voltage VCC -0.3 13.5 V
(1)
Logic Input Voltage VIN -0.3 3.6 V
2.2.2 BACKLIGHT INVERTER UNIT

Value
Min. Max.
Lamp Voltage VW Ё 3000 VRMS
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.
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3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE (Ta = 25 ± 2 ºC)
Value
Parameter Symbol Unit Note
Min. Typ. Max.
Power Supply Voltage VCC 10.8 12 13.2 V (1)
Power Supply Ripple Voltage VRP - - 350 mV
Rush Current IRUSH - - 5.0 A (2)
White - 1.6 2.3 A
Power Supply Current Black ICC - 0.7 - A (3)
Vertical Stripe - 1.2 - A
Differential Input High
VLVTH - - +100 mV
Threshold Voltage
LVDS
Differential Input Low
Interface VLVTL -100 - - mV
Threshold Voltage
Common Input Voltage VLVC 1.125 1.25 1.375 V
Terminating Resistor RT - 100 - ohm
CMOS Input High Threshold Voltage VIH 2.7 - 3.3 V
interface Input Low Threshold Voltage VIL 0 - 0.7 V
Note (1) The module should be always operated within the above ranges.
Note (2) Measurement condition:
Vcc
Q1 2SK1475
Vcc
C3
FUSE (LCD Module Input)
R1 1uF
47K
(High to Low)
(Control Signal)
Q2
R2
SW 2SK1470
1K
+24V
47K C2
VR1
C1
0.01uF
1uF
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Vcc rising time is 470us

Vcc
0.9Vcc
0.1Vcc
GND
470us
Note (3) The specified power supply current is under the conditions at Vcc = 12V, Ta = 25 ± 2 ºC, fv = 60 Hz,
whereas a power dissipation check pattern below is displayed.
a. White Pattern b. Black Pattern
Active Area Active Area

c. Vertical Stripe Pattern
R G B R G B
B R G B R G B R
B R G B R G B R
R G B R G B
Active Area
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3.2 BACKLIGHT UNIT

3.2.1 CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS (Ta = 25 ± 2 ºC)
Value
Min. Typ. Max.
Lamp Input Voltage VL - (1670) - VRMS -
Lamp Current IL 5.8 6.0 6.2 mARMS (1)
- - (2510) VRMS (2), Ta = 0 ºC
Lamp Turn On Voltage VS
- - (2360) VRMS (2), Ta = 25 ºC
Operating Frequency FL 40 - 80 KHz (3)
Lamp Life Time LBL 50,000 - - Hrs (4)
Note (1) Lamp current is measured by utilizing AC current probe and its value is average by measuring
master and slave board.:
Note (2) The lamp starting voltage VS should be applied to the lamp for more than 1 second after startup.
Otherwise the lamp may not be turned on.
Note (3) The lamp frequency may produce interference with horizontal synchronous frequency of the
display input signals, and it may result in line flow on the display. In order to avoid interference, the
lamp frequency should be detached from the horizontal synchronous frequency and its harmonics
as far as possible.
Note (4) The life time of a lamp is defined as when the brightness is larger than 50% of its original value and
the effective discharge length is longer than 80% of its original length (Effective discharge length is
defined as an area that has equal to or more than 70% brightness compared to the brightness at
the center point of lamp.) as the time in which it continues to operate under the condition at Ta = 25
̈́2к and IL = 6.3 mArms.
3.2.2 BALANCE BOARD CHARACTERISTICS (Ta = 25 ± 2 ºC)

Value
Min. Typ. Max.
Input High Voltage VHV - 1590 - V (6)
Input Current IBL(HV) 300 mArms No Dimming
Oscillating Frequency FW 45 48 51 kHz
Individual Lamp Current IL 5.7 6.0 6.3 mA H.V (5)
Lamp High (LD) LD 5 V Normal Operation
Detection Low (LD) LD 1.5 V Lamp Connector Open
Dimming frequency FB 135 150 165 Hz
Minimum Duty Ratio DMIN - 15 - %
Note (5) Lamp current is measured master board by utilizing high frequency current meters as shown below:
Note (6) Input voltage Hv based on spec. +-7% tolerance.
Note (7) Asymmetric ratio must be from 90% to 110% (0.9<Ip/ Irms@T/2XЅ2 <1.1)
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T
Ip
I-p
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HV (White +(-) ) HV (Pink -(+) )

A 1 1 A
HV (Pink +(-) ) HV (White -(+) ) 2
A 2 A
A 1 1 A
HV (Pink +(-) ) HV (White -(+) ) 2
A 2 A
A 1 1 A
HV (Pink +(-) ) HV (White -(+) ) 2
A 2 A
A 1 1 A
HV (Pink +(-) ) HV (White -(+) ) 2
A 2 A
A 1 1 A
HV (Pink +(-) ) HV (White -(+) ) 2
A 2 A
A 1 1 A
HV (Pink +(-) ) HV (White -(+) ) 2
Balance A 2 A
Board LCD Module Balance
HV (White +(-) ) HV (Pink -(+) ) Board
(Master) A 1 1 A
HV (Pink +(-) ) HV (White -(+) ) 2 (Slave)
A 2 A
A 1 1 A
HV (Pink +(-) ) HV (White -(+) ) 2
A 2 A
A 1 1 A
HV (Pink +(-) ) HV (White -(+) ) 2
A 2 A
A 1 1 A
HV (Pink +(-) ) HV (White -(+) ) 2
A 2 A
A 1 1 A
HV (Pink +(-) ) HV (White -(+) ) 2
A 2 A
A 1 1 A
HV (Pink +(-) ) HV (White -(+) ) 2
A 2 A
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4. BLOCK DIAGRAM OF INTERFACE

4.1 TFT LCD MODULE
ERX0(+/-)
ERX1(+/-) FRAME
ERX2(+/-)
BUFFER
SCAN DRIVER
ERX3(+/-)
ECLK(+/-)
ORX0(+/-) TFT LCD PANEL

ORX1(+/-) (1920x3x1080)
(FI-RE51S-HF (JAE))
INPUT CONNECTOR
ORX2(+/-)
ORX3(+/-)
OCLK(+/-)
TIMING
SELLVDS
RPF
CONTROLLER
ODSEL
DATA DRIVER (RSDS)
Vcc DC/DC CONVERTER

& REFERENCE
GND
VOLTAGE
GENERATOR
CN101-CN112 (Master): SM02-BDAS-3-TB(LF)(JST) CN201-CN212 (Slave): SM02-BDAS-3-TB(LF)(JST)
BALANCE BOARD BALANCE BOARD

CONNECTOR CONNECTOR
BACKLIGHT
CN127 CN227
UNIT 130001WR-02E
130001WR-02E
(YEONHO) (Master) (YEONHO) (Salve)
+/- HV IP board +/- HV
CN125: HRS_KN30-7P-1.25H
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5 .INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD Module
Pin Name Description Note
1 VCC +12V power supply
6 GND Ground
7 GND Ground
8 GND Ground
9 GND Ground
10 ORX0- Odd pixel Negative LVDS differential data input. Channel 0
11 ORX0+ Odd pixel Positive LVDS differential data input. Channel 0
16 GND Ground
17 OCLK- Odd pixel Negative LVDS differential clock input.
18 OCLK+ Odd pixel Positive LVDS differential clock input.
19 GND Ground
22 N.C. No Connection
(1)
24 GND Ground
25 ERX0- Even pixel, Negative LVDS differential data input. Channel 0
26 ERX0+ Even pixel, Positive LVDS differential data input. Channel 0
31 GND Ground
32 ECLK- Even pixel, Negative LVDS differential clock input
33 ECLK+ Even pixel, Positive LVDS differential clock input.
34 GND Ground
(1)
39 GND Ground
40 ODSEL Overdrive Lookup Table Selection (3)
41 N.C. No Connection (1)
45 SELLVDS LVDS Data Format Selection (2)
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Note (1) Reserved for internal use. Please leave it open.
Note (2) Low : JEIDA LVDS Format (default), High : VESA Format.
Note (3) Overdrive lookup table selection. The overdrive lookup table should be selected in accordance with the
frame rate to optimize image quality.
ODSEL Note
L Lookup table was optimized for 60 Hz frame rate
H Lookup table was optimized for 50 Hz frame rate.
Note (4) Low =Open or Connect to GND, High = Connect to +3.3V
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5.2 BACKLIGHT UNIT

The pin configuration for the housing and the leader wire is shown in the table below.
CN3-CN26: BDAMR-02VAS-3 (JST).
Pin Name Description Wire Color
1 HV High Voltage Pink
2 HV High Voltage White
Note (1) The backlight interface housing for high voltage side is a model BDAMR-02VAS-3,
manufactured by JST. The mating header on inverter part number is
SM02-BDAS-3-TB (LF)(JST)
1 HV(White) 1 HV(Pink)
2 HV(Pink) 2 HV(White)
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5.3 BALANCE BOARD UNIT

CN127 (Header) (Master): 130001WR-02E (YEONHO)
Pin No. Symbol Description
1 HV+(-) High Voltage Input A
2 HV+(-) High Voltage Input B (It is reverse polarity to A)
CN227 (Header) (Slave): 130001WR-02E (YEONHO)

1 HV-(+) High Voltage Input A
2 HV-(+) High Voltage Input B (It is reverse polarity to A)
CN101-CN112 (Header) (Master): SM02-BDAS-3-TB (LF)(JST)

1 HV+(-) CCFL high voltage
2 HV+(-) CCFL high voltage
CN201-CN212 (Header) (Slave): SM02-BDAS-3-TB (LF)(JST)

1 HV-(+) CCFL high voltage
2 HV-(+) CCFL high voltage
CN125 (Header): KN30-7P-1.25H (Hirose).

1 VCC Power Supply for Protection Circuit
2 FB Lamp Current Detected Voltage
3 FB Lamp Current Detected Voltage
4 GND Signal Ground
5 GND Signal Ground
6 LD CCFL Connector Open & Non-lighting signal
7 LD CCFL Connector Open & Non-lighting signal
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5.4 BLOCK DIAGRAM OF INTERFACE

CNF1
ERx0+ 51Ө
100pF RxOUT
TxIN ERx0-
ER0-ER7 51Ө ER0-ER7
ERx1+ 51Ө
EG0-EG7 100pF
EG0-EG7
ERx1-
EB0-EB7 51Ө EB0-EB7
ERx2+ 51Ө
DE 100pF DE
ERx2-
51Ө
ERx3+ 51Ө OR0-OR7
OR0-OR7
100pF
OG0-OG7 ERx3- OG0-OG7
51Ө
OB0-OB7 OB0-OB7
ECLK+ 51Ө
DCLK PLL ECLK-
100pF
PLL DCLK
51Ө
Host
Graphics Timing
Controller Controller
ORx0+ 51Ө
100pF
ORx0-
51Ө
ORx1+ 51Ө
100pF
ORx1-
ORx2+ 51Ө
100pF
ORx2-
51Ө
ORx3+ 51Ө
100pF
ORx3-
51Ө
OCLK+ 51Ө
100pF
PLL OCLK- PLL
51Ө
LVDS Transmitter LVDS Receiver

THC63LVDM83A
(LVDF83A)
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ER0~ER7 : Even pixel R data

EG0~EG7 : Even pixel G data
EB0~EB7 : Even pixel B data
OR0~OR7 : Odd pixel R data
OG0~OG7: Odd pixel G data
OB0~OB7 : Odd pixel B data
DE : Data enable signal
DCLK : Data clock signal
Notes: (1) The system must have the transmitter to drive the module.
(2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line
when it is used differentially.
(3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd
pixel and the second pixel is even pixel.
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5.5 LVDS INTERFACE
TRANSMITTER INTERFACE RECEIVER

SIGNAL TFT CONTROL INPUT
THC63LVDM83A CONNECTOR THC63LVDF84A
LVDS_SEL LVDS_SEL = LVDS_SEL LVDS_SEL =

PIN INPUT Host TFT-LCD PIN OUTPUT
=H L or OPEN =H L or OPEN
R0 R2 51 TxIN0 27 Rx OUT0 R0 R2
R2 R4 54 TxIN2 TA OUT0+ Rx 0+ 30 Rx OUT2 R2 R4
R5 R7 3 TxIN6 TA OUT0- Rx 0- 35 Rx OUT6 R5 R7
G0 G2 4 TxIN7 37 Rx OUT7 G0 G2
G3 G5 11 TxIN12 TA OUT1+ Rx 1+ 43 Rx OUT12 G3 G5
G4 G6 12 TxIN13 45 Rx OUT13 G4 G6
G5 G7 14 TxIN14 46 Rx OUT14 G5 G7
B0 B2 15 TxIN15 TA OUT1- Rx 1- 47 Rx OUT15 B0 B2
B1 B3 19 TxIN18 51 Rx OUT18 B1 B3
B2 B4 20 TxIN19 53 Rx OUT19 B2 B4
B3 B5 22 TxIN20 54 Rx OUT20 B3 B5
24bit
B4 B6 23 TxIN21 TA OUT2+ Rx 2+ 55 Rx OUT21 B4 B6
B5 B7 24 TxIN22 1 Rx OUT22 B5 B7
DE DE 30 TxIN26 6 Rx OUT26 DE DE
R6 R0 50 TxIN27 TA OUT2- Rx 2- 7 Rx OUT27 R6 R0
G7 G1 10 TxIN11 42 Rx OUT11 G7 G1
B6 B0 16 TxIN16 TA OUT3+ Rx 3+ 49 Rx OUT16 B6 B0
B7 B1 18 TxIN17 50 Rx OUT17 B7 B1
RSVD 1 RSVD 1 25 TxIN23 2 Rx OUT23 NC NC
RSVD 2 RSVD 2 27 TxIN24 TA OUT3- Rx 3- 3 Rx OUT24 NC NC
RSVD 3 RSVD 3 28 TxIN25 5 Rx OUT25 NC NC
DCLK 31 TxCLK IN TxCLK RxCLK 26 RxCLK DCLK
OUT+ IN+ OUT
TxCLK RxCLK
OUT- IN-
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R0~R7: Pixel R Data (7; MSB, 0; LSB)

G0~G7: Pixel G Data (7; MSB, 0; LSB)
B0~B7: Pixel B Data (7; MSB, 0; LSB)
DE : Data enable signal
DCLK : Data clock signal
Notes: (1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.
5.6 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the
color. The higher the binary input, the brighter the color. The table below provides the assignment of the
color versus data input.
Data Signal
Color Red Green Blue
R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
Basic Blue 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Colors Cyan 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Magenta 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Yellow 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
White 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Red (0) / Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red (1) 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red (2) 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Gray
: : : : : : : : : : : : : : : : : : : : : : : : :
Scale
: : : : : : : : : : : : : : : : : : : : : : : : :
Of
Red (253) 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red
Red (254) 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red (255) 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green (0) / Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green (1) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
Green (2) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
Gray
: : : : : : : : : : : : : : : : : : : : : : : : :
Scale
: : : : : : : : : : : : : : : : : : : : : : : : :
Of
Green (253) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0
Green
Green (254) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0
Green (255) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
Blue (0) / Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Blue (1) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
Blue (2) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
Gray
: : : : : : : : : : : : : : : : : : : : : : : : :
Scale
: : : : : : : : : : : : : : : : : : : : : : : : :
Of
Blue (253) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 1
Blue
Blue (254) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0
Blue (255) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Note (1) 0: Low Level Voltage, 1: High Level Voltage
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
Frequency 1/Tc (60) 74 (80) MHZ -
LVDS Receiver Clock Input cycle to
Trcl - - 200 ps -
cycle jitter
Setup Time Tlvsu 600 - - ps -
LVDS Receiver Data
Hold Time Tlvhd 600 - - ps -
Fr5 47 50 53 Hz (1)
Frame Rate
Fr6 57 60 63 Hz (1)
Vertical Active Display Term Total Tv 1115 1125 1135 Th Tv=Tvd+Tvb
Display Tvd 1080 1080 1080 Th -
Blank Tvb 35 45 55 Th -
Total Th 1050 1100 1150 Tc Th=Thd+Thb
Horizontal Active Display Term Display Thd 960 960 960 Tc -
Blank Thb 90 140 190 Tc -
Note (1) (ODSEL) = (H) , (L). Please refer to 5.1 for detail information.
Note (2) Since the module is operated in DE only mode, Hsync and Vsync input signals should be set to low
logic level. Otherwise, this module would operate abnormally.
INPUT SIGNAL TIMING DIAGRAM
Tv
Tvd
Tvb
DE
Th
DCLK
Tc
Thd
Thb
DE
DATA Valid display data ( 960 clocks)
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LVDS INPUT INTERFACE TIMING DIAGRAM
Tc
RXCLK+/-
RXn+/-
Tlvsu
Tlvhd
1T‘ 3T‘ 5T‘ 7T‘ 9T‘ 11T‘ 13T‘

14 14 14 14 14 14 14
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6.2 POWER ON/OFF SEQUENCE

To prevent a latch-up or DC operation of LCD module, the power on/off sequence should follow the
diagram below.
Power Supply 0.9 VCC 0.9 VCC
VCC
0.1VCC 0.1Vcc
0V
0.5ЉT1Љ10ms T1 T3
0ЉT2Љ50ms
0ЉT3Љ50ms
500ms ЉT4 T2 T4
VALID
Signals
0V
Power On Power Off
Backlight (Recommended) 50% 50%

500msЉT5
100msЉT6
T5 T6
Power ON/OFF Sequence
Note.
(1) The supply voltage of the external system for the module input should follow the definition of Vcc.
(2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the
LCD operation or the LCD turns off before the backlight turns off, the display may momentarily
become abnormal screen.
(3) In case of VCC is in off level, please keep the level of input signals on the low or high impedance.
(4) T4 should be measured after the module has been fully discharged between power off and on
period.
(5) Interface signal shall not be kept at high impedance when the power is on.
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
o
Ambient Temperature Ta 25r2 C
Ambient Humidity Ha 50r10 %RH
Supply Voltage VCC 12V V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Lamp Current IL 6.0r0.2 mA
Oscillating Frequency (Inverter) FW 44r3 KHz
Vertical Frame Rate Fr 60 Hz
7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should be
measured under the test conditions described in 7.1 and stable environment shown in Note (6).
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR 1400 1800 - - Note (2)
Gray to
Response Time - 6.5 12 ms Note (3)
gray
cd/
Center Luminance of White LC 500 530 - Note (4)
m2
White Variation GW - - 1.3 - Note (7)
Cross Talk CT Tx=0q, TY =0q - - 4 % Note (5)
Rx Viewing angle at 0.648 -
Red normal direction
Ry 0.334 -
Gx 0.268 -
Green
Gy Typ.- 0.608 Typ.+ -
Color Note (6)
Bx 0.03 0.150 0.03 -
Chromaticity Blue
By 0.058 -
Wx 0.280 -
White
Wy 0.290 -
Color Gamut 72 75 - % NTSC
Tx+ 80 88 -
Horizontal
Viewing Tx- 80 88 -
CRt20 Deg. Note (1)
Angle TY+ 80 88 -
Vertical
TY- 80 88 -
24

Approval
Note (1) Definition of Viewing Angle (Tx, Ty):

Viewing angles are measured by Eldim EZ-Contrast 160R
Normal
Tx = Ty = 0º
Ty- Ty
TX- = 90º x- 12 o’clock direction

y+
Tx Ty+ = 90º
Tx
6 o’clock
y- x+ TX+ = 90º
Ty- = 90º
Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L255 / L0
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note
(7)
Note (3) Definition of Gray to Gray Switching Time :
100%
90%
Optical
Response
10%
0%
Time
Gray to gray Gray to gray
switching time switching time
The driving signal means the signal of gray level 0, 63, 127, 191, and 255.
Gray to gray average time means the average switching time of gray level 0 ,63,127,191,255 to each
other .
25

Approval
Note (4) Definition of Luminance of White (LC):

Measure the luminance of gray level 255 at center point.
LC = L (5), where L (x) is corresponding to the luminance of the point X at the figure in Note (7).
Note (5) Definition of Cross Talk (CT):
CT = | YB – YA | / YA u 100 (%)
Where:
YA = Luminance of measured location without gray level 0 pattern (cd/m2)
YB = Luminance of measured location with gray level 0 pattern (cd/m2)
(0, 0) Active Area (0, 0)

Active Area
YA, U (D/2,W/8) YB, U (D/2,W/8)
(D/4,W/4)
YA, L (D/8,W/2) YB, L (D/8,W/2) YB, R (7D/8,W/2)

Gray 128 Gray
Gray0 0
YA, R (7D/8,W/2)
(3D/4,3W/4)
YA, D (D/2,7W/8)
YB, D (D/2,7W/8) Gray 128
(D, W) (D, W)
Note (6) Measurement Setup:

The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting backlight for 1 hour in a windless room.
LCD Module
LCD Panel
Center of the Screen Display Color Analyzer

(Minolta CA210)
Light Shield Room

(Ambient Luminance < 2 lux)
26

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Note (7) Definition of White Variation (GW):

Measure the luminance of gray level 255 at 5 points
GW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
Horizontal Line
D
D/4 D/2 3D/4
Vertical Line
W/4 1 2
W W/2 5 X : Test Point

X=1 to 5
3W/4 3 4
Active Area
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8. PRECAUTIONS
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas. The
dust and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD
modules in the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of CCFL will be higher than that of room
temperature.
8.2 SAFETY PRECAUTIONS

(1) The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while
assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.
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9. DEFINITION OF LABELS
9.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
V460H1 -L04 Rev. XX
XXXXXXXYMDLNNNN E207943
CHI MEI MADE IN TAIWAN
OPTOELECTRONICS
RoHS
C M 46H14 X X X X X X X X X Y M D L N N N N
(a) Model Name: V460H1-L04

(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.
(c) Serial ID: X X X X X X X Y M D L N N N N
Serial No.
Product Line
Year, Month, Date
CMO Internal Use
Revision
CMO Internal Use
(d) Serial ID: C M 46 H 1 4 X X X X X X X X X Y M D L N N N N
Serial No.
Product Line
Year, Month, Date
CMO Internal Use
Model Name: V460H1-L04 = 46H14
CMO = CM
Serial ID includes the information as below:
(a) Manufactured Date: Year: 0~9, for 2000~2009
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1st to 31st, exclude I ,O, and U.
(b) Revision Code: Cover all the change
(c) Serial No.: Manufacturing sequence of product
(d) Product Line: 1 -> Line1, 2 -> Line 2, …etc.
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10. PACKAGING
10.1 PACKING SPECIFICATIONS
(1) 3 LCD TV modules / 1 Box
(2) Box dimensions : 1190(L)x280(W)x720(H)mm
(3) Weight : approximately 50Kg (3 modules per box)
10.2 PACKING METHOD

Figures 10-1 and 10-2 are the packing method
LCD TV Module
Anti-static Bag
PP Belt
3pcs Drier
Cushion(Bottom) Carton Label
Figure.10-1 packing method
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Approval
Air Transportation &

Sea / Land Transportation (40ft Container)
(L1130*50*50mm)
Film
(L1150*W1195*H140mm)
(L1400*50*50mm)
Sea / Land Transportation (40ft HQ Container)
(L1130*50*50mm)
(L625*50*50mm)
Film
(L1400*50*50mm)
(L1150*W1195*H140mm)
Figure.10-2 packing method
31

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11. MECHANICAL CHARACTERISTIC
32

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33

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34

MODEL NO.: V460H1 - L04: TFT LCD Approval Specification

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Issue Date: Dec, 25 2007

TFT LCD Approval Specification