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    National Institute of Technology End Sem 2

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    Ankit -V
    The document contains questions for an exam on basic electronics engineering. It asks about op-amp characteristics, transistor biasing, logic gate design, rectifier circuits, and instrumentation amplifier operation.

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    National Institute of Technology End Sem 2

    Uploaded by

    Ankit -V
    7 views2 pages
    The document contains questions for an exam on basic electronics engineering. It asks about op-amp characteristics, transistor biasing, logic gate design, rectifier circuits, and instrumentation amplifier operation.

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    © © All Rights Reserved

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    PDF, TXT or read online from Scribd

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    The document contains questions for an exam on basic electronics engineering. It asks about op-amp characteristics, transistor biasing, logic gate design, rectifier circuits, and instrumentation amplifier operation.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    7 views2 pages

    National Institute of Technology End Sem 2

    Uploaded by

    Ankit -V
    The document contains questions for an exam on basic electronics engineering. It asks about op-amp characteristics, transistor biasing, logic gate design, rectifier circuits, and instrumentation amplifier operation.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 2

    NATIONAL INSTITUTE OF TECHNOLOGY

    ROURKELA – 769 008 (Orissa)


    Department: Electronics and Communication Engineering (ECE Dept.)
    Name of the Examination: B. Tech, 2nd Semester Examination, April 2018
    Subject ID: EC-1000 (Section–A/ B/ C/ D) Subject: Basic Electronics Engineering
    Maximum marks: 50 Time: 3 hours
    Instructions:
    1. Answer all nine questions.
    2. All parts of a question must be answered in a single continuous space.
    3. Due credit will be awarded for neatness in drawing and labeling circuit diagrams.
    1. a. CMRR of two Op-amps are (i) 104 and (ii) 103. Among these two which one is better
    and why? 1×10
    b. Find the input resistance of the following circuit.

    c. Design T-Flipflop using JK Flipflop.


    d. Design the following Boolean expression using NAND gates only
    f  xy  y ' z
    e. Specify the biasing condition for a transistor to be in saturation region.
    f. What is the use of instrumentation amplifier?
    g. Draw the circuit of voltage follower using Op-amp.
    h. What is pinch off voltage in MOSFET.
    i. Explain two major differences between MOSFET and BJT.
    j. What is the peak inverse voltage in full wave bridge rectifier?
    2. (a) Design Mod-6 ripple counter and sketch waveform across each Flipflop’s output.
    3
    (b) Show the truth table for J-K FlipFlop. Explain how J-K Flipflop is different from R-
    S Flipflop 2

    3. (a) Find the emitter, base, collector voltages and currents using the Figure 3(a).
    2
    (b) Compare and contrast between center tapped full wave rectifier and bridge rectifier.
    2
    4. (a) Draw the three regions of operation of a BJT. Also explain the application of each
    3
    region of operation.
    (b) Given that Ic=2mA, Vce=10V,. Determine R1 and Rc for the network given in Fig 4(b). 2

    5
    5 (a) Explain the various types of biasing of BJT. 3

    (b) With a neat diagram explain the device structure and physical operation of
    enhancement type MODFET. 2

    Basic Electronics/ 2nd semester/Spring semester/P Chongder / M Okade / U K Sahoo/ S Hiremath / ECEPage 1 of 2
    6 (a) Draw the three regions of operation of enhancement type MOSFET. Also explain the 3
    application of each region of operation
    (b) An NMOS transistor have µnCox= 200µA/V2 and L=0.8µm and W=16µm. Find the
    value of drain currents(ID) that results when the device operated with VGS =1V,
    2
    VT =0.5V and VDS=1V.

    7 (a) With a neat diagram explain instrumentation amplifier and also derive the output 3

    voltage.
    (b) Briefly discuss two characteristics of an ideal op-amp. 2

    Fig. 3(a) Fig. 4(b) Fig 8(a)

    8 (a) Find the output voltage(v0) in Fig 8(a) when the input voltage(vI) is 100mV. 3

    (b) With a neat diagram explain the operation of integrator circuits and also derive the
    output voltage. 2

    9 (a) With a neat diagram explain logarithmic amplifier using Op-amp and also derive the
    2
    output voltage.
    (b) Determine the output voltage(vo) of the circuit given in Fig 9(b).

    Vo

    Fig.9(b)

    Basic Electronics/ 2nd semester/Spring semester/P Chongder / M Okade / U K Sahoo/ S Hiremath / ECEPage 2 of 2

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