Genus ISpatial RAK.v1

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Genus iSpatial - Rapid Adoption Kit

RAK testcase database, Scripts and references can be found at ‘Attachments’ and ‘Related Solutions’
sections below the PDF.
iSpatial: Next-Generation Common Physical Optimization flow

RTL Compile
iSpatial
Genus

Genus
RTL Compile/Map Flexible
Physical incr Opt Handoff
iSpatial
• Unified physical opt engine
Genus Mapper + Correlation

Innovus
Incr GigaOpt
GigaPlace + CCOpt™ with Physical
GigaOpt NanoRoute
Innovus

PlaceOpt
CCOPT
NanoRoute Better PPA
• Restructuring after placement

Signoff
Tempus
• Early clock flow in synthesis Voltus
Pegasus

Better Predictability
Signoff

Tempus
Voltus • Directly using Innovus GigaOpt
Pegasus • Make better RTL decisions, faster

2 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.


Genus iSpatial Overview

• Integrates fast timing closure with Innovus giga-place and giga-opt engines
• Provides accurate prediction of timing, area, leakage and congestion for RTL designers
• DB handoff allows Innovus place_opt_design to run faster
o Contains placement and optimization data

• Prerequisites:
o Tech lef and standard cell .lef files

o Liberty .lib standard cell files

o Floorplan .def file

o QRCtechfile - required for good R/C correlation

o MMMC config file

• Note: iSpatial flow requires an Innovus executable. It is highly recommended that you use the latest versions of
Innovus and Genus (set the innovus_executable attribute to point to the Innovus executable file).

3 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.


Genus iSpatial Interface

• Genus Inputs

Genus
o RTL: Verilog, VHDL, System Verilog (w/
RTL
directives & pragmas) .lib .lef
floorplan .def
o MMMC w/constraints (.sdc)

o Library: .LIB and .LEF

o GTech & DW foundation equivalents Genus MMMC w/


qrctechfile
o Physical Info: .def .qrctechfile (captable) iSpatial constraints
o Optional: CPF/IEEE1801, SAIF, TCF, VCD

Innovus
• Genus Outputs
Netlist DB
o Netlist Handoff: OR
Handoff Handoff
– Optimized gate-level netlist: .v
– Constraints: .sdc Regular
o Placed db Handoff:
Incr Physical
Physical
Design
– Fully placed database (.enc) Design
o Optional Outputs: scandef, LEC Dofiles, TCF,
etc.
4 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.
Quickstart: Running Genus

• Genus is run in Common UI through this RAK


o Typical

unix:> genus -f run.tcl -log genus.log


o Standalone run
unix:> genus
• Useful command line options:
unix:> genus -help [-lic_startup_options <string>]+:
[-files <string>]: execute command file checkout an option license at
startup
[-help]: print this message
Genus_Low_Power_Opt
[-lic_startup <string>]:
Genus_Physical_Opt
specifies one of the following
licenses Vdixl_Capacity_Opt
Genus_Synthesis [-log <string>]: prefix for the .log and
.cmd files.
Virtuoso_Digital_Implem
Virtuoso_Digital_Implem_XL

5 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.


Open Your Genus Documents

• Before you proceed to edit the run scripts...


o Know where Genus supporting documents are kept. They will be useful to explain new & unfamiliar
commands, objects, attributes, and variables used in the template.
• You can find them under the directory where tool is installed on your system
unix:> which genus
“$path_to_tool_directory/tools.xxx/bin/genus”
• You are able to find useful documents under the directory:
$path_to_tool_directory/doc/
• Documents can also be found online at: Cadence Online Support

6 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.


run.tcl – Genus Physical flow with iSpatial

Genus
Global variable and
attribute settings
iSpatial Setup
Library and MMMC
settings
Load design and
syn_generic -
initialize
physical
read def
syn_map -physical
set cost groups
syn_opt -spatial

write reports
write_design -
innovus

NOTE: a Genus Physical license is required to run iSpatial


7 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.
Global Variables and Attribute Settings
Template
Genus

Global variable and • DESIGN is used to specify the design name set DESIGN <design name>
attribute settings

iSpatial Setup
• Specify the effort levels for synthesis (these are set GEN_EFF medium
Library and MMMC variables which are later used to set attributes) set MAP_EFF high
settings
Load design and set_db init_lib_search_path {<paths to library
initialize • Set the library search path, files>}
script search path and HDL
read def set_db script_search_path {<path to scripts>}
search path
set_db init_hdl_search_path {<paths to RTL files>}
set cost groups
set_db syn_generic_effort $GEN_EFF
syn_generic -physical • Set effort level for syn_generic
and syn_map set_db syn_map_effort $MAP_EFF
syn_map -physical

syn_opt -spatial set _OUTPUTS_PATH outputs


• Set the output directory paths,
report paths and log file paths set _REPORTS_PATH reports
write reports
set _LOG_PATH logs
write_design -innovus

8 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.


iSpatial Setup
Template
Genus

Global variable and • opt_spatial_effort set_db opt_spatial_effort extreme


attribute settings
o Effort level for spatial optimization flow (none,

iSpatial Setup standard, extreme).


o NOTE: extreme effort enables the iSpatial flow
Library and MMMC
settings • library_setup_ispatial set_db library_setup_ispatial true
Load design and o ensures Genus and Innovus library handling

initialize are consistent


o NOTE: to be set before library loading, i.e.,
read def
before init_design, or read_db
set cost groups • innovus_executable set_db innovus_executable <invs_path>
o attribute used to set/override Innovus
syn_generic -physical
executable path.
syn_map -physical o If innovus_executable attribute is not set, the
default search order is used:
syn_opt -spatial – Innovus environment variable. NOTE: Please use the same main branches
write reports – PATH environment variable. for Genus and Innovus for compatibility, i.e.,
– CDS_SYNTH_ROOT environment Genus 19.1* with Innovus 19.1*, or for future
write_design -innovus variable. Genus 20.1* with Innovus 20.1*.

9 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.


iSpatial Setup (continued) – optional attributes
Template
Genus

Global variable and • invs_temp_dir set_db invs_temp_dir


attribute settings ${_OUTPUTS_PATH}/invs_tmp_dir
o attribute is used to specify the temp directory

iSpatial Setup which contains Innovus interface files generated


during syn_opt -spatial.
Library and MMMC o It is used for debugging purposes; recommend
settings
setting.
Load design and o If not set, temp dir is deleted after syn_opt.
initialize
• invs_postload_script set_db invs_postload_script
read def <path_to_postload_script>
o attribute specifies the script to include in Innovus

set cost groups


after the setup steps (after the libraries, design,
user constraints, and user mode are loaded) and
syn_generic -physical before placement is started. Requires limited
access key. Recommended to NOT use unless
syn_map -physical necessary, as recommended by your AE.
set_db leakage_power_effort low
syn_opt -spatial
• Power prediction attributes set_db dynamic_power_effort low
write reports • Useful skew attribute (default true set_db opt_spatial_useful_skew true
recommended)
write_design -innovus

10 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.


Library and MMMC Settings
Template
• Use MMMC flow with iSpatial
Genus

Global variable and read_mmmc <mmmc_config_file>


attribute settings
o Use read_mmmc to read the MMMC
iSpatial Setup configuration, libraries (.lib), constraints
(SDCs) and QRCtech file are specified in
Library and MMMC mmmc_config_file and will be
settings
loaded during init_design.
Load design and
initialize
• Read the technology LEF and standard cell read_physical -lef <lef_files>
read def LEFs
set cost groups

syn_generic -physical • Note: init_lib_search_path attribute is valid for


LEF library search along with the .lib search
syn_map -physical (set earlier in flow)
syn_opt -spatial

write reports

write_design -innovus

11 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.


Load Design and Initialize
Template
• Design is read into Genus with read_hdl
Genus

Global variable and read_hdl <hdl_file>


attribute settings command(s). Genus can read verilog, VHDL,
iSpatial Setup verilog netlist and System Verilog.

Library and MMMC


settings • elaborate the design and change into Genus elaborate $DESIGN
Load design and internal data structures.
initialize

read def
• init_design - During init_design, Genus steps init_design
set cost groups through the defined MMMC objects, the design
object and the power requirements and builds
syn_generic -physical the full representation of the design.
syn_map -physical
• check_design - Check the design for any check_design -unresolved
syn_opt -spatial
unresolved references.
write reports

write_design -innovus

12 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.


Read DEF
Template
• Genus Physical requires floorplan
Genus

Global variable and read_def <path_to_def_file> -fuzzy_match


attribute settings information through a DEF file.
iSpatial Setup • read_def command options:
Library and MMMC <string>: DEF file to read
settings [-convert_sites <string>]: convert ROW sites
[-design <design>]: design to annotate DEF info
Load design and [-fuzzy_match]: enable fuzzy name matching
initialize [-incremental]: read incremental DEF for blockages, components, groups,
pins, and regions
read def [-ignore_errors]: ignore LEF/DEF consistency check errors
[-no_special_nets]: do not read the SPECIALNETS section
[-no_nets]: do not read the NETS section
set cost groups [-no_vias]: do not read the VIAS section
[-no_physical_pins]: do not create physical pin for missing PIN
syn_generic -physical [-keep_all_instances]: keep all non-netlist instances
[-keep_filler_cells]: keep physical only filler cells
syn_map -physical [-keep_routed_nets]: keep routed (in addition to fixed/cover) NETS
[-keep_welltap_cells]: keep physical only welltap cells
syn_opt -spatial [-keep_all_physical_cells]:keep cells with lib_cell attribute
keep_as_physical set
[-create_ports]:create missing DEF pins (clock, reset, scan, or signal)
write reports [-add_power_switch]: create power switch in netlist
[-no_force_fixed]: do not force components to be fixed in hierarchical mode
write_design -innovus

13 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.


Cost Group Settings
Template
• Define cost groups for input to define_cost_group -name I2C -design $DESIGN
Genus

Global variable and


attribute settings path_group -from [all_inputs] -to
register, register to output, and input [allregisters] -group I2C -name I2C
iSpatial Setup to output (combinational)

Library and MMMC define_cost_group -name C2O -design $DESIGN


settings • A cost group is created for each path_group -from [all_registers] -to
[all_outputs] -group C2O -name C2O
Load design and clock in the SDC file when SDC is
initialize read in.
o This is generally better than define_cost_group -name I2O -design $DESIGN
read def path_group -from [all_inputs] -to
creating a single C2C cost [all_outputs] -group I2O -name I2O
set cost groups group.
syn_generic -physical

syn_map -physical

syn_opt -spatial

write reports

write_design -innovus

14 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.


Physical-aware Synthesis
Template
• syn_generic -physical synthesizes the design to
Genus

Global variable and syn_generic -physical


attribute settings generic gates, using the given constraints and
iSpatial Setup performs RTL optimization.
o ‘-physical’ specifies to take physical domain
Library and MMMC into consideration for optimization by
settings
performing cluster placement of generic
Load design and cells.
initialize

read def
• syn_map -physical does the technology mapping syn_map -physical
set cost groups of design.
o ‘-physical’ specifies to take physical domain
syn_generic -physical
into consideration for mapping and
syn_map -physical optimization.

syn_opt -spatial
• NOTE: DFT insertion (non-RTL-based) would be
write reports run after syn_map (e.g. connect_scan_chains),
and before iSpatial.
write_design -innovus

15 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.


iSpatial Synthesis
Template
• syn_opt -spatial is the command for executing
Genus

Global variable and syn_opt -spatial


attribute settings the iSpatial synthesis.
iSpatial Setup o For iSpatial, be sure to have set_db
opt_spatial_effort extreme attribute set.
Library and MMMC
settings
Load design and • NOTE: iSpatial flow requires an Innovus
initialize executable when opt_spatial_effort is set to
read def “extreme”. It is highly recommended that you use
the latest versions of Innovus and Genus.
set cost groups

syn_generic -physical • NOTE: opt_spatial_effort set to "standard"


currently runs the old spatial flow.
syn_map -physical

syn_opt -spatial

write reports

write_design -innovus

16 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.


Write Reports
Template
• Generates the QoS statistics table at any stage
Genus

Global variable and write_reports -directory


attribute settings in the flow, and writes the timing, area, gates and $_REPORTS_PATH -tag final
iSpatial Setup QoR reports to the specified output directory,
using the tag string as the prefix for the report
Library and MMMC filenames.
settings
Load design and
initialize

read def

set cost groups

syn_generic -physical

syn_map -physical

syn_opt -spatial

write reports

write_design -innovus

17 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.


Write Design – Netlist Handoff to Innovus preCTS
Template
• Use regular write_design -innovus to
Genus

Global variable and write_design -innovus -gzip_files -base_name


attribute settings write final netlist and supporting files ${_OUTPUTS_PATH}/final_netlist/${DESIGN}

iSpatial Setup for Innovus prects

Library and MMMC # load only specific files from Genus


settings • For reading the design into Innovus innovus> read_mmmc <mmmc_config.tcl>
Load design and and running prects optimization, use innovus> read_physical -lef <LEF files>
initialize the regular init_design flow.
innovus> read_netlist
read def ${_OUTPUTS_PATH}/final_netlist/${DESIGN}.v
innovus> init_design
set cost groups • Netlist handoff mode allows flexibility
to customers whose back-end innovus> read_def ../def/fp.def
syn_generic -physical vendors will not accept a DB handoff
# execute prects optimization
syn_map -physical
• NOTE: iSpatial placement data is not innovus> place_opt_design
syn_opt -spatial
passed forward to Innovus with
write reports
netlist handoff

write_design -innovus

18 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.


Write Design – DB Handoff to Innovus preCTS
Template
• Generates a placed Innovus DB file for
Genus

Global variable and write_design -innovus -gzip_files -db


attribute settings reading into Innovus. -base_name
${_OUTPUTS_PATH}/final_db/${DESIGN}
iSpatial Setup o Add ‘-db’ to write_design -innovus.

Library and MMMC


settings • For reading the design into Innovus and # load DB from Genus
Load design and running prects optimization, use the
innovus> read_db
initialize following: ${_OUTPUTS_PATH}/final_db/${DESIGN}.s
o The DB already contains the placement tylus.enc
read def
and optimization data (e.g. buffering, innovus> time_design -report_only
set cost groups sizing, latency, layer assign) which
allows Innovus place_opt_design to run
syn_generic -physical with a faster recipe and converge better # execute prects optimization
with a faster TAT automatically. innovus> place_opt_design
syn_map -physical

syn_opt -spatial
• Note: The DB contains information which
write reports
tells Innovus that a full place_opt_design is
not required, so DO NOT use the
write_design -innovus -incremental switch when running Innovus
-db place_opt_design in either handoff mode.
19 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.
Summary

• This presentation gives a brief introduction to the Genus iSpatial concepts.

• It is recommended that you start with the provided template script ‘run.tcl’ and only change as
necessary to fit your particular design needs.

20 © 2020 Cadence Design Systems, Inc. All rights reserved worldwide.


© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo, and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design
Systems, Inc. Accellera and SystemC are trademarks of Accellera Systems Initiative Inc. All Armproducts are registered trademarks or trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere. All MIPI
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