A3G Block Diagram: File List
A3G Block Diagram: File List
A3G Block Diagram: File List
01
FILE LIST
01_BLOCK DIAGRAM
D D
02_POWER DIAGRAM
A3G THERMAL
03_CPU-DOTHAN(HOST)
04_CPU-DOTHAN(PWR)
05_THERMAL
05 06_NB-MCHM1
BLOCK POWER
(IMVP4)
07_NB-MCHM2
08_NB-MCHM3
09_DUAL_DDR
DIAGRAM FAN
DOTHAN
21W
41 42 43 44 45 46 47 48 49 50 51
10_DDR_TERMINATION
11_VGA_M11-Disp Sys
12_VGA_M11-Mem IF
13_VGA_M11-PWR/GND
14_VGA_M11-VM TERMINATION
39 03 04
15_VGA_M11-Video RAM
PSB 16_BACKLIGHT&LCD CON
LVDS 17_TV-OUT & CRT CON
LCD DDR TERMINATION 18_ICH4-M(HUB_PCI)
MCHM 19_ICH4-M(IDE_AC97)
10
C CLOCK TV C/Y/COMP VGA(M11) AGP MONTARA 20_ICH4-M(USB_PM) C
21_ICH4-M(POWER)
GEN -PM 22_CLOCK-ICS950815
RGB 9W DDR
CRT DUAL DDR SODIMM 23_LAN-RTL8100CL
22 11W 24_MINIPCI
11 12 13 14 15 16 17 52 25_CB1394-R5C593(1)
09
06 07 08 26_CB1394-R5C593(2)
27_PCMCIA SOCKET
HUB 28_IDE-HD
Function AC'97 AC97 SECONDARY IDE 29_IDE-ODD
AUDIO AMP IDE 30_KBC-M38857
Key & MIC CODEC 29 31_SuperI/O&FWH
34
Ultra 32_IR&LPT_PORT
40 35 36 ATA100
ICH4 PRIMARY IDE 33_DEBUG PORT
34_CODEC-ALC650
MDC 28 35_AUDIO AMP
2.9W 36_MIC
37
37_MDC&RJ45&RJ11
PCI LPC DEBUG 38_USB
B 39_FAN&Audio DJ B
PORT 40_FUNCTION KEY
18 19 20 21
41_PWR & RESET SEQ
33
42_VCORE
1394 43_VGACORE
CARDBUS MINIPCI LAN USB 2.0 44_SYSTEM
KBC SIO IR&LPT 45_2.5V&1.5V&1.35V&1.05V
46_1.25V&1.8V
25 26 24 23
USB X6 47_PIC16C54C
32
30 31 48_CHARGER
PCMCIA 49_AC_BAT_SYS
38 50_BATLOW/SD#
27 PRINTER 51_LOAD SWITCH
PORT 52_SCREW_HOLES
53_Clock Map
32
54_Platform Power Delivery Map
55_System Power Sequence(1)
56_System Power Sequence(2)
57_Revision History
A A
VR_VID0-VR_VID5
D
PM_STPCPU#.,PM_DPRSLPVR.,PCI#.,MCH_OK.,CLK_EN# D
CPU_VRON
+VCORE (25A)
AC_BAT_SYS (2A)
MAX1987
VRM_PWRGD
+VGACORE (8.625A)
(1A)
MAX1844
VGA_PWRGD
SUSC#.
(6A) +5VO (5.5A) SUSB# +V5S (5.5A)
LTC3728 SUSB# +V3.3S (5A)
(2.5A) +12VO (0.2A)
(Regulator) +V5 (5.5A)
+5VAO +V3.3SUS (5A) +V3 (5A)
A/D_VIN SHUT_DOWN#
SUSB# +V12S (0.2A) Power
+V12 (0.2A) BAT_S Signal BAT_IN#_OC
+1.5VO (1.35A) +V1.5 (1.35A)
SUSC# Circuit
C
TS ACIN_OC C
SWITCH
CPU_VRON
SUSB#
+V2.5 (0.5A) CM8562 +V1.25S (1A)
(Regulator) TS#
SUSB# PIC16C54B/C CHG EN
SUSC# AC_APR_UC CHG LED
+2.5VO (0.6A) MIC37101-1.8 (0.8A) +1.8VO +V1.8 (0.8A) SMC_BAT PWR LED
LDO SMD_BAT BAT_LLOW
(0.8A) SUSB# +V1.8S (0.8A)
(10.5A) (10.5A)
FDS6679
+5VO (20mA)
(6.4A) (6.4A) A/D_VIN (10mA) L78L05ACUTR SWITCH
FD6JK3TP +5VLCM (120mA)
(Regulator) +5VCHG (100mA) (F02JK2E)
ADDRESS GROUP 0
H_A#10 H_D#10 D[11]# D[43]# H_D#42
W2 A[10]# D24 V24
H_A#9 H_D#9 D[10]# D[42]# H_D#41
T4
DATA GROUP 0
2
A[9]# B24 D[9]# D[41]# U26
H_A#8 W1 A7 H_D#8 C20 AA23 H_D#40
A[8]# DBR#
DATA GROUP
H_A#7 D[8]# D[40]#
H_A#6
V2 A[7]#
H_D#7 B20 D[7]# D[39]# R23 H_D#39 LENGTH: 0.5" - 5.5"
R3 H_D#6 A21 R26 H_D#38
H_A#5 V3
A[6]#
H_D#5 B26
D[6]# D[38]#
R24 H_D#37 (#0012)
H_A#4 A[5]# D[5]# D[37]#
U4 L4 H_DEFER# <7> H_D#4 A24 V23 H_D#36
H_A#3 A[4]# DEFER# D[4]# D[36]#
P4 H2 H_DRDY# <7> H_D#3 B21 U23 H_D#35
A[3]# DRDY# D[3]# D[35]#
<8> H_ADSTB#0 U3 M2 H_DBSY# <7> H_D#2 A22 T25 H_D#34
H_REQ#4 ADSTB[0]# DBSY# D[2]# D[34]#
T1 H_D#1 A25 AA24 H_D#33
H_REQ#3 REQ[4]# D[1]# D[33]#
P1 H_D#0 A19 Y26 H_D#32
H_REQ#2 REQ[3]# D[0]# D[32]#
T2 REQ[2]# <8> H_DINV0# D25 T24 H_DINV2# <8>
H_REQ#1 DINV[0]# DINV[2]#
P3 REQ[1]# <8> H_DSTBN#0 C23 W25 H_DSTBN#2 <8>
H_REQ#0 DSTBN[0]# DSTBN[2]#
R2 REQ[0]# <8> H_DSTBP#0 C22 W24 H_DSTBP#2 <8>
H_BR0# DSTBP[0]# DSTBP[2]#
<8> H_REQ#[4:0] N4 H_BR0# <7> +VCCP
CONTROL
BR0#
H_D#31 K25 AF26 H_D#63
R362 H_D#30 D[31]# D[63]# H_D#62
Here IERR# is not routed as N25 D[30]# D[62]# AF22
A4 H_IERR# 1 2 a test point or to any H_D#29 H26 AF25 H_D#61
IERR# D[29]# D[61]#
<8> H_A#[31:17] 0.5"-12" optional system receiver H_D#28 M25 D[28]# D[60]# AD21 H_D#60
H_A#31 AF1 56Ohm H_D#27 N24 AE21 H_D#59
H_A#30 A[31]# D[27]# D[59]#
AE1 A[30]# INIT# B5 <=10" H_INIT# <20,31> H_D#26 L26 D[26]# D[58]# AF20 H_D#58
3
H_A#29 AF3 H_D#25 H_D#57
DATA GROUP 1
A[29]# J25 D[25]# D[57]# AD24
H_A#28 H_D#24 H_D#56
WIDTH:4mils AD6
DATA GROUP
A[28]# M23 AF23
ADDRESS GROUP 1
H_A#27 D[24]# D[56]#
AE2 A[27]# LOCK# J2 <=10" H_LOCK# <7> H_D#23 J23 AE22 H_D#55
SPACE >= 1:2 H_A#26 AD5 H_D#22 G24
D[23]# D[55]#
AD23 H_D#54
H_A#25 A[26]# D[22]# D[54]#
STROBE SPACE >=1:3 AC6 H_D#21 F25 AC25 H_D#53
H_A#24 A[25]# D[21]# D[53]#
AB4 H_D#20 H24 AC22 H_D#52
GROUP SPACE >=1:5 H_A#23 A[24]# D[20]# D[52]#
AD2 H_D#19 M26 AC20 H_D#51
H_A#22 A[23]# D[19]# D[51]#
AE4 RESET# Signal Routing with H_D#18 L23 AB24 H_D#50
H_A#21 A[22]# D[18]# D[50]#
AD3 A[21]# RESET# B11 <=3" H_CPURST# <8> NO ITP700FLEX Connector H_D#17 G25 D[17]# D[49]# AC23 H_D#49
LENGTH: 0.5" - 6.5" H_A#20 AC3 L2 H_RS#2 H_D#16 H23 AB25 H_D#48
H_A#19 A[20]# RS[2]# H_RS#1 D[16]# D[48]#
C AC7 K1 J26 AD20 C
(#0012) H_A#18 AC4
A[19]# RS[1]#
H1 H_RS#0 <8> H_DINV1#
K24
DINV[1]# DINV[3]#
AE24
H_DINV3# <8>
H_A#17 A[18]# RS[0]# <8> H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 <8>
AF4 A[17]# H_RS#[2:0] <7> <8> H_DSTBP#1 L24 AE25 H_DSTBP#3 <8>
DSTBP[1]# DSTBP[3]#
<8> H_ADSTB#1 AE5 ADSTB[1]# TRDY# M3 H_TRDY# <7>
SOCKET479P
+VCCP
CPU PLL
1
CIRCUITS H_VID5
R391
H_VID4 VR_VID5 <42> 56Ohm
H_VID3 VR_VID4 <42>
/X
VR_VID3 <42>
2
+V1.8S H_VID2 H_CPURST#
H_VID1 VR_VID2 <42>
H_VID0 VR_VID1 <42>
VR_VID0 <42>
1
1
CPU-ICH: 0.5" - 12" R78 CPU-ICH: 0.5" - 12" R192 +VCCP
U42C
R - CPU <= 3" 332OhmICH-R <= 3" 56Ohm Close to
GND (#0013) (#0013) Pin AD26
1
<22> CLK_CPU100 2"-8" B15 BCLK[0]
2
+V1.8S_AC26 2"-8" B14 H_PWRGD H_FERR# R308 of CPU
HOSTCLK
2
1
1
<=10"
LEGACY CPU
2
<20> H_SMI# <=10" B4 SMI#
H_DPSLP# H_PROCHOT#
+V1.8S_N1 <=10" C6
<20> H_STPCLK# STPCLK#
1
H_VID2 F3 VID[2]
CPU-ICH:0.5" - 12" CPU-ICH: 0.5" - 12" Analog Analog
H_VID1 F2 VID[1]
IGNNE#,SLP#,SMI#,and STPCLK# R - LSC <= 3" ICH-R <= 3" R194
H_VID0 E2 C5 CPU-ICH:0.5" - 12" Length <= 0.5" Length <= 0.5"
VID[0] TEST1 LSC-FWH:0.5"-6"(#0013) (#0013) 56Ohm Width = 20 mils(L1/L4) Width = 20 mils(L1/L4)
GND TEST2 F23
MISC
2
+V1.8S_B1 AC26 H_THRMTRIP_S#
+V1.8S_AC26 VCCA[3] X BPSB(#0001) X BPSB(#0001)
+V1.8S_N1 N1 VCCA[2]
B1 A13 H_TCK
+V1.8S_B1 VCCA[1] TCK
F26 C12 H_TDI
+V1.8S VCCA[0] TDI
1
Title : CPU-DOTHAN(HOST)
ASUSTECH CO.,LTD. Engineer: EDDY ZHAO
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 3 of 57
5 4 3 2 1
5 4 3 2 1
AC24
AC21
AC18
AC16
AC14
AC12
AC10
AB26
AB23
AB21
AB19
AB17
AB15
AB13
AB11
AA25
AA22
AA20
AA18
AA16
AA14
AA12
AA10
Voltage) SOCKET479P
W26
W23
W22
AC8
AC5
AC2
AB9
AB7
AB5
AB3
AA8
AA6
AA4
AA1
U24
U22
R25
R22
Y24
Y21
V25
V21
P24
P21
T26
T23
T21
0.745 V
W6
W3
U6
U2
R6
R4
R1
Y5
Y2
V5
V4
V1
T5
T3
D D
+VCORE
VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
VSS133
VSS132
VSS131
VSS130
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
AD1 VSS161 VSS96 P5
AD4 VSS162 VSS95 P2
AD7 VSS163 VSS94 N26
AC11
AC13
AC15
AC17
AC19
AD10
AD12
AD14
AD16
AD18
AA11
AA13
AA15
AA17
AA19
AA21
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AD9 N23
W21
AC9
AD8
G21
U42D
AA5
AA7
AA9
AB6
AB8
D18
D20
D22
H22
E17
E19
E21
K22
V22
Y22
F18
F20
F22
VSS164 VSS93
J21
W5
G5
D6
D8
H6
U5
E5
E7
E9
V6
Y6
F6
F8
AD11 N22
J5
VSS165 VSS92
SOCKET479P AD13 VSS166 VSS91 N6
AD15 N3
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VSS167 VSS90
AD17 VSS168 VSS89 M24
AD19 M21
VCC VSS169 VSS88
AD22 VSS170 VSS87 M5
VCC61 AE9 AD25 VSS171 VSS86 M4
AE11 AE3 M1
GND
VCC62 VSS172 VSS85
VCC63 AE13 AE6 VSS173 VSS84 L25
VCC64 AE15 AE8 VSS174 VSS83 L22
VCC65 AE17 AE10 VSS175 VSS82 L6
VCC66 AE19 AE12 VSS176 VSS81 L3
VCC67 AF8 AE14 VSS177 VSS80 K26
VCC68 AF10 AE16 VSS178 VSS79 K23
VCC69 AF12 AE18 VSS179 VSS78 K21
VCC70 AF14 AE20 VSS180 VSS77 K5
VCCQ[1]
VCCQ[0]
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19
VCCP20
VCCP21
VCCP22
VCCP23
VCCP24
VCCP25
AF16 AE23 K2
VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9
D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16
K6
L5
L21
M6
M22
N5
N21
P6
P22
R5
R21
T6
T22
U21
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
1
A2
A5
A8
A11
A14
A17
A20
A23
A26
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
C150 C61
2
0.1uF/10V 0.1uF/10V
GND
These pins should be connected to VCCP on the
motherboard. However, these connections should enable GND
addition of decoupling on the VCCQ lines if
necessary.
+VCORE
Mid Frequency
Decoupling (Place +VCCP (CPU) Decoupling Capacitor
1
+VCCP
C439 C107 C70 C468 C469 C442 C448 C441 C467 around Processor)
(Place near CPU)
2
1
+ +
CE11 CE15 C440 C438 C437 C472 C458 C449 C474 C473 C471 C470
2
150U/4.0V 150U/4.0V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V
1
2
C69 C68 C108 C456 C463 C106 C135 C132 C71 High Frequency
B B
Decoupling (Place
2
GND
Title : CPU-DOTHAN(PWR)
ASUSTECH CO.,LTD. Engineer: EDDY ZHAO
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 4 of 57
5 4 3 2 1
5 4 3 2 1
D D
Avoid BPSB,Power
47Ohm
C502
0.1uF/10V
<11> VGA_THEM_DP
2
1
B 2200P B
<3,11> VGA_THEM_DN GND SCL_3S&SDA_3S(PULL_UP 10K
U44 IN PAGE19)
<3,11> H_THERMDC
1 VCC OT2# 10 H_THRMTRIP_S# <3,20>
2
2 9 SDA_3S
C503 DXP1 SMBDATA SDA_3S <9,19,22>
3 DXN ALERT# 8 PM_THRM# <20,39>
H_THRMTRIP_S##(PULL_UP 56Ohm IN PAGE3)
2200P 4 7 SCL_3S
<3> H_THERMDA SCL_3S <9,19,22>
1
DXP2 SMBCLK
5 OT1# GND 6 PM_THRM#(PULL_UP 10K IN PAGE39)
OS#_OC
<39> OS#_OC
GND
A A
Title : THERMAL
ASUSTECH CO.,LTD. Engineer: EDDY ZHAO
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 5 of 57
5 4 3 2 1
5 4 3 2 1
_DDR_DATA[63:0] <9,10>
_DDR_DQS[7:0] <9,10>
Close to MCH
U43A
<11> AGP_AD[31:0]
AGP_AD0 R27 E12 _DDR_AA0 _DDR_DATA3 1 10Ohm 16 RN23A DDR_DATA3 _DDR_DATA39 1 10Ohm 16 RN17A DDR_DATA39
GAD0 SMA0 DDR_AA0 <9>
AGP_AD1 R28 F17 _DDR_AA1 _DDR_DATA6 2 10Ohm 15 RN23B DDR_DATA6 _DDR_DATA34 2 10Ohm 15 RN17B DDR_DATA34
GAD1 SMA1 DDR_AA1 <9>
AGP_AD2 T25 E16 _DDR_AA2 _DDR_DATA7 3 10Ohm 14 RN23C DDR_DATA7 _DDR_DATA35 3 10Ohm 14 RN17C DDR_DATA35
GAD2 SMA2 DDR_AA2 <9>
AGP_AD3 R25 G17 _DDR_AA3 _DDR_DATA2 4 10Ohm 13 RN23D DDR_DATA2 _DDR_DATA37 4 10Ohm 13 RN17D DDR_DATA37
GAD3 SMA3 DDR_AA3 <9>
AGP_AD4 T26 G18 _DDR_AA4 _DDR_DATA4 5 10Ohm 12 RN23E DDR_DATA4 _DDR_DATA36 5 10Ohm 12 RN17E DDR_DATA36
D GAD4 SMA4 DDR_AA4 <9> D
AGP_AD5 T27 E18 _DDR_AA5 _DDR_DATA5 6 10Ohm 11 RN23F DDR_DATA5 _DDR_DATA38 6 10Ohm 11 RN17F DDR_DATA38
GAD5 SMA5 DDR_AA5 <9>
AGP_AD6 U27 F19 _DDR_AA6 _DDR_DATA0 7 10Ohm 10 RN23G DDR_DATA0 _DDR_DATA33 7 10Ohm 10 RN17G DDR_DATA33
GAD6 SMA6 DDR_AA6 <9>
AGP_AD7 U28 G20 _DDR_AA7 _DDR_DATA1 8 10Ohm 9 RN23H DDR_DATA1 _DDR_DATA32 8 10Ohm 9 RN17H DDR_DATA32
GAD7 SMA7 DDR_AA7 <9>
AGP_AD8 V26 G19 _DDR_AA8
GAD8 SMA8 DDR_AA8 <9> _DDR_DQS0 DDR_DQS0 _DDR_DQS4 DDR_DQS4
AGP_AD9 V27 F21 _DDR_AA9 1 10Ohm 2 R178 1 10Ohm 2 R181
GAD9 SMA9 DDR_AA9 <9>
AGP_AD10 T23 F13 _DDR_AA10
GAD10 SMA10 DDR_AA10 <9>
AGP_AD11 U23 E20 _DDR_AA11
GAD11 SMA11 DDR_AA11 <9>
AGP_AD12 T24 G21 _DDR_AA12 _DDR_DATA15 1 10Ohm 16 RN22A DDR_DATA15 _DDR_DATA47 1 10Ohm 16 RN16A DDR_DATA47
GAD12 SMA12 DDR_AA12 <9>
AGP_AD13 U24 G22 _DDR_DATA11 2 10Ohm 15 RN22B DDR_DATA11 _DDR_DATA46 2 10Ohm 15 RN16B DDR_DATA46
AGP_AD14 GAD13 RSVD2 _DDR_DATA10 10Ohm RN22C DDR_DATA10 _DDR_DATA43 10Ohm RN16C DDR_DATA43
U25 GAD14 3 14 3 14
AGP_AD15 V24 G28 DDR_DATA0 _DDR_DATA14 4 10Ohm 13 RN22D DDR_DATA14 _DDR_DATA42 4 10Ohm 13 RN16D DDR_DATA42
AGP_AD16 GAD15 SDQ0 DDR_DATA1 _DDR_DATA9 10Ohm RN22E DDR_DATA9 _DDR_DATA44 10Ohm RN16E DDR_DATA44
Y27 GAD16 SDQ1 F27 5 12 5 12
AGP_AD17 Y26 C28 DDR_DATA2 _DDR_DATA13 6 10Ohm 11 RN22F DDR_DATA13 _DDR_DATA45 6 10Ohm 11 RN16F DDR_DATA45
AGP_AD18 GAD17 SDQ2 DDR_DATA3 _DDR_DATA8 10Ohm RN22G DDR_DATA8 _DDR_DATA41 10Ohm RN16G DDR_DATA41
AA28 GAD18 SDQ3 E28 7 10 7 10
AGP_AD19 AB25 H25 DDR_DATA4 _DDR_DATA12 8 10Ohm 9 RN22H DDR_DATA12 _DDR_DATA40 8 10Ohm 9 RN16H DDR_DATA40
AGP
AGP_AD20 GAD19 SDQ4 DDR_DATA5
AB27 GAD20 SDQ5 G27
AGP_AD21 AA27 F25 DDR_DATA6 _DDR_DQS1 1 10Ohm 2 R175 DDR_DQS1 _DDR_DQS5 1 10Ohm 2 R174 DDR_DQS5
AGP_AD22 GAD21 SDQ6 DDR_DATA7
AB26 GAD22 SDQ7 B28
AGP_AD23 Y23 E27 DDR_DATA8
AGP_AD24 GAD23 SDQ8 DDR_DATA9 _DDR_DATA19 10Ohm RN21A DDR_DATA19 _DDR_DATA55 10Ohm RN15A DDR_DATA55
AB23 GAD24 SDQ9 C27 1 16 1 16
AGP_AD25 AA24 B25 DDR_DATA10 _DDR_DATA23 2 10Ohm 15 RN21B DDR_DATA23 _DDR_DATA50 2 10Ohm 15 RN15B DDR_DATA50
AGP_AD26 GAD25 SDQ10 DDR_DATA11 _DDR_DATA22 10Ohm RN21C DDR_DATA22 _DDR_DATA51 10Ohm RN15C DDR_DATA51
AA25 GAD26 SDQ11 C25 3 14 3 14
AGP_AD27 AB24 B27 DDR_DATA12 _DDR_DATA18 4 10Ohm 13 RN21D DDR_DATA18 _DDR_DATA54 4 10Ohm 13 RN15D DDR_DATA54
AGP_AD28 GAD27 SDQ12 DDR_DATA13 _DDR_DATA17 10Ohm RN21E DDR_DATA17 _DDR_DATA53 10Ohm RN15E DDR_DATA53
AC25 GAD28 SDQ13 D27 5 12 5 12
AGP_AD29 AC24 D26 DDR_DATA14 _DDR_DATA16 6 10Ohm 11 RN21F DDR_DATA16 _DDR_DATA52 6 10Ohm 11 RN15F DDR_DATA52
AGP_AD30 GAD29 SDQ14 DDR_DATA15 _DDR_DATA21 10Ohm RN21G DDR_DATA21 _DDR_DATA48 10Ohm RN15G DDR_DATA48
AC22 GAD30 SDQ15 E25 7 10 7 10
AGP_AD31 AD24 D24 DDR_DATA16 _DDR_DATA20 8 10Ohm 9 RN21H DDR_DATA20 _DDR_DATA49 8 10Ohm 9 RN15H DDR_DATA49
GAD31 SDQ16 DDR_DATA17
<11> AGP_C/BE#[3:0] SDQ17 E23
AGP_C/BE#0 V25 C22 DDR_DATA18 _DDR_DQS2 1 10Ohm 2 R179 DDR_DQS2 _DDR_DQS6 1 10Ohm 2 R173 DDR_DQS6
AGP_C/BE#1 GCBE0# SDQ18 DDR_DATA19
V23 GCBE1# SDQ19 E21
AGP_C/BE#2 Y25 C24 DDR_DATA20 _DDR_DATA31 1 10Ohm 16 RN20A DDR_DATA31 _DDR_DATA61 1 10Ohm 16 RN14A DDR_DATA61
AGP_C/BE#3 GCBE2# SDQ20 DDR_DATA21 _DDR_DATA27 10Ohm RN20B DDR_DATA27 _DDR_DATA63 10Ohm RN14B DDR_DATA63
AA23 GCBE3# SDQ21 B23 2 15 2 15
D22 DDR_DATA22 _DDR_DATA26 3 10Ohm 14 RN20C DDR_DATA26 _DDR_DATA62 3 10Ohm 14 RN14C DDR_DATA62
SDQ22 DDR_DATA23 _DDR_DATA30 10Ohm RN20D DDR_DATA30 _DDR_DATA58 10Ohm RN14D DDR_DATA58
<11> AGP_FRAME# Y24 GFRAME# SDQ23 B21 4 13 4 13
NOTE: W28 C21 DDR_DATA24 _DDR_DATA29 5 10Ohm 12 RN20E DDR_DATA29 _DDR_DATA60 5 10Ohm 12 RN14E DDR_DATA60
<11> AGP_DEVSEL# GDEVSEL# SDQ24
GRCOMP SHUOULD BE W27 D20 DDR_DATA25 _DDR_DATA24 6 10Ohm 11 RN20F DDR_DATA24 _DDR_DATA59 6 10Ohm 11 RN14F DDR_DATA59
<11> AGP_IRDY# GIRDY# SDQ25
10 MILS WIDE LESS W24 C19 DDR_DATA26 _DDR_DATA28 7 10Ohm 10 RN20G DDR_DATA28 _DDR_DATA57 7 10Ohm 10 RN14G DDR_DATA57
<11> AGP_TRDY# GTRDY# SDQ26
C THEN 0.5'' FROM 855PM W23 D18 DDR_DATA27 _DDR_DATA25 8 10Ohm 9 RN20H DDR_DATA25 _DDR_DATA56 8 10Ohm 9 RN14H DDR_DATA56 C
<11> AGP_STOP# GSTOP# SDQ27
W25 C20 DDR_DATA28
<11> AGP_PAR GPAR SDQ28 _DDR_DQS3 DDR_DQS3 _DDR_DQS7 DDR_DQS7
AG24 E19 DDR_DATA29 1 10Ohm 2 R180 1 10Ohm 2 R172
<11> AGP_REQ# GREQ# SDQ29
R49 AH25 C18 DDR_DATA30
<11> AGP_GNT# GGNT# SDQ30
MEOMERY
1 2 <0.5" AGP_RCOMP AD25 E17 DDR_DATA31
36.5Ohm AGP_VREF GRCOMP SDQ31 DDR_DATA32
AA21 AGPREF SDQ32 E13
P22 C12 DDR_DATA33
<22> CLK_MCH66 66IN SDQ33
B11 DDR_DATA34
SDQ34 DDR_DATA35
<11> AGP_AD_STB0 R24 AD_STB0 SDQ35 C10
R23 B13 DDR_DATA36
<11> AGP_AD_STB0# AD_STB0# SDQ36
AC27 C13 DDR_DATA37
<11> AGP_AD_STB1 AD_STB1 SDQ37
R601 USE 36.5 OHM AC28 C11 DDR_DATA38
<11> AGP_AD_STB1# AD_STB1# SDQ38
FOR 55 OHM BOARD D10 DDR_DATA39
<11> AGP_SBA[7:0] SDQ39
AGP_SBA0 AH28 E10 DDR_DATA40
IMPEDANCE AGP AGP_SBA1 AH27
SBA0 SDQ40
C9 DDR_DATA41
ROUTING AGP_SBA2 SBA1 SDQ41 DDR_DATA42
AG28 SBA2 SDQ42 D8
AGP_SBA3 AG27 E8 DDR_DATA43
AGP_SBA4 SBA3 SDQ43 DDR_DATA44
AE28 E11
AGP_SBA5 AE27
SBA4
SBA5
SDQ44
SDQ45 B9 DDR_DATA45 Intel suggested that DDR_VREF should
AGP_SBA6 AE24 B7 DDR_DATA46 +V1.5S
AGP_SBA7 AE25
SBA6
SBA7
SDQ46
SDQ47 C7 DDR_DATA47
DDR_DATA48
be turned off in S3-S5. But measure the
<11> AGP_SB_STB AF27 SB_STB SDQ48 C6
1
<11> AGP_SB_STB# AF26 SB_STB# SDQ49 D6
D4
DDR_DATA49
DDR_DATA50
leakage because there is no +V2.5S. R48
SDQ50 DDR_DATA51 +V5
<11> AGP_RBF# AE22 RBF# SDQ51 B3 1KOhm
AE23 E6 DDR_DATA52 +V2.5
<11> AGP_WBF# WBF# SDQ52
AF22 B5 DDR_DATA53
<11> AGP_ST[2:0]
2
AGP_ST0 PIPE# SDQ53 DDR_DATA54
AG25 ST0 SDQ54 C4
1
AGP_ST1 AF24 E4 DDR_DATA55 C223 AGP_VREF
AGP_ST2 ST1 SDQ55 DDR_DATA56 R171
AG26 ST2 SDQ56 C3
D3 DDR_DATA57 0.1uF/10V
<18> HUB_PD[10:0]
2
HUB_PD0 SDQ57 DDR_DATA58 10KOhm
P25 HI_0 SDQ58 F4
1
HUB_PD1 P24 F3 DDR_DATA59 C91
2
HI_1 SDQ59
5
HUB_PD2 N27 B2 DDR_DATA60 U13 DDR_VREF R52 0.1uF/10V
HUB_PD3 HI_2 SDQ60 DDR_DATA61 V+
P23 C2 1
2
HI_3 SDQ61 +
HUB_PD4 M26 E2 DDR_DATA62 4 1KOhm
HI_4 SDQ62
1
+V1.8S HUB_PD5 M25 G4 DDR_DATA63 3
2
HI_5 SDQ63 -
1
HUB_PD6 L28 C16 C232 R170 V- 1.225V-1.275V
HI_6 SDQ64
1
B B
HUB
2
R334 HUB_PD8 HI_7 SDQ65 0.1uF/10V 10KOhm
M27 B15
2
HUB_PD9 N28
HI_8 SDQ66
C14
50 mA)
2
36.5Ohm HI_9 SDQ67
1
HI_REF DDR_DQS0
SDQS0 F26
J27 C26 DDR_DQS1
<11,18,28,33> PCI_RST# RSTIN# SDQS1
H27 C23 DDR_DQS2
MCH_TEST# RSVD1 SDQS2 DDR_DQS3
H26 TESTIN# SDQS3 B19
D12 DDR_DQS4
SDQS4 DDR_DQS5 +V1.8S_MCH
<9,10> DDR_CKE0 G23 SCKE0 SDQS5 C8
E22 C5 DDR_DQS6
<9,10> DDR_CKE1 SCKE1 SDQS6
H23 E3 DDR_DQS7
<9,10> DDR_CKE2 SCKE2 SDQS7
1
<9,10> DDR_CKE3 F23 SCKE3 SDQS8 E15
MCH--------R619&R620 <=3" R79
MEOMERY
2
SCS0# SRAS# HUB_VREF_MCH
<9,10> DDR_CS1# F7 SCS1#
<9,10> DDR_CS2# F9 SCS2# SCK0 J25 CLK_DDR0 <9>
1
<9,10> DDR_CS3# E7 SCS3# SCK0# K25 CLK_DDR0# <9>
1
R90 G5
SCK1 CLK_DDR1 <9>
1 2 M_RCOMP J28 F5 C139 R80
SMRCOMP SCK1# CLK_DDR1# <9>
G15 G24 150Ohm
CLK_DDR2 <9>
2
30.1Ohm TPC28t T10 MCH_RCVEN RCVENIN# SCK2
1/X G14 E24 CLK_DDR2# <9>
0.01uF/25V
2
RCVENOUT# SCK2#
1
C156
The length of C603 to AD26
SCK3 G25
J24
CLK_DDR3 <9>
NC0 SCK3# CLK_DDR3# <9>
0.1uF/10V
SMRCOMP pin should <1'' AD27 G6 CLK_DDR4 <9>
2
NC1 SCK4
SCK4# G7 CLK_DDR4# <9> Place C605,R619,R620 close to U601.P26 GND
<3,20> H_DPSLP# V8 DPSLP# SCK5 K23 CLK_DDR5 <9>
SCK5# J23 CLK_DDR5# <9>
C603 decouping capacitor J9
SMVREF0 DDR_VREF
A
should be placed near to <3> H_DPWR# Y8 DPWR# SMVREF1 J21
A
SMRCOMP pin MCH_M
Title : NB-MCHM1
ASUSTECH CO.,LTD. Engineer: Benny Liang
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 6 of 57
5 4 3 2 1
5 4 3 2 1
1
CE18 C128 C464 C462 C73 C103 C92 C112 R22 W2 A19 E29
VCC1_5_2 DRDY# H_DRDY# <3> VSS2 VSS73
150U/4.0V R29 Y4 A23 F12
VCC1_5_3 DEFER# H_DEFER# <3> VSS3 VSS74
HOST
0.01UF/10V 0.01UF/10V 0.01UF/10V 0.01UF/10V 0.01UF/10V 0.01UF/10V 0.01UF/10V U22 Y3 A27 F15
H_HITM# <3>
2
2
VCC1_5_4 HITM# VSS4 VSS75
U26 VCC1_5_5 HIT# Y5 H_HIT# <3> A3 VSS5 VSS76 F20
W22 VCC1_5_6 HLOCK# W3 H_LOCK# <3> A7 VSS6 VSS77 F24
W29 VCC1_5_7 BR0 V7 H_BR0# <3> AA1 VSS7 VSS78 F6
AB21 VCC1_5_8 BNR# V3 H_BNR# <3> AA29 VSS8 VSS79 F8
AC29 VCC1_5_9 BPR# Y7 H_BPRI# <3> AA4 VSS9 VSS80 G26
AD21 VCC1_5_10 DBSY# V5 H_DBSY# <3> AA8 VSS10 VSS81 H11
AD23 W7 H_RS#0 AB11 H13
VCC1_5_11 RS0# H_RS#1 VSS11 VSS82
AE26 VCC1_5_12 RS1# W5 AB13 VSS12 VSS83 H15
AF23 W6 H_RS#2 AB15 H17
VCC1_5_13 RS2# +VCCP VSS13 VSS84
AG29 VCC1_5_14 H_RS#[2:0] <3> AB17 VSS14 VSS85 H19
AJ25 VCC1_5_15 VTT0 AB10 AB19 VSS15 VSS86 H21
+V1.2S AB14 AB22 H6
VTT1 VSS16 VSS87
N14 VCC0 VTT2 AB18 AB6 VSS17 VSS88 H9
1
N16 AB20 C148 C59 C90 C114 + AB9 J1
VCC1 VTT3 VSS18 VSS89
1
2
CE16 CE9 C141 C115 C142 C144 C125 C143 VCC3 VTT5 150U/4.0V VSS20 VSS91
P17 AD18 AC20 J29
2
150U/4.0V 150U/4.0V 2.2UF/6.3V 0.01UF/10V 0.01UF/10V 0.22UF/10V 0.022U 0.047UF/10V VCC4 VTT6 VSS21 VSS92
R14 AD20 AC21 J4
2
VSS35 VSS106
VCCSM0 A13 AE20 VSS36 VSS107 N15
VCCSM1 A17 AE29 VSS37 VSS108 N17
A21 +V2.5 AE4 N22
VCCSM2 VSS38 VSS109
VCCSM3 A25 AF11 VSS39 VSS110 N29
VCCSM4 A5 AF13 VSS40 VSS111 N4
1
VCCSM5 A9 + AF15 VSS41 VSS112 N8
1
C1 C174 C224 C215 CE13 AF17 P14
VCCSM6 C169 VSS42 VSS113
VCCSM7 C29 AF19 VSS43 VSS114 P16
D11 1UF/10V 1UF/10V 0.1uF/10V
1UF/10V 150U/4.0V AF21 P6
2
VCCSM8 /EMI /EMI /EMI VSS44 VSS115
VCCSM9 D15 AF25 VSS45 VSS116 R1
VCCSM10 D19 AF5 VSS46 VSS117 R13
VCCSM11 D23 AF7 VSS47 VSS118 R15
VCCSM12 D25 AF9 VSS48 VSS119 R17
VCCSM13 D7 AG1 VSS49 VSS120 R26
1
E5 C172 C177 C163 AG18 R4
VCCSM14 VSS50 VSS121
VCCSM15 F10 AG20 VSS51 VSS122 R8
F14 0.1uF/10V 0.1uF/10V 0.1uF/10V AG22 T14
2
VCCSM16 VSS52 VSS123
VCCSM17 F16 AH19 VSS53 VSS124 T16
VCCSM18 F18 AH21 VSS54 VSS125 T22
VCCSM19 F22 AH23 VSS55 VSS126 T6
B VCCSM20 G1 AJ11 VSS56 VSS127 U1 B
VCCSM21 G29 AJ13 VSS57 VSS128 U13
VCCSM22 H10 AJ15 VSS58 VSS129 U15
1
H12 C179 C158 C178 C164 AJ17 U17
VCCSM23 VSS59 VSS130
VCCSM24 H14 AJ27 VSS60 VSS131 U29
G16 H16 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V AJ3 U4
2
2
RSVD3 VCCSM25 VSS61 VSS132
G10 RSVD4 VCCSM26 H18 AJ5 VSS62 VSS133 U8
G9 RSVD5 VCCSM27 H20 AJ7 VSS63 VSS134 V22
H7 RSVD6 VCCSM28 H22 AJ9 VSS64 VSS135 V6
H4 ETS# VCCSM29 H24 D13 VSS65 VSS136 W1
H3 RSVD7 VCCSM30 H5 D17 VSS66 VSS137 W26
1
1
G3 H8 C180 C157 C154 C161 C153 D21 W4
+V1.8S RSVD8 VCCSM31 VSS67 VSS138
G2 RSVD9 VCCSM32 J6 D5 VSS68 VSS139 W8
K22 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V D9 Y22
2
2
VCCSM33 VSS69 VSS140
T17 VCCGA VCCSM34 K24 E1 VSS70 VSS141 Y6
T13 VCCHA VCCSM35 K26
VCCSM36 K7 MCH_M
VCCSM37 L23
MCH_M
1
A A
Title : NB-MCHM2
ASUSTECH CO.,LTD. Engineer: Benny Liang
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 7 of 57
5 4 3 2 1
5 4 3 2 1
D D
U43C
<3> H_A#[31:3] H_D#[63:0] <3>
H_A#3 U6 AA2 H_D#0
H_A#4 HA3# HD0# H_D#1
T5 HA4# HD1# AB5
H_A#5 R2 AA5 H_D#2
H_A#6 HA5# HD2# H_D#3
U3 HA6# HD3# AB3
H_A#7 R3 AB4 H_D#4
H_A#8 HA7# HD4# H_D#5
P7 HA8# HD5# AC5
H_A#9 T3 AA3 H_D#6
H_A#10 HA9# HD6# H_D#7
P4 HA10# HD7# AA6
H_A#11 P3 AE3 H_D#8
H_A#12 HA11# HD8# H_D#9
P5 HA12# HD9# AB7
H_A#13 R6 AE5 H_D#10
H_A#14 HA13# HD10# H_D#11
N2 HA14# HD11# AF3
H_A#15 N5 AC6 H_D#12
H_A#16 HA15# HD12# H_D#13
N3 HA16# HD13# AC3
H_A#17 J3 AF4 H_D#14
H_A#18 HA17# HD14# H_D#15
M3 HA18# HD15# AE2
H_A#19 M4 AG4 H_D#16
H_A#20 HA19# HD16# H_D#17
M5 HA20# HD17# AG2
H_A#21 L5 AE7 H_D#18
H_A#22 HA21# HD18# H_D#19
K3 HA22# HD19# AE8
H_A#23 J2 AH2 H_D#20
H_A#24 HA23# HD20# H_D#21
N6 HA24# HD21# AC7
H_A#25 L6 AG3 H_D#22
H_A#26 HA25# HD22# H_D#23
L2 HA26# HD23# AD7
H_A#27 K5 AH7 H_D#24
HA27# HD24#
HOST
H_A#28 L3 AE6 H_D#25
H_A#29 HA28# HD25# H_D#26
L7 HA29# HD26# AC8
H_A#30 K4 AG8 H_D#27
H_A#31 HA30# HD27# H_D#28
J5 HA31# HD28# AG7
AH3 H_D#29
<3> H_REQ#[4:0] HD29#
H_REQ#0 U2 AF8 H_D#30
H_REQ#1 HREQ0# HD30# H_D#31
T7 HREQ1# HD31# AH5
C H_REQ#2 R7 AC11 H_D#32 C
H_REQ#3 HREQ2# HD32# H_D#33
U5 HREQ3# HD33# AC12
H_REQ#4 T4 AE9 H_D#34
HREQ4# HD34# H_D#35
<3> H_ADSTB#0 R5 HADSTB0# HD35# AC10
N7 AE10 H_D#36
<3> H_ADSTB#1 HADSTB1# HD36#
AD9 H_D#37
HD37# H_D#38
<22> CLK_MCH100# K8 BCLK# HD38# AG9
R68 27.4Ohm H_D#39
<22> CLK_MCH100 J8 BCLK HD39# AC9
2 1 MCH_HRCOMP1 MCH_HRCOMP1 AC13 AE12 H_D#40
MCH_HSWNG1 HRCOMP1 HD40# H_D#41
AD13 HSWNG1 HD41# AF10
R315 27.4Ohm MCH_HRCOMP0 AC2 AG11 H_D#42
MCH_HRCOMP0 MCH_HSWNG0 HRCOMP0 HD42# H_D#43
2 1 AA7 HSWNG0 HD43# AG10
AH11 H_D#44
HD44# H_D#45
<3> H_DSTBN#0 AD4 HDSTBN0# HD45# AG12
AF6 AE13 H_D#46
<3> H_DSTBN#1 HDSTBN1# HD46#
AD11 AF12 H_D#47
<3> H_DSTBN#2 HDSTBN2# HD47#
AC15 AG13 H_D#48
<3> H_DSTBN#3 HDSTBN3# HD48#
AD3 AH13 H_D#49
<3> H_DSTBP#0 HDSTBP0# HD49#
AG6 AC14 H_D#50
<3> H_DSTBP#1 HDSTBP1# HD50#
AE11 AF14 H_D#51
<3> H_DSTBP#2 HDSTBP2# HD51#
AC16 AG14 H_D#52
<3> H_DSTBP#3 HDSTBP3# HD52#
AD5 AE14 H_D#53
<3> H_DINV0# DBI0# HD53#
AG5 AG15 H_D#54
<3> H_DINV1# DBI1# HD54#
AH9 AG16 H_D#55
<3> H_DINV2# DBI2# HD55#
AD15 AG17 H_D#56
<3> H_DINV3# DBI3# HD56#
AH15 H_D#57
HD57# H_D#58
<3> H_CPURST# AE17 CPURST# HD58# AC17
AF16 H_D#59
MCH_GTLREF HD59# H_D#60
LAYOUT NOTE: M7 HVREF0 HD60# AE15
H_CPURST# FORKS P8 AH17 H_D#61
HVREF1 HD61# H_D#62
AT 855PM PIN AA9 HVREF2 HD62# AD17
AB12 AE16 H_D#63
HVREF3 HD63#
AB16 HVREF4
MCH_M
B B
C95
1
R61 C93
0.01UF/10V R64
C802 should be placed closer to de HSWNG1 than R806 and R808
2
301Ohm 0.01UF/10V
2
MCH_HSWNG0 301Ohm
2
MCH_HSWNG1
2
1
R57
150Ohm R63
150Ohm
2
+VCCP
1
R71
49.9Ohm
MCH_GTLREF
2 2
R62
100Ohm C102 C83 C127 Place R809 close to HVREF4 and R810 close to
0.22UF/10V 0.22UF/10V 1UF/10V HVREF1
2
2
1
A A
Title : NB-MCHM3
ASUSTECH CO.,LTD. Engineer: Benny Liang
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 8 of 57
5 4 3 2 1
5 4 3 2 1
<6,10> _DDR_DATA[63:0]
D D
1
C557 0.1uF/10V
+ +
1
1 2 CE21 CE19 1 2 C275 C240
VREF0 VREF1
3 VSS0 VSS1 4
_DDR_DATA0 _DDR_DATA4 150U/4.0V 150U/4.0V C531 0.1uF/10V 0.1uF/10V 0.1uF/10V
5 6
2
_DDR_DATA1 DQ0 DQ4 _DDR_DATA5
7 DQ1 DQ5 8 1 2
9 VDD0 VDD1 10
C530 0.1uF/10V
<6,10> _DDR_DQS0 11 DQS0 DM0 12
_DDR_DATA2 13 14 _DDR_DATA6 1 2
DQ2 DQ6 +V5s
15 VSS2 VSS3 16
_DDR_DATA3 17 18 _DDR_DATA7
_DDR_DATA8 DQ3 DQ7 _DDR_DATA12 C554 0.1uF/10V
19 DQ8 DQ12 20
21 22 1 2 +V2.5
_DDR_DATA9 VDD2 VDD3 _DDR_DATA13 +V2.5
23 DQ9 DQ13 24
<6,10> _DDR_DQS1 25 DQS1 DM1 26
C553 0.1uF/10V
27 VSS4 VSS5 28
1
_DDR_DATA10 29 30 _DDR_DATA14 1 2 C291
DQ10 DQ14
1
_DDR_DATA11 31 32 _DDR_DATA15 + +
DQ11 DQ15 CE22 CE20 C552 0.1uF/10V 0.1uF/10V
33 34
2
VDD4 VDD5
<6> CLK_DDR0 35A A: CK0 VDD6 36 1 2
37A 38 150U/4.0V 150U/4.0V
<6> CLK_DDR0#
2
A: CK0# VSS6 C555 0.1uF/10V
39 VSS7 VSS8 40
_DDR_DATA16 41 42 _DDR_DATA20 1 2
_DDR_DATA17 DQ16 DQ20 _DDR_DATA21 +V1.5s
43 DQ17 DQ21 44
C556 0.1uF/10V
C 45 VDD7 VDD8 46 C
<6,10> _DDR_DQS2 47 DQS2 DM2 48 1 2
_DDR_DATA18 49 50 _DDR_DATA22
DQ18 DQ22 C529 0.1uF/10V
51 VSS9 VSS10 52
_DDR_DATA19 53 54 _DDR_DATA23 1 2
_DDR_DATA24 DQ19 DQ23 _DDR_DATA28
55 DQ24 DQ28 56
C532 0.1uF/10V
57 VDD9 VDD10 58
_DDR_DATA25 59 60 _DDR_DATA29 1 2
DQ25 DQ29 DDR_VREF
<6,10> _DDR_DQS3 61 DQS3 DM3 62
C535 0.1uF/10V
63 VSS11 VSS12 64
_DDR_DATA26 65 66 _DDR_DATA30 1 2
DQ26 DQ30
1
_DDR_DATA27 67 68 _DDR_DATA31 C560
DQ27 DQ31 C559 0.1uF/10V
69 VDD11 VDD12 70
0.1uF/10V 1 2
<10> _DDR_AA[12:0]
2
<10> _DDR_BS0# C536 0.1uF/10V
<10> _DDR_WE#
<10> _DDR_BS1# 1 2
<10> _DDR_RAS# GND
C534 0.1uF/10V
<10> _DDR_CAS#
1 2
85 DU_0 DU/RESET# 86
C533 0.1uF/10V
87 VSS13 VSS14 88
<6> CLK_DDR2 89A A: CK2 VSS15 90 1 2
<6> CLK_DDR2# 91A A: CK2# VDD13 92
C558 0.1uF/10V
93 VDD14 VDD15 94
<6,10> DDR_CKE1 95A A: CKE1 A: CKE0 96 DDR_CKE0 <6,10> 1 2
97 DU/A13 DU/BA2 98
1 10Ohm 16 RN19A _DDR_AA12 99 100 _DDR_AA11 3 10Ohm 14 RN18C C263
<6> DDR_AA12 A12 A11 DDR_AA11 <6>
2 10Ohm 15 RN19B _DDR_AA9 101 102 _DDR_AA8 6 10Ohm 11 RN18F 1 2
<6> DDR_AA9 A9 A8 DDR_AA8 <6>
103 VSS16 VSS17 104
3 10Ohm 14 RN19C _DDR_AA7 105 106 _DDR_AA6 7 10Ohm 10 RN18G
<6> DDR_AA7 A7 A6 DDR_AA6 <6>
4 10Ohm 13 RN19D _DDR_AA5 107 108 _DDR_AA4 4 10Ohm 13 RN18D 1UF/10V
<6> DDR_AA5 A5 A4 DDR_AA4 <6>
5 10Ohm 12 RN19E _DDR_AA3 109 110 _DDR_AA2 5 10Ohm 12 RN18E /EMI
<6> DDR_AA3 A3 A2 DDR_AA2 <6>
<6> DDR_AA1 6 10Ohm 11 RN19F _DDR_AA1 111
113
A1 A0 112
114
_DDR_AA0 2 10Ohm 15 RN18B
DDR_AA0 <6> Rn901 and R901 should be placed close to MCH
10Ohm _DDR_AA10 VDD16 VDD17 _DDR_BS1#
<6> DDR_AA10 7 10 RN19G 115 A10/AP BA1 116 8 10Ohm 9 RN18H DDR_BS1# <6>
8 10Ohm 9 RN19H _DDR_BS0# 117 118 _DDR_RAS# 1 10Ohm 16 RN18A
<6> DDR_BS0# BA0 RAS# DDR_RAS# <6>
R1771 2 10Ohm _DDR_WE# 119 120 _DDR_CAS# R1761 2 10Ohm
B <6> DDR_WE# WE# CAS# DDR_CAS# <6> B
<6,10> DDR_CS0# 121A A: S0# A: S1# 122 DDR_CS1# <6,10>
123 DU_1 DU_3 124
Rn902 and R902 should be placed close to MCH _DDR_DATA32
125
127
VSS18 VSS19 126
128 _DDR_DATA36
_DDR_DATA33 DQ32 DQ36 _DDR_DATA37
129 DQ33 DQ37 130
131 VDD18 VDD19 132
<6,10> _DDR_DQS4 133 DQS4 DM4 134
_DDR_DATA34 135 136 _DDR_DATA38
DQ34 DQ38
137 VSS20 VSS21 138
_DDR_DATA35 139 140 _DDR_DATA39
_DDR_DATA40 DQ35 DQ39 _DDR_DATA44
141 DQ40 DQ44 142
143 VDD20 VDD21 144
_DDR_DATA41 145 146 _DDR_DATA45
DQ41 DQ45
<6,10> _DDR_DQS5 147 DQS5 DM5 148
149 VSS22 VSS23 150
_DDR_DATA42 151 152 _DDR_DATA46 JP29B
_DDR_DATA43 DQ42 DQ46 _DDR_DATA47
153 DQ43 DQ47 154
155 VDD22 VDD23 156 <6> CLK_DDR3 35 B: CK0 B: CKE0 96B DDR_CKE2 <6,10>
157 VDD24 A: CK1# 158 CLK_DDR1# <6> <6> CLK_DDR3# 37 B: CK0# B: S1# 122B DDR_CS3# <6,10>
159 VSS24 A: CK1 160 CLK_DDR1 <6> <6> CLK_DDR5 89 B: CK2 B: CK1# 158B CLK_DDR4# <6>
161 VSS25 VSS26 162 <6> CLK_DDR5# 91 B: CK2# B: CK1 160B CLK_DDR4 <6>
_DDR_DATA48 163 164 _DDR_DATA52 95 194B1 2
DQ48 DQ52 <6,10> DDR_CKE3 B: CKE1 B: SA0 +V3.3S
_DDR_DATA49 165 166 _DDR_DATA53 121 196B R196 10KOhm
DQ49 DQ53 <6,10> DDR_CS2# B: S0# B: SA1
167 VDD25 VDD26 168 B: SA2 198B
<6,10> _DDR_DQS6 169 DQS6 DM6 170
_DDR_DATA50 171 172 _DDR_DATA54
DQ50 DQ54
173 VSS27 VSS28 174 201 NC0 NP_NC7 208
_DDR_DATA51 175 176 _DDR_DATA55 202 207
_DDR_DATA56 DQ51 DQ55 _DDR_DATA60 NC1 NP_NC6
177 DQ56 DQ60 178 203 NC2 NP_NC5 206
179 VDD27 VDD28 180 204 NC3 NP_NC4 205 GND
_DDR_DATA57 181 182 _DDR_DATA61
DQ57 DQ61
<6,10> _DDR_DQS7 183 DQS7 DM7 184
185 VSS29 VSS30 186
_DDR_DATA58 187 188 _DDR_DATA62
_DDR_DATA59 DQ58 DQ62 _DDR_DATA63
189 DQ59 DQ63 190 GND
191 VDD29 VDD30 192
<5,19,22> SDA_3S 193 SDA A: SA0 194
A
<5,19,22> SCL_3S 195 SCL A: SA1 196 A
+V3.3S 197 VDDSPD A: SA2 198
199 VDDID DU_2 200
1
C550
0.1uF/10V
2
GND GND
GND
Title : DUAL_DDR
ASUSTECH CO.,LTD. Engineer: Benny Liang
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 9 of 57
5 4 3 2 1
5 4 3 2 1
_DDR_DATA2
_DDR_DQS0
1
2
56Ohm 16
15
RN64A
RN64B FOR +V1.25S DECOUPLING All decoupling capacitances should Be
56Ohm
_DDR_DATA6
_DDR_DATA7
3
4
56Ohm 14
13
RN64C
RN64D
placed near to the associated pins.
56Ohm
_DDR_DATA4 5 12 RN64E Place one cap between every 2 pullup resistors to +V1.25S
56Ohm
_DDR_DATA5 6 11 RN64F
56Ohm
_DDR_DATA1 7 10 RN64G
56Ohm
_DDR_DATA0 8 9 RN64H +V1.25S
56Ohm
_DDR_DATA17 1 16 RN62A
56Ohm
_DDR_DATA16 2 15 RN62B
56Ohm
_DDR_DATA23 3 14 RN62C
56Ohm
_DDR_DATA22 4 13 RN62D
56Ohm
_DDR_DATA21 5 12 RN62E _DDR_DATA24 1 16 RN61A
56Ohm 56Ohm
1
_DDR_DATA20 6 11 RN62F _DDR_DATA19 2 15 RN61B C578 C579 C582 C584 C586 C587 C591 C590 C594 C595 C265 C575 C266 C268
56Ohm 56Ohm
_DDR_DATA11 7 10 RN62G _DDR_DATA18 3 14 RN61C 0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V
56Ohm 56Ohm
_DDR_DATA10 8 9 RN62H _DDR_DQS2 4 13 RN61D
56Ohm 56Ohm
2
_DDR_DQS1 1 16 RN63A _DDR_DATA30 5 12 RN61E
56Ohm 56Ohm
_DDR_DATA9 2 15 RN63B _DDR_DATA31 6 11 RN61F
56Ohm 56Ohm
_DDR_DATA15 3 14 RN63C _DDR_DATA28 7 10 RN61G
56Ohm 56Ohm
_DDR_DATA13 4 13 RN63D _DDR_DATA29 8 9 RN61H
56Ohm 56Ohm
_DDR_DATA14 5 12 RN63E
56Ohm
_DDR_DATA12 6 11 RN63F
56Ohm
_DDR_DATA8 7 10 RN63G
56Ohm
_DDR_DATA3 8 9 RN63H
56Ohm
_DDR_DQS5 1 16 RN56A _DDR_AA12 1 16 RN60A +V1.25S
56Ohm 56Ohm
_DDR_DATA41 2 15 RN56B _DDR_CAS# 2 15 RN60B
56Ohm <9> _DDR_CAS# 56Ohm
_DDR_DATA40 3 14 RN56C _DDR_RAS# 3 14 RN60C
56Ohm <9> _DDR_RAS# 56Ohm
C _DDR_DATA35 4 13 RN56D _DDR_AA4 4 13 RN60D C
56Ohm 56Ohm
_DDR_DATA38 6 11 RN56F _DDR_AA0 5 12 RN60E
56Ohm 56Ohm
_DDR_DATA39 5 12 RN56E _DDR_AA2 6 11 RN60F
56Ohm 56Ohm
1
_DDR_DATA37 8 9 RN56H _DDR_AA11 7 10 RN60G C576 C577 C580 C581 C583 C585 C588 C589 C593 C592 C597 C596 C267 C264
56Ohm 56Ohm
_DDR_DATA36 7 10 RN56G _DDR_BS1# 8 9 RN60H 0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V0.1uF/10V
56Ohm <9> _DDR_BS1# 56Ohm
_DDR_DATA49 1 16 RN55A
56Ohm
2
_DDR_DATA48 2 15 RN55B
56Ohm
_DDR_DATA46 4 13 RN55D
56Ohm
_DDR_DATA47 3 14 RN55C
56Ohm
_DDR_DATA44 6 11 RN55F DDR_CS2# 1 2 RN58A
56Ohm <6,9> DDR_CS2# 56Ohm
_DDR_DATA45 5 12 RN55E DDR_CS0# 3 4 RN58B
56Ohm <6,9> DDR_CS0# 56Ohm
_DDR_DATA43 7 10 RN55G DDR_CS3# 5 6 RN58C
56Ohm <6,9> DDR_CS3# 56Ohm
_DDR_DATA42 8 9 RN55H DDR_CS1# 7 8 RN58D
56Ohm <6,9> DDR_CS1# 56Ohm
_DDR_DATA56 1 16 RN54A
56Ohm
_DDR_DATA51 2 15 RN54B
56Ohm
_DDR_DATA50 3 14 RN54C +V1.25S
56Ohm
_DDR_DATA54 5 12 RN54E
56Ohm
_DDR_DATA55 4 13 RN54D DDR_CKE3 1 2 RN66A
56Ohm <6,9> DDR_CKE3 56Ohm
_DDR_DATA52 6 11 RN54F DDR_CKE0 3 4 RN66B
56Ohm <6,9> DDR_CKE0 56Ohm
_DDR_DATA53 7 10 RN54G DDR_CKE2 5 6 RN66C 1 2 CN13A
56Ohm <6,9> DDR_CKE2 56Ohm 0.1U
_DDR_DQS6 8 9 RN54H DDR_CKE1 7 8 RN66D 3 4 CN13B
56Ohm <6,9> DDR_CKE1 56Ohm 0.1U
_DDR_DATA62 1 16 RN53A 5 6 CN13C These chip capacitors should be
56Ohm 0.1U
_DDR_DATA63 2 15 RN53B 7 8 CN13D
_DDR_DATA60 4
56Ohm
13 RN53D
0.1U placed equationally near the
56Ohm termination resistors
_DDR_DATA61 3 14 RN53C _DDR_DATA27 1 RN67A CN15A
56Ohm 56Ohm 2 1 0.1U 2
_DDR_DATA59 5 12 RN53E _DDR_DATA26 3 RN67B CN15B
56Ohm 56Ohm 4 3 0.1U 4
_DDR_DATA58 6 11 RN53F _DDR_DQS3 5 RN67C CN15C
56Ohm 56Ohm 6 5 0.1U 6
_DDR_DQS7 7 10 RN53G _DDR_DATA25 7 RN67D CN15D
56Ohm 56Ohm 8 7 0.1U 8
_DDR_DATA57 8 9 RN53H
56Ohm
1 2 CN11A
0.1U
3 4 CN11B
0.1U
_DDR_DATA34 1 2 RN57A 5 6 CN11C
56Ohm 0.1U
_DDR_DQS4 3 4 RN57B 7 8 CN11D
56Ohm 0.1U
_DDR_DATA33 5 6 RN57C
56Ohm
_DDR_DATA32 7 8 RN57D 1 2 CN8A
56Ohm 0.1U
3 4 CN8B
0.1U
5 6 CN8C
0.1U
_DDR_AA6 1 RN65A CN8D
B 56Ohm 2 7 0.1U 8 B
_DDR_AA8 3 RN65B
<9> _DDR_AA[12:0] 56Ohm 4
1 2 CN12A
0.1U
3 4 CN12B
0.1U
_DDR_WE# 1 16 RN59A 5 6 CN12C
<6,9> _DDR_DATA[63:0] <9> _DDR_WE# 56Ohm 0.1U
_DDR_BS0# 2 15 RN59B 7 8 CN12D
<9> _DDR_BS0# 56Ohm 0.1U
_DDR_AA10 3 14 RN59C
56Ohm
_DDR_AA1 4 13 RN59D 1 2 CN14A
<6,9> _DDR_DQS[7:0] 56Ohm 0.1U
_DDR_AA3 5 12 RN59E 3 4 CN14B
56Ohm 0.1U
_DDR_AA5 6 11 RN59F 5 6 CN14C
56Ohm 0.1U
_DDR_AA7 7 10 RN59G 7 8 CN14D
56Ohm 0.1U
_DDR_AA9 8 9 RN59H
56Ohm
1 2 CN10A
0.1U
3 4 CN10B
0.1U
5 6 CN10C
0.1U
7 8 CN10D
0.1U
1 2 CN9A
0.1U
3 4 CN9B
0.1U
5 6 CN9C
0.1U
7 8 CN9D
0.1U
GND
A A
Title : DDR_TERMINATION
ASUSTECH CO.,LTD. Engineer: Benny Liang
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 10 of 57
5 4 3 2 1
5 4 3 2 1
+V3.3_VGA
U40A /M11-P
<6> AGP_AD[31..0]
10KOhm /M11-P M11-P: Pull-up to [1,1]
AGP_AD0 H29 AJ5 AGPFBSKEW0 R339 1 2 M11-P Strap-pin
AGP_AD1 AD0 Part 1 of 7 GPIO0 AGPFBSKEW1 R335
M9+X: not stuff [0,0]
H28 AD1 GPIO1 AH5 1 2
AGP_AD2 J29 AJ4 GPU_GPIO2 10KOhm /M11-P1 T16 TPC28t
AGP BUS signals is pulled-up by 855PM internal AGP_AD3 J28
AD2 GPIO2
AK4 GPU_GPIO3 1 T17 TPC28t GPIO[1:0] = 11 (iPD) ; refclk 2 taps earlier than feedback clk (recommended)
AGP_AD4 AD3 GPIO3 GPU_GPIO4 T14 TPC28t GPIO[3:2] = 00 (iPD) ; 0 tap delay between x1clk and x2clk (recommended)
K29 AD4 GPIO4 AH4 1
AGP_AD5 K28 AF4 GPU_GPIO5 1 T8 TPC28t GPIO[6:4] = 000 (iPD) ; AGP8X_DETb = 1, AGP4X, 1.5V, AD16
AGP_AD6 AD5 GPIO5 GPU_GPIO6 T20 TPC28t
L29 AD6 GPIO6 AJ3 1 GPIO[8] = 0 (iPD) ; ID Enable
AGP_AD7 L28 AK3 GPU_GPIO7 1 T18 TPC28t
+V1.5S AGP_AD8 N28
AD7 GPIO7
AH3 GPU_GPIO8 1 T24 TPC28t GPIO[13:11,9] = 0000 (iPD) ; No ROM, CHG_ID=0 (default setting)
AGP_AD9 AD8 GPIO8 GPU_GPIO9 T22 TPC28t ZV_LCDDATA[17:16] = 00 (ASIC defalt) ; single function device
P29 AJ2 1
D 1
R31
2 V_AGPTEST
AGP_AD10
AGP_AD11
P28
R29
AD9
AD10
GPIO9
GPIO10 AH2
AH1 GPU_GPIO11 1 T23 TPC28t
ZV_LCDDATA[20] = 1 (iPD) ; No slave VIP host port device D
AD11 GPIO11
AD26 ZV_LCDDATA6
PCI / AGP
AGP_AD27 Y26 AJ8
AGP_AD28 AD27 ZV_LCDDATA7
Y25 AD28 ZV_LCDDATA8 AH9
AGP_AD29 AA26 AJ9
GND GND AGP_AD30 AD29 ZV_LCDDATA9
AA25 AD30 ZV_LCDDATA10 AK9
AGP_AD31 AA27 AH10
<6> AGP_C/BE#[3..0] AD31 ZV_LCDDATA11
AE6 ZV_LCDDATA12 1 T6 TPC28t
AGP_C/BE#0 ZV_LCDDATA12 ZV_LCDDATA13 T9 TPC28t
N29 C/BE#0 ZV_LCDDATA13 AG6 1
AGP_C/BE#1 U28 AF6 ZV_LCDDATA14 1 T5 TPC28t
AGP_C/BE#2 C/BE#1 ZV_LCDDATA14 ZV_LCDDATA15 T4 TPC28t
P26 C/BE#2 ZV_LCDDATA15 AE7 1
AGP_C/BE#3 U26 AF7 AGP_MULTIFUNC0 R344 1 2 10KOhm
C/BE#3 ZV_LCDDATA16 AGP_MULTIFUNC1 R342
ZV_LCDDATA17 AE8 1 2 10KOhm
AG30 AG8 +V3.3_VGA
<22> CLK_AGP66 PCICLK ZV_LCDDATA18
AG28 AF8 R77 10KOhm GND
<6,18,28,33> PCI_RST# RST# ZV_LCDDATA19
AF28 AE9 VIP_HAD0_DEVICE 1 2
<6> AGP_REQ# REQ# ZV_LCDDATA20
<6> AGP_GNT# AD26 GNT# ZV_LCDDATA21 AF9 PANEL_ID0 <16> LCD PID2 PID1 PID0
M25 AG10 +V3.3_VGA 14.1 XGA 1 1 1
<6> AGP_PAR PAR ZV_LCDDATA22 PANEL_ID1 <16>
<6> AGP_STOP# N26 STOP# ZV_LCDDATA23 AF10 PANEL_ID2 <16> 15.0 XGA 1 0 1
<6> AGP_DEVSEL# V29 DEVSEL#
2
R518 1 10Ohm 2R_TRDY# V28 AJ10 ZV_VSYNC 7 RN49D 15.0 SXGA+ 0 1 1
<6> AGP_TRDY# TRDY# ZV_LCDCNTL0 10KOhm 8
R519 1 10Ohm 2R_IRDY# W29 AK10 ZV_HREF 5 RN49C R353
<6> AGP_IRDY# IRDY# ZV_LCDCNTL1 10KOhm 6
R520 1 10Ohm 2R_FRAME# W28 AJ11 VIP_INT 3 RN49B
10KOhm 4 4.7KOhm
C <6> AGP_FRAME#
<19,26> PCI_INTA# AE26
FRAME#
INTA#
ZV_LCDCNTL2
ZV_LCDCNTL3 AH11 ZV_PCLK 1 10KOhm 2
RN49A /M11-P C
1
AC26 AG4 GPIO_VREF
<6> AGP_WBF# WBF# (NC)VREFG
2
<6> AGP_RBF# AE29 RBF#
1
R395 1 0Ohm 2 R_AD_STB0
M28 AK16 C483 R352
<6> AGP_AD_STB0 AD_STBF_0 TXOUT_L0N LVDS_L0N <16>
R515 1 0Ohm R_AD_STB1 C482
AGP2X
<6> AGP_AD_STB1 2 V25 AD_STBF_1 TXOUT_L0P AH16 LVDS_L0P <16> 4.7KOhm
R522 1 0Ohm 2 R_SB_STB
AB29 AH17 0.001uF/50V 0.1uF/10V /M11-P
<6> AGP_SB_STB LVDS_L1N <16>
2
SB_STBF TXOUT_L1N /M11-P /M11-P
<6> AGP_SBA[7..0] AJ16 LVDS_L1P <16>
1
AGP_SBA0 TXOUT_L1P
AD28 SBA0 TXOUT_L2N AH18 LVDS_L2N <16>
AGP_SBA1 AD29 AJ17
SBA1 TXOUT_L2P LVDS_L2P <16>
AGP_SBA2 AC28 AK19
AGP_SBA3 SBA2 TXOUT_L3N GND
AC29 SBA3 TXOUT_L3P AH19 GND GND
AGP_SBA4 AA28 AK18
SBA4 TXCLK_LN LVDS_CLK_LN <16>
AGP_SBA5 AA29 AJ18
LVDS
SBA5 TXCLK_LP LVDS_CLK_LP <16>
AGP_SBA6 Y28 AG16
SBA6 TXOUT_U0N LVDS_U0N <16>
AGP_SBA7 Y29 AF16 M11-P: need GPIO_VREF
SBA7 TXOUT_U0P LVDS_U0P <16>
TXOUT_U1N AG17 LVDS_U1N <16> M9+X: not stuff
<6> AGP_ST0 AF29 ST0 TXOUT_U1P AF17 LVDS_U1P <16>
<6> AGP_ST1 AD27 ST1 TXOUT_U2N AF18 LVDS_U2N <16> Place C483 & C482
<6> AGP_ST2 AE28 ST2 TXOUT_U2P AE18 LVDS_U2P <16> close to VGA
TXOUT_U3N AH20
<6> AGP_SB_STB#
R521 1 0Ohm 2R_SB_STB#AB28 SB_STBS TXOUT_U3P AG20
<6> AGP_AD_STB0#
R516 1 0Ohm 2R_AD_STB0#M29 ADSTBS_0 TXCLK_UN AF19 LVDS_CLK_UN <16>
<6> AGP_AD_STB1#
R517 1 0Ohm 2R_AD_STB1# V26 ADSTBS_1 TXCLK_UP AG19 LVDS_CLK_UP <16>
V_AGPREF
4X
M26 AGPREF DIGON AE12 LVDS_VDD_EN <16>
+V1.5S V_AGPTEST M27 AG12
+V3.3_VGA AGPTEST BLON LVDS_BLCTRL <16>
AGP
10PF GND
C38 AG26 AF11
<20> PM_SUS_STAT# SUS_STAT# DPLUS VGA_THEM_DP <5>
10PF AH30 AE11
MAN
THERM
STP_AGP# DMINUS
<20> AGP_BUSY# AH29 AGP_BUSY#
PWR
1 2 RSTB_MSK AG29
R361 1KOhm RSTB_MSK(NC)
GND
GND
U3 +V3.3_VGA
XIN 1 8 XOUT L20
XIN XOUT MCLK_VDD
2 VSS VDD 7 1 2
SRS 3 6
MCLK_SSIN SRS PD# XTAL_IN 120Ohm/100Mhz
1 2 4 ModOUT REF 5 1 2
1
/MCLK
1
D D
MEMORY INTERFACE B
GPU_DQA21 DQA20 DQMA#4 GPU_DQMA#5 GPU_DQB21 DQB20 DQMB#4 GPU_DQMB#5
F23 DQA21 DQMA#5 C15 K4 DQB21 DQMB#5 W2
GPU_DQA22 E23 C11 GPU_DQMA#6 GPU_DQB22 L6 AC6 GPU_DQMB#6
GPU_DQA23 DQA22 DQMA#6 GPU_DQMA#7 GPU_DQB23 DQB22 DQMB#6 GPU_DQMB#7
D22 DQA23 DQMA#7 E11 GPU_QSA[7..0] <14> L5 DQB23 DQMB#7 AD2 GPU_QSB[7..0] <14>
GPU_DQA24 B29 GPU_DQB24 G2
GPU_DQA25 DQA24 GPU_QSA0 GPU_DQB25 DQB24 GPU_QSB0
C29 DQA25 QSA0 J27 F3 DQB25 QSB0 F6
GPU_DQA26 C25 F30 GPU_QSA1 GPU_DQB26 H2 B3 GPU_QSB1
GPU_DQA27 DQA26 QSA1 GPU_QSA2 GPU_DQB27 DQB26 QSB1 GPU_QSB2
C27 DQA27 QSA2 F24 E2 DQB27 QSB2 K6
GPU_DQA28 B28 B27 GPU_QSA3 GPU_DQB28 F2 G1 GPU_QSB3
MEMORY INTERFACE A
2
GPU_DQA50 C12 C18 GPU_DQB50 AB6 T3
DQA50 CLKA1 GPU_CLKA1 <14> DQB50 CLKB1# GPU_CLKB1# <14>
GPU_DQA51 B12 A18 R323 GPU_DQB51 AB5
B DQA51 CLKA1# GPU_CLKA1# <14> DQB51 B
GPU_DQA52 C10 4.7KOhm GPU_DQB52 AD6
GPU_DQA53 DQA52 GPU_DQB53 DQB52
C9 DQA53 AD5 DQB53 DIMB_0 E3
GPU_DQA54 B9 GPU_DQB54 AE5 AA3
1
GPU_DQA55 DQA54 MVREFD GPU_DQB55 DQB54 DIMB_1 +V1.8S
B10 DQA55 MVREFD B7 AE4 DQB55
GPU_DQA56 E13 R73 0Ohm GPU_DQB56 AB2
DQA56 DQB56
2
GPU_DQA57 E12 B8 MVREFS 1 2 GPU_DQB57 AB3 AF5
DQA57 (NC)MVREFS DQB57 ROMCS#
1
A A
Title : M11-Mem IF
ASUSTECH CO.,LTD. Engineer: Pommy Lu
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 12 of 57
5 4 3 2 1
5 4 3 2 1
+V3.3_VGA +V3.3S
R386 /LEAK
1 2
0OHM +V3.3
R389 /X_LEAK
1 2
place Decoupling Capacitors close to M11
0OHM
S0-S3 MAX: 8.625A
+V2.5_VRAM R84 0Ohm
Memory I/O Power S0-S3: 530mA 1 2 +VGACORE U40F /M11-P
U40D /M11-P
/M11-P P17 M16
VDDR VDDC_1 Part 6 of 7 VSS_101
T7 VDDR1_1 P18 VDDC_2 VSS_102 N16
1
R4 Part 4 of 7 + P19 N15
VDDR1_2(CLKBFB) VDDC_3 VSS_103
1
D D
R1 CE10 U12 P15
VDDR1_3 VDDC_4 VSS_104
1
+ C94 C122 C55 C89 C97 C123 C67 C81 C100 C101 C124 C66 C85 C60
N8 VDDR1_4 U13 VDDC_5 M10-P VSS_105 P16
1
1
CE14 N7 0.01UF/10V 0.01UF/10V 0.1uF/10V 0.1uF/10V 2.2UF/6.3V 2.2UF/6.3V 10uF 22U/10V 10uF 2.2UF/6.3V 2.2UF/6.3V 0.1uF/10V 0.1uF/10V 0.01UF/10V 0.1uF/10V U14 R18
2
C98 C113 C74 C481 C119 C111 C121 C479 VDDR1_5 VDDC_6 VSS_106
22U/10V 10uF 10uF 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.01UF/10V 0.01UF/10V 0.01UF/10V
M4
L27
VDDR1_6 U17
U18
VDDC_7 (708 BGA) VSS_107 R17
R16
2
2
VDDR1_7 VDDC_8 VSS_108
L8 VDDR1_8 U19 VDDC_9 VSS_109 R15
J24 VDDR1_9 VDDC_63 AC13 V19 VDDC_10 VSS_110 R14
J23
J8
VDDR1_10 VDDC_64 AD13
AD15 GND GND GND
V18
V17
VDDC_11 M9+X VSS_111 R13
R12
VDDR1_11 VDDC_65 VDDC_12 VSS_112
+V2.5S S0-S3: 100mA GND
J7
J4
VDDR1_12 VDDC_66 AC15
AC17 +V1.5S
V14
V13
VDDC_13 (708 BGA) VSS_113 T13
T14
L18 /M11-P VDDR1_13 VDDC_67 R15 /M11-P VDDC_14 VSS_114
J1 VDDR1_14 S0-S3: 160mA V12 VDDC_15 VSS_115 T15
LVDS_LVDDR_25 Power Between core and I/O
1 2 H10
H13
VDDR1_15 (VDDC18)VDD15_1 P8
Y8
1 2 N18
N17
VDDC_16 CENTER VSS_116 W15
V16
VDDR1_16 (VDDC18)VDD15_2 VDDC_17 VSS_117
1
1
120Ohm/100Mhz LVDS I/O Power + 0OHM +V1.8S
+V1.8S C72 C82
H15
H17
VDDR1_17 (VDDC18)VDD15_3 AC11
AC20 C117 C120 C104 CE2 R16 /M9+X
N14
W17
VDDC_18 ARRAY VSS_118 V15
U15
L14 /M9+X 10uF VDDR1_18 (VDDC18)VDD15_4 VDDC_19 VSS_119
0.1uF/10V T8 Y23 0.1uF/10V 0.1uF/10V10uF 1 2 W18 U16
2
2
VDDR1_19 (VDDC18)VDD15_5 22U/10V VDDC_20 VSS_120
1 2 V4 L23 W12 T19
2
VDDR1_20 (VDDC18)VDD15_6 0OHM VDDC_21 VSS_121
V7 VDDR1_21 (VDDC18)VDD15_7 H20 W13 VDDC_22 VSS_122 T18
120Ohm/100Mhz V8 H11 GND +V3.3_VGA +VGACORE W14 T17
VDDR1_22 (VDDC18)VDD15_8 VDDC_23 VSS_123
GND AA1 VDDR1_23 S0-S3: 2mA I/O Power N13 VDDC_24 VSS_124 T16
+V1.8S S0-S3: 30mA AA4 AD7 N19
L19 VDDR1_24 VDDR3_1 VDDC_25
AA7 VDDR1_25 VDDR3_2 AD19 M19 VDDC_26
1
1 2 LVDS_LVDDR_18 AA8 AD21 + M18
VDDR1_26 VDDR3_3 VDDC_27
1
A3 AD22 CE3 C9 C14 C428 M12 GND
VDDR1_27 VDDR3_4 VDDC_28
1
120Ohm/100Mhz LVDS Digital Logic Power A9 AC22 C126 C56 C25 C80 C277 C22 N12
C96 C62 VDDR1_28 VDDR3_5 0.01UF/10V 0.01UF/10V 0.1uF/10V 0.1uF/10V10uF 22U/10V 0.1uF/10V 1UF/10V 1UF/10V 1UF/10V VDDC_29
A15 AC21 M13
2
10uF VDDR1_29 VDDR3_6 /EMI /EMI /EMI VDDC_30
0.1uF/10V A21 AC19 M14 W16
2
120Ohm/100Mhz LVDS/TMDS PLL Power D11 J30 0Ohm S0-S3: 2mA L12
C446 C447 VDDR1_39 VDDP_1
C D8 VDDR1_40 VDDP_2 AF27 1 2 C
10uF 0.1uF/10V D5 AE30
2
1
F4 AC23 +V1.5S
VDDR1_43 VDDP_5 C49 C50 C87 C88 C99
G7 VDDR1_44 VDDP_6 AB30 S0-S3: 90mA AGP I/O Power
+V1.8S GND G10 AA24 2.2UF/6.3V 2.2UF/6.3V 0.1uF/10V 10uF 0.01UF/10V
2
VDDR1_45 VDDP_7
S0-S3: 30mA G13 VDDR1_46 VDDP_8 AA23
1
L58 G15 Y27 +
VDDR1_47 VDDP_9
1
1 2 TMDS_TXVDDR G19 W30 CE4
VDDR1_48 VDDP_10 C36 C35 C37 C51 C30 C31
G22 VDDR1_49 VDDP_11 V23
1
120Ohm/100Mhz TMDS I/O Power G27 V24 0.01UF/10V 0.01UF/10V 0.1uF/10V 0.1uF/10V 10uF 10uF 22U/10V
2
C451 C452 VDDR1_50 VDDP_12
H22 VDDR1_51 VDDP_13 M23
10uF 0.1uF/10V H19 M24 GND GND
2
VDDR1_52 VDDP_14
AD4 VDDR1_53 VDDP_15 N30
T4 VDDR1_54 VDDP_16 P23 MASK OFF CENTER BALL ARRAY WITH
S0-S3: 530mA N4 P27 GND M9+X (684BGA)
+V2.5_VRAM VDDR1_55 VDDP_17
GND D19 VDDR1_56(CLKAFB) VDDP_18 T23
Memory Clock Power D13 VDDR1_57 VDDP_19 T24
L16 T30
MEMCLK_VDDRH R65 /M11-P VDDP_20
1 2 VDDP_21 U27
1 2
1
120Ohm/100Mhz DAC Digital Power 1UF/10V 1UF/10V 0.1uF/10V 0.1uF/10V AD12 AC18
2
EMI Request
resistors CLOSE TO GPU
R40 1 2 33Ohm R89 1 2 10Ohm
<12> GPU_CLKA0 VM_CLKA0 <15> <12> GPU_CLKB0 VM_CLKB0 <15>
R41 1 2 33Ohm R85 1 2 10Ohm
<12> GPU_CLKA0# VM_CLKA0# <15> <12> GPU_CLKB0# VM_CLKB0# <15>
R51 1 2 10Ohm R87 1 2 10Ohm
<12> GPU_CLKA1 VM_CLKA1 <15> <12> GPU_CLKB1 VM_CLKB1 <15>
R47 1 2 10Ohm R86 1 2 10Ohm
<12> GPU_CLKA1# VM_CLKA1# <15> <12> GPU_CLKB1# VM_CLKB1# <15>
R44 1 2 0Ohm R88 1 2 0Ohm
<12> GPU_CKEA VM_CKEA <15> <12> GPU_CKEB VM_CKEB <15>
R185 1 2 0Ohm R188 1 2 0Ohm
<12> GPU_CSA1# VM_CSA1# <15> <12> GPU_CSB1# VM_CSB1# <15>
1 2 RN9A 1 2 RN10A
A <12>
<12>
GPU_CSA0#
GPU_RASA# 3
5
0Ohm
0Ohm 4 RN9B
6 RN9C
VM_CSA0# <15>
VM_RASA# <15>
<12>
<12>
GPU_CSB0#
GPU_RASB# 3
5
0Ohm
0Ohm 4 RN10B
6 RN10C
VM_CSB0# <15>
VM_RASB# <15> A
<12> GPU_CASA# 0Ohm VM_CASA# <15> <12> GPU_CASB# 0Ohm VM_CASB# <15>
<12> GPU_WEA# 7 0Ohm 8 RN9D VM_WEA# <15> <12> GPU_WEB# 7 0Ohm 8 RN10D VM_WEB# <15>
2
R321 R350 R134 R139
56.2Ohm 56.2Ohm 56.2Ohm 56.2Ohm
1
D D
2
2
1
1
R322 R348 R135 R140
56.2Ohm C443 56.2Ohm C480 56.2Ohm C208 56.2Ohm C209
0.01UF/10V 0.01UF/10V 0.01UF/10V 0.01UF/10V
2
1
1
VM_CLKA0# VM_CLKA1# VM_CLKB0# VM_CLKB1#
<12> VM_DQA[31..0] VM_MAA[13..0] <12> VM_DQA[63..32] VM_MAB[13..0] <12> <12> VM_DQB[31..0] VM_MAB[13..0] <12> VM_DQB[63..32]
<12> VM_MAA[13..0] U4 U6 U8 U7
VM_MAA12 N4 B8 VM_DQA31 VM_MAA12 N4 B8 VM_DQA63 VM_MAB12 N4 B8 VM_DQB31 VM_MAB12 N4 B8 VM_DQB63
VM_MAA13 M5 BA0 DQ31 VM_DQA30 VM_MAA13 BA0 DQ31 VM_DQA62 VM_MAB13 BA0 DQ31 VM_DQB30 VM_MAB13 BA0 DQ31 VM_DQB62
BA1 DQ30 C9 M5 BA1 DQ30 C9 M5 BA1 DQ30 C9 M5 BA1 DQ30 C9
B9 VM_DQA29 B9 VM_DQA61 B9 VM_DQB29 B9 VM_DQB61
VM_MAA11 M7 DQ29 VM_DQA28 VM_MAA11 M7 DQ29 VM_DQA60 VM_MAB11 M7 DQ29 VM_DQB28 VM_MAB11 M7 DQ29 VM_DQB60
A11 DQ28 B10 A11 DQ28 B10 A11 DQ28 B10 A11 DQ28 B10
VM_MAA10 L6 C13 VM_DQA27 VM_MAA10 L6 C13 VM_DQA59 VM_MAB10 L6 C13 VM_DQB27 VM_MAB10 L6 C13 VM_DQB59
VM_MAA9 M8 A10 DQ27 VM_DQA26 VM_MAA9 A10 DQ27 VM_DQA58 VM_MAB9 A10 DQ27 VM_DQB26 VM_MAB9 A10 DQ27 VM_DQB58
A9 DQ26 D12 M8 A9 DQ26 D12 M8 A9 DQ26 D12 M8 A9 DQ26 D12
VM_MAA8 N11 D13 VM_DQA25 VM_MAA8 N11 D13 VM_DQA57 VM_MAB8 N11 D13 VM_DQB25 VM_MAB8 N11 D13 VM_DQB57
VM_MAA7 N10 A8/AP DQ25 VM_DQA24 VM_MAA7 N10 A8/AP DQ25 VM_DQA56 VM_MAB7 N10 A8/AP DQ25 VM_DQB24 VM_MAB7 N10 A8/AP DQ25 VM_DQB56
A7 DQ24 E13 A7 DQ24 E13 A7 DQ24 E13 A7 DQ24 E13
VM_MAA6 N9 K3 VM_DQA23 VM_MAA6 N9 K3 VM_DQA55 VM_MAB6 N9 K3 VM_DQB23 VM_MAB6 N9 K3 VM_DQB55
VM_MAA5 M9 A6 DQ23 VM_DQA22 VM_MAA5 A6 DQ23 VM_DQA54 VM_MAB5 A6 DQ23 VM_DQB22 VM_MAB5 A6 DQ23 VM_DQB54
A5 DQ22 K2 M9 A5 DQ22 K2 M9 A5 DQ22 K2 M9 A5 DQ22 K2
VM_MAA4 N8 J2 VM_DQA21 VM_MAA4 N8 J2 VM_DQA53 VM_MAB4 N8 J2 VM_DQB21 VM_MAB4 N8 J2 VM_DQB53
VM_MAA3 N7 A4 DQ21 VM_DQA20 VM_MAA3 A4 DQ21 VM_DQA52 VM_MAB3 A4 DQ21 VM_DQB20 VM_MAB3 A4 DQ21 VM_DQB52
A3 DQ20 J3 N7 A3 DQ20 J3 N7 A3 DQ20 J3 N7 A3 DQ20 J3
VM_MAA2 M6 G2 VM_DQA19 VM_MAA2 M6 G2 VM_DQA51 VM_MAB2 M6 G2 VM_DQB19 VM_MAB2 M6 G2 VM_DQB51
VM_MAA1 N6 A2 DQ19 VM_DQA18 VM_MAA1 A2 DQ19 VM_DQA50 VM_MAB1 A2 DQ19 VM_DQB18 VM_MAB1 A2 DQ19 VM_DQB50
A1 DQ18 G3 N6 A1 DQ18 G3 N6 A1 DQ18 G3 N6 A1 DQ18 G3
VM_MAA0 N5 F2 VM_DQA17 VM_MAA0 N5 F2 VM_DQA49 VM_MAB0 N5 F2 VM_DQB17 VM_MAB0 N5 F2 VM_DQB49
A0 DQ17 VM_DQA16 A0 DQ17 VM_DQA48 A0 DQ17 VM_DQB16 A0 DQ17 VM_DQB48
DQ16 F3 DQ16 F3 DQ16 F3 DQ16 F3
F12 VM_DQA15 F12 VM_DQA47 F12 VM_DQB15 F12 VM_DQB47
DQ15 VM_DQA14 DQ15 VM_DQA46 DQ15 VM_DQB14 DQ15 VM_DQB46
<14> VM_CLKA0 M11 CLK DQ14 F13 <14> VM_CLKA1 M11 CLK DQ14 F13 <14> VM_CLKB0 M11 CLK DQ14 F13 <14> VM_CLKB1 M11 CLK DQ14 F13
G12 VM_DQA13 G12 VM_DQA45 G12 VM_DQB13 G12 VM_DQB45
DQ13 VM_DQA12 DQ13 VM_DQA44 DQ13 VM_DQB12 DQ13 VM_DQB44
<14> VM_CLKA0# M12 CLK# DQ12 G13 <14> VM_CLKA1# M12 CLK# DQ12 G13 <14> VM_CLKB0# M12 CLK# DQ12 G13 <14> VM_CLKB1# M12 CLK# DQ12 G13
J12 VM_DQA11 J12 VM_DQA43 J12 VM_DQB11 J12 VM_DQB43
DQ11 VM_DQA10 VM_CKEA DQ11 VM_DQA42 DQ11 VM_DQB10 VM_CKEB DQ11 VM_DQB42
C
<14> VM_CKEA N12 CKE DQ10 J13 N12 CKE DQ10 J13 <14> VM_CKEB N12 CKE DQ10 J13 N12 CKE DQ10 J13 C
K12 VM_DQA9 K12 VM_DQA41 K12 VM_DQB9 K12 VM_DQB41
DQ9 VM_DQA8 VM_CSA0# DQ9 VM_DQA40 DQ9 VM_DQB8 VM_CSB0# DQ9 VM_DQB40
<14> VM_CSA0# N2 CS# DQ8 K13 N2 CS# DQ8 K13 <14> VM_CSB0# N2 CS# DQ8 K13 N2 CS# DQ8 K13
E2 VM_DQA7 E2 VM_DQA39 E2 VM_DQB7 E2 VM_DQB39
DQ7 VM_DQA6 VM_RASA# DQ7 VM_DQA38 DQ7 VM_DQB6 VM_RASB# DQ7 VM_DQB38
<14> VM_RASA# M2 RAS# DQ6 D2 M2 RAS# DQ6 D2 <14> VM_RASB# M2 RAS# DQ6 D2 M2 RAS# DQ6 D2
D3 VM_DQA5 D3 VM_DQA37 D3 VM_DQB5 D3 VM_DQB37
DQ5 VM_DQA4 VM_CASA# DQ5 VM_DQA36 DQ5 VM_DQB4 VM_CASB# DQ5 VM_DQB36
<14> VM_CASA# L2 CAS# DQ4 C2 L2 CAS# DQ4 C2 <14> VM_CASB# L2 CAS# DQ4 C2 L2 CAS# DQ4 C2
B5 VM_DQA3 B5 VM_DQA35 B5 VM_DQB3 B5 VM_DQB35
DQ3 VM_DQA2 VM_WEA# DQ3 VM_DQA34 DQ3 VM_DQB2 VM_WEB# DQ3 VM_DQB34
<14> VM_WEA# L3 WE# DQ2 B6 L3 WE# DQ2 B6 <14> VM_WEB# L3 WE# DQ2 B6 L3 WE# DQ2 B6
C6 VM_DQA1 +V2.5_VRAM C6 VM_DQA33 +V2.5_VRAM C6 VM_DQB1 +V2.5_VRAM C6 VM_DQB33 +V2.5_VRAM
DQ1 VM_DQA0 DQ1 VM_DQA32 DQ1 VM_DQB0 DQ1 VM_DQB32
<14> VM_QSA[3..0] DQ0 B7 <14> VM_QSA[7..4] DQ0 B7 <14> VM_QSB[3..0] DQ0 B7 <14> VM_QSB[7..4] DQ0 B7
2
VM_DQMA#1 H12 J11 VM_DQMA#5 H12 J11 VM_DQMB#1 H12 J11 VM_DQMB#5 H12 J11
R38 DM1 VDDQ14 R345 DM1 VDDQ14 R109 DM1 VDDQ14 R138 DM1 VDDQ14
VDDQ15 K4 VDDQ15 K4 VDDQ15 K4 VDDQ15 K4
1KOhm VM_DQMA#0 B3 K11 1KOhm VM_DQMA#4 B3 K11 1KOhm VM_DQMB#0 B3 K11 1KOhm VM_DQMB#4 B3 K11
DM0 VDDQ16 DM0 VDDQ16 DM0 VDDQ16 DM0 VDDQ16
D7 D7 D7 D7
1
1
VDD1 VDD1 VDD1 VDD1
N13 VREF VDD2 D8 N13 VREF VDD2 D8 N13 VREF VDD2 D8 N13 VREF VDD2 D8
VDD3 E4 VDD3 E4 VDD3 E4 VDD3 E4
2
2
M13 MCL VDD4 E11 M13 MCL VDD4 E11 M13 MCL VDD4 E11 M13 MCL VDD4 E11
1
1
R37 L4 R346 L4 R115 L4 R137 L4
C48 VDD5 C478 VDD5 C187 VDD5 C203 VDD5
1KOhm L9 RFU1 VDD6 L7 1KOhm L9 RFU1 VDD6 L7 1KOhm L9 RFU1 VDD6 L7 1KOhm L9 RFU1 VDD6 L7
0.1uF/10V L8 0.1uF/10V L8 0.1uF/10V L8 0.1uF/10V L8
2
2
VDD7 VDD7 VDD7 VDD7
M10 L11 M10 L11 M10 L11 M10 L11
1
1
RFU2 VDD8 RFU2 VDD8 RFU2 VDD8 RFU2 VDD8
B B
C4 NC1 VSSQ1 B4 C4 NC1 VSSQ1 B4 C4 NC1 VSSQ1 B4 C4 NC1 VSSQ1 B4
GND GND C11 NC2 VSSQ2 B11 GND GND C11 NC2 VSSQ2 B11 GND GND C11 NC2 VSSQ2 B11 GND GND C11 NC2 VSSQ2 B11
H4 NC3 VSSQ3 D4 H4 NC3 VSSQ3 D4 H4 NC3 VSSQ3 D4 H4 NC3 VSSQ3 D4
H11 NC4 VSSQ4 D5 H11 NC4 VSSQ4 D5 H11 NC4 VSSQ4 D5 H11 NC4 VSSQ4 D5
L12 NC5 VSSQ5 D6 L12 NC5 VSSQ5 D6 L12 NC5 VSSQ5 D6 L12 NC5 VSSQ5 D6
L13 NC6 VSSQ6 D9 L13 NC6 VSSQ6 D9 L13 NC6 VSSQ6 D9 L13 NC6 VSSQ6 D9
M3 NC7 VSSQ7 D10 M3 NC7 VSSQ7 D10 M3 NC7 VSSQ7 D10 M3 NC7 VSSQ7 D10
M4 D11 VM_CSA1# M4 D11 M4 D11 VM_CSB1# M4 D11
<14> VM_CSA1# NC8 VSSQ8 NC8 VSSQ8 <14> VM_CSB1# NC8 VSSQ8 NC8 VSSQ8
N3 NC9 VSSQ9 E6 N3 NC9 VSSQ9 E6 N3 NC9 VSSQ9 E6 N3 NC9 VSSQ9 E6
VSSQ10 E9 VSSQ10 E9 VSSQ10 E9 VSSQ10 E9
VSSQ11 F5 VSSQ11 F5 VSSQ11 F5 VSSQ11 F5
placed C1505 close VSSQ12 F10 placed C1506 close VSSQ12 F10 placed C1507 close VSSQ12 F10 VSSQ12 F10
to Video RAM VSSQ13 G5 to Video RAM VSSQ13 G5 to Video RAM VSSQ13 G5 placed C1508 close VSSQ13 G5
VSSQ14 G10 VSSQ14 G10 VSSQ14 G10 to Video RAM VSSQ14 G10
VSSQ15 H5 VSSQ15 H5 VSSQ15 H5 VSSQ15 H5
F6 VSS TH1 VSSQ16 H10 F6 VSS TH1 VSSQ16 H10 F6 VSS TH1 VSSQ16 H10 F6 VSS TH1 VSSQ16 H10
F7 VSS TH2 VSSQ17 J5 F7 VSS TH2 VSSQ17 J5 F7 VSS TH2 VSSQ17 J5 F7 VSS TH2 VSSQ17 J5
F8 VSS TH3 VSSQ18 J10 F8 VSS TH3 VSSQ18 J10 F8 VSS TH3 VSSQ18 J10 F8 VSS TH3 VSSQ18 J10
F9 VSS TH4 VSSQ19 K5 F9 VSS TH4 VSSQ19 K5 F9 VSS TH4 VSSQ19 K5 F9 VSS TH4 VSSQ19 K5
G6 VSS TH5 VSSQ20 K10 G6 VSS TH5 VSSQ20 K10 G6 VSS TH5 VSSQ20 K10 G6 VSS TH5 VSSQ20 K10
G7 VSS TH6 G7 VSS TH6 G7 VSS TH6 G7 VSS TH6
G8 VSS TH7 VSS1 E5 G8 VSS TH7 VSS1 E5 G8 VSS TH7 VSS1 E5 G8 VSS TH7 VSS1 E5
G9 VSS TH8 VSS2 E7 G9 VSS TH8 VSS2 E7 G9 VSS TH8 VSS2 E7 G9 VSS TH8 VSS2 E7
H6 VSS TH9 VSS3 E8 H6 VSS TH9 VSS3 E8 H6 VSS TH9 VSS3 E8 H6 VSS TH9 VSS3 E8
H7 VSS TH10 VSS4 E10 H7 VSS TH10 VSS4 E10 H7 VSS TH10 VSS4 E10 H7 VSS TH10 VSS4 E10
H8 VSS TH11 VSS5 K6 H8 VSS TH11 VSS5 K6 H8 VSS TH11 VSS5 K6 H8 VSS TH11 VSS5 K6
H9 VSS TH12 VSS6 K7 H9 VSS TH12 VSS6 K7 H9 VSS TH12 VSS6 K7 H9 VSS TH12 VSS6 K7
J6 VSS TH13 VSS7 K8 J6 VSS TH13 VSS7 K8 J6 VSS TH13 VSS7 K8 J6 VSS TH13 VSS7 K8
J7 VSS TH14 VSS8 K9 J7 VSS TH14 VSS8 K9 J7 VSS TH14 VSS8 K9 J7 VSS TH14 VSS8 K9
J8 VSS TH15 VSS9 L5 J8 VSS TH15 VSS9 L5 J8 VSS TH15 VSS9 L5 J8 VSS TH15 VSS9 L5
J9 VSS TH16 VSS10 L10 J9 VSS TH16 VSS10 L10 J9 VSS TH16 VSS10 L10 J9 VSS TH16 VSS10 L10
GND GND placed decoupling GND GND GND GND GND GND
capacitors close
A A
to Video RAM
+V2.5_VRAM +V2.5_VRAM +V2.5_VRAM
1
1
C152 C159 C494 C498 C506 C493 C500 C484 C505 C492 C495 C504 C176 C181 C204 C205 C490 C488 C453 C455 C454 C444 C450 C485 C486 C496 C499 C487 C489 C182
10uF 10uF 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 10uF 10uF 0.1uF/10V 0.1uF/10V 10uF 10uF 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 10uF 10uF
2
2
Title : M11-Video RAM
ASUSTECH CO.,LTD. Engineer: Pommy Lu
GND
GND GND GND GND GND GND Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 15 of 57
5 4 3 2 1
5 4 3 2 1
+V3.3S +V12S
D3 R8
2 1 1 2
100Ohm
1SS355
2
+V3.3S
R5 R3
1MOhm 100KOhm
D D
/M11-P +V3.3S_LCD
1
Q6
1 6
2 D 5 L4
3 S 4 1 2
G
6
Q3A SI3456DV 80Ohm/100Mhz
R504 0Ohm UM6K1N
1 2 2
1
/M9+X
1
Q3B
R505 0Ohm UM6K1N C1 C4 C384 C7 C5
<11> LVDS_VDD_EN 1 2 5 0.1UF/25V 0.1uF/10V 0.1uF/10V 1UF/10V 10uF
2
4
/M11-P
2
R1
100KOhm
/M9+X
1
GND GND GND GND
C C
2
R2 +V5_USB01 +V5
100KOhm
2
C385 C386 C8 C12
D1
1
1 0.1UF/25V 0.1UF/25V 0.001uF/50V 0.1U
<20> BACK_OFF#
1
L39 80Ohm/100Mhz CON2
3
<41> LID_SW# 2 1 2 2 2 1 1 USB_WLAN_ON# <20>
4 3 WLAN_PWR 1 2
BAT54A 4 3 CAMERA_PWR L6 80Ohm/100Mhz
6 6 5 5
L1 1 2 120Ohm/100Mhz 8 7
8 7 USB_P0- <38>
Backlignt: Level Control L36 1 2 120Ohm/100Mhz 10 9
<30> INVERT_DA 10 9 USB_P0+ <38>
L37 1 2 120Ohm/100Mhz 12 11
D2 12 11
1 2 14 14 13 13 USB_P1- <38>
2 1 L38 16 15
<11> LVDS_BLCTRL 16 15 USB_P1+ <38>
1
L35 1 2 120Ohm/100Mhz 120Ohm/100Mhz 18 17 +
L34 18 17
F01J2E 1 2 120Ohm/100Mhz 20 20 19 19 CE1
22 SIDE2 SIDE1 21
1
C401 C399 C405 C400 100UF/16V
<36> INTMIC_A
2
R14 WTOB_CON_20P 0.1U 0.1U 0.1U 0.1U
2
1
1
4.7KOhm C390 C388 C387 C389 /X /X /X /X
2
GND
CON1
SIDE1
+V3.3S_LCD 29 29 30 30 +V3.3S_LCD
1
WTOB_2X15P
32
C6 C3
A 0.1uF/10V 0.1uF/10V A
2
LCD CON
Title : BL&LCD CON
ASUSTECH CO.,LTD. Engineer: Pommy Lu
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 16 of 57
5 4 3 2 1
5 4 3 2 1
CRT CON
D +V1.5S 2
D36 Place RN & C close to M11 placed BEAD close to CON1701 D
3
1
GND L40 75Ohm/100MHz CON8
BAV99 1 2 1 9
<11> CRT_R RED VCC
1
C392
1
RN4D C402
75Ohm 3.3PF/50V
2
3.3PF/50V
2
7
GND
D37 GND
NC1 4
+V1.5S 2 11
NC2
3
L75 1.8nH R512 1
1 2 1 2 TV_Y GND L41 75Ohm/100MHz
<11> TV_Y/Y
BAV99 1 2 2
0OHM TV-OUT <11> CRT_G GREEN
1
C393
4
1
RN4B C403
1
2
75Ohm C729 C730 3.3PF/50V
2
82P 82P
2
3
CON17
3
6PX2 GND
9
TV_Pb 2 GND
HC2
CVBS1 D38
GND GND GND 7 CVBS2 +V1.5S 2
C TV_Y
TV_Pr
4
6
Y
1
3 C
L76 1.8nH R513 C GND L42 75Ohm/100MHz
1 2 1 2 TV_Pr BAV99 1 2 3
<11> TV_C/Pr <11> CRT_B BLUE
5 NC
0OHM
6
1
HC1
GND0
1
3 RN4C C404 C394 15
GND1
8
75Ohm
1
2
75Ohm C731 C732
82P 82P
2
5
12-141011072
CRT
PIN
7
GND
GND
GND 1
Q8A UM6K1N R297 39Ohm
<11> CRT_HS 1 6 1 2 13 HSYNC
L77 1.8nH R514
1 2 1 2 TV_Pb
<11> TV_COMP/Pb
1
2
0OHM C396
5PF
2
+V3.3SUS +V12S
6
5
82P 82P
2
3
R298 39Ohm
RN5A RN5B 4 3 1 2 14
<11> CRT_VS
5
VSYNC
100KOHM 100KOHM +V5S Q8B UM6K1N
1
GND GND GND C397
B B
2
4
5PF
2
1
6 RN3A
Q10A GND
UM6K1N 2.2KOhm
2
1
2
3
1
2
C395
5PF
2
GND
GND SIDE_G16 16
5
SIDE_G17 17
L44 75Ohm/100MHz
<11> CRT_DDC_CLK 4 3 1 2 15 DCLK
GND5
GND4
GND3
GND2
GND1
Q9B UM6K1N
1
C398
10
8
7
6
5
2.2KOhm 5PF 7846S_15G2T
2
RN76B
3
GND
GND
+V5S
A GND
A
D D
+V3.3S_ICH
PCI_FRAME# 1 RP4A
8.2KOhm5
10
PCI_IRDY# 2 RP4B
8.2KOhm5
10
PCI_TRDY# 3 RP4C
Use Daisy-Chain 8.2KOhm5
10
Strap
2/3 board impedance PCI_SERR# 6 RP4E
Option 8.2KOhm5
HUB_RCOMP_ICH4
<6> HUB_PD[10:0] LxWxH=31x31x2.38 PCI_AD[31:0] <23,24,25,26> 10
U20A
1
E4 PCI_AD22
AD22 PCI_AD23 PCI_REQ#2 RP2E
0.9V +/- 2% ICH4(R1806)<=3" <24,30,31,33> LPC_AD0 T2 LAD0/FWH0 AD23 M5 6 8.2KOhm5
R210 R4 E2 PCI_AD24 10
<24,30,31,33> LPC_AD1 LAD1/FWH1 AD24
150Ohm T4 P1 PCI_AD25
<24,30,31,33> LPC_AD2 LAD2/FWH2 AD25
U2 E1 PCI_AD26 PCI_REQ#3 7 RP2F
<24,30,31,33> LPC_AD3 8.2KOhm5
2
+V3.3S D2 PCI_AD30 10
C269 C604 R406 R216 10KOhm AD30 PCI_AD31
AD31 P4
150Ohm 2 1 9 RP2H
<19,24,25,30,31> INT_SERIRQ 8.2KOhm5
2
0.01uF/25V 0.01uF/25V 2 1 J2 10
PCI_C/BE#0 <23,24,25>
2
C598
2
0.1uF/10V
1
CB&1394 PCI_AD21
Meet LPC reset >= 60 us
(Add Buffer)
MINIPCI PCI_AD20
LAN PCI_AD16
A A
Title : ICH4-M(HUB_PCI)
ASUSTECH CO.,LTD. Engineer: charlie_xie
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 18 of 57
5 4 3 2 1
5 4 3 2 1
1
IDE_PDD5 AB8 AB15 IDE_SDD5 IDE I/F:
Space: 7 mils IDE_PDD6 Y8
PDD5 SDD5
W14 IDE_SDD6 ICH4_GPI3 2 RP1B R401 design guideline recommend 10kohm
PDD6 SDD6 Width: 5 mils 8.2KOhm5
Length<= 8" IDE_PDD7 AA8 AA14 IDE_SDD7 10
Match: <= IDE_PDD8 AB9
PDD7 SDD7
Y14 IDE_SDD8 Space: 7 mils 100KOhm
IDE_PDD9 PDD8 SDD8 IDE_SDD9 Length<= 8" ICH4_GPI4 RP1C
500 mils Y9 AC15 3 8.2KOhm5
2
IDE_PDD10 PDD9 SDD9 IDE_SDD10
AC9 PDD10 SDD10 AA15 Match: <= 10
IDE_PDD11 W9 Y15 IDE_SDD11
IDE_PDD12 PDD11 SDD11 IDE_SDD12
500 mils ICH4_GPI5 RP1D SM_INTRUDER#
AB10 PDD12 SDD12 AB16 4 8.2KOhm5
IDE_PDD13 W10 Y16 IDE_SDD13 10
IDE_PDD14 PDD13 SDD13 IDE_SDD14
W11 PDD14 SDD14 AA17
IDE_PDD15 Y11 Y17 IDE_SDD15 PCI_INTA# 6 RP1E
PDD15 SDD15 8.2KOhm5
10
AA13 AA20 +V3.3S_ICH +V3.3SUS_ICH
<28> IDE_PDA0 PDA0 SDA0 IDE_SDA0 <29>
AB13 AC20 PCI_INTB# 7 RP1F
<28> IDE_PDA1 PDA1 SDA1 IDE_SDA1 <29> 8.2KOhm5
<28> IDE_PDA2 W13 PDA2 SDA2 AC21 IDE_SDA2 <29> 10
3
<28> IDE_PDCS3# AB14 PDCS3# SDCS3# AC22 IDE_SDCS3# <29> 10
RN52A RN52B
AB12 AC19 PCI_INTD# 9 RP1H +V5S
<28> IDE_PIORDY PIORDY SIORDY IDE_SIORDY <29> 8.2KOhm5
W12 AA18 10 2.2KOhm 2.2KOhm
<28> IDE_PDIOW# PDIOW# SDIOW# IDE_SDIOW# <29>
<28> IDE_PDIOR# AC12 PDIOR# SDIOR# Y18 IDE_SDIOR# <29>
<28> IDE_PDDACK# Y12 AB19 IDE_SDDACK# <29>
4
PDDACK# SDDACK#
2
AA11 AB18 SCL_3A
<28> IDE_PDDREQ PDDREQ SDDREQ IDE_SDDREQ <29>
C11 LAN_CLK AC_RST# C13 AC97_RST# <34,37> <5,9,22> SCL_3S 1 6
A10 C9 AC97_SYNC
LAN_RXD0 AC_SYNC SM_LINK0
A9 LAN_RXD1 AC_BIT_CLK B8 AC97_BCLK_ICH4 <34> AC97 AC97_SDIN0 Q73A
A11 D9 AC97_SDOUT
LAN_RXD2 AC_SDOUT
B10 LAN_TXD0 AC_SDIN0 D13 AC97_SDIN0 <34> UM6K1N
C10 A13 MDC AC97_SDIN1 +V3.3S_ICH +V3.3SUS_ICH
LAN_TXD1 AC_SDIN1 AC97_SDIN1 <37>
C A12 LAN_TXD2 AC_SDIN2 B13 C
B11 LAN_RSTSYNC
INTRUDER# W6 SM_INTRUDER#
J22 AC3 SM_LINK0
<18,24,25,30,31> INT_SERIRQ SERIRQ SMLINK0
3
PCI_INTA# D5 AB1 SM_LINK1
<11,26> PCI_INTA# PIRQA# SMLINK1 base on line load
PCI_INTB# C2 RN51A RN51B
<26> PCI_INTB# PIRQB#
PCI_INTC# B4 T21 +V5S
<23,24> PCI_INTC# PIRQC# CLK66 CLK_ICH66 <22>
PCI_INTD# A3 F19 2.2KOhm 2.2KOhm
<24,26> PCI_INTD# PIRQD# CLK48 CLK_ICH48 <22>
ICH4_GPI2 C8 J23
PIRQE#/GPIO2 CLK14 CLK_ICH14 <22>
ICH4_GPI3 D7
4
PIRQF#/GPIO3
5
ICH4_GPI4 C3 W7 RTC_RST# SM_LINK1
ICH4_GPI5 PIRQG#/GPIO4 RTCRST#
C4 PIRQH#/GPIO5
<18,28> INT_IRQ14 AC13 IRQ14 <5,9,22> SDA_3S 4 3
1
AA19 H23 C566
<18,29> INT_IRQ15 IRQ15 SPKR ICH4_SPKR <34>
1
J19 SDA_3A
APICCLK Q73B
1 RN29A 5PF C612
10KOhm 2 H19 AB2 PM_BATLOW# <20>
2
RN29B APICD0 BATLOW#/TP[0] 5PF
3 10KOhm 4 K20
2
APICD1 C618 UM6K1N
SMBALERT#/GPIO11 AA5 LID_ICH4#_3A <41>
1
RTC_X2 AC6 AC4 SCL_3A
RTC_X1 RTCX2 SMBCLK SDA_3A
AC7 RTCX1 SMBDATA AB4
GND 5PF GND
2
FW82801DBM
AC97 SDOUT & SYNC
GND Outer Layer: 5 mils AC97-R1: <=5.6"
ICH4 T R2 AMC Inner Layer: 4 mils R2-(T): 0.1"- 0.4"
G3: 5 uA +V3.3A +V_RTC
RC time delay should R1 W/S= 1:1 AMC-R2:
RTC_BAT D18 AC97 SDIN ICH4-(T): 1"- 8" 0.9"-5.6"
be 18-25 ms
1 ICH4 AMC R1-(T): 0.1"- 0.4"
R190 3 1 R215 2 RTC_RST# R2 AC97 AC97 (#0012)
1 2 2
180KOhm
1KOhm
1
B B
ICH4-R2: 0.9"- 13.6" (#0013)
AC97-R2: 0.1"-0.4" AC97_SDOUT 1 2 AC97_SDOUT_MDC <37>
R434 33Ohm
1 2 AC97_SDOUT_CODEC <34>
C246 R435
RTC CIRCUITRY 2 1 RTC_VBIAS
RTC_VBIAS <21>
AC97_SDIN0
AC97_SDIN1
1 to 8 33Ohm
0.1 to 0.4 0.9 to 5.6
RTC Circuits: 0.047UF/10V inches
1
2 1 RTC_X1
Measure duty-cycle of SUSCLK 18PF/50V Vpeak-peak of RTC_X1 < 1V
(Pin AA4) must be in 30-70% X3 +V3.3S_ICH
1
1 R438
1 R195 AC97_SDOUT
3 SIDE 1 2 Strap Default: Pull-Down 20K
2 2 10MOhm Option Pull-High for CPU
1KOhm
32.768KHZ /X SAFE_MODE
2
2 1 RTC_X2
C247 18PF/50V
A A
Title : ICH4-M(IDE_AC97)
ASUSTECH CO.,LTD. Engineer: charlie_xie
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 19 of 57
5 4 3 2 1
5 4 3 2 1
D D
+V3.3S_ICH +V3.3SUS_ICH
USB SIGNALS
X Clock Signals
| USB+ - USB-|<= 150 mils
Pair Width/Space: 7/10 mils
6
Impedence: 90 ohm(differential) RN68A RN68B
RN68C
Other Signals Space: >= 20 mils
Clock Signals Sapce:>= 50 mils 10KOhm 10KOhm 10KOhm
LxWxH=31x31x2.38
5
U20C
OC5# A20M#
CPUPWRGD Y23 H_PWRGD <3>
AGP_BUSY# R2 U21
<11> AGP_BUSY# AGPBUSY#/GPIO6 CPUSLP# H_CPUSLP# <3>
<11,43> PM_C3_STAT# T3 C3_STAT#/GPIO21 DPSLP# U23 H_DPSLP# <3,6>
T29 1TPC28t Y20 AA21 <=3" 1 2
CPUPERF#/GPIO22 FERR# H_FERR# <3>
V20 W21 R193 56Ohm
<42> PM_DPRSLPVR DPRSLPVR IGNNE# H_IGNNE# <3>
Y5 LAN_RST# INIT# V22 H_INIT# <3,31>
<41> PM_PWRBTN# AA1 PWRBTN# INTR AB22 H_INTR <3>
<41,42> ICH4_PWROK AB6 PWROK NMI V21 H_NMI <3>
8
SLP_S5#
<22> PM_STPPCI# Y21 STP_PCI#/GPIO18
<22,42> PM_STPCPU# W19 STP_CPU#/GPIO20
J21 SSMUXSEL/GPIO23
AA4 SUSCLK
GND <11> PM_SUS_STAT# AB3 SUS_STAT#/LPCPD#
PM_SYSRST# Y3 SYS_RESET#
<5,39> PM_THRM# V1 THRM#
1 2 <=3" W20
<3,5> H_THRMTRIP_S# THRMTRIP#
R189 56Ohm V19
<41> PM_VGATE VGATE/VRMPWRGD +V3.3S
FW82801DBM
6
B B
8
RN28C
10KOhm RN28D
INTEL REQUEST +V3.3 10KOhm
7
1
VCC 0.1uF/10V
3
SLP_S1# 2 B Q20B
<24> MPCI_WLAN_ON MPCI_WLAN_ON 5 UM6K1N
3 GND 4 /X
PM_SLP_S1# <22,39>
4
6
Y Q20A
NC7SZ08P5X UM6K1N
WLAN_ON# /X 2
1
GND
A A
Title : ICH4-M(USB_PM)
ASUSTECH CO.,LTD. Engineer: charlie_xie
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 20 of 57
5 4 3 2 1
5 4 3 2 1
D D
LxWxH=31x31x2.38
U20E
A1 VSS_1 VSS_52 G21
A16 VSS_2 VSS_53 G3
+V3.3S +V3.3S_ICH A18 G6
+V3.3SUS_ICH +V3.3SUS VSS_3 VSS_54
3.135V - 3.465V(+/- 5%) LxWxH=31x31x2.38 3.135V - 3.465V(+/- 5%)
A20
A22
VSS_4 VSS_55 H1
J6
U20D VSS_5 VSS_56
S0-S1M:0.42A S0-S5: 14 mA A4 VSS_6 VSS_57 K11
A5 VCC3_3_1 VCCSUS3_3_1 E11 AA12 VSS_7 VSS_58 K13
AC17 VCC3_3_2 VCCSUS3_3_2 F10 AA16 VSS_8 VSS_59 K19
1
AC8 VCC3_3_3 VCCSUS3_3_3 F15 AA22 VSS_9 VSS_60 K23
C610 C569 C611 B2 F16 C620 C619 AA3 K3
0.1uF/10V 0.1uF/10V 0.1uF/10V VCC3_3_4 VCCSUS3_3_4 0.1uF/10V 0.1uF/10V VSS_10 VSS_61
H18 F17 AA9 L10
2
VCC3_3_5 VCCSUS3_3_5 VSS_11 VSS_62
H6 VCC3_3_6 VCCSUS3_3_6 F18 AB20 VSS_12 VSS_63 L11
J1 VCC3_3_7 VCCSUS3_3_7 K14 AB7 VSS_13 VSS_64 L12
J18 VCC3_3_8 VCCSUS3_3_8 V7 AC1 VSS_14 VSS_65 L13
six capacitors(0.1uf) recommended K6 V8 AC10 L14
VCC3_3_9 VCCSUS3_3_9 +V1.5SUS_ICH +V1.5SUS VSS_15 VSS_66
GND M10 VCC3_3_10 VCCSUS3_3_10 V9 GND AC14 VSS_16 VSS_67 L21
P12 VCC3_3_11 1.425V - 1.575V(+/- 5%) AC18 VSS_17 VSS_68 M1
P6 VCC3_3_12 VCCSUS1_5_1 E12 S0-S1M: 64 mA AC23 VSS_18 VSS_69 M11
U1 VCC3_3_13 VCCSUS1_5_2 E13 AC5 VSS_19 VSS_70 M12
+V1.5S +V1.5S_ICH V10 E20 B12 M13
VCC3_3_14 VCCSUS1_5_3 VSS_20 VSS_71
1
V16 VCC3_3_15 VCCSUS1_5_4 F14 B16 VSS_21 VSS_72 M20
1.425V - 1.575V(+/- 5%) V18 G18 C600 C616 B18 M22
VCC3_3_16 VCCSUS1_5_5 0.1uF/10V 0.1uF/10V VSS_22 VSS_73
S0-S1M: 0.5A R6 B20 N10
2
VCCSUS1_5_6 +V5REF_SUS_ICH VSS_23 VSS_74
K10 VCC1_5_1 VCCSUS1_5_7 T6 B22 VSS_24 VSS_75 N11
K12 VCC1_5_2 VCCSUS1_5_8 U6 B9 VSS_25 VSS_76 N12
1
1
K18 VCC1_5_3 C15 VSS_26 VSS_77 N13
C617 C613 K22 E15 +V_RTC GND C17 N14
0.1uF/10V 0.1uF/10V VCC1_5_4 V5REF_SUS +V1.5S VSS_27 VSS_78
P10 C19 N19
2
2
VCC1_5_5 C544 1 VSS_28 VSS_79
T18 VCC1_5_6 VCCRTC AB5 2 0.1uF/10V C21 VSS_29 VSS_80 N21
U19 GND C23 N23
VCC1_5_7 VSS_30 VSS_81
V14 VCC1_5_8 VCCPLL C22 C6 VSS_31 VSS_82 N5
+V1.8S +V1.8S_ICHHUB D1 P11
RTC_VBIAS VSS_32 VSS_83
GND L23 VCCHI_1 VBIAS Y6 RTC_VBIAS <19> D12 VSS_33 VSS_84 P13
1
1.71V - 1.89V(+/- 5%) M14 C614 D15 P20
VCCHI_2 C574 VSS_34 VSS_85
C S0-S1M:0.5A P18 VCCHI_3 HIREF M23 HUB_VREF_ICH4 <18> D17 VSS_35 VSS_86 P22 C
T22 0.01uF/25V 0.1uF/10V D19 P3
2
VCCHI_4 +VCCP VSS_36 VSS_87
V_CPU_IO_2 U18 1.0V - 1.1V(+/- 5%) D21 VSS_37 VSS_88 R18
E7 V5REF_1 V_CPU_IO_1 P14 S0-S1M: 2.5 A(CPU,MCH,ICH) D23 VSS_38 VSS_89 R21
1
1
0.1uF/10V 0.1uF/10V F6 D22 T19
2
2
VCCLAN3_3/VCCSUS3_3_1 VSS_43 VSS_94
VCCLAN3_3/VCCSUS3_3_2 F9 E16 VSS_44 VSS_95 V15
E17 VSS_45 VSS_96 V17
+V1.5S E18 V3
+V3.3S_ICH +V5REF_ICH VSS_46 VSS_97
GND FW82801DBM E19 VSS_47 VSS_98 W22
GND E21 VSS_48 VSS_99 W5
V5REF SEQUENCE E22 VSS_49 VSS_100 W8
D40 (200mA max.) F8 Y19
VSS_50 VSS_101
1
1 2 +V3.3S G19 Y7
C609 C608 VSS_51 VSS_102
3.135V - 3.465V(+/- 5%)
1
2
+V5S C565
1UF/10V GND GND
2
1
R402
1 2 C606 C567
0.1uF/10V 0.1uF/10V GND
2
1KOhm
GND
GND
B B
C615 C602 C622 C599
1
1UF/10V 1UF/10V 1UF/10V 1UF/10V +V5REF_SUS_ICH
2
/EMI /EMI /EMI /EMI R410 all decupling caps should be placed
D42
1KOhm
1N4148W-A2 close to the component pin
2
2
GND +V5REF_SUS_ICH
1
+V3.3S V5REFSUS
C621
SEQUENCE 0.1uF/10V
2
1
GND
A A
Title : ICH4-M(POWER)
ASUSTECH CO.,LTD. Engineer: charlie_xie
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 21 of 57
5 4 3 2 1
5 4 3 2 1
I2C address:D2H
3.3V+/-5%
S1M:40mA
S0:360mA
+V3.3_CLK
C227 X2 C226
2 1 CLK_X1 1 2 CLK_X2 1 2
D D
2
<=0.5" <=0.5"
R132 5PF 14.318Mhz
5PF
10KOhm
應儘量靠近各pin.
3
U12 L23 +V3.3S
18 1 +V3.3_CLK 2 1
X1
X2
<42> CLK_EN# Vtt_PWRGD# VDDREF
VDDPCI1 8
1
14 C234 C233 C195
VDDPCI2 C216 C228 C522 C221 C196 C526 C230 120Ohm/100MHz
40 VID5 VDD3V66 23
39 50 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 10uF 1UF/10V 1UF/10V 1UF/10V
2
VID4 VDDCPU1 /EMI /EMI /EMI
38 VID3 VDDCPU2 46
37 VID2
36 VID1
35 VID0 +V3.3_CLKA L22 +V3.3S +V3.3_CLK48 L21 +V3.3S
+V3.3_CLKA 2 1 2 1
R165 20
VDDA
1
FS4 FS3 FUNCTION 1 2 _CLK_ICH33 5
<18> CLK_ICH33 4"~8.5" <=0.5" FS3/PCICLK_F0 C518 C212 120Ohm/100MHz C194 C197 120Ohm/100MHz
1
0 0 100MHZ(D) R168 33.2Ohm 0.1uF/10V 0.1uF/10V
2
C229 +V3.3_CLK48 1UF/10V 1UF/10V
2 1
0 1 133MHZ 10PF 34
2
VDD48
1 0 200MHZ 10KOhm
/X
1 1 166MHZ R162
<24> CLK_MINIPCI33 1 2_CLK_MINIPCI336 FS4/PCICLK_F1
4"~8.5" <=0.5" R152
33.2Ohm 45 _CLK_CPU100 1 2
CPUCLKT2 CLK_CPU100 <3>
1
R507 <=0.5" <=0.2" 2"~8"
2 1 C225 33.2Ohm <=0.5"
10PF 1 R151 2
2
GND 10KOhm 7 49.9Ohm HOST_CLK GROUP
/X ASEL/PCICLK_F2 R148
C CPUCLKC2 44 _CLK_CPU100#
<=0.5"
1 2
<=0.2" 2"~8" CLK_CPU100# <3>
in L6 C
33.2Ohm <=0.5" Pair Width/Space:5/5mils
1 R147 2
R159 R161 Group Space:>=25mils
1 2 _CLK_PO8033
10 49 _CLK_MCH100 1 2 49.9Ohm
<33> CLK_PO8033 MULTSEL0/PCICLK0 CPUCLKT1 CLK_MCH100 <8>
1
4"~8.5" <=0.5" <=0.5" <=0.2" 2"~8" Lengeh Match:+/-10 mils
C222 33.2Ohm 33.2Ohm <=0.5"
10PF 1 R160 2
2
49.9Ohm
/X R154 33.2Ohm R158
<23> CLK_LAN33 1 2 _CLK_LAN3311 MODE/PCICLK1 CPUCLKC1 48 _CLK_MCH100# 1 2 CLK_MCH100# <8>
1
CPUCLKT0/(FS6)
51 49.9Ohm
CPUCLKC0/(FS5) CG_FS5 <20>
10KOhm /X R149
1 2 _CLK_CB139433
12 PCICLK2
<25> CLK_CB139433
1
4"~8.5" <=0.5"
C217 33.2Ohm
10PF
2
CLK33 GROUP:
/X R146
In L4 or L6 1 2 _CLK_SIO3313 R169
<31> CLK_SIO33 PCICLK3
1
1
Breakout C214 33.2Ohm <=0.5" 4"~8.5"
10PF 33.2Ohm C231
2
W/S:5/20mils(<=0.3")
2
10PF
Group Space >=20mils /X R144
1 2 _CLK_FWH33
16 R123 /X
<31> CLK_FWH33 PCICLK4
1
1
:same as C211 33.2Ohm <=0.5" 3"~12"
CLK66 10PF 33.2Ohm C186
2
B B
2
10PF
/X R141 R127
1 2 _CLK_KBC3317 32 _CLK_ICH48 1 2 /X
<30> CLK_KBC33 PCICLK5 48MHz_0 CLK_ICH48 <19>
1
1
4"~8.5" <=0.5" <=0.5" 3"~12"
C207 33.2Ohm 30 33.2Ohm C190
SDATA SDA_3S <5,9,19>
10PF 28 SCL_3S <5,9,19>
2
2
SCLK 10PF
CPU_STOP# 53 PM_STPCPU# <20,42>
PCI_STOP# 22 PM_STPPCI# <20>
/X R130 19 R145 /X
PD# PM_SLP_S1# <20,39>
1 2 _CLK_MCH66
25 43 1 2
<6> CLK_MCH66 3V66_0 IREF
1
2
Breakout R136
/X
W/S:4/20mils(<=0.3") R126 10KOhm R142 1KOhm
AGP66M 1 2 _CLK_AGP6626 41 1 2
<11> CLK_AGP66 CG_FS2 <20>
1
3V66_1 FS2
1
4"~8.5" /X <=0.5"
C185 33.2Ohm
1
GND8
GND7
GND6
GND5
GND4
GND3
GND2
GND1
R164
10KOhm
1
A 靠近CPU和MCH,以確保BCLK信號品質. A
Title : CLOCK-ICS950815
ASUSTECH CO.,LTD. Engineer: DEL_TAN
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 22 of 57
5 4 3 2 1
PCI_AD[31:0] <18,24,25,26>
+V3.3SUS
D D
<18,24,25> PCI_C/BE#0
1
R432
+V3.3SUS_LAN PCI_C/BE#1 <18,24,25>
PCI_PAR <18,24,25>
3.6KOhm
U48 PCI_SERR# <18,24,25>
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
+V3.3SUS_LAN PCI_PERR# <18,24,25>
2
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD6
EECS 1 8
CS VCC PCI_STOP# <18,24,25>
EESK 2 7
SK DC PCI_DEVSEL# <18,24,25>
1
EEDI/AUX 3 6 C652
DI ORG PCI_TRDY# <18,24,25>
EEDO 4 5
DO GND 0.1uF/10V
2
AT93C46
GND GND
The RTL8100CL should be placed
as close as possible to
U46 the 10/100M magnetic U3701.
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
GND (Less than 12cm )
SERRB
PERRB
STOPB
DEVSELB
TRDYB
CLKRUNB
AD2
GND12
GND11
GND8
VDD25_3
AD3
AD4
AD5
AD6
VDD33_5
AD7
CBEB0
GND10
AD8
AD9
NC18
AD10
AD11
AD12
VDD33_4
AD13
AD14
GND9
AD15
VDD25_2
CBEB1
NC17
NC16
NC15
GND7
PAR
VDD33_3
PCI_AD1 103 64
PCI_AD0 AD1 NC14
104 AD0 IRDYB 63 PCI_IRDY# <18,24,25>
Place R421 and R422 close to RTL8100CL 105 LANWAKE NC13 62
EECS 106 61
Place R423 and R424 close to Magnetics EECS FRAMEB PCI_FRAME# <18,24,25>
107 VDD33_6 CBEB2 60 PCI_C/BE#2 <18,24,25>
EEDO 108 59 PCI_AD16
C626 L_TDP EEDI/AUX EEDO AD16 PCI_AD17
2 1 0.1uF/10V 2 1 109 AUX/EEDI AD17 58
R421 2 1 49.9Ohm L_TDN 110 57 PCI_AD18
R422 49.9Ohm EESK NC19 AD18
111 EESK VDD33_2 56
C627 2 1 0.1uF/10V 2 1 L_RDP 112 55 PCI_AD19
R423 2 L_RDN NC20 AD19
1 49.9Ohm 113 NC21 VDD25_1 54
R424 49.9Ohm 114 53 PCI_AD20
LED2 AD20
115 LED1 GND6 52
116 RTL8100CL 51
NC22 GND5 PCI_AD21
GND 117 LED0 AD21 50
118 49 PCI_AD22
C R2307 should be placed near to the
RTL8100C(L) but away from signal
119
120
NC23
GND13
AD22
NC12 48
47 PCI_AD23
C
XTAL1 NC24 AD23
traces (i.e.L_TD+/-; L_RD+/-) and 121 XTAL1 IDSEL 46 2 1 PCI_AD16
XTAL2 122 45 R229 33Ohm
clock signals as far as possible. XTAL2 NC11
123 GND14 CBEB3 44 PCI_C/BE#3 <18,24,25>
124 43 PCI_AD24
GND15 AD24 PCI_AD25
125 NC25 AD25 42
R228 126 41
NC26 VDD33_1
AVDD33_0
AVDD33_1
AVDD33_2
ISOLATEB
Close to 1 2 LAN_RSET 127 40 PCI_AD26
VDD33_0
VDD25_0
PCIRSTB
RSET AD26
AVDD25
CTRL25
PCI_AD27
PCICLK
RTL8100CL 128 GND16 AD27 39
INTAB
REQB
PMEB
GND0
GND1
GND2
GND3
GND4
+V3.3SUS_LAN AVDDL
GNTB
5.6KOhm
NC10
AD31
AD30
AD29
AD28
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
RX+
TX+
RX-
TX-
L69 20 mil
1 2 GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
120Ohm/100Mhz
1
1 2 DVDD
L70
GND GND 120Ohm/100Mhz
AVDDL
C2304,C2305 should be placed close to
1
L_TDP C630
the power pins 3,7,20 as possible. <37> L_TDP
L_TDN GND
<37> L_TDN
L_RDP 0.1uF/10V
<37> L_RDP +V3.3SUS_LAN
2
L_RDN
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
<37> L_RDN
CTRL25
GND
ISOLATEB
<20,25,41,51> PM_SLP_S3#
PME_SB#
<19,24> PCI_INTC# PME_SB# <18>
The Crystal should be placed <17,18,24,25,30,31> BUF_PCI_RST# PCI_REQ#2 <18>
B far away from I/O ports,
important or high frequency
<22> CLK_LAN33 1
C633
PCI_GNT#2 <18>
B
signal traces (Tx, Rx,power),
10PF
magnetics or board edges.
2
X6 /X
GND
25Mhz
XTAL1 1 2 XTAL2 +V3.3S
ECERA/20PF/30PPM
1
C290 C289
1
0.1uF/10V 0.1uF/10V
2
/EMI /EMI
GND
GND GND
CTRL25
DVDD
+V3.3SUS_LAN
+V3.3 +V3.3
1 B
+V3.3SUS +V3.3SUS_LAN
20 mil
pull up to
VccSus3_3
3
E
C
2
1
Q78 30 mil 30 mil by internal
1
2
GND GND GND GND GND 0.1uF/10V 10uF 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V
2
1 B
Q80
PMBS3904
GND GND GND GND GND GND PME_SB#
<24,25,31> PCI_PME#
C
2
E
3
Title : LAN-RTL8100CL
ASUSTECH CO.,LTD. Engineer: Sleck Song
Size Project Name Rev
C
A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 23 of 57
5 4 3 2 1
D D
PCI_AD[31:0] <18,23,25,26>
125
126
802_leden# on page "function CON15
+V3.3_MPCI
key"should be output rather than input
1 2
SIDE1
SIDE2
TIP RING
3 LAN_RESERV1 LAN_RESERV2 4
5 LAN_RESERV3 LAN_RESERV5 6
<18,30,31,33> LPC_AD0 7 LAN_RESERV4 LAN_RESERV7 8 LPC_AD1 <18,30,31,33>
9 10 +V5S +V3.3S_MPCI
<18,30,31,33> LPC_AD2 LAN_RESERV6 LAN_RESERV10 LPC_AD3 <18,30,31,33>
11 12 +V5S_MPCI +V3.3S
<40> 802_LINKLED LAN_RESERV8 LAN_RESERV12 802_ACTLED <40>
<20> MPCI_WLAN_ON 13 LAN_RESERV9 LAN_RESERV13 14
15 16 R461
LAN_RESERV11 LAN_RESERV14 LPC_FRAME# <18,30,31,33>
<19,26> PCI_INTD# 17 INTB# 5V_1 18 1 2
19 20 R452
3.3V_7 INTA# PCI_INTC# <19,23>
21 22 0OHM 1 2
RESERVED9 RESERVED3 DIS_SYSBIOS <31,33>
1
23 24
C <22> CLK_MINIPCI33
4"-6" 25
GROUND15
CLK
3.3VAUX1
RST# 26 BUF_PCI_RST# <17,18,23,25,30,31>
C685 C684 0OHM C
1
27 28 0.1uF/10V 0.1uF/10V
2
GROUND4 3.3V_3 C667 C668 C666 C686 C687 C664
<18> PCI_REQ#1 29 REQ# GNT# 30 PCI_GNT#1 <18>
1
2
C683 PCI_AD31 3.3V_4 GROUND7 0.1uF/10V
33 AD[31] PME# 34 PCI_PME# <23,25,31>
10PF PCI_AD29 35 36
2
1
63 64 PCI_FRAME# <18,23,25>
inductors
3.3V_8 FRAME# C665 C663
<18,25,30> PM_CLKRUN# 65 CLKRUN# TRDY# 66 PCI_TRDY# <18,23,25>
67 68 0.1uF/10V 0.1uF/10V
<18,23,25> PCI_SERR# PCI_STOP# <18,23,25>
2
SERR# STOP#
69 GROUND14 3.3V_6 70
<18,23,25> PCI_PERR# 71 PERR# DEVSEL# 72 PCI_DEVSEL# <18,23,25>
<18,23,25> PCI_C/BE#1 73 C/BE[1]# GROUND12 74
PCI_AD14 75 76 PCI_AD15
AD[14] AD[15] PCI_AD13
77 GROUND16 AD[13] 78
PCI_AD12 79 80 PCI_AD11
PCI_AD10 AD[12] AD[11]
81 AD[10] GROUND1 82
83 84 PCI_AD9
PCI_AD8 GROUND2 AD[09]
85 AD[08] C/BE[0]# 86 PCI_C/BE#0 <18,23,25>
PCI_AD7 87 88
AD[07] 3.3V_1 PCI_AD6
89 3.3V_2 AD[06] 90
PCI_AD5 91 92 PCI_AD4
AD[05] AD[04] PCI_AD2
93 RESERVED4 AD[02] 94
PCI_AD3 95 96 PCI_AD0
AD[03] AD[00]
97 5V_2 RESERVED1 98 INT_SERIRQ <18,19,25,30,31>
PCI_AD1 99 100
B 101
103
AD[01]
GROUND6
RESERVED2
GROUND3 102
104
B
AC_SYNC M66EN
105 AC_SDATA_IN AC_SDATA_OUT 106
107 AC_BIT_CLK AC_CODEC_ID0# 108
109 AC_CODEC_ID1# AC_RESET# 110 Not support
111 MOD_AUDIO_MON RESERVED5 112 for ac'97
113 AUDIO_GND2 GROUND5 114
115 S_AUDIO_OUT S_AUDIO_IN 116
117 S_AUDIO_OGND S_AUDIO_I GND 118
119 120
POST1
POST2
AUDIO_GND1 AUDIO_GND
121 RESERVED7 MCPIACT# 122
123 VCC5A 3.3VAUX2 124
127
128
MINI_PCI
+V5S_MPCI
A A
Title : MINIPCI
ASUSTECH CO.,LTD. Engineer: Jully Ma
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 24 of 57
5 4 3 2 1
<34> SPKRCB
+V1.8
2
+V3.3SUS_ICH R455
+V3.3
100KOhm
1
1
C681 C658
4
0.1uF/10V 10uF
2
RN73A RN73B
10KOhm 10KOhm
D D
+V5
3
+V3.3S
11
G
3 2
S 2
<20> PM_RI# U52B
D
<26> MCVCC3EN# N1 MCVCC3EN#VCC_CORE18V_1 H8
1
Q85 P2 SPKROUT VCC_CORE18V_2 M8
CB_RI#_OC P1 H12 C676 C659
CB_SUSPEND# RI_OUT# VCC_CORE18V_3 0.1uF/10V 10uF
2N7002 R4 M12
2
HWSPND# VCC_CORE18V_4 +V3.3
<23,24,31> PCI_PME# R1 PME# VCC_PCI3V_1 P8
CB_GBRST# T2 P9
GBRST# VCC_PCI3V_2
<18,24,30> PM_CLKRUN# W4 CLKRUN# VCC_PCI3V_3 P10
4"-8.5" <17,18,23,24,30,31> BUF_PCI_RST# R5 PCIRST# VCC_PCI3V_4 P11
<22> CLK_CB139433 T5 PCICLK VCC_3V_1 J6
<18> PCI_GNT#0 V5 GNT# VCC_3V_2 J14
<18> PCI_REQ#0 W5 REQ# VCC_3V_3 K6
1
CB_IDSEL W7 K14
C657 IDSEL VCC_3V_4 C677 C679 C680
<18,23,24> PCI_FRAME# T10 FRAME# VCC_3V_5 F10
V10 P12 0.1uF/10V 0.1uF/10V 10uF
<18,23,24> PCI_IRDY#
2
5PF IRDY# VCC_3V_6
<18,23,24> PCI_TRDY# W10 TRDY# AVCC_PHY3V_1 A8
<18,23,24> PCI_DEVSEL# R11 DEVSEL# AVCC_PHY3V_2 B8
/X <18,23,24> PCI_STOP# T11 STOP# AVCC_PHY3V_3 A15
V11 B15 +V3.3_1394 +V3.3
<18,23,24> PCI_PERR# PERR# AVCC_PHY3V_4
R450 W11 A9
<18,23,24> PCI_SERR# SERR# AGND1
1 2 R12 B9 L72
<18,23,24,26> PCI_AD21 <18,23,24> PCI_PAR PAR AGND2
<18,23,24> PCI_C/BE#3 V7 C/BE3# AGND3 D9 1 2
100Ohm R10 E9
<18,23,24> PCI_C/BE#2 C/BE2# AGND4
<18,23,24> PCI_C/BE#1 T12 E10 75Ohm/100MHz
C/BE1# AGND5
1
<18,23,24> PCI_C/BE#0 T14 D11 Irat=200mA
C/BE0# AGND6 C703 C689 C710
AGND7 E11
J8 E12 0.01uF/25V 0.1uF/10V 10uF
2
GND1 AGND8
K8 GND2 AGND9 D13
+V3.3 L8 E13
GND3 AGND10
H9 GND4 AGND11 E14
J9 GND5 AGND12 E15
2
C K9 GND6 AGND13 D16 C
D46 R449 L9 GND7 AGND14 E16
2 1 M9 A17 JP31
<20> CB_SD# GND8 AGND15
10KOhm H10 B17 1 2
GND9 AGND16
J10 R2
1
2
L11 G16
R5S593
GND17 RSVD8 R442 R444 R443
M11 GND18 RSVD9 M16
1SS355 J12 N16 10KOhm
/X GND19 RSVD10 10KOhm 10KOhm
K12 GND20 RSVD11 T16 /X /X /X
L12 H18
1
GND21 RSVD12
F15 GND22 RSVD13 N18
B18 GND23 RSVD14 U18
+V3.3 C18 B19
GND24 RSVD15
D18 GND25 RSVD16 C19
E18 GND26 RSVD17 D19
F18 GND27 RSVD18 E19
2
2
100KOhm N2 NC1 RSVD21 J19
P4 N19 R445 R447 R446
NC2 RSVD22
P5 P19
1
1
NC5 IRQ3 PCB_VID1
F8 NC6 IRQ4 U2
1
F9 U1 PCB_VID2
C660 NC7 IRQ5
F11 NC8 IRQ7 V1
F12 V2 INT_SERIRQ <18,19,24,30,31>
2
R5C593
+V3.3
1
C654
U49 0.1uF/10V
2
1 A0 VCC 8
2 A1 WP 7
3 A2 SCL 6
4 GND SDA 5
AT24C02N
A A
Title : CB&1394(1)
ASUSTECH CO.,LTD. Engineer: Jully Ma
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 25 of 57
5 4 3 2 1
5 4 3 2 1
U52A
FUNSEL1 FUNSEL0
<27> AD19/A25 G1 CADR25 IORD# B2 AD13/IORD# <27>
<27> AD17/A24 G4 CADR24 IOWR# C2 AD15/IOWR# <27>
0 0 Not support <27> CFRAME#/A23 G6 CADR23 OE# A3 AD11/OE# <27>
<27> CTRDY#/A22 F2 CADR22 WE# E2 CGNT#/WE# <27>
D <27> CDEVSEL#/A21 F5 CADR21 CE2# A4 AD10/CE2# <27> D
0 1 SmartMedia <27> CSTOP#/A20 E1 CADR20 CE1# B5 CBE0#/CE1# <27>
<27,33> CBLOCK#/A19 E4 CADR19 REG# K5 CBE3#/REG# <27>
<27,33> RFU/A18 D1 CADR18 RESET H2 CRST#/RESET <27>
1 0 MC/SD R457 D4 J5
<27> AD16/A17 CADR17 WAIT# CSERR#/WAIT# <27,33>
1 2 R_CCLK/A16_D3 F4 M4
<27> CCLK/A16_D3 CADR16 WP/BIOIS16# CLKRUN#/IOIS16# <27,33>
<27> CIRDY#/A15 F1 CADR15 RDY/IREQ# F6 CINT#/IREQ# <27>
1 1 Memory Stick 0Ohm E5 K2
<27,33> CPERR#/A14 CADR14 BVD2 CAUDIO/SPKR_IN#/BVD2 <27,33>
<27> CPAR/A13 D2 CADR13 BVD1 L6 CSTSCHG/STSCHG#/BVD1 <27,33>
<27> CBE2#/A12 G5 CADR12 VS2# H5 CVS2 <27>
<27> AD12/A11 A2 CADR11 VS1# B3 CVS1 <27>
MC_CD#:MEMORY CARD DETECT <27> AD9/A10 B4 CADR10 CD2# M2 CCD2# <27>
<27> AD14/A9 B1 CADR9 CD1# F7 CCD1# <27,33>
<27> CBE1#/A8 C1 CADR8 INPACK# J2 CREQ#/INPACK# <27>
G2 P6 PCI_AD31
<27> AD18/A7 CADR7 AD31
H6 R6 PCI_AD30
<27> AD20/A6 CADR6 AD30
H4 T6 PCI_AD29 TPB0-_1 RN70D 7 8 /X TPB0-
<27> AD21/A5 CADR5 AD29 0Ohm
H1 V6 PCI_AD28
<27> AD22/A4 CADR4 AD28
J4 W6 PCI_AD27 TPB0+_1 RN70C 5 6 /X TPB0+
<27> AD23/A3 CADR3 AD27 0Ohm
J1 P7 PCI_AD26
<27> AD24/A2 CADR2 AD26
K4 R7 PCI_AD25 TPA0-_1 RN70A 1 2 /X TPA0-
<27> AD25/A1 CADR1 AD25 0Ohm
K1 T7 PCI_AD24
<27> AD26/A0 CADR0 AD24
A5 R8 PCI_AD23 TPA0+_1 RN70B 3 4 /X TPA0+
<27> AD8/D15 CDATA15 AD23 0Ohm
D5 T8 PCI_AD22
<27,33> RFU/D14 CDATA14 AD22
B6 V8 PCI_AD21
<27> AD6/D13 CDATA13 AD21
+V3.3 Q36 +V3.3_MC_VCC E6 W8 PCI_AD20
<27> AD4/D12 CDATA12 AD20
B7 R9 PCI_AD19
<27> AD2/D11 CDATA11 AD19
SI2301DS M5 T9 PCI_AD18
<27> AD31/D10 CDATA10 AD18
L1 V9 PCI_AD17
<27> AD30/D9 CDATA9 AD17
2 3 L4 W9 PCI_AD16
S
3 D
R5S593
<25> MCVCC3EN# <27> AD0/D3
1
SMCR/B# TPBP0
M15 SMCRE# TPBP1 B11
M18 A13 TPB0-_1 R477 1 56Ohm 2 R478 1 2 5.11KOhm
SD_D3 SMCWE# TPBN0
L19 A11
SWP1
GND2
GND1
SDCDATA3 TPBN1
SCD1
GND1
1
S4 M5 SMCD1 24.576MHZ
SD_VCC MS_RESERVED1 MS_CD# C701 C702
S3 SD_VSS2 MS_INS M6 R5C593
SD_CMD S2 M7 SMCD0 CB_AGND 15pF 15pF
2
SD_D3 SD_CMD MS_RESERVED2 SD/MS_CLK
S1 SD_DAT3 MS_SCLK M8
SD_D2 S9 M9
SD_DAT2 MS_VCC2
MS_VSS2 M10
NP_NC2 2
1
C315
5PF SD_CARD_19P
2
B B
+V3.3
/X
1 RN45A MC_CD#
10KOhm 2
3 RN45B FUN0_SD_CD#
10KOhm 4
5 RN45C FUN1_SM_CD#
10KOhm 6
7 RN45D
10KOhm 8
D24
MS_CD# 1
3 MC_CD#
FUN0_SD_CD# 2
RB717F
A A
Title : CB&1394(2)
ASUSTECH CO.,LTD. Engineer: Jully Ma
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 26 of 57
5 4 3 2 1
5 4 3 2 1
CB POWER SWITCH
CB SOCKET
D D
+V3.3
2
R472 CON14
Q92 10KOhm +AVCC CLOSE TO PCMCIA_CONNECTOR
2N7002 <26> AD19/A25 56 A25
/DEBUG <26> AD17/A24 55 A24 VCC1 17
1
54 51 +AVPP +AVPP
<26> CFRAME#/A23 A23 VCC2
53
S 2
1
C655
1
47 C656
<26,33> RFU/A18 A18
46 10uF 0.1UF/25V
<26> AD16/A17
2
A17
<26> CCLK/A16_D3 19 A16
<26> CIRDY#/A15 20 A15
D48 <26,33> CPERR#/A14 14 A14 GND_POWER1 69
1
1SS355 /DEBUG <26> CPAR/A13 13 A13 GND_POWER2 70
C661 21 71
<33> CBDEBUGEN# 2 1 <26> CBE2#/A12 A12 GND_POWER3
<26> AD12/A11 10 72
2
U53 5PF A11 GND_POWER4 +AVCC
<26> AD9/A10 8 A10 GND_POWER5 73
R467 10KOhm 1 16 11 74
VCCD0 SHDN +V3.3 <26> AD14/A9 A9 GND_POWER6
2 1 2 VCCD1 VPPD0 15 AVPPEN1 <25> <26> CBE1#/A8 12 A8 GND_POWER7 75
<25> AVCC3EN# 3 14 22 76
3.3V_1 VPPD1 AVPPEN0 <25> S0-S3:(max 1A) <26> AD18/A7 A7 GND_POWER8
4 3.3V_2 AVCC_3 13 +AVCC <26> AD20/A6 23 A6 GND_POWER9 77
1
+V3.3 5 12 24 78 C669
S0-S3:(max 1.25A) 5V_1 AVCC_2 <26> AD21/A5 A5 GND_POWER10
6 11 25 79 10uF C662
5V_2 AVCC_1 <26> AD22/A4 A4 GND_POWER11
1
1
1
7 10 26 80 0.1UF/25V
<26> AD23/A3
2
GND AVPP C674 A3 GND_POWER12
C696 C692 8 OC 12V 9 C672 <26> AD24/A2 27 A2 GND_POWER13 81
10uF 0.1uF/10V 0.1uF/10V 0.1uF/10V 28 82
<26> AD25/A1
2
A1 GND_POWER14
2
2
G571 29 83
<26> AD26/A0 A0 GND_POWER15
C
<26> AD8/D15 41 D15 GND_POWER16 84 C
<26,33> RFU/D14 40 D14
S0-S3:(max 1A) <26> AD6/D13 39 D13
+V5 38
+AVPP <26> AD4/D12 D12
<26> AD2/D11 37 D11
1
0.1UF/25V 5 86
<26> AD5/D6 D6 NP_NC2
<26> AD3/D5 4 D5
<26> AD1/D4 3 D4
<26> AD0/D3 2 D3
<26,33> RFU/D2 32 D2
<26> AD29/D1 31 D1
+V12 +AVCC 30
S0-S3:(max 0.25A) <26> AD27/D0 D0
<26> AD13/IORD# 44 IORD#
1
2
C675 C678 2、AVCC_1/2/3、AVPP都是output pin,但是前者只能output <26> AD11/OE# 9 OE#
0.1UF/25V 0.01uF/25V R441 15
0V、3.3V、5V,后者另外可output 12V,所以C2706、C2709耐voltage <26> CGNT#/WE# WE#
2
47KOhm 42 87
10V即可,而C2712要25V。 <26> AD10/CE2# CE2# P_GND1
<26> CBE0#/CE1# 7 CE1# P_GND2 88
<26> CBE3#/REG# 61 89
1
REG# P_GND3
<26> CRST#/RESET 58 RESET P_GND4 90
<26,33> CSERR#/WAIT# 59 WAIT#
<26,33> CLKRUN#/IOIS16# 33 WP
1
C653 16
<26> CINT#/IREQ# READY
0.01uF/25V 62
<26,33> CAUDIO/SPKR_IN#/BVD2 BVD2
<26,33> CSTSCHG/STSCHG#/BVD1 63
2
BVD1
<26> CVS2 57 VS2#
<26> CVS1 43 VS1# GND1 1
<26> CCD2# 67 CD2# GND2 34
<26,33> CCD1# 36 CD1# GND3 35
<26> CREQ#/INPACK# 60 INPACK# GND4 68
PCMCIA_CON_84P
B B
CB DE-BOUNCE
C697
CCD1# 2 1
270PF/50V
C641
CCD2# 2 1
270PF/50V
A A
D D
CON11
IDE_RST# 1 1
2 2 NP_NC3 47
<19> IDE_PDD7 3 3 NP_NC1 45
<19> IDE_PDD8 4 4 GND1 49
<19> IDE_PDD6 5 5
<19> IDE_PDD9 6 6
<19> IDE_PDD5 7 7
<19> IDE_PDD10 8 8
<19> IDE_PDD4 9 9
<19> IDE_PDD11 10 10
+V3.3S 11
<19> IDE_PDD3 11
<19> IDE_PDD12 12 12
<19> IDE_PDD2 13 13
<19> IDE_PDD13 14 14
15 +V5S_IDE
<19> IDE_PDD1 15
2
design guideline recommended 4.7kohm 16
<19> IDE_PDD14 16
RN6A 17
<19> IDE_PDD0 17
10KOhm <19> IDE_PDD15 18 18
1
19 19
20 R34
20 1KOhm
<19> IDE_PDDREQ 21
1
21 /X
22 22
<19> IDE_PDIOW# 23
2
23
24 24 IDE_PCSEL
C
<19> IDE_PDIOR# 25 25
C
26 26
<19> IDE_PIORDY 27 27
1
IDE_PCSEL 28 28 R33
<19> IDE_PDDACK# 29 29
30 30
31 470Ohm
<18,19> INT_IRQ14 31
IDE_PIOCS16# 32
2
32
<19> IDE_PDA1 33 33
IDE_PPDIAG# 34 34
<19> IDE_PDA0 35 35
<19> IDE_PDA2 36 36
+V5S +V5S_IDE 37
<19> IDE_PDCS1# 37
<19> IDE_PDCS3# 38 38
IDE_PDASP# 39
<30> IDE_PDASP# 39
40 40
41 41 GND2 50
42 42 NP_NC2 46
43 43 NP_NC4 48
44 44
HDD_CON_44P
1
+
CE36
47UF/6.3V
2
GND
+V5S_IDE +V5S_IDE
GND
3
RN7A RN7B
10KOhm 10KOhm
B +V3.3S B
4
3 RN6B IDE_PDASP#
10KOhm 4 IDE_RST# <29>
5 RN6C IDE_PIOCS16#
10KOhm 6
7 RN6D IDE_PPDIAG#
10KOhm 8
3
Q12B
5 UM6K1N
4
6
Q12A
2 UM6K1N
<6,11,18,33> PCI_RST#
1
GND GND
A A
Title : IDE(HDD)
ASUSTECH CO.,LTD. Engineer: charlie_xie
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 28 of 57
5 4 3 2 1
5 4 3 2 1
D D
+V5S_IDE
1
R208
1KOhm
NP_NC1
P_GND1
CON13
51
53
2
+V3.3S 1 2 IDE_SCSEL
<34> CD_L_A CD_R_A <34>
3 4 CD_GND_A
<34> CD_GND_A
<28> IDE_RST# 5 6 IDE_SDD8 <19>
1
C
<19> IDE_SDD7 7 8 IDE_SDD9 <19> C
design guideline recommended 4.7kohm 9 10 R209
<19> IDE_SDD6 IDE_SDD10 <19>
1
11 12 470Ohm
<19> IDE_SDD5 IDE_SDD11 <19>
RN25A 13 14 /X
<19> IDE_SDD4 IDE_SDD12 <19>
<19> IDE_SDD3 15 16 IDE_SDD13 <19>
2
10KOhm 17 18
<19> IDE_SDD2 IDE_SDD14 <19>
<19> IDE_SDD1 19 20 IDE_SDD15 <19>
<19> IDE_SDD0 21 22 IDE_SDDREQ <19>
2
23 24 IDE_SDIOR# <19>
<19> IDE_SDIOW# 25 26
<19> IDE_SIORDY 27 28 IDE_SDDACK# <19>
29 30 IDE_SIOCS16#
<18,19> INT_IRQ15
31 32 IDE_SPDIAG#
<19> IDE_SDA1
<19> IDE_SDA0 33 34 IDE_SDA2 <19>
<19> IDE_SDCS1# 35 36 IDE_SDCS3# <19>
IDE_SDASP# 37 38
39 40 +V5S_IDE
+V5S_IDE 41 42
1
43 44 +
45 46 CE23 +V3.3S
IDE_SCSEL 47 48
49 50 47UF/6.3V
2
3 RN25B IDE_SDASP#
10KOhm 4
cd_rom_50p 5 RN25C IDE_SIOCS16#
10KOhm 6
NP_NC2
P_GND2
52
54
7 RN25D IDE_SPDIAG#
10KOhm 8
B B
A A
Title : IDE(ODD)
ASUSTECH CO.,LTD. Engineer: charlie_xie
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 29 of 57
5 4 3 2 1
5 4 3 2 1
+V3.3
+V3.3
CON4
RP3A
near to KBC L24 30 KSI0 1
SIDE2 1KOhm 5
1 2 28 KSI7 10
28 KSI6
27 RP3B
27 KSI5 KSI1
120Ohm/100MHz 26 2 1KOhm 5
26
1
25 KSO0 10
C282 C281 25 KSO1
24 RP3C
U21 24 KSO2 KSI2
23 3 1KOhm 5
2
0.1uF/10V 0.1uF/10V 23 KSI4 +V3.3S
<18,19,24,25,31> INT_SERIRQ 63 P87/SERIRQ 22 22 10
64 21 KSO3 RP3D
<22> CLK_KBC33 P86/LCLK 21
65 71 20 KSO4 KSI3 4
<17,18,23,24,25,31> BUF_PCI_RST# P85/LRESET# VCC 20 1KOhm 5
66 19 KSO5 10
<18,24,31,33> LPC_FRAME# P84/LFRAME# 19
67 GND 18 KSO6 RP3E
<18,24,31,33> LPC_AD3 P83/LAD3 18
68 72 17 KSO7 KSI4 6
D <18,24,31,33> LPC_AD2 P82/LAD2 VREF 17 1KOhm 5 D
69 16 KSO8 10
<18,24,31,33> LPC_AD1 P81/LAD1 16
70 15 KSI3 RP3F
<18,24,31,33> LPC_AD0 P80/LAD0 15
2
31 SCROLLOCK# 14 KSO9 RN33B RN33A KSI5 7
P27 14 1KOhm 5
NUM_LED# KSI2
CHG_FULL_OC 35
P54,P55,P43,P50 are P26 32
33 CAP_LED# 13 13
12 KSI1
10
RP3G
<47> CHG_FULL_OC
<49> BAT_LEARN 36
P23
P22 wake-up event P25
P24 34 SET_PCIRSTNS# <33>
12
11 11 KSO10 10KOhm 10KOhm KSI6 8 1KOhm 5
KBC_P21 KSI0
KBCRSM
37
38
P21 inputs when KBC in 10 10
9 KSO11
10
RP3H
<41> KBCRSM
1
P20 9
standby mode P17/KSO15 39 KSO15
KSO14 8 8 KSO12
KSO13
KSI7 9 1KOhm 5
P16/KOS14 40 7 7 10
23 41 KSO13 6 KSO14
<39> WATCHDOG P42/INT0 P15/KSO13 6
22 42 KSO12 5 KSO15
<35> DE_POP_FAN# P43/INT1* P14/KSO12 5
KBCPURST_3Q 21 43 KSO11 4
KBC_GA20 P44/RXD P13/KSO11 KSO10 4 KEYDETECT1
20 P45/TXD P12/KSO10 44 3 3 K/B US UK JP
KBSCI_3Q 19 45 KSO9 2
18
P46/SCLK1 P11/KSO9
46 KSO8 2
1 KEYDETECT2 KEYDETECT1 H L L
<18,24,25> PM_CLKRUN# P47/SRDY1#/CLKRUN# P10/KSO8 1 KEYDETECT2 H H L
47 KSO7 29
<47> BAT_LLOW#_OC
BAT_LLOW#_OC 17 P50/INT5*
P07/KSO7
P06/KSO6 48 KSO6 Follow A3N SIDE1
KEYDETECT1 16 49 KSO5 ZIF_CON_28P
KEYDETECT2 P51/INT20 P05/KSO5 KSO4
15 P52/INT30/1-WIRE1 P04/KSO4 50
14 51 KSO3 +V3.3SUS GND
<39> CLR_DJ# P53/INT40/1-WIRE2 P03/KSO3
BAT_SEL# 13 52 KSO2 +V3.3SUS_ICH +V3.3
BAT_IN#_OC P54/CNTR0* P02/KSO2 KSO1
<50> BAT_IN#_OC 12 P55/CNTR1* P01/KSO1 53 KSO1 <39>
11 54 KSO0
<39> FAN_DA1 P56/DA1/PWM01 P00/KSO0 +V5S
<16> INVERT_DA 10 P57/DA2/PWM11
8
55 KSI7
DJ_LED# P37/KSI8 KSI6 RN34D
<40> DJ_LED# 74 P67/AN7 P36/KSI7 56
75 57 KSI5
<39> SWDJ_EN# P66/AN6 P35/KSI6 KSI5 <40> 10KOhm
4
+VCORE 76 58 KSI4
P65/AN5 P34/KSI5 KSI4 <40>
ACIN_OC 77 59 KSI3 +V5 RN34A RN34B
<49> ACIN_OC P64/AN4 P33/KSI4 KSI3 <40>
78 60 KSI2
<40> DISTP# KSI2 <40>
7
P63/AN3 P32/KSI3 KSI1 10KOhm 10KOhm
<40> MARATHON# 79 P62/AN2 P31/PWM10/KSI2 61
KSI0
<40> INTERNET# 80
1
P61/AN1 P30/PWM00/KSI0 62 G3N follow A3N
<40> EMAIL# EXTSMI#_3A <20>
3
P60/AN0
XIN 28 KBC_X1 keyboard Matrix Q21A
2
29 KBC_X2 Q22A
XOUT
5
KBDCLK_5S 4 UM6K1N UM6K1N
MOUSECLK_5S P75/INT41 KBC_EXTSMI KBC_GA20
C 5 P74/INT31 P40/XCOUT 27 2 6 1 HA20GATE <20> C
6 26 KBSCI_3Q 4 3
<40> INTCLK_Q3 EMAIL_LED <40> KBDSCI_3A <20>
1
KBDDATA_5S P73/INT21 P41/XCIN
7 P72
MOUSEDATA_5S 8 P71 Q22B
INTDATA_Q3 9 25
<40> INTDATA_Q3 P70 RESET# PCI_RSTNS# <33>
SCL_BAT UM6K1N
2 P77/SCL CNVSS 24 GND
SDA_BAT 3 30 +V5S
P76/SDA VSS
AVSS 73
2
+V5S
M38857 R217
CLK_KBC33
10KOhm
Input event only at P54,P55,P43,P50 are
5 RN37C KBDCLK_5S
4.7KOhm6 P54,P55,P60-P67 wake-up event inputs when
5
7 RN37D MOUSECLK_5S Q21B
4.7KOhm8 KBC in standby mode
UM6K1N
3 RN36B KBDDATA_5S KBCPURST_3Q
4.7KOhm4 3 4 KBDCPURST <20>
1
5 RN36C MOUSEDATA_5S
4.7KOhm6
C284
+V5 GND 5PF
2
+V3.3
+V3.3S
2
2
+V5
2
1 RN36A INTCLK_Q3 R50 R45 R59
4.7KOhm2
7 RN36D INTDATA_Q3 X5 8MHZ R60
4.7KOhm8 220Ohm 220Ohm 220Ohm
5
1
+V3.3 3 4 SDA_BAT
<47> SMD_BAT
1
B B
1
Q24B
RN35A BAT_IN#_OC UM6K1N LED1 LED2 LED3 LED4
+
1 10KOhm 2
3 RN35B CLR_DJ#
10KOhm 4 GND YELLOW&GREEN YELLOW&GREEN YELLOW&GREEN YELLOW&GREEN
5 RN35C BAT_LLOW#_OC
10KOhm 6
7 RN35D PM_CLKRUN# R218
10KOhm 8
1 2
2
+V3.3 1MOhm
1
1 10KOhm 2
RN30A CHG_FULL_OC C273 1 C272
7 RN30D KBCRSM
10KOhm 8
2
SCROLLOCK#
5 6 RN30C KBC_P21
10KOhm +V3.3
NUM_LED#
CAP_LED#
GND GND
2
+V3.3
<28> IDE_PDASP#
R263
10KOhm
1 RN31A SCROLLOCK#
10KOhm 2
3 RN31B NUM_LED#
10KOhm 4
1
5 RN31C CAP_LED#
10KOhm 6
7 RN31D SET_PCIRSTNS# BAT_SEL#
10KOhm 8
Q46
3
3
2N7002 D
GND
+V3.3
<47,48> BAT_SEL 11
G
A 2 S A
2
1 RN32A ACIN_OC
10KOhm 2
3 RN32B KBCPURST_3Q
10KOhm 4
5 RN32C EMAIL_LED
10KOhm 6
7 RN32D KBC_EXTSMI
10KOhm 8 GND
GND
Title : KBC-M38857
ASUSTECH CO.,LTD. Engineer: Benz cai
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 30 of 57
5 4 3 2 1
5 4 3 2 1
Super I/O
D D
FWH +V3.3S
1
C20
0.1uF/10V
2
U25
+V5S
25
24
23
22
21
20
19
18
17
16
14
13
12
11
10
72
71
70
69
68
66
65
64
63
62
61
60
59
58
57
9
8
7
+V3.3 +V5 CLOSE TO ITEIT8705F +V3.3S GND
ITE8705
DRVB#/SCCLK
MTRB#/SCRST
FA9/VID_O4/GP31
FA8/VID_O3/GP30
FA7/VID_O2/GP27
FA6/VID_O1/GP26
FA5/VID_O0/GP25
FA4/VID_I4/GP24
FA3/VID_I3/GP23
FA2/VID_I2/GP22
FA1/VID_I1/GP21
FA0/VID_I0/GP20
FD7/IRQIN3/GP17
FD6/IRQIN2/GP16
FD5/IRQIN1/GP15
FD4/IRQIN0/GP14
FD3/GP13
FD2/GP12
FD1/GP11
FD0/GP10
DSKCHG#
WPT#
INDEX#
TRK0#
RDATA#
WGATE#
HDSEL#
STEP#
DIR#
WDATA#
DRVA#
MTRA#
DENSEL#
BUF_PCI_RST#
CLK_FWH33 <22>
FWH_FGPI2
FWH_FGPI3
FWH_FGPI4
1
1
2
2
0.1uF/10V 0.1uF/10V 10uF 0.1uF/10V 116 LPT_PD7
LPT_PD7 <32>
2
PD7 LPT_PD6
PD6 115 LPT_PD6 <32>
114 LPT_PD5 RN1A
PD5 LPT_PD5 <32>
LPT_PD4 GND
32
31
30
PD4 113 LPT_PD4 <32>
4
3
2
1
26 112 LPT_PD3 2.7KOhm
FA10/GP32 PD3 LPT_PD3 <32>
GND GND GND 27 111 LPT_PD2
VPP
R/C#/CLK
A8
A9
RST#
VCC2
A10
LPT_PD2 <32>
1
FA11/GP33 PD2 LPT_PD1 FWH_FGPI1 RN1B
28 FA12/GP34 PD1 110 LPT_PD1 <32> 5 A7 IC 29 3 2.7KOhm4
29 109 LPT_PD0 FWH_FGPI0 6 28
FA13/GP35 PD0 LPT_PD0 <32> A6 GNDA
30 FA14/GP36 7 A5 VCCA 27
31 108 LPT_STB# 8 26
FA15/GP37 STB# LPT_STB# <32> <20> FWH_WP# A4/TBL# GND2
107 LPT_AFD# 9 25
AFD# LPT_AFD# <32> A3 WHUB VCC1
32 106 LPT_ERR# 10 24 FWHHINIT#
FA16/GP50 ERR# LPT_ERR# <32> A2 INIT#/OE#
33 105 LPT_INIT# 11 23 LPC_FRAME#
FA17/GP51 INIT# LPT_INIT# <32> A1 U1 WE#
34 104 LPT_SLIN# 12 22
FRD#/GP52 SLIN# LPT_SLIN# <32> <24,33> DIS_SYSBIOS A0 RY/BY#
SIOSMI# 47 103 LPT_ACK# 13 21
FCS#/GP53/SCIO ACK# LPT_ACK# <32> DQ0 DQ7
GND1
48 102 LPT_BUSY
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
FWE#/GP54 BUSY LPT_BUSY <32>
101 LPT_PE
PE LPT_PE <32>
44 100 LPT_SLCT
<22> CLK_SIO48 CLKIN SLCT LPT_SLCT <32>
14
15
16
17
18
19
20
C 86 GNDA
C
1
C305 6 R230
10PF GNDA_SIO SIN2 LPC_AD0
117 GNDD3 SOUT2/JP5 5 1 2
67 3 LPC_AD1
2
1
DCD1# 118
38 R4 R12
<18,24,30,33> LPC_AD0 LAD0
FAN_CTL3/GP62/SCPFET#
41 55
CIRRX/MIDI_IN/GP67
<18,24,30,33> LPC_AD3
2
LAD3 JSBB1/GP46 FWHHINIT#
JSBCY/GP45 54
FAN_TAC1/GP55
FAN_TAC2/GP56
42 53
FAN_CTL1/GP60
FAN_CTL2/GP61
LFRAME# JSAB1/GP42
IRTX/GP64
81 50 1 B
<23,24,25> PCI_PME# PME#/GP63/SCPRES# JSACY/GP41
TMPIN1
TMPIN3
TMPIN2
JSACX/GP40 49
1
E
VREF
C304
VIN7
VIN6
VIN5
VIN4
VIN3
VIN2
VIN1
VIN0
2
PMBS3904
10PF Q5 3
2
R11 C
91
92
93
94
95
96
97
98
90
89
87
88
73
74
75
78
79
80
82
83
84
85
2 1 1 B
<3,20> H_INIT#
/X
E
330Ohm 2
PMBS3904
B
GND B
IR_RXD <32>
IR_TXD <32>
GNDA_SIO
+VREF_SIO
+V3.3S
+V5S
2
+VREF_SIO
RN41A
4
RN41B 10KOhm
1
10KOhm C316
1
1UF/10V
3
Q26 JP15
1 B
PMBS3904 1 2
SIOSMI# SHORTPIN
SIO_SMI# <20>
C
/X
2
E
A A
+3VSUS PULL UP @ICH5 GNDA_SIO GND
CLOSE TO ITE8705
Title : SuperI/O&FWH
ASUSTECH CO.,LTD. Engineer: Lassie_Bao
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 31 of 57
5 4 3 2 1
5 4 3 2 1
1
D D
<31> IR_RXD 4 Rxd
C623 C624 C625 3
<31> IR_TXD Txd
2
2
0.1uF/10V 4.7UF/10V 0.1uF/10V +V3.3_IRED IRED_Cathode
1 IRED_Anode
TFDU4100_TR3
GND GND GND
+V3.3 R412
1 2
10Ohm
R411
1 2
10Ohm
Imax = 200 mA
R409
1 2 +V3.3_IRED
10Ohm
C C
27
CON7
D_SUB_ 25P
LPT_L_STB# 1
14 LPT_L_AFD#
LPT_L_PD0 2
15 LPT_L_ERR#
LN1 LN2 LPT_L_PD1 3
1 2 LPT_L_STB# 1 2 LPT_L_PD1 16 LPT_L_INIT#
<31> LPT_STB# <31> LPT_PD1
3 4 LPT_L_AFD# 3 4 LPT_L_INIT# LPT_L_PD2 4
B <31> LPT_AFD# <31> LPT_INIT# B
5 6 LPT_L_PD0 5 6 LPT_L_PD2 17 LPT_L_SLIN#
<31> LPT_PD0 <31> LPT_PD2
7 8 LPT_L_ERR# 7 8 LPT_L_SLIN# LPT_L_PD3 5
<31> LPT_ERR# <31> LPT_SLIN#
18
LPT_L_PD4 6
CN2A
CN2B
CN3A
CN3B
120Ohm/100MHz 120Ohm/100MHz
CN2C
CN2D
CN3C
CN3D
19
LPT_L_PD5 7
20
LPT_L_PD6 8
21
1
3
5
7
1
3
5
7
LPT_L_PD7 9
150PF
150PF
150PF
150PF
150PF
150PF
150PF
150PF
22
LPT_L_ACK# 10
23
LPT_L_BUSY 11
2
4
6
8
2
4
6
8
24
LPT_L_PE 12
LAYOUT <31> LPT_SLCT 1
L3
2 13
25
PRINT
SWAP 120Ohm/100MHz
1
PORT
26
C391
150PF/50V
2
LN3 LN4
1 2 LPT_L_PD3 1 2 LPT_L_PD7
<31> LPT_PD3 <31> LPT_PD7
3 4 LPT_L_PD4 3 4 LPT_L_ACK#
<31> LPT_PD4 <31> LPT_ACK#
5 6 LPT_L_PD5 5 6 LPT_L_BUSY
<31> LPT_PD5 <31> LPT_BUSY
7 8 LPT_L_PD6 7 8 LPT_L_PE
<31> LPT_PD6 <31> LPT_PE
120Ohm/100MHz 120Ohm/100MHz
CN4A
CN4B
CN5A
CN5B
CN4C
CN4D
CN5C
CN5D
A A
1
3
5
7
1
3
5
7
150PF
150PF
150PF
150PF
150PF
150PF
150PF
150PF
2
4
6
8
2
4
6
8
CIRCUITS(1)
+V5
2
RN42A
1
B0 B9
D <22> CLK_PO8033 3 A0 A9 22 D
<18,24,30,31> LPC_FRAME# 4 A1 A8 21
5 20 +V2.5
<26,27> CAUDIO/SPKR_IN#/BVD2 B1 B8
4
<26,27> CPERR#/A14 6 B2 B7 19 CBLOCK#/A19 <26,27>
7 18 RN42B
<18,24,30,31> LPC_AD0 A2 A7
3
8 17 3
<18,24,30,31> LPC_AD1 A3 A6 DIS_SYSBIOS <24,31> D 100Ohm
<26,27> RFU/D2 9 B3 B6 16 CSERR#/WAIT# <26,27>
10 15 Q47
<26,27> RFU/D14 B4 B5 RFU/A18 <26,27>
<18,24,30,31> LPC_AD2 11 14 LPC_AD3 <18,24,30,31> <41> PM_SLP_S4 11
3
A4 A5 CBDEBUGEN# G 2N7002
12 13
GND BEB# 2 S
6
PI5C3384
RN42C
100Ohm
3
3
D
5
Q56
11
G 2N7002
2 S
3
3
D
Q72
11
+V3.3 +V3.3 G 2N7002
2 S
2
1
R481
100KOhm
7
/DEBUG U55
2
C 2 5 C
PR#
<26,27> CSTSCHG/STSCHG#/BVD1 D Q
1
1 CP Q# 3 CBDEBUGEN# <27>
R488
1
CLR#
C712 4 8
GND VCC +V3.3
1MOhm
/DEBUG 0.1uF/10V
2
/DEBUG
0.1uF/10V
2
DISCHAGE
2
RN43A
GND +V3.3S
100Ohm
CIRCUITS(2)
1
<26,27> CCD1#
6
RN43C
+V1.5S
100Ohm
8
3
3 RN43D +V1.2S
D
Q48 100Ohm
<41,43> PM_SLP_S3 11
2
G 2N7002
7
2 S RN44A
3
3
D 100Ohm
Q57 +V1.8S
11
1
G 2N7002
2 S
4
3 +V2.5S
D
RN44B
B B
Q49
100Ohm
11 +V12S
G 2N7002
2 S
3
3
3
D
4
Q58 RN43B
11 100Ohm
PCI_RSTNS# G
2 S
2N7002
6
2
RN44C
3
3
Gen Circuit 3
D
Q50
100Ohm
11
5
G 2N7002
2 S
3
+V3.3 3
D
Q98
11
1
C688 G 2N7002
2 S
2
0.1uF/10V
2
5
3
U54 3
D
VCC 1 PCI_RST# <6,11,18,28> GND
4 Q99
<30> PCI_RSTNS#
2 2 1 SET_PCIRSTNS# <30> 11
GND R469 1KOhm G 2N7002
7ST32 2 S
3
2
1
C690
0.1uF/10V
2
A GND A
+V12
U19
+V5 3 A+ + VCC 8
1
X4 2 A- - AO
ACXI 1 2 ACXO +V5S
1
C257 +V5_AUDIO 5 B+ +
24.576MHZ BO 7
1
1UF/10V 6 B- - GND 4
1
D D
C249 C252 /EMI C572
1
15pF 15pF LM358MX
2
R404 1UF/10V
2
GND GND Q74
1KOhm 2SB1424 3
1% C571
E
GND GND GND GND
2
1 2 B 1
1
+V5_AUDIO
C
0.1uF/10V 2
R405
19.6KOhm
1
R204 R199 1% C564 C561 C547
2
1 2 AC97_BCLK 1 2 BITCLK
<19> AC97_BCLK_ICH4
1UF/10V 0.1uF/10V 10uF
2
33Ohm 0OHM R356
1
1 2
R203 C256 +V3.3S +V5_AUDIO
1 2 10PF 0OHM
<37> AC97_BCLK_MDC
2
/X
33Ohm GND GND_AUDIO
GND
1
C540 C542 C541 C258
2
GND_AUDIO
25
38
GND
1
9
U17
ACXI 2 35
VDD1
VDD2
AVDD1
AVDD2
XTL_IN FRONT_OUT_L EAR_L <35>
ACXO 3 36
XTL_OUT FRONT_OUT_R EAR_R <35>
MONO_OUT 37
AC97 AC97_SDIN0 C255 10uF
AC97_RST# 11 27 AC97_VREF AC97_VREF 2 1
<19,37> AC97_RST# RESET# VREF
BITCLK 6 28
BITCLK VREFOUT VREFOUT <36>
MDC AC97_SDIN1 AC97_SYNC_CODEC 10 C251 1UF/10V
<19> AC97_SYNC_CODEC SYNC
C AC97_SDOUT_CODEC 5 29 AFILT1 VRAD 2 1 C
<19> AC97_SDOUT_CODEC SDOUT AFILT1
1 2 AC97_SDIN_CODEC 8 30 AFILT2
<19> AC97_SDIN0 SDIN AFILT2
R400 33Ohm C254 1UF/10V
31 VRAD VRDA 2 1
PC_BEEP VRAD VRDA
12 PC_BEEP VRDA 32
PHONE 13 33 C549 0.001uF/50V
PHONE NC1 AFILT1
14 AUX_L Front_MIC 34 2 1 MIC_A <36> 2 1
15 43 C248 1UF/10V
AUX_R CENTER_OUT C543 0.001uF/50V
16 VIDEO_L LFE_OUT 44
<36> MIC1_OUT 2 1MIC1_AC97 17 VIDEO_R GPIO0 45 AUDIO_GPIO0 T194 1 TPC28t /X XTSEL AFILT2 2 1
C545 1UF/10V CD_L 18 46 XTSEL T11 1 TPC28t /X 0: 14.318MHz
CD_L XTLSEL
<36> MIC2_OUT 2 1MIC2_AC97 CD_R 20 CD_R EAPD/SPDIFI 47 EAPD
EAPD <35>1: 24.576MHz
C546 1UF/10V MIC1_AC97 21 48 SPDIFO T28 1 TPC28t /X
CD_GND
MIC2_AC97 MIC1 SPDIFO
22 39
AGND1
AGND2
MIC2 SURR_OUT_L
GND1
GND2
LINE_L 23 40 GND_AUDIO
<35> LINE_L LINE_L NC2
LINE_R 24 41
<35> LINE_R LINE_R SURR_OUT_R
ALC650
4
7
19
26
42
CD_GND
R205 0OHM
1 2
R399 0OHM
1 2
C562
RN26D D41 0.1uF/10V
7 SB_SPKR_R 1 2SB_SPKR_R_D 1 PC_BEEP
<19> ICH4_SPKR 4.7KOhm 8 2
GND GND_AUDIO
1N4148W-A2
1 RN26A GND_AUDIO
4.7KOhm2 GND
3 RN26B
4.7KOhm4
5 RN26C
4.7KOhm6
連接在一點放置在CODEC的正下面或者在其附近
GND_AUDIO
B B
C260
R211 1UF/10V
1 2 CD_L_C 1 2 CD_L
<29> CD_L_A
C607 33KOhm
0.1uF/10V C261
R212 1UF/10V
1 2 1 2 CD_GND_C 1 2 CD_GND
M_MONO_SPKRCB_D
<37> MDC_MONO
M_MONO_SPKRCB
<29> CD_GND_A
33KOhm
C262
R213 1UF/10V
1 2 CD_R_C 1 2 CD_R
<29> CD_R_A
33KOhm
+V5_AUDIO C601
RN27B
RN27A
0.1uF/10V C259
RN27D
RN27C
D17 0.1uF/10V
1 2 1 2 1 2 PHONE
2.7KOhm 1
7
5
3
1
RN69A 1N4148W-A2
R408 R206
4 68KOhm
8 68KOhm
6 68KOhm
2 68KOhm
33KOhm 33KOhm
2
R403
SPKRCB_Q
C570
3 RN69C
RN69D C 1UF/10V GND_AUDIO
2
7 1 B Q75
<25> SPKRCB 2.7KOhm 8
PMBS3904
E
6
A A
Title : CODEC-ALC650
ASUSTECH CO.,LTD. Engineer: Nanny Zhang
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 34 of 57
5 4 3 2 1
5 4 3 2 1
+V5
+VAMP
R182 1MOhm
CN17
CE37 1 2 AMP_SHDN
5
47U/6.3V 4 7
1
1
C26 C29 C24 C162 C235 C274 C383 C376 C342 C151 1 2 EAR_L_C EAR_R_Q 1 2 L67 1 2120Ohm/100Mhz EAR_R_CON 3 8
<34> EAR_L
R393 0OHM
R
+
D
6 9 D
0.1uF/10V 0.1uF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 0.1uF/10V 1 2 EAR_R_C EAR_L_Q 1 2 L66 1 2120Ohm/100Mhz EAR_L_CON 2 10
<34> EAR_R
2
2
/EMI /EMI /EMI /EMI /EMI /EMI /EMI R392 0OHM L
+
1
1
CE38 C537 C539 AUDIO JACK
1
47U/6.3V
R510 R511 100PF 100PF PHONE_5P
Headphone
2
10KOhm 10KOhm
2
GND
GND_AUDIO GND_AUDIO
GND_AUDIO
5
RN50D RN50C CN6
1
6
1 2 R374 1 2 1 2 LINE_L_CON 2 10
<34> LINE_L L
1
SE/BTL# C501 1UF/10V L63 120Ohm/100Mhz AUDIO JACK
1
GND +V3.3s +V3.3s Q19 3 PHONE_5P
D
2N7002 R368 R372 C491 C507
22KOhm 22KOhm 100PF 100PF
2
11
G
2
2 S +V12S EAR_R_C
6
GND Q71A
+V5 2 UM6K1N
1
C RN50A C
GND_AUDIO GND_AUDIO
4
10KOhm 5
3
+V3.3 Q71B
RN50B UM6K1N
3
10KOhm EAR_R_Q
14
SN74LV14 AMP_RST#
VCC EAR_L_C
6
5 6 EAPD#
<34> EAPD
6
Q18A
GND 2 UM6K1N Q70A
U58C 2
7
1
UM6K1N
3
D30
1
EAPD# 1 Q18B 1 2
3 5 UM6K1N R407 0OHM
4
GND DE_POP# 2 5
4
Q70B
DAP202K GND_AUDIO GND
+V3.3 UM6K1N R184 +VAMP
FAN_OFF <39>
3
+V3.3 EAR_L_Q 0Ohm
GND GND 1 2
+V5S
1
R271 +V3.3 1 2
1MOhm R186 0OHM
14
14
1
SN74LV14 SN74LV14 C237 C239
D55
2
2
1
GND_AUDIO GND
B
GND GND GND GND C242 RN24C U14 B
EAR_R 1 2 AMP_R_C 5 6 CAMPIN_R 21 22 SPKR+
10KOhm RLINEIN ROUT+
0.047UF/10V 20 15 SPKR-
RHPIN ROUT-
C238 1 2 1UF/10V 19 18
RBYPASS RVDD +VAMP
3
C243 1 2 1UF/10V /X
1
C218 CN16A CN16B
2 U35
AMP_MUTE TJ 1UF/10V 150PF 150PF
11 5
2
MUTE IN NC1
1
4
GND_AUDIO R156 SE/BTL# 1
9 MUTE OUT 2 2
HP/LINE# 16 3 3
10KOhm AMP_SHDN 8 GND_AUDIO 4
SHUTDOWN 4
7 6
2
LVDD NC2
2
6 LBYPASS
R390 17 WtoB_CON_4P
0OHM NC1 GND
NC2 23
/X
GND_AUDIO
1
5 3 SPKL+
C241 RN24A LHPIN LOUT+
EAR_L 1 2 AMP_L_C 1 CAMPIN_L SPKL-
10KOhm 2 4 LLINEIN LOUT- 10
THERMAL
0.047UF/10V
GND/HS1
GND/HS2
GND/HS3
GND/HS4
C(IL) R(IL)
7
CN16C CN16D
/HIGH_PASS /SPKR_EMI
8
GND_AUDIO
A GND A
R150 1 2 10KOhm
C220 1 2 68PF/50V
1 1
f(highpass)=--------------=500 f(lowpass)=----------------=106K Title : AUDIO AMP
2*3.14*C(IL)*R(IL) 2*3.14*C(150P)*R(10K)
ASUSTECH CO.,LTD. Engineer: Nanny Zhang
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 35 of 57
5 4 3 2 1
5 4 3 2 1
D D
<34> VREFOUT
MIC OP CIRCUIT
1
C210 C193
10uF 0.1uF/10V
2
S0-S1M:5V( 5 mA Typ./ 50 mA Max.)
U10
3 A+ + VCC 8
1
2 A- - AO
1
C C206 C213 C
MIC_JACK_R 1 2 MIC_OP+ 5 B+ +
R378 47KOhm BO 7 0.1uF/10V 10uF
2
2 1 MIC_JACK_C 1 2 MIC_OP- 6 B- - GND 4
R381 4.7KOhm
2
C523 NJM2100M GND_AUDIO GND_AUDIO
2
1UF/10V R377
1
2.2KOhm 1UF/10V
2
1
1
1
1 2
C514
1UF/10V R380
2
GND_AUDIO 47KOhm
1
150PF/50V C520
0.001uF/50V
2
GND_AUDIO
B B
MIC JACK
1 2 1 2 MIC2_OUT <34>
CN7 L64 120Ohm/100Mhz R387 0OHM
5
7 4 INTMIC_A <16>
8 3 R153 0OHM
MIC 9
R
6 INTMIC_LE 1 2 INTMIC_A
10 2 MIC_JACK_L 1 2 1 2 MIC_JACK
L 1
AUDIO JACK L65 R388 0OHM
120Ohm/100Mhz
MIC1_OUT <34>
1
PHONE_5P C527
C524
0.001uF/50V 0.001uF/50V
MIC JACK
2
GND_AUDIO
A A
Title : MIC
ASUSTECH CO.,LTD. Engineer: Nanny Zhang
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 36 of 57
5 4 3 2 1
5 4 3 2 1
D D
+V3.3
AC97 AC97_SDIN0
33
31
CN1
2
MDC AC97_SDIN1 1 2
NP_NC1
SIDE1
1 2 R254
3 3 4 4 MDC_MONO <34>
5 5 6 6
7 8 10KOhm
7 8
9 10 +V5S
1
9 10
11 11 12 12
13 14
C 15
17
13
15
14
16 16
18
C
+V3.3 17 18
19 19 20 20
+V3.3S 21 22
21 22 AC97_SYNC_MDC <19>
<19> AC97_SDOUT_MDC 23 23 24 24
NP_NC2
25 26 AC97_SDIN1_MDC1
<19,34> AC97_RST# 25 26
SIDE2
27 27 28 28
29 29 30 30 AC97_BCLK_MDC <34>
BTOB_CON_30P
34
32
R259 J2
1 2 AC97_SDIN1_MDC1 LAN_CON11/12 12 18
<19> AC97_SDIN1 12 SIDE2
11 11 P_GND2 16
33Ohm LAN_RXN 10 14
LAN_CON8/9 10 NP_NC2
9 9
8 8
The 10/100M magnetics U3701 should be placed as LAN_RXP 7
LAN_TXN 7
close as possible to the J3701 connector. 6 6
CON3 LAN_TXP
FOR EMI 5 5
3 R312 0OHM 4
SIDE1 RJ11_RING_CON 4
U5 L15
1 1 1 2 RJ11_TIP 3 3 NP_NC1 13
LAN_TDN 1 8 LAN_TXN 2 RJ11_TIP_CON 1 2 RJ11_RING 2 15
LAN_RDP 2 R311 0OHM 2 P_GND1
<23> L_RDP 1 RD+ RX+ 16 SIDE2 4 1 1 SIDE1 17
2 15 LAN_RDN LAN_TDP 2 7 LAN_TXP
<23> L_RDN RD- RX-
3 14 RXCT Common PHONE_JACK_12P
RDCT RXCT LAN_RDN 3 Choke
LAN_RXN WtoB_CON_2P
6
6 11 TXCT
PTCT/TDCTTXCT LAN_TDP LAN_RDP 4 LAN_RXP
<23> L_TDP 7 TD+ TX+ 10 5
8 9 LAN_TDN
B <23> L_TDN
4
TD- TX-
12
IEEE1394
/X
B
NC1 NC3
5 NC2 NC4 13
LF8423
LAN_TDN 1 2 RN8A LAN_TXN
0Ohm
1
LAN_CON8/9 1 RN48A
75Ohm 2
LAN_CON11/12 3 RN48B
75Ohm 4
RXCT 5 RN48C
75Ohm 6
TXCT 7 RN48D
75Ohm 8
1
C433
A 0.1uF/10V
A
2
Title : MDC&RJ45&RJ11
ASUSTECH CO.,LTD. Engineer: Sleck Song
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 37 of 57
5 4 3 2 1
D D
+V5 +V5USB35 L7 +V5_USB35 +V5USB35 +V5_USB35
F2 80Ohm/100Mhz
1 2 +V5USB35 2 1
1
+
1
1.5A/6V CE35 C416
R18 4.7KOhm R26 8.2KOhm
1 2 1 2 100UF/16V 0.1U
2
<20> USB_OC#35
GND GND GND
USB_PP3 USB_P3+
<20> USB_PP3
2
90Ohm/100MHz +V5_USB35
L49
4 9
3
CON10
USB_PN3 USB_P3-
<20> USB_PN3 GND3
1
USB_P3-
USB_P3+
2
3
VCC1
1P-
USB PORT 0 for WLAN
USB_PP5 USB_P5+ 1P+
<20> USB_PP5 4 GND1 USB_P0-
<20> USB_PN0 USB_P0- <16>
5 VCC2
1
USB_P5- 6 0P-
3
L50 USB_P5+ 7
90Ohm/100MHz 0P+ L46
8 GND2
1
C407 C410 C415 C411 90Ohm/100MHz
4
GND4
2
USB_PN5 USB_P5- 0.1U 0.1U 0.1U 0.1U USB_CON_2X4P
<20> USB_PN5
2
C /X /X /X /X 10 USB_P0+ C
<20> USB_PP0 USB_P0+ <16>
1
1.5A/6V CE34 C408
R25 4.7KOhm R29 8.2KOhm
1 2 1 2 100UF/16V 0.1U
2
2
<20> USB_OC#24
GND GND GND USB PORT 1 for CAMERA
USB_PP4 USB_P4+
<20> USB_PP4
USB_P1+
<20> USB_PP1 USB_P1+ <16>
1
90Ohm/100MHz
3
L52 +V5_USB24
B B
L45
4
9 90Ohm/100MHz
USB_PN4 USB_P4- CON9
<20> USB_PN4
2
GND3
1 USB_P1-
VCC1 <20> USB_PN1 USB_P1- <16>
USB_P4- 2
USB_PP2 USB_P2+ USB_P4+ 1P-
<20> USB_PP2 3 1P+
4 GND1
1
5 VCC2
90Ohm/100MHz USB_P2- 6
L51 USB_P2+ 0P-
7 0P+
8
4
GND2
1
/X /X /X /X 10
A A
Title : USBPORT
ASUSTECH CO.,LTD. Engineer: charlie_xie
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 38 of 57
5 4 3 2 1
5 4 3 2 1
D
+V5S
Fan Speed Control D
1
RN13A
10KOhm
3
+V5S
RN12A RN13B
+V3.3S
2
47KOhm 10KOhm
RN12D
3
7 8
4
RN12B
R133
47KOhm
47KOhm
5
1 2
RN13C +V5S
100KOhm
4
U11 10KOhm
6
+A
1
SW: FAN_DA1 must be low during S3 C517 C513
2
10uF 0.1uF/10V
5
RN12C 1
OUTA
CPU
4
+V3.3S 47KOhm R385 HOLD1
D39 GND 1
1 2 1 2 FANSP1 2
<20> CPUFAN_SPD_A WTOB_CON_3P
3
1
CON12
FAN
2 +V5S 1SS355 HOLD2
-A 10KOhm
C525 C512
5
1
2
0.1uF/10V 100PF
5
C200
RN11C RN11A RN11B
GND
2
0.1uF/10V
7
10KOhm 10KOhm 10KOhm GND GND GND
C RN13D C
Can GND GND_FAN1
10KOhm
6
1
Swap
3
C519 3
D
1
<30> FAN_DA1 5
2
+B R384 0.1uF/10V Q17 C511
7 FAN_ON1 1 2 11
2
D15 OUTB G NDS351N 0.1uF/10V
1KOhm 2 S
FOR ESD
<5> OS#_OC 1
2
3 6 -B
R528 1 0Ohm 2 2 +V5S
<5,20> PM_THRM#
6
/X DAP202K
Q100A 4 8 GND
V- V+
3
1
Q100B LM393DR
1
2
0.1uF/10V
7
GND
RN11D CPU FAN will be forced on:
10KOhm 1) Thermal Sensor Over-temperture(PM_THRM#)
2) PROCHOT asserted(CPU)
3) WATCHDOG asserted(KBC)
8
GND
+V5S
B B
Q86A
Audio DJ
2
UM6K1N +V3.3S
<30> CLR_DJ# 1 6
+V5S
+V3.3
1
+V3.3A
RN74A
2
3
+V5 10KOhm
R454 R456 RN74B
Q86B 8.2KOhm
2
5
4 3 5 RN74C +V3.3A
<20,41,51> PM_SLP_S4# 10KOhm 6 1 2
4
C671 0.1uF/10V
SWDJ_EN# <30>
1
GPIO
1
G
POWER OFF GND
1
U51A
2 S
3
<20,22> PM_SLP_S1# 2 3
6
D
10
3 6
CLR
5
2 5 7 RN74D 2 2N7002
10KOhm 8 12 9
PR
+V3.3A D Q UM6K1N D Q
1
+V3.3A 7 14
CLR
UM6K1N
1
0.1uF/10V
2
A GND A
D47
DJ_SW# 2 1 SWDJ_EN#
When power on to OS, BIOS will set CLR_DJ# low.
74LV74 will be cleared always.
1SS355
Use D to Enable AudioDJ in OS.
Title : FAN&Audio DJ
ASUSTECH CO.,LTD. Engineer: BENZ CAI
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 39 of 57
5 4 3 2 1
5 4 3 2 1
MARATHON# <30> EMAIL# <30> INTERNET# <30> DISTP# <30> PWR_SW# <41>
D D
MARATHON# EMAIL# INTERNET# DISTP# PWR_SW#
1
D6 D8 D11 D12 D5
1 1 2 2 1 1 2 2 1 1 2 2 1 1 2 2 1 1 2 2
3 3 4 4 3 3 4 4 3 3 4 4 3 3 4 4 3 3 4 4
SW_4P 181K /X SW_4P 181K SW_4P 181K SW_4P 181K SW_4P 181K
2
/X /X /X /X
J1 +V3.3
+V_DCJACK A/D_DOCK_IN
7 4
C L5 C
1
5 4532
2 680 Ohm/ 100MHz R19 2 1 10KOhm MARATHON# C27 1 2 0.1uF/10V
1
1
C11 R42 2 1 10KOhm INTERNET# C57 1 2 0.1uF/10V
C17 C18 C19 R43 2 1 10KOhm DISTP# C58 1 2 0.1uF/10V
2
0.1UF/25V
2
DC_PWR_JACK_4P L2 10uF/25V 1UF/25V 0.1UF/25V
GND_DCJACK
4532 GND
680 Ohm/ 100MHz
1 2
GND
DC Power Jack R296 0OHM
/EMI
+V5 +V5
1
RN71A RN71B
10KOhm 10KOhm
2
+V5 +V5
R413
1 2 802_LED_EN#_R
470Ohm
3
Q77B
2
B B
5 UM6K1N
R420
4
6
CON5
10KOhm
Q77A 22
802_LED_EN# UM6K1N GND2
<20> 802_LED_EN# 2 1 +V5S 20 20
3
802_LED_EN#_R 19
1
Q81B 19
+V5 18 18
DJ_LED 5 UM6K1N EMAIL_LED#_R 17
CHG_LED#_R 17
16
4
16
6
+5VLCM 15 15
Q76A Q81A R419 PWR_LED#_R 14 14
3
UM6K1N
<30> DJ_LED# 2 UM6K1N 1 2 470Ohm DJ_LED_R <30> KSI3
DJPLAY# 13 13
Q76B /X DJSTOP# 12
<30> KSI5
1
DJFWARD# 12
<24> 802_ACTLED 5 UM6K1N 2 802_LINKLED <24> <30> KSI2 11 11
DJBWARD# 10
<30> KSI4
4
/X DJ_SCAN 10
<39> DJ_SCAN 9 9
2
DJ_LED_R 8
R523 R524 DJ_SW# 8
<39,41> DJ_SW# 7 7
10KOhm 10KOhm 6 6
/X /X +V5S +V5S_TP 5
INTCLK_Q3 5
GND <30> INTCLK_Q3 4
1
L71 INTDATA_Q3 4
<30> INTDATA_Q3 3 3
1 2 2 2
1 1
+V5 80Ohm/100Mhz 21
GND1
1
GND GND
C635
FPC_CON_20P
2
+V5 +5VLCM 0.1uF/10V
GND GND
GND
2
R418
10KOhm
5
RN71C RN71D
1
R525
R414 R416 Q102B
1 2 470Ohm EMAIL_LED#_R 1 2 470Ohm CHG_LED#_R <47> PWR_LED_UP 2 1 5 UM6K1N
4
6
Q102A
DJ_LED 2 UM6K1NGND Title : FUNCTION KEY
1
1
R285
1
10KOhm R282
D28
2
U38 10KOhm
<47,49,50> AC_APR_UC 1
<42> VRM_PWRGD 1 A 5 3 /X
2
VCC
PM_SLP_S4# 2 U37
DLYS3_CPUON 2 B 3V_ON <44>
RB715F 1 5
NC Vcc
3
3 GND 4 D22 3
D
Y PM_PWRBTN 1 2 2 Q59
+V3.3 NC7SZ08P5X A R292
3 4 1 2 11 2N7002
D 1SS355 GND Y
D
1
R13 G
100KOhm C359 10KOhm 2 S
2
1
1UF/10V NC7SZ14P5X
2
R503 +V3.3 D16
PWR_SW# 1
10KOhm U31 FOR BAT MODE 3
1 A 5 DJ_SW# 2
2
VCC
PM_SLP_S3#
+V3.3 +V3.3 +V3.3
FORCE_OFF# IF PWROK FIALED,SHUTDOWN +3.3VSUS.
1
C372 R274
SW6
3
2 1 3
D
1
1 2 1MOhm Q52
R286 1 2 C698
0.1uF/10V
2
3 4 0.1uF/10V 11 2N7002
2
10KOhm 3 4 /X G
2 S
3
U32 3
SW_4P D
2
1
5 1 Q44
U39 Vcc NC D23 C351
5 1 2 1 2 PM_VGATE 11 2N7002 1UF/10V
2
Vcc NC A G
2 4 3 1SS355 2 S
2
A Y GND
1
PM_VGATE 4 3 C373
<20> PM_VGATE Y GND NC7SZ14P5X 0.1uF/10V
2
+V3.3SUS +V3.3SUS
NC7SZ14P5X
1
[Q] Can 'PM_VGATE delay 1ms' be removed? R198
C C
2
A: Can't remove it. boot failed if
10KOhm R197
removed. But C4101 can be removed. U16
ICH4-M 1KOhm
2
SYSTEM PWR SEQUENCE PST9128NR
5 VCC
1
CPU_VRON VRMPWRGD
MAX1987 +VCCRTC->RTCRST#->+5VAO->+3.3/1.8VSUS->RSMRST#-> RS#
+V5 VGA_PWRGD VOUT 4 PM_RSMRST# <20>
MAX1844 1 NC
1
PWROK SLP_S4#->SLP_S3#->VCCLAN->LANPWROK->VCC->VCORE-> C250 SUB GND
DLYS3_CPUON 1UF/10V
2
PWROK->VGATE->SUSSTAT#->PCIRST# Prevent RTC
2
3
R187 drains large
SLP_S3# 22KOhm current
DELAY
53 ms CPU:+VCORE,+VCCP,+1.8S
1
SLP_S4#
LTC3728LX
NB:+1.2VS,+1.5VS,+2.5V,+VCCP,+V1.8S
CPUPWRGD
SB:+V1.5SUS,+V3.3SUS,+VCCP,+1.5VS,+V3.3S,+V1.8S +V3.3A
DOTHAN
2
DDR:+2.5V,+1.25V,+1.25VS R291
100KOhm PM_SLP_S4# <20,39,51>
Q97
11
2N7002
G
+V3.3SUS +V3.3SUS 3 2
S 2
D
+V3.3
B B
1
C21 Q63
11
2N7002
1
G
2
+V3.3SUS R272 /EMI 3 2 1 2
S 2
DJ_SW# <39,40>
0.1uF/10V
D
2
100KOhm
1SS355
U28F U28E
14
14
2
VCC VCC
DLYS3_CPUON 12 13 10 11 +V3.3SUS R281
2
GND GND 10KOhm
1
R295
7
1
C352 100KOhm
1
2
2
1
1SS355 100KOhm +V3.3A
U28B U28A
Q96
14
14
2
1
SN74LV14 SN74LV14 2N7002
+V3.3SUS VCC VCC D51
PM_PWRBTN
2 S
4 3 2 1 3 2 1 2
D
<20> PM_PWRBTN# PWR_SW# <40>
3
U28D GND GND +V3.3SUS
14
1SS355
G
11
SN74LV14
7
7
VCC
1
8 9 PM_SLP_S3#
<33,43> PM_SLP_S3 PM_SLP_S3# <20,23,25,51>
1
C382 C360
GND 0.1uF/10V +V3.3SUS +V5S 0.1uF/10V R493
2
7
10KOhm
2
1
Q95
1
Q62
G
2N7002
1
3
2 S
3
D 2N7002 2 3 LID_ICH4#_3A <19>
R502
D
<20,23,25,51> PM_SLPDLY_S3#
100KOhm
A G
11
KBCRSM <30>
D52
A
2
S 2
+V3.3SUS 1 2 LID_SW# <16>
2
1SS355
1
U28C
14
C724
VCC SN74LV14 0.1uF/10V
2
6 5 PM_SLP_S4#
<33> PM_SLP_S4
GND Title : PWR & RESET SEQ
7
TPC28t TPC28t
D D
TPC28t TPC28t
TPC28t TPC28t
1
1
1
C140 C477 + C201 + C202
7343
7343
5750
5750
C466 C459 15UF/25V 15UF/25V
1UF/25V 100PF /VCORE /VCORE
0309
2
10uF/25V
10uF/25V
/VCORE /VCORE
5
6
7
8
+5VO
for debug only Q67
D
R131 GND
+5VO IRF7413Z
G
2 1
S
VR_VID0 R98 1 2 1KOhm VR_VID1 VID 0 1 2 3 4 5 PCPU_GND
/X
4
3
2
1
1.308V 1 0 0 1 1 0 10Ohm T41 T42 T43 T44 T45 +VCORE T46
1
VR_VID2 R97 1 2 1KOhm VR_VID3 GND
1
/X 0.956V 1 1 1 1 0 1 C175 TPC28t TPC28t TPC28t TPC28t TPC28t TPC28t
C192
2
VR_VID4 R99 VR_VID5 4.7UF/10V
1 2 1KOhm L55 R58
1
/X 4.7UF/10V
1 2 1 2
0.56UH 3mOhm
GND
T47 T48 T49 GND
5
6
7
8
1
U9 + + T50 T51
2
R117 Q66 CE7 CE8
D
TPC28t TPC28t TPC28t
1 2 12 36 C173 D10 330UF/2V TPC28t TPC28t
+5VO VCC VDD IRF7832 470UF/2.5V
G
/X
S
1
2
100KOhm 0.1UF EC31QS04
42
1
SYS_OK V+ R100 2.7Ohm
<45> MCH_OK 22
4
3
2
1
1
CLK_EN# SYSOK
<22> CLK_EN# 24 CLKEN# BSTM 32 1 2
C VRM_PWRGD 23 C
<41> VRM_PWRGD IMVPOK
34 D14 2 GND
VR_VID0 DHM
<3> VR_VID0 30 D0 3
1
VR_VID1 29 33 1
<3> VR_VID1 D1 LXM
VR_VID2 28 C429
<3> VR_VID2 D2
VR_VID3 27 35 RB717F 4700PF/25V
<3> VR_VID3
2
VR_VID4 D3 DLM /X PCPU_GND
<3> VR_VID4 26 D4
VR_VID5 25 37
<3> VR_VID5 D5 PGND
13 CMP
GND1
6 S0 GND2 49
7 46 GND
S1 CMN R104 511Ohm
8 S2 CMP 45
20 1 2 CSP
OAIN+
3 B0 OAIN- 19
4 B1 1 2
5 B2 FB 18
R108 511Ohm AC_BAT_SYS
GND R114 1 2 0Ohm DPRSLPVR 43 16
<20> PM_DPRSLPVR SUS NEG
C422
R121 1 2 0Ohm STPCPU# 44
<20,22> PM_STPCPU# DPSLP#
C427
R112 1 2 1KOhm /X PSI# 21
<3> PM_PSI# PSI# 0309
1
R113 1 2 1KOhm 17 R111 C419 C430
+5VO CCI
R129 1 2 0Ohm VRON 9
<20,41> CPU_VRON SHDN# C184 1MOhm
10uF/25V
10uF/25V
15 1UF/25V 100PF
2
POS
5
6
7
8
TON--OPEN:DH on-time=300kHz 2 2 1
1
TON Q69
D
14 48 470PF/50V PCPU_GND T53 T54 T55 T56 T57
CCV CSP IRF7413Z
S
10 47 T52 TPC28t TPC28t TPC28t TPC28t TPC28t TPC28t
REF CSN
4
3
2
1
T58 DPRSLPVR R110 C183 L61 R92
1
1
1
11 41 1 2 1 2 1 2 1 2 +VCORE
ILIM BSTS
2
R379
TPC28t R394 fSLEW = 39 2.7Ohm 0.56UH 3mOhm (25A)
100KOhm DHS 0.1UF
320kHz*47k/RTIME
1MOhm 1 40
2
TIME LXS
2
T59 STPCPU#
1
1
1
31 38 D13 + +
DD0# DLS
1
C516 100PF
B B
TPC28t GND 270PF/50V 0.22UF/10V R376 MAX1987ETM T60 T61 T62 0.1UF/25V T63 T64
2
2
5
6
7
8
75KOhm R128 R119 R120 470UF/2.5V 330UF/2V
2
Q68
D
1 2 1 2 TPC28t TPC28t TPC28t TPC28t TPC28t
2
S
2
1
TPC28t R124 R116 R122 C188 R125
4
3
2
1
1 2 1 2 1 2 2 1 1 2
T66 VRON 100KOhm 1.21KOhm 4.7KOhm 1KOhm
1 4700PF/25V GND
1
GND
C476
TPC28t 4700PF/25V
2
/X
GND PCPU_GND
A A
Title : Vcore
ASUSTECH CO.,LTD. Engineer: EDDY ZHAO
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 42 of 57
5 4 3 2 1
5 4 3 2 1
D D
2200PF/100V
2
1
C44
1
R30 0.1uF/10V C16 C413 C414
22Ohm C15 0.1UF/25V 10uF/25V 10uF/25V M10-P: [email protected], 8.0A
2
1
C34 JP28 M11-P: [email protected], 7.5A
2
4.7UF/10V D9 VGACORE_GND 1 2 M11-P: [email protected], TBD
5
6
7
8
F01J2E
Q64 SHORT_PIN
D
2
TON = float, fsw = 300kHz Ideally, M11: L = 1.25~1.55uH / /X GND
2
TON = VCC, fsw = 200kHz R35 SI4800DY
G
Irat = 8.7A / LIR = 30%
S
0Ohm GND
/X
4
3
2
1
U2
T67 T68 T69 T70 T71 T72
1
1844_CS 1 20
R67 100KOhm CS DH 1844_CS
2 LATCH# LX 19 TPC28t TPC28t TPC28t TPC28t TPC28t TPC28t
+V5 1 2 3 18 1 2 2 1
SHDN# BST R36 0OHM C42 0.1UF/25V L47 JP26
4 17
1
OVP SKIP#
3
Q13 3 5 16 1 2 1 2
D FB V+ 1 2 +VGACORE
2N7002 6 15
OUT TON
1
7 14 1.5UH 3MM_OPEN_5MIL
ILIM VCC
2
5
6
7
8
1
<33,41> PM_SLP_S3 11 C79 1 2 8 REF VDD 13 Irat=10A T75 T76 + + /X
1
G 0.1uF/10V R56 R46 10KOhm Q65 CE33 CE32
D
9 12
2
2 S UVP DL JP27
2
2
T73 10KOhm T74 TPC28t C421 C424
10 11 TPC28t TPC28t
2
PGOOD GND
1
R55 APM4410KC D4 0.1uF/10V 1UF/10V 220UF/2V 330UF/2V
G
1 1 2
2
49.9KOhm C41 1 2
MAX1844EEP FS1J4TP
1
1
1
4
3
2
1
0.22UF/10V /X
1
1
2
GND
2
2
S 2 GND
G
<11> PWR_PLY 1 1 GND GND GND
R53
T77 Q14 2KOhm GND GND
1
1 2N7002 D VGACORE_GND
3
3
TPC28t
B B
2
R54
T78 T79 0Ohm
TPC28t TPC28t
1
1
<41> VGA_PWRGD
<11,20> PM_C3_STAT#
M10/M11:
M9+X:
R4306 = 10KOhm, 10-004401030
R4306 = 8KOhm, 10-003418026-21 R4308 = 2KOhm, 10-004412020
R4308 = R4309 = 2KOhm, 10-004412020 R4309 = 0Ohm, 10-004400000
PWR_PLY=H, VGACORE=1.25V PWR_PLY = H, VGACORE=1.0V
PWR_PLY=L, VGACORE=1.5V PWR_PLY = L, VGACORE=1.2V
A A
Title : VGACORE
ASUSTECH CO.,LTD. Engineer: Pommy Lu
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 43 of 57
5 4 3 2 1
D D
Q84A
6
UM6K1N
R440
2 1 2 VREF5
1
Q84B 100KOhm
3
UM6K1N
5 SUSC#_PWR <45,46,51>
2
4
R439
100KOhm
1
T80
3V_ON
<41> 3V_ON
TPC28t
1
D44
1
<45,50> SHUT_DOWN# 3
2 AC_BAT_SYS
C645
R433
1
RB715F 1 2
1
C644 C640
1
D54 10Ohm
2
1UF/10V 採用改進的"星形地"
0.01U
C 1 0.01U C647 C
2
1
3 接法:將與輸入和輸出
<41,47> FORCE_OFF# 2 1UF/25V 電容器位於PCB同層
2 C309 C313
10uF/25V 0.1UF/25V 的低阻抗,大面積銅箔
2
作為中心接地點,與
RB715F INTVCC去偶電容器
INTVCC去偶電容器是否 的底層,電壓反饋電阻
連接在IC的附近並介乎 分壓器的底層和IC地
INTVCC引腳與電源接 SGND引腳連接
JP14
地引腳之間?增加一個 PSYS_GND 1 2
+5VO
緊靠著INTVCC引腳和
PGND引腳放置的1uf T81
SHORT_PIN
陶瓷電容器有助於改善 /X +12VO
噪聲特性. TPC28t
高端N溝道MOSFET 彼此相距 Q27
1
LTC3728LX Vosense引腳阻性 是否在1cm以內並採用了一個 D19 1
分壓器是否連接至Cout的正 連結於CIN的公用漏極?不要試 VOUT
1 2 3 VIN
極?阻性分壓器必須連接在 圖分離兩個通道的輸入去偶, 2
GND
1
Cout的正端和信號地之間. 因為這樣會形成一個大諧振環路.
R4403和R4410連線不應 U47 FS05J10TP
C636 R428
32
31
30
29
28
27
26
25
流輸入線分割開.
4
SENSE1+
NC_3
SENSE1-
RUN/SS1
TG1
SW1
NC
PGOOD
1
D1_1
107KOhm Q33
S1/D2_3 D1_2
G2
S2
1
1
C306
SI4814DY
1
(4.5A) C303
S1/D2_2
S1/D2_1
2
1 24 T82 L27 4.7u T83 T84 T85
2
VOSENSE1 BOOST1 +5VO 4.7u
2 23
G1
PLLFLTR VIN +5VAO D43 C643 4.7UH
3 22 TPC28t TPC28t TPC28t TPC28t
5
PLLIN BG1 +5VO
4 FCB EXTVCC 21 1 2 1
5 20 +5VAO 3 0.1UF R232
1
ITH1 INTVCC
6 SGND PGND 19 2 1 2
7 18 T86 C646
3.3VOUT BG2
2
8 17 2 1 10mOhm
VOSENSE2
ITH2 BOOST2
1
R429 RB717F 0.1UF +
SENSE2+
RUN/SS2
NC_2
33 100UF/6.3V
SW2
TPC28t TPC28t
1
2
TG2
2
式的IC信號地引腳和Cintvcc的
1
B 接地返回必須返回組合Cout的 B
9
10
11
12
13
14
15
16
1
負機.高端N溝道MOSFET,肖特
10uF/25V
+ C332
基二機管和Cin電容器形成的
C331
CE39
4.7U/25V 通路應具有短引線和PC軌跡.
1UF/25V
2
2
輸出電容器的負端應儘可能
2
JP19 靠近輸入的負端連接,方法是把
PSYS_GND PSYS_GND 電容器相互緊挨著放置,並使其
1 2 原理上述的肖特基二機管環路.
使開關結點(SW1,SW2),
高端珊機節點(TG1,TG2) SHORT_PIN
1
4
和升壓節點(BOOST1,BOOST2) /X
遠離敏感的小信號節點,
D1_1
Q37
S1/D2_3 D1_2
G2
尤其是相反通道的電壓和 S2
C637 C725 C726 C638
電流檢測反饋引腳.所有這 SI4814DY
1
SENSE-和SENSE+
220PF/16V
220PF/16V
0.001uF/50V
0.001uF/50V
S1/D2_2
S1/D2_1
布線?SENSE-引腳
並佔用最小的PC軌跡面積.
8
1
間的濾波電容器 (4.5A)
1 2 1 2 1 2
應儘可能靠近IC. 1 2
應確保在SENSE電阻器 5.2UH 10mOhm 1MM_OPEN_5MIL
上採用開爾文連接時能 /X
進行準確的電流檢測.
2
1
2
15KOhm
R426 C642
15KOhm
R425
2
1UF/10V
1
+
1
CE31
1
C310
1
120UF/4V
2
1UF/10V
T94 T95
C639 180PF/50V
2 1 TPC28t TPC28t
R427
2 1 1 2 +3VO
1
R430 64.9KOhm
20KOhm
A A
Vref=0.8V
Title : SYSTEM
ASUSTECH CO.,LTD. Engineer: NANNY ZHANG
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 44 of 57
5 4 3 2 1
5 4 3 2 1
TPC28t TPC28t
JP21
5
6
7
8
R235 8.06KOhm
1
1
VREF5 C319 C329 Q31
D
1 1 2 2 +V5SUS T98
1
0.001uF/50V C312
2
1MM_OPEN_5MIL 3900P C333 SI4800DY
G
close ic 10uF/25V TPC28t
2
1
/X 2 1 JP13
1
T99 +2.5VGND 1 2 T100 T101 T102
4
3
2
1
1
R242 R246 0.1UF
1
19.6KOhm TPC28t +2.5VO SHORT_PIN TPC28t TPC28t +V2.5 TPC28t
330Ohm R249 /X
2
VREF5 L26 1.5UH JP9
1
330Ohm +2.5VO
D 1 2 1 1 2 2 D
2
ON_1.5 T103 T104 3MM_OPEN_5MIL
1
100KOhm
+ + /X
5
6
7
8
TPC28t CE30 CE26 TPC28t
R252
2
R256
D
120UF/4V 120UF/4V
2
1 2 D20 Q32
1
D26 R234 IRF7811A
S
2
1SS355
2
2 1 Q38A 13KOhm AC_BAT_SYS
1
UM6K1N C339 10KOhm R245
4
3
2
1
1SS355 2 2 1
1
0.01uF/25V 10KOhm VREF5 +2.5VGND
2
3
1
R508 AC_BAT_SYS
1 2 5 Q38B /X
<46,47,51> SUSB#_PWR TPC28t
1
R265 2.7Ohm
UM6K1N 1 2
4
1
120KOhm C314
1
0.01uF/25V R255 5.36KOhm 10uF/25V
2
2 1 Q29 T106
1
2
C727 C328 C340 0.1UF/25V T107 T108
0.22UF/10V /X 1 8 +1.5VO TPC28t +V1.5S
2
1
1
D1_1 G1
+2.5VGND C347 TPC28t TPC28t
2
1
C327 +1.5VGND
0.1UF/25V
2 7
1
1
D1_2 S1/D2_3
3300P C345 0.1UF L25 JP5
2 2
1
1
C320 close ic 3 6 1 2 +1.5VO 1 2
D25
G2 S1/D2_2 1 2
48
47
46
45
44
43
42
41
40
39
38
37
GND 5600P
2
2
S2 S1/D2_1
2.7KOhm /X
INV1
FLT
LH1
OUT1_U
LL1
OUT1_D
OUTGND1
TRIP1
VIN_SENSE12
TRIP2
OUTGND2
OUT2_D
1
1SS355 SI4814DY TPC28t +
1
CE25 T110
1
R241 JP17 100U/2V
1
C C
1 36 +1.5VGND 1 2 TPC28t
2
1.8KOhm ON_2.5 FB1 LL2
2 SS_STBY1 OUT2_U 35
3 34 SHORT_PIN /X
2
1
INV2 LH2
4 FB2 VIN 33 +3VALWAYS_T MCH_OK <42>
ON_1.5 5 32
SS_STBY2 VREF3.3 +5VO
6 31 VREF5 VREF5
PWM_SEL VREF5
100KOhm
7 CT REG5V_IN 30
8 GND LDO_IN 29 2 1 C344 0.1UF/25V /X R233 20mOHM C377 T111
1
47pF/50V
9 28 1 2 4.7UF/10V +VCCP
2
REF LDO_CUR
1
3
R240 1 100KOhm2 10 27 3
STBY_VREF5 LDO_GATE TPC28t D
1
C325
R431
0.1UF/25V
VIN_SENSE3
C321
1
PG_DELAY
STBY_LDO INV_LDO
SS_STBY3
OUTGND3
C348
1 2 11
2
2
1 2
1
OUT3_U
OUT3_D
G 2N7002
PGOUT
close IC
GND
2 S
5
6
7
8
TRIP3
1MM_OPEN_5MIL 3
INV3
2
FB3
LH3
LL3
Q28 /X C Q82
D
R1
2
2 B DTC114YKA
4.7UF/10V
<44,50> SHUT_DOWN# SI4800DY
TPS5130
S
13
14
15
16
17
18
19
20
21
22
23
24
SUSB#_PWR 1 2 E
R238 100KOhm +1.2VGND C346 0.1UF/25V T112 follow A3N R2 transistor far away from mos
4
3
2
1
VREF5 2 1
VREF5
100KOhm
2.7KOhm
/X TPC28t U24
1
D21 1
2 1 R260 R261 1 5
1
OUT CD
2
1
R248
100U/2V
UM6K1N C538 18.7KOhm 4.7KOhm +
0.1UF/25V
C330 0.1UF/25V
T114
CE27
2
1
7.5KOhm
/X AC_BAT_SYS
C336 0.1UF/25V
TPC28t
1
1
3
2
2200P
C292
Q39B C341 0.1UF GND
2
1
B UM6K1N 2 1 B
1
1
SUSB#_PWR 5
2
1
R237 close ic
4
2
C324
R251
Q34 10uF/25V
2
49.9KOhm TPC28t TPC28t TPC28t
/X 1 8 +V1.2S
D1_1 G1
L28 JP10
1
2
R243 2 7 1 2 +1.2VO 1 2
D1_2 S1/D2_3 1 2
100KOhm
1
S2 S1/D2_1
+
1
2
0.001uF/50V
2
22KOhm
6
1
2 1 UM6K1N +1.2VGND 1 2
1
1
2 0.01uF/25V
1SS355 SHORT_PIN
1
C338 /X
2
3
R509 Q40B
1 2 5 UM6K1N
<44,46,51> SUSC#_PWR
4
120KOhm
1
C728
A A
0.22UF/10V
2
5 4 3 2 1
5 4 3 2 1
D D
T119 T120
TPC28t TPC28t
(MAX: 30mA) JP25 (Load: typ. 7mA)
1
+3VALWAYS_T 2 2 1 1 +V3.3A
1MM_OPEN_5MIL
/X
+V3.3 +V2.5 +3VO
JP22
T121 T122
AC_BAT_SYS T123 1 2
1 2
2
TPC28t TPC28t
2
TPC28t 1MM_OPEN_5MIL JP4 1MM_OPEN_5MIL R225
/X /X U22 R224
1
1 100KOhm
+V2.5 2 2 1 8
1
1 VIN PGND 100KOhm
2 7
1
VFB AGND
3 6
1
VOUT0 VCCA
2
U29 1 2 4 5
GND
+V1.25S 1 2 VOUT1 REFEN
1 IN OUT 5
R268
6
2 JP2 1MM_OPEN_5MIL + CM8562 Q23A
9
GND
1
16.9KOhm /X C280 CE24 C286 C278 R220 UM6K1N
1
3 4 C354 100U/2V 2
EN LEAA ADJ 10uF 10uF 0.1UF/25V 100KOhm
1
4.7U
2
MIC5233BM5 R275 T124
1
1
3
C357 Vref = 1.24V Q23B
TPC28t UM6K1N
1UF/25V 10KOhm 5 SUSB#_PWR <45,47,51>
2
4
C C
V1.1 [Optional] if Test Pass, can be removed next Revision.
A: reserved
T125
+V1.5SUS TPC28t
1
+V2.5
1
T126
JP3
1
1
+3VO TPC28t T127 1MM_OPEN_5MIL
2
JP23
1
/X R293 100KOhm
TPC28t
1
1MM_OPEN_5MIL
2
<44,45,51> SUSC#_PWR 1 2 /X
U23 T128 T129
1
2
1 5 U34
IN OUT
2 GND TPC28t TPC28t
2
3 4 +1.8VO 1 8
EN ADJ R227 JP20 EN GND4
2 7
1
SI9183DT IN GND3
+V1.8 1 1 2 2 3 OUT GND2 6
Vref=1.215V 2.4KOhm (1.0A) 4 5
FLG GND1
1
C279
1
1
1MM_OPEN_5MIL
C287 2.2UF/6.3V /X MIC37101
B B
2
2
2
1UF/10V
1
R226 C358 C381 C368
2
1
A A
Title : 1.25V&1.8V
ASUSTECH CO.,LTD. Engineer: Sleck Song
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 46 of 57
5 4 3 2 1
+5VLCM
D D
2
U30
SOT23_S5_NB T130
T131 T132 C353 R270 5 1
VCC NC
2 TPC28t
2
1UF/10V 100KOhm SUB
TPC28t TPC28t 4 VOUT GND 3
1
U27 PST9142
BAT_LLOW#_OC <30>
1
<40> CHG_LED_UP 1 RA2 RA1 18 T133 AC_APR_UC <41,49,50>
2 17 TS#
<48> CHG_EN# RA3 RA0
3
D27 3 16 3
T0CKL OSC1/CLKIN TPC28t D
<30> CHG_FULL_OC 1 2 4 MCLR#/Vpp OSC2/CLKOUT 15
5 14 Q51
1
Vss Vdd
<30> SMC_BAT F01J2E 6 RB0 RB7 13 11
7 12 G 2N7002
<30> SMD_BAT RB1 RB6 BAT_SEL <30,48> 2 S
<40> PWR_LED_UP 8 11
2
SUSB#_PIC RB2 RB5
9 RB3 RB4 10
PIC16C54C
1
1 3
GND C361
1
1UF/10V
2
C334 4MHZ C343
33PF/50V 33PF/50V
2
/X /X
T134
1 PWR_LED_UP
TPC28t
+V3.3SUS
C C
2
R396
1MOhm
1
D56
2 1 SUSB#_PIC
<45,46,51> SUSB#_PWR
1SS355
R397 1 0Ohm 2
/X
+V5SUS
2
R324
T135 33.2KOhm 80 DEGREE C
TPC28t /X
1
T136 T137 R329 THERMAL PROTECTION
1
TPC28t TPC28t 2 1
T138
L30
PLACE UNDER CPU
1
1 2 C461 100KOhm
TPC28t BAT_S
2 1 /x
1KOhm/100MHz
1
L74
B T139 1 2 BAT
0.001uF/50V
/X
T140 B
TPC28t 150Ohm/100Mhz U41 TPC28t
1 NC VCC 5
2
1
1
SUB
T141 T142 T143 T144 3 GND VOUT 4 FORCE_OFF# <41,44>
CON16
1 TPC28t TPC28t TPC28t TPC28t PST9013
1 /X
2 2
3 L32 1KOhm/100MHz
1
3 SMC_BAT
4 4 1 2
5 L31 1 2 1KOhm/100MHz SMD_BAT
5
6 6 1 2 TS# <50>
7 7
8 L33 1KOhm/100MHz
8
BATT_CON_8P
1
A A
Title : PIC16C54C
ASUSTECH CO.,LTD. Engineer: DEL_TAN
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 47 of 57
5 4 3 2 1
A/D_VIN
AC_BAT_SYS
R501
1 2
CI 3.3KOhm
Q42 3
C
1 B
D D
T148 E
R264 C707 47pF/50V
+2.5VREF 2 1 2 1 2SC2411K 2
TPC28t
C714 0.01uF/25V /X_CHG
2
1 2 4.7KOhm
1
4
3
2
1
F01J2E 1KOhm R489 10KOhm C713 0.01uF/25V CS+ 1 16 VFEB R482 10KOhm C711 TPC28t Q94
S
1
EA1+ EA2+
1
G
2 1 1 2 CS- 2 15 1 2 1 2
2
EA1- EA2- Q43 SI4835BDY C708
3 14 Vf E
T150
1
C.I VREF
D
1 2 4 13 0.01uF/25V 10uF/25V
7> CHG_EN#
2
D.T O.C VCC_494 2SA1036K
5 12
B 1
TPC28t I
5
6
7
8
R496 100KOhm CT VCC C
6 RT C2 11
1
3
7 10 L73 R486
1
GND E2
1
2
C715 8 9 C717 1 2 CC+ 1 2 CC-
C1 E1 BAT
0.1uF/10V C718 R498
2
1UF/25V
2
0.001uF/50V TL494CD 22UH 50mOhm
2
9.1KOhm D49 Va
1
T151
1
EC31QS04 + C720
7343
5750
15UF/25V TPC28t
2
103pF/25V JP32
1
1 2
SHORT_PIN
C350 1U /X
CS+ 1 2
C355 1U
CS- 1 2
+2.5VREF
2
C C
C380 R284 R280
CI 1 2 1 2 10KOhm
0.01uF/25V 10KOhm 1%
1
1%
C367 R267
A/D_VIN A/D_VIN_O Vd 2 1 1 2
3
R279 3
D 2N7002 TPC28t
2
20KOhm
2
I1 R483
1
R479 R506 11
BAT_SEL <30,47>
1
10KOhm G
10KOhm 1 2 S 2
2
1
1
2
R471 C699 10KOhm R266
1
1% U33
1 2
2
220PF/50V D35 VCC_494 8 VCC + A+ 3
2 1 1 1MOhm
1
C709 AO - A- 2
CS+ 1 2 CS- R276
VFEB 1SS355 Vc B+ 5 1 2 CC+
+
7 BO
0.01uF/25V 4 GND - B- 6 7.5KOhm
2
2
R480 I2 R484 C375 C379 LM358MX
2
R269
2
100KOhm 100KOhm R470 R473 0.01uF/25V 0.1UF/25V
2
100KOhm
1
21KOhm 90.9KOhm
1
0.1% 1%
1
RC
R490
1 2 +2.5VREF
B V1 R283 R278 B
681Ohm I3 1 2 1 2 CC-
100KOhm 7.5KOhm
2
R485
I4 1KOhm Vfeb=Vbat_s*(10.7//806/(10.7//806+60.4))=0.149Vbat_s
when Vbat_s gets to16.8V,Vfeb=2.5V,cc mode turns to cv
1
mode
A/D_VIN=19V A/D_VIN_O=19V-3.1A*50mohm=18.845V
CS+=CS-=19V*100/(10+100)=17.272727V
I1=(18.845V-17.272727V)/10K=0.15723mA
V1=17.272727V-0.15723mA*100K=1.5497V
I4=1.5497V/1K=1.5497mA
I3=I4-I1=1.39247mA
RC=(2.5V-1.5497V)/1.39247mA=681 Ohm
A A
Title : CHARGER
ASUSTECH CO.,LTD. Engineer: Jully_ma
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 48 of 57
5 4 3 2 1
5 4 3 2 1
D D
RN2D
7 8 A/D_VIN A/D_VIN_O
ACIN_OC#
100KOhm
T153 T154 T155 T156 T157 T158 T159
AC_BAT_SYS
TPC28t TPC28t TPC28t TPC28t TPC28t TPC28t TPC28t
Q11 D7
1 S D 8 R17 1
1
2 7 1 2 2 AC_BAT_SYS
A/D_DOCK_IN
T160 3 6 3
4 G 5 50mOhm
TPC28t FD6JK3TP
3
C TPC8107 C
1 RN2B
1
R9
<30> ACIN_OC
1
100KOhm
C406 R7
1
4 100KOhm 0.47U
2
3
Q7 3 22KOhm Q93
D
2
8 D S 1
BAT
2
100KOhm 7 2
11 RN2A 6 3
2N7002 G 5 G 4
2
S 2
2
1
3
C Q1 R6 TPC8107 R462
B 1
18KOhm 22KOhm
E PMBS3904
2
1
2 R10
1
C2
10KOhm
0.1UF/25V
2
1
Q2A
UM6K1N R463
A/D_SD 2 30KOhm
2
T161
6
TPC28t Q91A
3
<30> BAT_LEARN 5
1
10KOhm
4
5
3
Q91B
RN2C UM6K1N
B B
<41,47,50> AC_APR_UC 5
100KOhm
4
6
A A
Title : AC_BAT_SYS
ASUSTECH CO.,LTD. Engineer: charlie_xie
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 49 of 57
5 4 3 2 1
5 4 3 2 1
AC_BAT_SYS
D D
T162
TPC28t
2
AC_APR_UC
AC_APR_UC <41,47,49>
R526
2
1MOhm
R398
1MOhm
1
SHUT_DOWN# <44,45>
1
AC_BAT_SYS
6
Q103A
UM6K1N (11.6V)
+5VLCM 2
U57
2
T163
1
R288 R289
2
470KOhm
+2.5VREF 3 47KOhm 100KOhm TPC28t
+A
3
R495
Q103B
2
BAT_S UM6K1N
1
D50 5
4
1
A/D_VIN 1 1SS355
R492 OUTA 4 5 6
1
2
E
Q53
C
365KOhm
10KOhm
BC847BPN GND
R494
B B
2
C E
2 -A 3 2 1
+5VCHG R527 1 0Ohm 2 /X
1
2
1
1
2
1
C719
R290
100KOhm
47KOhm
1
R287
C C
3
GND 3 C374
D
1
5 (9.66V) 0.1UF/25V
2
+B Q60
4.7UF/10V
OUTB 7 AC_APR_UC 11
G 2N7002
2 S
2
+2.5VREF 6 -B
2
+5VLCM
R500 C723
1
51.1KOhm 0.1UF/25V
2
C722 4 8
0.1UF/25V V- V+
1
LM393DR
1
C716
0.1UF/25V
2
T164
TPC28t
1
BAT_IN#_OC <30>
+5VLCM
B B
2
T165
100KOhm
RN46A
A/D_VIN T166 +5VO +5VLCM RN46B RN46C RN46D
TPC28t 100KOhm
D34 100KOhm 100KOhm
Q55 TPC28t
1
1
L78L05ACUTR 3
1
1
3 1 +5VCHG 2
IN OUT
GND
6
F02JK2E Q61A
T167 R277 UM6K1N
2
2
1KOhm
TPC28t +2.5VREF
1
1
1
3
C369 Q61B
1
1UF/25V 5
<47> TS#
2
1UF/10V 1UF/10V
1
4
C378 3 U36
1UF/10V LM4040BIM3_2.5
2
C362
0.001uF/50V
2
GND
GND
A A
Title : BATLOW/SD#
ASUSTECH CO.,LTD. Engineer: Lassie Bao
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 50 of 57
5 4 3 2 1
5 4 3 2 1
T168 T169
Q54
TPC28t TPC28t
SI2304DS JP24
1
2 S
3 2 1 2
D
+1.8VO 1 2 +V1.8S
3
1MM_OPEN_5MIL
1
/X
11
C356
0.1U T170 T171 T172
2
Q15
TPC28t TPC28t TPC28t
D SI2304DS JP1 D
1
2 S
3 2 1 2
D
+V2.5 1 2 +V2.5S
1
1MM_OPEN_5MIL
G
C160 /X
11
0.1U
2
3MM_OPEN_5MIL
JP34 /X_LEAK
+2.5V_VGA 1 2
1 2 +V2.5_VRAM
JP35
+2.5VS_VGA 1 2
1 2
6
5
S 4
Q101 3MM_OPEN_5MIL
/LEAK
PMN45EN
T173 T174 T175
G
TPC28t TPC28t TPC28t
1
2
3
1
+3VO 1 1 2 2 +V3.3
6
5
S 4
Q35 2MM_OPEN_5MIL
/X
PMN45EN
D
JP16
G
T176 T177 T178
1
2
3
TPC28t TPC28t TPC28t
JP12
1
1 1 2 2 +V3.3S
6
5
S 4
Q30 2MM_OPEN_5MIL
/X
PMN45EN
1
D
C308
G
C 0.1U T179 T180 T181 C
1
2
3
2
TPC28t TPC28t TPC28t
1
JP8
+5VO 1 1 2 2 +V5
T182 T183 T184
3MM_OPEN_5MIL
TPC28t TPC28t /X TPC28t
JP6
1
1 1 2 2 +V5S
2
6
5
S 4
R458 Q25 3MM_OPEN_5MIL
/X
100KOhm PMN45EN
G
1
1
2
3
6
2
Q88A
UM6K1N R466 R247
2 100KOhm
100KOhm
1
1
3
Q88B
UM6K1N
1
SUSB#_PWR 5
C691 C298
4
0.1U 0.1U
2
B B
T185 T186
TPC28t TPC28t
GND JP11
1
+12VO 1 1 2 2 +V12
1MM_OPEN_5MIL
/X
2
+V12S
T187 R231
100KOhm
TPC28t
1
R465
1
<20,23,25,41> PM_SLPDLY_S3# 1 2
1
1KOhm T188 C10 C528 C13
T189
TPC28t 1UF/25V 1UF/25V 1UF/25V
2
TPC28t /EMI /EMI /EMI
1
+V12S
1
<45,46,47> SUSB#_PWR
T190
2
3 2 1
TPC28t 47K 47K Q89 R459
1 2 B B
<20,39,41> PM_SLP_S4#
1
A A
1KOhm E C
T191
10K
4 6
TPC28t
1
<44,45,46> SUSC#_PWR
D D
/X
B B
A A
Title : SCREW_HOLES
ASUSTECH CO.,LTD. Engineer: Pommy Lu
Size Project Name Rev
C A3G 2.0
Date: Wednesday, October 13, 2004 Sheet 52 of 57
5 4 3 2 1
5 4 3 2 1
D D
DUAL_DDR1
Intel CLKDDR[0..2]/#
CLK_MCH100/CLK_MCH100# 100 MHz
855PM 133MHz
CLK_MCH66 66 MHz
MCH
Pentium M
DUAL_DDR2
Dothan CLK_CPU100/CLK_CPU100# CLKDDR[3..5]/#
100 MHz 133MHz
478 Pin Package
27 MHz
CLK_ICH14 14 MHz Intel
CLOCK CHIP AC97_BCLK_ICH4 AC'97
C ICH4-M 12.288MHz C
VGA 24.576MHz
CLKAGP66 CLK_ICH33 33 MHz
M11
AC97_BCLK_MDC
66 MHz ICS950815
12.288MHz
CLK_ICH66 66 MHz
14.318MHz
56PIN
CB1394 CLK_CB139433 33 MHz
32.768KHz
MDC
B B
KBC
M38857 CLK_KBC33 33 MHz
8 MHz LAN
CLK_LAN33 33 MHz
25MHz
CLK_FWH33 33 MHz RTL8100CL
FWH
CLK_SIO48 48MHz
SIO
DEBUG PORT CLK_8033PO 33MHz PC87393
CLK_SIO33 33MHz
P15C3384
A A
D D
+V1.8S +V1.2S
+V2.5 +V1.5S +V1.5S +V3.3S
+V1.5SUS +VCCP
+VGACORE
13BIT
HUB(1.8V)
AC'97 266MB/S IDE Ultra ATA100
CODEC AC97 ICH4-M
+V5AUDIO +V5S_IDE
+V3.3S +V3.3S +V5S
+V3.3S_ICH IDE Ultra ATA100 +V3.3S
+V3.3SUS_ICH
MDC +V1.5S
+V5S +V1.5SUS
+V3.3 +V1.8S
+V3.3S +V5REF_ICH DEBUG
PCI BUS +VRTC LPC
B PORT B
+VCCP +V5
+V3.3
USB X4
+V5
A A
D D
AC Mode:
9ms
PWR_SW# PM_PWRBTN 3V_ON LTC3728LX SYSTEM POWER
3V_ON PM_RSMRST#
C C
51ms
PM_SLP_S3# DLYS3_CPUON
0.7ms
PM_VGATE VGATE/VRMPWRGD
PM_SLP_S3# 51ms DLYS3_CPUON
VRM_PWRGD
CPU_VRON MAX1987
+5V(0.065ms)
LTC3728LX MAX1844 VGA_PWRGD
EEP
ICH4_PWROK PWROK
B B
SLP_S3#
CPU H_PWRGD
A A
D D
+V_RTC
+5VCHG
+V_RTC
+5VLCM
+5VAO
+2.5VREF
VREF5
+5VAO
+3VA
VREF5
PWR_SW#
+3VA
+3VSUS
+3VSUS
+1.5VSUS
+1.5VSUS
SUSC#
PWR_SW#
SUSB#
SUSC#
SUSB# +2.5VREF
C +5VO;+V5 +5VO;+V5;+5VLCM C
+12VO;+V12;+V12S +12VO;+V12;+V12S
+V2.5 +V2.5
+V3.3 +V3.3
6ms 6ms
+V1.8 +V1.8
+V1.25S +V1.25S
+VGACORE +VGACORE
6ms 6ms
+V1.8S +V1.8S
+V2.5S +V2.5S
+V3.3S +V3.3S
+V5S +V5S
B 56ms 56ms B
+VCORE
+VCORE
A A
REVISION HISTORY
DSCHEME DATE REVISION DESCRIPTION D
REV.
0.1 2004/02/04 Preliminary based on A3N/M3N
Add M11-P
0.3 2004/02/10 Add 54_Clock Map and 55_Platform Power Delivery Map ( Created by Eddy )
Fix Power Sequence error
C Change some Circuit to optional C
Update parts status and part type
A A