TDA4950

TV EAST/WEST CORRECTION CIRCUIT

FEATURES SUMMARY
■ LOW DISSIPATION Figure 1. Package
■ SQUARE GENERATOR FOR PARABOLIC
CURRENT
■ EXTERNAL KEYSTONE ADJUSTMENT
(symmetry of the parabola)
■ INPUT FOR DYNAMIC FIELD CORRECTION
(beam current change)
■ STATIC PICTURE WIDTH ADJUSTMENT
■ PULSE-WIDTH MODULATOR
■ FINAL STAGE D-CLASS WITH ENERGY
REDELIVERY
■ PARASITIC PARABOLA SUPPRESSION, POWERDIP8
DURING FLYBACK TIME OF THE VERTICAL (Plastic Package)
SAWTOOTH

DESCRIPTION
The TDA4950 is a monolithic integrated circuit in a
8 pin minidip plastic package designed for use in
the east-west pin-cushion correction by driving a
diode modulator in TV and monitor applications.

Figure 2. Pin Connections

KEYSTONE CORRECTION INPUT 1 8 NON-INVERTING INPUT 100µA CURRENT SINK

FRAME SAWTOOTH CURRENT INPUT 2 7 PARABOLA OUTPUT INVERTING INPUT

CURRENT REFERENCE 3 6 +VS

GND 4 5 OUTPUT

REV. 2
May 2004 1/10
TDA4950

Figure 3. Block Diagram

7 8
TDA4950
CURRENT LIMITER COMPARATOR AND OUTPUT STAGE
6 +VS

Q14 Q15

Q16
Q1
VREF Q13 R2
Q13 Q4 Q17 Q18 D1
VS - 3 VBE

Q2
R5 R4
R3
OP2 5 OUTPUT
R6
Q12
Q19

R5 Q20
R7
Q21
1 OP1 R8
Q5

2
IIN
IREF
Q7 VS - 6 VBE
Q6 Q11 OP3
Q22
D2
Q10
D3 4 GND
Z1
Q8 Q9 R9 R10 R11 R12 R13

FULL-WAVE RECTIFIER PARABOLA NETWORK CURRENT REFERENCE

Table 1. Absolute Maximum Ratings

Symbol Parameter Value Unit
VS Supply Voltage at Pin 2 35 V
IS Supply Current 500 mA
PTOT Power Dissipation at Tamb = 70°C 800 mW
TSTG , Tj Storage and Junction Temperature – 25, + 150 °C

Table 2. Thermal Data

Symbol Parameter Value Unit
Rth (j-a) Thermal Resistance Junction-ambient Max 100 °C/W
Rth (j-C) Thermal Resistance Junction-pin (4) Max. 70 °C/W

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 TDA4950

Table 3. ELECTRICAL CHARACTERISTICS

(Tamb = 25°C VS = 26 V, Vfr = 0, S1 and S2 in "a" position, refer to test circuit unless otherwise specified)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VS Supply Voltage 17 24 30 V
IS Supply Current 4.5 7 mA
VREF Internal Reference Voltage 7.6 8.0 8.8 V
–IREF Internal Reference Current Vref/R3 0.73 mA
V7(A) Pin 7 Output Voltage Ifr = 0 µA, see Figure 5 15.3 16.0 16.7 V
V7(B) Pin 7 Output Voltage Ifr = 30 µA, see Figure 5 15 V

V –V
K1 Parabola Coefficient 7A 7B 0.28
------------------------------
V –V
7A 7C
K1 = , see Figure 5

V –V
K2 Parabola Coefficient 7A 7C 0.71
------------------------------
V 7A – V 7D
K2 = , see Figure 5
∆V7 (*) ∆V7 = V7E – V7F, see Figure 5 – 40 40 mV
I8 Current Source S1 → b 100 µA
VSATL Saturation Voltage Io = 400 mA Sink S2 → b 1 2 V
VSATH Saturation Voltage Io = 100 mA Source S2 → c S1 → b 0.8 1.5 V
VF Forward Voltage Io = 400 mA S2 → d S1 → b 1.2 1.7 V
IFR Frame Sawtooth Current Vfr = 6.6 VPP 66 µA

Figure 4. Test Circuit

VS
R7 R6

10kΩ 10kΩ
VF VSATH IO
IFR 7 6

2 a
VFR R2 S2 b
1 TDA4950 5
c
R1 d
3
10kΩ
R3 4 8
VREF
11kΩ IF -IO VSATL
R8
20k

b
a
S1

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TDA4950

Figure 5. Parabola Characteristics

V7 (V)
V7A
V7B

V7C
V7D

V7E V7F

36
-60 0 15 30 60 IFR (µA)

CIRCUIT OPERATION
(see the shematic diagram) used for suppressing the parasitic parabolic cur-
A differential amplifier OP1 is driven by a vertical rent generated during the flyback time of the frame
frequency sawtooth current of ± 33µA which is sawtooth.
produced via anexternal resistor fromthe sawtooth A comparator OP2 is driven by the parabolic cur-
voltage. The non-inverting input of this amplifier is rent. The second input of the comparator is con-
connected with a reference voltage corresponding nected with a horizontal frequency sawtooth
to the DC level of the sawtooth voltage. This DC voltage the DC level of which can be changed by
voltage should be adjustable for the keystone cor- the external circuitry for the adjustment of the pic-
rection. The rectified output current of this amplifi- ture width.
er drives the parabola network which provides a The horizontal frequency pulse-width modulated
parabolic output current. This output current pro- output signal drives the final stage. It consists of a
duces the corresponding voltage due to the volt- class D push-pull output amplifier that drives, via
age drop across the external resistor at pin 7. an external inductor, the diode modulator.
If the input is overmodulated (> 40µA) the internal
current is limited to 40µA. This limitation can be

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 TDA4950

Figure 6. Application Circuit with Keystone Correction

Line Transformer
(L.T.)

L1
LM
10mH
Pin-cushion
adjustment
R3 RT2

4.7kΩ 47kΩ C1
5 7 R4 47nF
VFRAME 18kΩ
R1 =
66µAPP
VFRAME 2
Pin 1
Voltage TDA4950 6 VS
C2
1
100nF

3 4 8

C3 D1
RT1 R2 4.7nF 1N4148
12kΩ
Keystone 100kΩ
Adj.

1k
Hfly H. Width
from L.T. R5 RT3

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TDA4950

Figure 7. P.C. Board and Component Layout of the Circuit of Figure 6

RT3 D1
R5

HFLY C3

R1

TDA4950
C1
VFRAME

R4
RT1
C2
VS
RT2
GND L1
TO LM R2 R3

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 TDA4950

PART NUMBERING

Table 4. Order Codes

Part Number Package Temperature Range
TDA4950 POWERDIP8 0 to 70°C

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TDA4950

PACKAGE MECHANICAL

Table 5. POWERDIP8 - Mechanical Data

millimeters inches
Symbol
Min Typ Max Min Typ Max
A 3.3 0.130
a1 0.7 0.020
B 1.39 1.65 0.055 0.065
B1 0.91 1.04 0.036 0.041
b 0.5 0.020
b1 0.38 0.5 0.015 0.020
D 9.8 0.386
E 8.8 0.346
e 2.54 0.100
e3 7.62 0.300
e4 7.62 0.300
F 7.1 0.280
I 4.8 0.189
L 3.3 0.130
Z 0.44 1.6 0.017 0.063

Figure 8. POWERDIP8 - Package Dimensions

Note: Drawing is not to scale

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REVISION HISTORY

Table 6. Revision History

Date Revision Description of Changes

October -1998 1 First Issue

14-May-2004 2 Stylesheet update. No content change.

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TDA4950

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