Datasheet

SLOS220J − JULY 1998 − REVISED FEBRUARY 2004
D Rail-to-Rail Output Swing TLV2460

DBV PACKAGE
D Gain Bandwidth Product . . . 6.4 MHz (TOP VIEW)
D ± 80 mA Output Drive Capability
1 VDD+
D Supply Current . . . 500 µA/channel OUT 6
D Input Offset Voltage . . . 100 µV GND 2 5 SHDN

D Input Noise Voltage . . . 11 nV/√Hz
3 4
D Slew Rate . . . 1.6 V/µs IN+ IN −
D Micropower Shutdown Mode

(TLV2460/3/5) . . . 0.3 µA/Channel
D Universal Operational Amplifier EVM
D Available in Q-Temp Automotive
HighRel Automotive Applications
Configuration Control/Print Support
Qualification to Automotive Standards
description
The TLV246x is a family of low-power rail-to-rail input/output operational amplifiers specifically designed for
portable applications. The input common-mode voltage range extends beyond the supply rails for maximum
dynamic range in low-voltage systems. The amplifier output has rail-to-rail performance with high-output-drive
capability, solving one of the limitations of older rail-to-rail input/output operational amplifiers. This rail-to-rail
dynamic range and high output drive make the TLV246x ideal for buffering analog-to-digital converters.
The operational amplifier has 6.4 MHz of bandwidth and 1.6 V/µs of slew rate with only 500 µA of supply current,
providing good ac performance with low power consumption. Three members of the family offer a shutdown
terminal, which places the amplifier in an ultralow supply current mode (IDD = 0.3 µA/ch). While in shutdown,
the operational-amplifier output is placed in a high-impedance state. DC applications are also well served with
an input noise voltage of 11 nV/√Hz and input offset voltage of 100 µV.
This family is available in the low-profile SOT23, MSOP, and TSSOP packages. The TLV2460 is the first
rail-to-rail input/output operational amplifier with shutdown available in the 6-pin SOT23, making it perfect for
high-density circuits. The family is specified over an expanded temperature range (TA = − 40°C to 125°C) for
use in industrial control and automotive systems, and over the military temperature range
(TA = −55°C to 125°C) for use in military systems.
SELECTION GUIDE
VDD VIO IDD/ch IIB GBW SLEW RATE Vn, 1 kHz IO
DEVICE SHUTDOWN RAIL-RAIL
[V] [µV] [µA] [pA] [MHz] [V/µs] [nV/√Hz] [mA]
TLV246x(A) 2.7−6 150 550 1300 6.4 1.6 11 25 Y I/O
TLV277x(A) 2.5−5.5 360 1000 2 5.1 10.5 17 6 Y O
TLV247x(A) 2.7−6 250 600 2.5 2.8 1.5 15 20 Y I/O
TLV245x(A) 2.7−6 20 23 500 0.22 0.11 52 10 Y I/O
TLV225x(A) 2.7−8 200 35 1 0.2 0.12 19 3 — —
TLV226x(A) 2.7−8 300 200 1 0.71 0.55 12 3 — —
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
!"#$%&'#! ( )*$$+!' &( #" ,*-.)&'#! /&'+0 Copyright  1998−2004, Texas Instruments Incorporated
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WWW.TI.COM 1

TLV2460C/I/AI and TLV2461C/I/AI AVAILABLE OPTIONS

PACKAGED DEVICES
VIOmax
TA SMALL OUTLINE SOT-23† PLASTIC DIP
AT 25°C SYMBOL
(D) (DBV) (P)
TLV2460CD TLV2460CDBV VAOC TLV2460CP
0°C to 70°C 2000 µV
TLV2461CD TLV2461CDBV VAPC TLV2461CP
TLV2460ID TLV2460IDBV VAOI TLV2460IP
2000 µV
TLV2461ID TLV2461IDBV VAPI TLV2461IP
−40°C to 125°C
TLV2460AID — — TLV2460AIP
1500 µV
TLV2461AID — — TLV2461AIP
† This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2460CDR).
‡ Chip forms are tested at TA = 25°C only.
TLV2460M/AM/Q/AQ and TLV2461M/AM/Q/AQ AVAILABLE OPTIONS

PACKAGED DEVICES
VIOmax SMALL SMALL CERAMIC
TA CERAMIC DIP CHIP CARRIER
AT 25°C OUTLINE† OUTLINE† FLATPACK
(JG) (FK)
(D) (PW) (U)
TLV2460QD TLV2460QPW — — —
2000 µV
TLV2461QD TLV2461QPW — — —
−40°C to 125°C
TLV2460AQD TLV2460AQPW — — —
1500 µV
TLV2461AQD TLV2461AQPW — — —
— — TLV2460MJG TLV2460MU TLV2460MFK
2000 µV
— — TLV2461MJG TLV2461MU TLV2461MFK
−55°C to 125°C
— — TLV2460AMJG TLV2460AMU TLV2460AMFK
1500 µV
— — TLV2461AMJG TLV2461AMU TLV2461AMFK
† This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2460QDR).

PACKAGED DEVICES
VIOmax SMALL
TA MSOP MSOP† PLASTIC DIP PLASTIC DIP
AT 25°C OUTLINE† SYMBOL SYMBOL
(DGK) (DGS) (N) (P)
(D)
TLV2462CD TLV2462CDGK xxTIAAI — — — TLV2462CP
0°C to 70°C 2000 µV
TLV2463CD — TLV2463CDGS xxTIAAK TLV2463CN —
TLV2462ID TLV2462IDGK xxTIAAJ — — — TLV2462IP
2000 µV
−40 C to
−40°C TLV2463ID — TLV2463IDGS xxTIAAL TLV2463IN —
125°C TLV2462AID — — — — — TLV2462AIP
1500 µV
TLV2463AID — — — — TLV2463AIN —
† This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2462CDR).
2 WWW.TI.COM


PACKAGED DEVICES
VIOmax SMALL SMALL CERAMIC CERAMIC CHIP CAR-
TA CERAMIC DIP
AT 25°C OUTLINE† OUTLINE† DIP FLATPACK RIER
(JG)
(D) (PW) (J) (U) (FK)
TLV2462QD TLV2462QPW — — — —
2000 µV
TLV2463QD TLV2463QPW — — — —
−40°C to 125°C
TLV2462AQD TLV2462AQPW — — — —
1500 µV
TLV2463AQD TLV2463AQPW — — — —
— — TLV2462MJG — TLV2462MU TLV2462MFK
2000 µV
— — — TLV2463MJ TLV2463MFK
−55°C to 125°C
— — TLV2462AMJG — TLV2462AMU TLV2462AMFK
1500 µV
— — — TLV2463AMJ TLV2463AMFK
† This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2462QDR).

PACKAGED DEVICES
VIOmax
TA SMALL OUTLINE PLASTIC DIP TSSOP
AT 25°C
(D) (N) (PW)
TLV2464CD TLV2464CN TLV2464CPW
0°C to 70°C 2000 µV
TLV2465CD TLV2465CN TLV2465CPW
TLV2464ID TLV2464IN TLV2464IPW
2000 µV
TLV2465ID TLV2465IN TLV2465IPW
−40°C to 125°C
TLV2464AID TLV2464AIN TLV2464AIPW
1500 µV
TLV2465AID TLV2465AIN TLV2465AIPW
† This package is available taped and reeled. To order this packaging option, add an R suffix to the part
number(e.g., TLV2464CDR).

PACKAGED DEVICES
VIOmax SMALL SMALL
TA CERAMIC DIP CHIP CARRIER
AT 25°C OUTLINE† OUTLINE†
(J) (FK)
(D) (PW)
TLV2464QD TLV2464QPW — —
2000 µV
TLV2465QD TLV2465QPW — —
- 40°C to 125°C
TLV2464AQD TLV2464AQPW — —
1500 µV
TLV2465AQD TLV2465AQPW — —
— — TLV2464MJ TLV2464MFK
2000 µV
— — TLV2465MJ TLV2465MFK
−55°C to 125°C
— — TLV2464AMJ TLV2464AMFK
1500 µV
— — TLV2465AMJ TLV2465AMFK
† This package is available taped and reeled. To order this packaging option, add an R suffix to the part number
(e.g., TLV2464QDR).
WWW.TI.COM 3

TLV246x PACKAGE PINOUTS(1)

TLV2460 TLV2461 TLV2460
DBV PACKAGE DBV PACKAGE D, P, JG, OR PW PACKAGE
(TOP VIEW) (TOP VIEW) (TOP VIEW)
OUT 1 6 VDD+ OUT 1 5 VDD+ NC 1 8 SHDN

IN − 2 7 VDD+
GND 2 5 SHDN GND 2 IN + 3 6 OUT
GND 4 5 NC
IN+ 3 4 IN − IN+ 3 4 IN −
TLV2461 TLV2462 TLV2463

D, P, JG, OR PW PACKAGE D, DGK, P, JG, OR PW PACKAGE DGS PACKAGE
NC 1 8 NC 1OUT 1 8 VDD+ 1OUT 1 10 VDD+

IN − 2 7 VDD+ 1IN − 2 7 2OUT 1IN − 2 9 2OUT
IN + 3 6 OUT 1IN+ 3 8 2IN −
1IN + 3 6 2IN −
GND 4 7 2IN+
GND 4 5 NC GND 4 5 2IN+
1SHDN 5 6 2SHDN
TLV2463 TLV2464 TLV2465

D, N, J, OR PW PACKAGE D, N, PWP, J, OR PW PACKAGE D, N, PWP, J, OR PW PACKAGE
1OUT 1 14 VDD+ 1OUT 1 16 4OUT

1OUT 1 14 4OUT
1IN − 2 13 2OUT 1IN − 2 15 4IN −
1IN − 2 13 4IN −
1IN+ 3 12 2IN − 1IN+ 3 14 4IN+
1IN+ 3 12 4IN+
GND 4 11 2IN+ VDD+ 4 13 GND
VDD+ 4 11 GND
NC 5 10 NC 2IN+ 5 12 3IN +
2IN+ 5 10 3IN+
1SHDN 6 9 2SHDN 2IN − 6 11 3IN−
2IN − 6 9 3IN −
NC 7 8 NC 2OUT 7 10 3OUT
2OUT 7 8 3OUT
1/2SHDN 8 9 3/4SHDN
NC − No internal connection
(1) SOT−23 may or may not be indicated
TYPICAL PIN 1 INDICATORS
Pin 1
Printed or Pin 1 Pin 1
Pin 1
Molded Dot Stripe Bevel Edges Molded ”U” Shape
4 WWW.TI.COM

TLV246x PACKAGE PINOUTS (continued)(1)

TLV2460 TLV2461 TLV2462
U PACKAGE U PACKAGE U PACKAGE
NC 1 10 NC NC 1 10 NC NC 1 10 NC
NC 2 9 SHDN NC 2 9 NC 1OUT 2 9 VDD+
IN− 3 8 VDD IN− 3 8 VDD 1IN− 3 8 2OUT
IN+ 4 7 OUTPUT IN+ 4 7 OUTPUT 1IN+ 4 7 2IN−
GND 5 6 NC GND 5 6 NC GND 5 6 2IN+
TLV2460 TLV2461 TLV2462

FK PACKAGE FK PACKAGE FK PACKAGE
SHDN
1OUT
2OUT
V DD
1IN−
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
3 2 1 20 19 3 2 1 20 19 3 2 1 20 19
NC 4 18 NC NC 4 18 NC 1IN+ 4 18 2IN−
IN− 5 17 VDD IN− 5 17 VDD NC 5 17 NC
NC 6 16 NC NC 6 16 NC GND 6 16 2IN+
IN+ 7 15 OUT IN+ 7 15 OUT NC 7 15 NC
NC 8 14 NC NC 8 14 NC NC 8 14 NC
9 10 11 12 13 9 10 11 12 13 9 10 11 12 13
GND
NC
NC
NC
NC
GND
NC
NC
NC
NC
NC
NC
NC
NC
NC
TLV2463 TLV2464 TLV2465
FK PACKAGE FK PACKAGE FK PACKAGE
1OUT
4OUT
1OUT
4OUT
1OUT
2OUT
1IN−
4IN−
1IN−
4IN−
V DD
1IN−
NC
NC
NC
3 2 1 20 19 3 2 1 20 19 3 2 1 20 19
1IN+ 4 18 2IN− 1IN+ 4 18 4IN+ 1IN+ 4 18 4IN+
NC 5 17 NC NC 5 17 NC VDD+ 5 17 GND
GND 6 16 2IN+ VDD+ 6 16 GND NC 6 16 NC
NC 7 15 NC NC 7 15 NC 2IN+ 7 15 3IN+
NC 8 14 NC 2IN+ 8 14 3IN+ 2IN− 8 14 3IN−

9 10 11 12 13 9 10 11 12 13 9 10 11 12 13
2OUT
1/2SHDN
NC
3/4SHDN
3OUT
2IN−
3IN−
2OUT
NC
3OUT
NC
NC
NC
1SHDN
2SHDN
NC − No internal connection
(1) SOT−23 may or may not be indicated
WWW.TI.COM 5

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V
Differential input voltage, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.2 V to VDD + 0.2 V
Input current, II (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 200 mA
Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 175 mA
Total input current, II (into VDD +) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 mA
Total output current, IO (out of GND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 mA
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
I and Q suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C
M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values, except differential voltages, are with respect to GND.
DISSIPATION RATING TABLE FOR C and I SUFFIX

θJC θJA TA ≤ 25°C
25 C TA < 125
125°C
C
PACKAGE
(°C/W) (°C/W) POWER RATING POWER RATING
D (8) 38.3 176 710 mW 142 mW
D (14) 26.9 122.6 1022 mW 204.4 mW
D (16) 25.7 114.7 1090 mW 218 mW
DBV (5) 55 324.1 385 mW 77.1 mW
DBV (6) 55 294.3 425 mW 84.9 mW
DGK 54.2 259.9 481 mW 96.2 mW
DGS 54.1 257.7 485 mW 97 mW
N (14, 16) 32 78 1600 mW 320.5 mW
P (8) 41 104 1200 mW 240.4 mW
PW (14) 29.3 173.6 720 mW 144 mW
PW (16) 28.7 161.4 774 mW 154.9 mW
NOTE: Thermal resistances are not production tested and are for informational
purposes only.
DISSIPATION RATING TABLE FOR Q and M SUFFIX

TA ≤ 25°C
25 C DERATING FACTOR TA = 70
70°C
C TA = 85
85°C
C TA = 125
125°C
C
PACKAGE
POWER RATING ABOVE TA = 25°C‡ POWER RATING POWER RATING POWER RATING
FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
JG 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW
U 675 mW 5.4 mW/°C 432 mW 350 mW 135 mW
‡ This is the inverse of the traditional junction-to-ambient thermal resistance (RΘJA). Thermal resistances are not production tested and are for
informational purposes only.
6 WWW.TI.COM

recommended operating conditions

MIN MAX UNIT
Single supply 2.7 6
Supply voltage, VDD V
Split supply ±1.35 ±3
Common-mode input voltage range, VICR 0 VDD V
C-suffix 0 70
Operating free-air temperature, TA I-suffix and Q-suffix −40 125 °C
C
M-suffix −55 125
VIH 2
Shutdown on/off voltage level‡ V
VIL 0.7
‡ Relative to voltage on the GND terminal of the device.
electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted)

PARAMETER TEST CONDITIONS TA† MIN TYP MAX UNIT
25°C 500 2000
VDD = 3 V, Full range 2200
VIO Input offset voltage VIC = 1.5 V, µV
V
25°C 500 1500
VO = 1.5 V, TLV246xA
RS = 50 Ω Full range 1700
αVIO Temperature coefficient of input offset voltage 2 µV/°C
25°C 2.8 7
IIO Input offset current VDD = 3 V, TLV246xC Full range 20 nA
VIC = 1.5 V, TLV246xI/Q/M Full range 75
VO = 1.5 V, 25°C 4.4 14
RS = 50 Ω TLV246xC Full range 25
IIB Input bias current nA
TLV246xI/Q/M Full range 75
25°C 2.9
IOH = − 2.5 mA
Full range 2.8
VOH High-level output voltage V
25°C 2.7
IOH = − 10 mA
Full range 2.5
25°C 0.1
VIC = 1.5 V, IOL = 2.5 mA
Full range 0.2
VOL Low-level output voltage V
25°C 0.3
VIC = 1.5 V, IOL = 10 mA
Full range 0.5
25°C 50
Sourcing
Full range 20
IOS Short-circuit output current mA
25°C 40
Sinking
Full range 20
IO Output current Measured 1 V from rail 25°C ± 40 mA
Large-signal differential voltage 25°C 90 105
AVD RL = 10 kΩ
kΩ, VO(PP) = 1 V dB
amplification Full range 89
ri(d) Differential input resistance 25°C 109 Ω
† Full range is 0°C to 70°C for the C suffix, −40°C to 125°C for the I and Q suffixes, and −55°C to 125°C for the M suffix.
WWW.TI.COM 7


(continued)
Common-mode input
ci(c) f = 10 kHz 25°C 7 pF
capacitance
zo Closed-loop output impedance f = 100 kHz, AV = 10 25°C 33 Ω
25°C 66 80
VICR = 0 to 3 V,
CMRR Common-mode rejection ratio TLV246xC Full range 64 dB
RS = 50 Ω
VDD = 2.7 V to 6 V, VIC = VDD /2, 25°C 80 85
Supply voltage rejection ratio No load Full range 75
kSVR dB
((∆V
VDD //∆V
VIO) VDD = 3 V to 5 V, VIC = VDD /2, 25°C 85 95
No load Full range 80
25°C 0.5 0.575
IDD Supply current (per channels) VO = 1.5 V, No load mA
Full range 0.9
Supply current in shutdown SHDN < 0.7 V, 25°C 0.3
IDD(SHDN) µA
A
(TLV2460, TLV2463, TLV2465) Per channel in shutdown Full range 2.5
operating characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted)

25°C 0.9 1.6
VO(PP) = 0.8 V, CL = 160 pF,
SR Slew rate at unity gain Full V/µs
RL = 10 kΩ 0.8
range
f = 100 Hz 25°C 16
Vn Equivalent input noise voltage nV/√Hz
f = 1 kHz 25°C 11
In Equivalent input noise current f = 1 kHz 25°C 0.13 pA /√Hz
AV = 1 0.006%
Total harmonic distortion plus VO(PP) = 2 V,
THD + N AV = 10 25°C
25 C 0.02%
noise RL = 10 kΩ, f = 1 kHz
AV = 100 0.08%
Both channels 7.6
t(on) Amplifier turnon time AV = 1, RL = 10 kΩ Channel 1 only, 25°C µs
7.65
Channel 2 on
Both channels 333
Channel 1 only,
328
t(off) Amplifier turnoff time AV = 1, RL = 10 kΩ Channel 2 on 25°C
25 C ns
Channel 2 only,
329
Channel 1 on
RL = 10 kΩ,
Gain-bandwidth product f = 10 kHz, CL = 160 pF 25°C 5.2 MHz
V(STEP)PP = 2 V, 0.1% 1.47

AV = −1, CL = 10 pF,
RL = 10 kΩ 0.01% 1.78
ts Settling time 25°C µss
V(STEP)PP = 2 V, 0.1% 1.77
AV = −1, CL = 56 pF,
RL = 10 kΩ 0.01% 1.98
φm Phase margin at unity gain 25°C 44°
RL = 10 kΩ, CL = 160 pF
Gain margin 25°C 7 dB
8 WWW.TI.COM


25°C 500 2000
VDD = 5 V, Full range 2200

VIO Input offset voltage µV
V
VIC = 2.5, 25°C 500 1500
VO = 2.5 V, TLV246xA
Full range 1700
RS = 50 Ω
Temperature coefficient of input off-
αVIO 25°C 2 µV/°C
V/°C
set voltage
25°C 0.3 7
IIO Input offset current VDD = 5 V, TLV246xC Full range 15 nA
VIC = 2.5 V, TLV246xI/Q/M Full range 60
VO = 2.5 V, 25°C 1.3 14
RS = 50 Ω TLV246xC Full range 30
IIB Input bias current nA
25°C 4.9
IOH = − 2.5 mA
Full range 4.8
VOH High-level output voltage V
25°C 4.8
IOH = − 10 mA
Full range 4.7
25°C 0.1
VIC = 2.5 V, IOL = 2.5 mA
Full range 0.2
VOL Low-level output voltage V
25°C 0.2
VIC = 2.5 V, IOL = 10 mA
Full range 0.3
25°C 145
Sourcing
Full range 60
IOS Short-circuit output current mA
25°C 100
Sinking
Full range 60
IO Output current Measured at 1 V from rail 25°C ± 80 mA
Large-signal differential voltage VIC = 2.5 V, RL = 10 kΩ, 25°C 92 109
AVD dB
amplification VO = 1 V to 4 V Full range 90
ri(d) Differential input resistance 25°C 109 Ω
ci(c) Common-mode input capacitance f = 10 kHz 25°C 7 pF
zo Closed-loop output impedance f = 100 kHz, AV = 10 25°C 29 Ω
25°C 71 85
VICR = 0 V to 5 V,
CMRR Common-mode rejection ratio TLV246xC Full range 69 dB
RS = 50 Ω
VDD = 2.7 V to 6 V, VIC = VDD /2, 25°C 80 85
dB
Supply voltage rejection ratio No load Full range 75
kSVR
((∆V
VDD //∆V
VIO) VDD = 3 V to 5 V, VIC = VDD /2, 25°C 85 95
dB
No load Full range 80
25°C 0.55 0.65
IDD Supply current (per channel) VO = 2.5 V, No load, mA
Full range 1
Supply current in shutdown SHDN < 0.7 V, Per channels in 25°C 1
IDD(SHDN) µA
A
(TLV2460, TLV2463, TLV2465) shutdown Full range 3
WWW.TI.COM 9

operating characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)

25°C 0.9 1.6
VO(PP) = 2 V, CL = 160 pF,
SR Slew rate at unity gain Full V/µs
RL = 10 kΩ 0.8
range
f = 100 Hz 25°C 14
Vn Equivalent input noise voltage nV/√Hz
f = 1 kHz 25°C 11
In Equivalent input noise current f = 100 Hz 25°C 0.13 pA /√Hz
VO(PP) = 4 V, AV = 1 0.004%
THD + N Total harmonic distortion plus noise RL = 10 kΩ, AV = 10 25°C
25 C 0.01%
f = 10 kHz AV = 100 0.04%
Both channels 7.6
Channel 1 only,
7.65
t(on) Amplifier turnon time AV = 1, RL = 10 kΩ Channel 2 on 25°C
25 C µs
Channel 2 only,
7.25
Channel 1 on
Both channels 333
Channel 1 only,
328
t(off) Amplifier turnoff time AV = 1, RL = 10 kΩ Channel 2 on 25 C
25°C ns
Channel 2 only,
329
Channel 1 on
f = 10 kHz, RL = 10 kΩ,
Gain-bandwidth product 25°C 6.4 MHz
CL = 160 pF
V(STEP)PP = 2 V, 0.1% 1.53
AV = −1,
CL = 10 pF,
0.01% 1.83
RL = 10 kΩ
ts Settling time 25°C µss
V(STEP)PP = 2 V, 0.1% 3.13
AV = −1,
CL = 56 pF,
0.01% 3.33
RL = 10 kΩ
φm Phase margin at unity gain 25°C 45°
RL = 10 kΩ, CL = 160 pF
Gain margin 25°C 7 dB
10 WWW.TI.COM

TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VIO Input offset voltage vs Common-mode input voltage 1, 2
IIB Input bias current vs Free-air temperature 3, 4
IIO Input offset current vs Free-air temperature 3, 4
VOH High-level output voltage vs High-level output current 5, 6
VOL Low-level output voltage vs Low-level output current 7, 8
VO(PP) Peak-to-peak output voltage vs Frequency 9, 10
Open-loop gain vs Frequency 11, 12
Phase vs Frequency 11, 12
AVD Differential voltage amplification vs Load resistance 13
Capacitive load vs Load resistance 14
Zo Output impedance vs Frequency 15, 16
CMRR Common-mode rejection ratio vs Frequency 17
kSVR Supply-voltage rejection ratio vs Frequency 18, 19
vs Supply voltage 20
IDD Supply current
vs Free-air temperature 21
Amplifier turnon characteristics 22
Amplifier turnoff characteristics 23
Supply current turnon 24
Supply current turnoff 25
Shutdown supply current vs Free-air temperature 26
SR Slew rate vs Supply voltage 27
vs Frequency 28, 29
Vn Equivalent input noise voltage
vs Common-mode input voltage 30, 31
THD Total harmonic distortion vs Frequency 32, 33
THD+N Total harmonic distortion plus noise vs Peak-to-peak signal amplitude 34, 35
vs Frequency 11, 12
φm Phase margin vs Load capacitance 36
vs Supply voltage 38
Gain bandwidth product
Large signal follower 40, 41
Small signal follower 42, 43
Inverting large signal 44, 45
Inverting small signal 46, 47
WWW.TI.COM 11

INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE

vs vs
COMMON-MODE INPUT VOLTAGE COMMON-MODE INPUT VOLTAGE
1 1
VDD = 3 V VDD = 5 V
0.8 TA = 25°C 0.8 TA = 25°C
0.6
VIO − Input Offset Voltage − mV
0.6
VIO − Input Offset Voltage − mV

0.4 0.4
0.2 0.2
0 0
−0.2 −0.2
−0.4 −0.4
−0.6 −0.6
−0.8 −0.8
−1 −1
0 0.5 1 1.5 2 2.5 3 0 1 2 3 4 5
VICR − Common-Mode Input Voltage − V VICR − Common-Mode Input Voltage − V
Figure 1 Figure 2
INPUT BIAS AND INPUT OFFSET CURRENT INPUT BIAS AND INPUT OFFSET CURRENT
vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
I IB and I IO − Input Bias and Input Offset Current − nA
I IB and I IO − Input Bias and Input Offset Current − nA
5 6
VDD = 3 V VDD = 5 V
4.5
IIB VI = 1.5 V VI = 2.5 V
4 5
IIB
3.5
4
3
2.5 3
2
2
1.5
1 1
0.5 IIO
IIO 0
0
−0.5 −1
−55 −35 −15 5 25 45 65 85 105 125 −55 −35 −15 5 25 45 65 85 105 125
TA − Free-Air Temperature − °C TA − Free-Air Temperature − °C
Figure 3 Figure 4
12 WWW.TI.COM

HIGH-LEVEL OUTPUT VOLTAGE HIGH-LEVEL OUTPUT VOLTAGE

vs vs
HIGH-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT CURRENT
3 5
VDD = 3 VDC VDD = 5 VDC
4.5
VOH − High-Level Output Voltage − V
VOH − High-Level Output Voltage − V

2.5 TA = −55°C TA = −55°C
4
3.5
2
3
TA = 125°C TA = 125°C
1.5 TA = 85°C 2.5
TA = 85°C
TA = 25°C 2
TA = 25°C
1
1.5
TA = −40°C TA = −40°C
1
0.5
0.5
0 0
0 10 20 30 40 50 60 70 80 0 20 40 60 80 100 120 140 160 180 200
IOH − High-Level Output Current − mA IOH − High-Level Output Current − mA
Figure 5 Figure 6
LOW-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE

vs vs
LOW-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT
3 4.5
VDD = 3 VDC VDD = 5 VDC
4
VOL − Low-Level Output Voltage − V
2.5
VOL − Low-Level Output Voltage − V
TA = −40°C 3.5 TA = −40°C
2 3
TA = 25°C TA = 25°C
TA = 85°C 2.5 TA = 85°C

1.5
TA = 125°C TA = 125°C
2
1 1.5
1
0.5
TA = −55°C
TA = −55°C 0.5
0 0
0 10 20 30 40 50 60 70 0 20 40 60 80 100 120 140 160
IOL − Low-Level Output Current − mA IOL − Low-Level Output Current − mA
Figure 7 Figure 8
WWW.TI.COM 13

PEAK-TO-PEAK OUTPUT VOLTAGE PEAK-TO-PEAK OUTPUT VOLTAGE

vs vs
FREQUENCY FREQUENCY
3 5.5
VDD = 3 V VDD = 5 V
AV = −10 5 AV = −10
VO(PP) − Peak-to-Peak Output Voltage − V
VO(PP) − Peak-to-Peak Output Voltage − V

2.5 THD = 1% THD = 1%
RL = 10 kΩ 4.5
RL = 10 kΩ
4
2
3.5
3
1.5
2.5
2
1
1.5
0.5 1
0.5
0 0
10k 100k 1M 10M 10k 100k 1M 10M
f − Frequency − Hz f − Frequency − Hz
Figure 9 Figure 10
OPEN-LOOP GAIN AND PHASE
vs
FREQUENCY
100 40°
VDD = ±1.5 V
90 RL = 10 kΩ 20°
80 CL = 0 0°
TA = 25°C
70 −20°
Open-Loop Gain − dB
60 −40°
50 AVD −60°
Phase
40 −80°
30 −100°
Phase
20 −120°
10 −140°
0 −160°
−10 −180°
−20 −200°
10 100 1k 10k 100k 1M 10M
f − Frequency − Hz
Figure 11
14 WWW.TI.COM

OPEN-LOOP GAIN AND PHASE
vs
FREQUENCY
100 40°
VDD = ±2.5 V
90 RL = 10 kΩ 20°
80 CL = 0 0°
TA = 25°C
Open-Loop Gain − dB 70 −20°
60 −40°
50 AVD −60°
Phase
40 −80°
30 −100°
Phase
20 −120°
10 −140°
0 −160°
−10 −180°
−20 −200°
10 100 1k 10k 100k 1M 10M
Figure 12
DIFFERENTIAL VOLTAGE AMPLIFICATION CAPACITIVE LOAD

vs vs
LOAD RESISTANCE LOAD RESISTANCE
180 10000
TA = 25°C
A VD − Differential Voltage Amplification − V/mV
160
140
Phase Margin < 30°
CL − Capacitive Load − pF
120
VDD = ±2.5 V
100
VDD = ±1.5 V 1000
80
60 Phase Margin > 30°
40
VDD = 5 V
20 Phase Margin = 30°
TA = 25°C
0 100
100 1k 10k 100k 1M 10 100 1k 10k
RL − Load Resistance − Ω RL − Load Resistance − Ω
Figure 13 Figure 14
WWW.TI.COM 15

OUTPUT IMPEDANCE OUTPUT IMPEDANCE

vs vs
FREQUENCY FREQUENCY
1000 1000
VDD = ±1.5 V VDD = ±2.5 V
TA = 25°C TA = 25°C
100 100
Zo − Output Impedance − Ω
Zo − Output Impedance − Ω
10 10
AV = 100 AV = 100
1 1
AV = 10 AV = 10
0.1 AV = 1 0.1
AV = 1
0.01 0.01
100 1k 10k 100k 1M 10M 100 1k 10k 100k 1M 10M
Figure 15 Figure 16
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
90
CMRR − Common-Mode Rejection Ratio − dB
85
80
VDD = 5 V
VIC = 2.5 V
75
VDD = 3 V
VIC = 1.5 V
70
65
60
10 100 1k 10k 100k 1M 10M
Figure 17
16 WWW.TI.COM

SUPPLY-VOLTAGE REJECTION RATIO SUPPLY-VOLTAGE REJECTION RATIO

vs vs
FREQUENCY FREQUENCY
110 90
+kSVR +kSVR
VDD = ±1.5 V VDD = ±2.5 V
k SVR − Supply Voltage Rejection Ratio − dB
k SVR − Supply Voltage Rejection Ratio − dB

100 TA = 25°C TA = 25°C
80 −kSVR
90
−kSVR
70
80
70
60
60
+kSVR +kSVR
50
50
−kSVR −kSVR
40 40
10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M
Figure 18 Figure 19
SUPPLY CURRENT SUPPLY CURRENT

vs vs
SUPPLY VOLTAGE FREE-AIR TEMPERATURE
0.8 0.80
IDD = 125°C
IDD = 85°C 0.75
0.7
I DD − Supply Current − mA
0.70 VDD = 5 V
0.6 VI = 2.5 V
0.65
0.5 0.60
0.55
0.40 VDD = 3 V
0.50 VI = 1.5 V
IDD = 25°C
0.30 0.45
IDD = −55°C
IDD = −40°C 0.40

0.20
0.35
0.10 0.30
2.5 3 3.5 4 4.5 5 5.5 6 −55 −35 −15 5 25 45 65 85 105 125
VDD − Supply Voltage − V TA − Free-Air Temperature − °C
Figure 20 Figure 21
WWW.TI.COM 17

AMPLIFIER WITH A SHUTDOWN PULSE AMPLIFIER WITH A SHUTDOWN PULSE

TURNON CHARACTERISTICS TURNOFF CHARACTERISTICS
5 5
VDD = 5 V
4 Shutdown Pin 4 Shutdown Pin RL = 10 kΩ
AV = 1
3 3 TA = 25°C
VSD − Shutdown Voltage − V

2 2
1 1
0 0
3 Amplifier Output 3 Amplifier Output

VDD = 5 V
2 RL = 10 kΩ 2
AV = 1
1 TA = 25°C 1
0 0
−5 −3 −1 1 3 5 7 9 11 −5 −3 −1 1 3 5 7
t − Time − µs t − Time − µs
Figure 22 Figure 23
SUPPLY CURRENT WITH A SHUTDOWN PULSE
TURNON CHARACTERISTICS
1 5.5
Shutdown Pin
0.8 4.5
0.6 3.5
Supply Current
0.4 2.5
0.2 1.5
VDD = 5 V
0 VI = 2.5 V 0.5
AV = 1
TA = 25°C
−0.2 −0.5
−0.4 −0.2 0 0.2 0.4 0.6
t − Time − µs
Figure 24
18 WWW.TI.COM

TURNOFF SUPPLY CURRENT
WITH A SHUTDOWN PULSE
1 5.5
VDD = 5 V
VI = 2.5 V
Shutdown Pin AV = 1
0.8 4.5
TA = 25°C

I DD − Supply Current − mA 0.6 3.5
0.4 Supply Current 2.5
0.2 1.5
0 0.5
−0.2 −0.5
−0.4 −0.2 0 0.2 0.4 0.6
t − Time − µs
Figure 25
SHUTDOWN SUPPLY CURRENT SLEW RATE

vs vs
FREE-AIR TEMPERATURE SUPPLY VOLTAGE
3 1.8
1.75
I DD − Shutdown Supply Current − µ A
2.5
VDD = 5 V 1.7
2 SR+
VI = 2.5 V
SR − Slew Rate − V/ µs
1.65
1.5
1.6
1 1.55 SR−
VDD = 3 V
0.5 VI = 1.5 V 1.5
1.45 VO(PP) = 2 V
0
CL = 160 pF
1.4 AV = 1
−0.5 RL = 10 kΩ
1.35
TA = 25°C
−1 1.3
−55 −35 −15 5 25 45 65 85 105 125 2.5 3 3.5 4 4.5 5 5.5 6
TA − Free-Air Temperature − °C VDD − Supply Voltage − V
Figure 26 Figure 27
WWW.TI.COM 19

EQUIVALENT INPUT NOISE VOLTAGE EQUIVALENT INPUT NOISE VOLTAGE

vs vs
FREQUENCY FREQUENCY
18 18
VDD = 3 V VDD = 5 V
Vn − Equivalent Input Noise Voltage − nV/ Hz

AV = 10 AV = 10
17 17
VI = 1.5 V VI = 2.5 V
TA = 25°C TA = 25°C
16 16
15 15
14 14
13 13
12 12
11 11
10 10
100 1k 10k 100k 100 1k 10k 100k
Figure 28 Figure 29
EQUIVALENT INPUT NOISE VOLTAGE EQUIVALENT INPUT NOISE VOLTAGE

vs vs
COMMON-MODE INPUT VOLTAGE COMMON-MODE INPUT VOLTAGE
20 20
VDD = 3 V VDD = 5 V
AV = 10 AV = 10
15 f = 1 kHz f = 1 kHz
15
TA = 25°C TA = 25°C
14 14
13 13
12 12
11 11
10 10
0 0.5 1 1.5 2 2.5 3 0 1 2 3 4 5
VICR − Common-Mode Input Voltage − V VICR − Common-Mode Input Voltage − V
Figure 30 Figure 31
20 WWW.TI.COM

TOTAL HARMONIC DISTORTION TOTAL HARMONIC DISTORTION

vs vs
FREQUENCY FREQUENCY
0.5 1
VDD = ±1.5 V VDD = ±2.5 V
VO(PP) = 2 V VO(PP) = 4 V
THD − Total Harmonic Distortion − %
RL = 10 kΩ
THD − Total Harmonic Distortion − %

RL = 10 kΩ
AV = 100
0.1
0.1
AV = 100
AV = 10
AV = 10
0.010 AV = 1 0.010
AV = 1
0.001 0.001
10 100 1k 10k 100k 10 100 1k 10k 100k
Figure 32 Figure 33
TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE
vs vs
PEAK-TO-PEAK SIGNAL AMPLITUDE PEAK-TO-PEAK SIGNAL AMPLITUDE
1 1
RL = 250 Ω
THD+N − Total Harmonic Distortion + Noise − %
VDD = 3 V
THD+N − Total Harmonic Distortion + Noise − %
AV = 1 RL = 250 Ω
TA = 25°C
RL = 2 kΩ
RL = 2 kΩ
0.1 0.1 RL = 10 kΩ
RL = 10 kΩ
0.010 0.010
RL = 100 kΩ RL = 100 kΩ
VDD = 5 V
AV = 1
TA = 25°C
0.001 0.001
1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5
Peak-to-Peak Signal Amplitude − V Peak-to-Peak Signal Amplitude − V
Figure 34 Figure 35
WWW.TI.COM 21

PHASE MARGIN PHASE MARGIN

vs vs
LOAD CAPACITANCE FREE-AIR TEMPERATURE
90 60
VDD = ±2.5 V RL = 10 kΩ
80 TA = 25°C CL = 160 pF
RL = 10 kΩ
55
φ m − Phase Margin − degrees
70
φ m − Phase Margin − degrees

Rnull = 50 Ω
60 50
50 VDD = ±2.5 V
45
40
Rnull = 20 Ω
30 VDD = ±1.5 V
40
20 Rnull = 0 Ω
35
10
0 30
10 100 1k 10k 100k −55 −35 −15 5 25 45 65 85 105 125
CL − Load Capacitance − pF TA − Free-Air Temperature − °C
Figure 36 Figure 37
GAIN BANDWIDTH PRODUCT GAIN BANDWIDTH PRODUCT

vs vs
SUPPLY VOLTAGE FREE-AIR TEMPERATURE
5
5
CL = 160 pF RL = 10 kΩ
RL = 10 kΩ CL = 160 pF
4.75
4.75 f = 10 kHz
Gain Bandwidth Product − MHz
Gain Bandwidth Product − MHz
TA = 25°C VDD = ±2.5 V

4.5
4.5
4.25
4.25 4
3.75
4
VDD = ±1.5 V
3.5
3.75
3.25
3.5 3
2.5 3 3.5 4 4.5 5 5.5 6 −55 −35 −15 5 25 45 65 85 105 125
VDD − Supply Voltage − V TA − Free-Air Temperature − °C
Figure 38 Figure 39
22 WWW.TI.COM

LARGE SIGNAL FOLLOWER LARGE SIGNAL FOLLOWER

2.2 3.7
2
3.3
Input Input
1.8
2.9
VO − Voltage − V
Output Output
1.6
2.5
1.4 VDD = 5 V
VDD = 3 V Input Input
VI(PP) = 2 V
VI(PP) = 1 V 2.1 VI = 2.5 V
1.2 VI = 1.5 V
RL = 10 kΩ
RL = 10 kΩ Output Output
CL = 160 pF
CL = 160 pF 1.7
1 AV = 1
AV = 1
TA = 25°C
TA = 25°C
0.8 1.3
−2 0 2 4 6 8 10 12 14 16 18 −2 0 2 4 6 8 10 12 14 16 18
Figure 40 Figure 41
SMALL SIGNAL FOLLOWER SMALL SIGNAL FOLLOWER

1.6 2.6
1.55 2.55
Input Input
1.5 2.5
Output Output
1.45 2.45
VDD = 3 V VDD = 5 V
VI(PP) = 100 mV CL = 160 pF VI(PP) = 100 mV CL = 160 pF
VI = 1.5 V AV = 1 VI = 2.5 V AV = 1
RL = 10 kΩ TA = 25°C RL = 10 kΩ TA = 25°C
1.4 2.4
−0.2 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 −0.2 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
Figure 42 Figure 43
WWW.TI.COM 23

INVERTING LARGE SIGNAL INVERTING LARGE SIGNAL

2.3 4
2.1 Input Input

3.5
1.9
VDD = 3 V VDD = 5 V
1.7 VI(PP) = 1 V 3 VI(PP) = 2 V
VI = 1.5 V VI = 2.5 V
1.5 RL = 10 kΩ RL = 10 kΩ
CL = 160 pF 2.5 CL = 160 pF
AV = −1 AV = −1
1.3
TA = 25°C TA = 25°C
1.1 2
0.9 Output Output

1.5
0.7
0.5 1
−0.2 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 −0.2 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
Figure 44 Figure 45
INVERTING SMALL SIGNAL INVERTING SMALL SIGNAL

1.6 2.6
Input Input
1.55 2.55
VDD = 3 V VDD = 5 V
VI(PP) = 100 mV VI(PP) = 100 mV

VI = 1.5 V VI = 2.5 V
1.5 RL = 10 kΩ 2.5 RL = 10 kΩ
CL = 160 pF CL = 160 pF
AV = −1 AV = −1
TA = 25°C TA = 25°C
1.45 2.45
Output Output
1.4 2.4
−0.2 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 −0.2 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
Figure 46 Figure 47
24 WWW.TI.COM

PARAMETER MEASUREMENT INFORMATION
_ Rnull
+
RL CL
Figure 48
APPLICATION INFORMATION
driving a capacitive load

When the amplifier is configured in this manner, capacitive loading directly on the output will decrease the
device’s phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater
than 10 pF, it is recommended that a resistor be placed in series (RNULL) with the output of the amplifier, as
shown in Figure 49. A minimum value of 20 Ω should work well for most applications.
RF
RG
Input _ RNULL
Output
+
CLOAD
Figure 49. Driving a Capacitive Load
offset voltage
The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times
the corresponding gains. The following schematic and formula can be used to calculate the output offset
voltage:
RF
IIB−
RG
+ −
VI VO
+
RS
IIB+
V
OO
+V
IO ǒ ǒ ǓǓ
1)
R
R
F
G
"I
IB)
R
S ǒ ǒ ǓǓ
1)
R
R
F
G
"I
IB–
R
F
Figure 50. Output Offset Voltage Model
WWW.TI.COM 25

general configurations
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often
required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier
(see Figure 51).
RG RF
−
VO
VI +
R1
C1
f + 1
–3dB 2pR1C1
V
V
O +
I
ǒ 1)
R
R
F
G
Ǔǒ 1
1 ) sR1C1
Ǔ
Figure 51. Single-Pole Low-Pass Filter
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this
task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth.
Failure to do this can result in phase shift of the amplifier.
C1
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
VI +
R1 R2 _ f + 1
–3dB 2pRC
C2
RF
RG =
1
RG
RF
( 2−
Q )
Figure 52. 2-Pole Low-Pass Sallen-Key Filter
26 WWW.TI.COM

shutdown function
Three members of the TLV246x family (TLV2460/3/5) have a shutdown terminal for conserving battery life in
portable applications. When the shutdown terminal is tied low, the supply current is reduced to 0.3 µA/channel,
the amplifier is disabled, and the outputs are placed in a high impedance mode. To enable the amplifier, the
shutdown terminal can either be left floating or pulled high. When the shutdown terminal is left floating, care
should be taken to ensure that parasitic leakage current at the shutdown terminal does not inadvertently place
the operational amplifier into shutdown. The shutdown terminal threshold is always referenced to VDD/2.
Therefore, when operating the device with split supply voltages (e.g. ± 2.5 V), the shutdown terminal needs to
be pulled to VDD− (not GND) to disable the operational amplifier.
The amplifier’s output with a shutdown pulse is shown in Figures 22, 23, 24, and 25. The amplifier is powered
with a single 5-V supply and configured as a noninverting configuration with a gain of 5. The amplifier turnon
and turnoff times are measured from the 50% point of the shutdown pulse to the 50% point of the output
waveform. The times for the single, dual, and quad are listed in the data tables.
circuit layout considerations

To achieve the levels of high performance of the TLV246x, follow proper printed-circuit board design techniques.
A general set of guidelines is given in the following.
D Ground planes − It is highly recommended that a ground plane be used on the board to provide all
components with a low inductive ground connection. However, in the areas of the amplifier inputs and
output, the ground plane can be removed to minimize the stray capacitance.
D Proper power supply decoupling − Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic
capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers
depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal
of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply
terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less
effective. The designer should strive for distances of less than 0.1 inches between the device power
terminals and the ceramic capacitors.
D Sockets − Sockets can be used but are not recommended. The additional lead inductance in the socket pins
will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board
is the best implementation.
D Short trace runs/compact part placements − Optimum high performance is achieved when stray series
inductance has been minimized. To realize this, the circuit layout should be made as compact as possible,
thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of
the amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance at
the input of the amplifier.
D Surface-mount passive components − Using surface-mount passive components is recommended for high
performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of
surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small
size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray
inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be
kept as short as possible.
WWW.TI.COM 27

general power dissipation considerations
For a given θJA, the maximum power dissipation is shown in Figure 53 and is calculated by the following formula:
P
D
+ ǒT
q
–T
MAX A
JA
Ǔ
Where:
PD = Maximum power dissipation of THS246x IC (watts)
TMAX = Absolute maximum junction temperature (150°C)
TA = Free-ambient air temperature (°C)
θJA = θJC + θCA
θJC = Thermal coefficient from junction to case
θCA = Thermal coefficient from case to ambient air (°C/W)
MAXIMUM POWER DISSIPATION

vs
FREE-AIR TEMPERATURE
2
PDIP Package TJ = 150°C
Low-K Test PCB
1.75
θJA = 104°C/W
Maximum Power Dissipation − W
1.5 MSOP Package

Low-K Test PCB
SOIC Package θJA = 260°C/W
1.25 Low-K Test PCB
θJA = 176°C/W
1
0.75
0.5
0.25 SOT-23 Package

Low-K Test PCB
θJA = 324°C/W
0
−55 −40 −25 −10 5 20 35 50 65 80 95 110 125
TA − Free-Air Temperature − °C
NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.
Figure 53. Maximum Power Dissipation vs Free-Air Temperature
28 WWW.TI.COM

macromodel information
Macromodel information provided was derived using Microsim Parts Release 8, the model generation
software used with Microsim PSpice . The Boyle macromodel (see Note 2) and subcircuit in Figure 54 are
generated using the TLV246x typical electrical and operating characteristics at TA = 25°C. Using this
information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most
cases):
D Maximum positive output voltage swing D Unity-gain frequency
D Maximum negative output voltage swing D Common-mode rejection ratio
D Slew rate D Phase margin
D Quiescent power dissipation D DC output resistance
D Input bias current D AC output resistance
D Open-loop voltage amplification D Short-circuit output current limit
NOTE 2: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Intergrated Circuit Operational Amplifiers”, IEEE
Journal of Solid-State Circuits, SC-9, 353 (1974).
99
EGND +
FB
RO2
− C2
3 R2 6 7
VDD +
+ +
RSS VD 9 VLIM
ISS CSS +
− −
RP VB GCM GA 8
10 53 −
2
IN − DC
J1 J2 RO1
IN + OUT
1 DLN 5
11 12 DE
92
C1 54
DP 90 91
RD1 RD2 + + DLP + −
VE HLIM VLP VLN
4 − − − +
GND
.SUBCKT TLV246X 1 2 3 4 5 RD1 3 11 2.8964E3

C1 11 12 2.46034E−12 RD2 3 12 2.8964E3
C2 6 7 10.0000E−12 R01 8 5 5.6000
CSS 10 99 443.21E−15 R02 7 99 6.2000
DC 5 53 DY RP 3 4 8.9127
DE 54 5 DY RSS 10 99 10.610E6
DLP 90 91 DX VB 9 0 DC 0
DLN 92 90 DX VC 3 53 DC .7836
DP 4 3 DX VE 54 4 DC .7436
EGND 99 0 POLY (2) (3,0) (4,0) 0 .5 .5 VLIM 7 8 DC 0
FB 7 99 POLY (5) VB VC VE VLP VLP 91 0 DC 117
+ VLN 0 21.600E6 −1E3 1E3 22E6 −22E6 VLN 0 92 DC 117
GA 6 0 11 12 345.26E−6 .MODEL DX D (IS=800.00E−18)
GCM 0 6 10 99 15.4226E−9 .MODEL DY D (IS=800.00E−18 Rs = 1m Cjo=10p)
ISS 10 4 DC 18.850E−6 .MODEL JX1 NJF (IS=1.0000E−12 BETA=6.3239E−3
HLIM 90 0 VLIM 1K + VTO= −1)
J1 11 2 10 JX1 .MODEL JX2 NJF (IS=1.0000E−12 BETA=6.3239E−3
J2 12 1 10 JX2 + VTO= −1)
R2 6 9 100.00E3 .ENDS
Figure 54. Boyle Macromodels and Subcircuit

PSpice and Parts are trademarks of MicroSim Corporation.
WWW.TI.COM 29

macromodel information (continued)

.subckt TLV_246Y 1 2 3 4 5 6 rp 3 71 8.9127
c1 11 12 2.4603E−12 rss 10 99 10.610E6
c2 72 7 10.000E−12 rs1 6 4 1G
css 10 99 443.21E−15 rs2 6 4 1G
dc 70 53 dy rs3 6 4 1G
de 54 70 dy rs4 6 4 1G
dlp 90 91 dx s1 71 4 6 4 s1x
dln 92 90 dx s2 70 5 6 4 s1x
dp 4 3 dx s3 10 74 6 4 s1x
egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 s4 74 4 6 4 s2x
fb 7 99 poly(5) vb vc ve vlp vln 0 vb 9 0 dc 0
21.600E6 −1E3 1E3 22E6 −22E6 vc 3 53 dc .7836
ga 72 0 11 12 345.26E−6 ve 54 4 dc .7436
gcm 0 72 10 99 15.422E−9 vlim 7 8 dc 0
iss 74 4 dc 18.850E−6 vlp 91 0 dc 117
hlim 90 0 vlim 1K vln 0 92 dc 117
j1 11 2 10 jx1 .model dx D(Is=800.00E−18)
j2 12 1 10 jx2 .model dy D(Is=800.00E−18 Rs=1m Cjo=10p)
r2 72 9 100.00E3 .model jx1 NJF(Is=1.0000E−12 Beta=6.3239E−3 Vto=−1)
rd1 3 11 2.8964E3 .model jx2 NJF(Is=1.0000E−12 Beta=6.3239E−3 Vto=−1)
rd2 3 12 2.8964E3 .model s1x VSWITCH(Roff=1E8 Ron=1.0 Voff=2.5 Von=0.0)
ro1 8 70 5.6000 .model s2x VSWITCH(Roff=1E8 Ron=1.0 Voff=0 Von=2.5)
ro2 7 99 6.2000 .ends
Figure 54. Boyle Macromodels and Subcircuit (Continued)
30 WWW.TI.COM
PACKAGE OPTION ADDENDUM
www.ti.com 12-Jan-2006
PACKAGING INFORMATION
Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
5962-0051201Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
5962-0051201QHA ACTIVE CFP U 10 1 TBD A42 SNPB N / A for Pkg Type
5962-0051201QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type
5962-0051207QCA ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type
5962-0051208QCA ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type
TLV2460AIDR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2460AIP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2460AIPE4 ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2460AMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
TLV2460AMJG ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type
TLV2460AMJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type
TLV2460AMUB ACTIVE CFP U 10 1 TBD A42 SNPB N / A for Pkg Type
TLV2460AQD ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-2-260C-UNLIM/
no Sb/Br) Level-1-235C-UNLIM
TLV2460AQDR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-2-260C-UNLIM/
TLV2460AQPW ACTIVE TSSOP PW 8 150 TBD CU NIPDAU Level-1-220C-UNLIM
TLV2460AQPWR ACTIVE TSSOP PW 8 2000 TBD CU NIPDAU Level-1-220C-UNLIM
TLV2460CD ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2460CDBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2460CDBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
Addendum-Page 1
Type Drawing Qty
TLV2460CDBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2460CDBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2460CDR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2460CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2460CP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2460CPE4 ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2460ID ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2460IDBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2460IDBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2460IDBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2460IDBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2460IDR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2460IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2460IP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2460IPE4 ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2460MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
TLV2460MJG ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type
TLV2460MJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type
TLV2460MUB ACTIVE CFP U 10 1 TBD A42 SNPB N / A for Pkg Type
TLV2460QD ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-2-260C-UNLIM/
TLV2460QDR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-2-260C-UNLIM/
TLV2460QPW ACTIVE TSSOP PW 8 150 TBD CU NIPDAU Level-1-220C-UNLIM
TLV2460QPWR ACTIVE TSSOP PW 8 2000 TBD CU NIPDAU Level-1-220C-UNLIM
TLV2461AID ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
no Sb/Br)
TLV2461AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(RoHS)
(RoHS)
Addendum-Page 2
Type Drawing Qty
TLV2461AQPW ACTIVE TSSOP PW 8 150 TBD Call TI Call TI
no Sb/Br)
TLV2461CDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2461CDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2461CDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2461CDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
no Sb/Br)
no Sb/Br)
(RoHS)
(RoHS)
no Sb/Br)
TLV2461IDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2461IDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2461IDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2461IDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2461IDG4 ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
no Sb/Br)
no Sb/Br)
(RoHS)
(RoHS)
Addendum-Page 3
Type Drawing Qty
TLV2461QPW ACTIVE TSSOP PW 8 150 TBD Call TI Call TI
no Sb/Br)
no Sb/Br)
no Sb/Br)
(RoHS)
(RoHS)
TLV2462AMJG ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type
no Sb/Br)
TLV2462CDG4 ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2462CDGK ACTIVE MSOP DGK 8 80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2462CDGKR ACTIVE MSOP DGK 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2462CDGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
no Sb/Br)
no Sb/Br)
(RoHS)
(RoHS)
no Sb/Br)
no Sb/Br)
TLV2462IDGK ACTIVE MSOP DGK 8 80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2462IDGKR ACTIVE MSOP DGK 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 4
Type Drawing Qty
no Sb/Br)
TLV2462IDGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
no Sb/Br)
no Sb/Br)
(RoHS)
(RoHS)
TLV2462MJG ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type
TLV2462QPW ACTIVE TSSOP PW 8 150 TBD CU NIPDAU Level-1-220C-UNLIM
no Sb/Br)
TLV2463AIDG4 ACTIVE SOIC D 14 50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
no Sb/Br)
no Sb/Br)
TLV2463AIN ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2463AINE4 ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2463AMJ ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type
TLV2463AMJB ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type
TLV2463AQD ACTIVE SOIC D 14 50 Pb-Free CU NIPDAU Level-2-250C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TLV2463AQDR ACTIVE SOIC D 14 75 TBD CU NIPDAU Level-1-220C-UNLIM
TLV2463AQPWR ACTIVE TSSOP PW 14 2000 TBD CU NIPD Level-1-250C-UNLIM
no Sb/Br)
TLV2463CDGS ACTIVE MSOP DGS 10 80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2463CDGSG4 ACTIVE MSOP DGS 10 80 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TLV2463CDGSR ACTIVE MSOP DGS 10 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2463CDGSRG4 ACTIVE MSOP DGS 10 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 5
Type Drawing Qty
no Sb/Br)
no Sb/Br)
no Sb/Br)
TLV2463CN ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2463CNE4 ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
no Sb/Br)
TLV2463IDGS ACTIVE MSOP DGS 10 80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2463IDGSR ACTIVE MSOP DGS 10 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2463IDGSRG4 ACTIVE MSOP DGS 10 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2463IN ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2463INE4 ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2463MJ ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type
TLV2463MJB ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type
TLV2463QD ACTIVE SOIC D 14 75 Pb-Free CU NIPDAU Level-2-250C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TLV2463QDR ACTIVE SOIC D 14 75 TBD CU NIPDAU Level-1-220C-UNLIM
TLV2463QPWR ACTIVE TSSOP PW 14 2000 TBD CU NIPD Level-1-250C-UNLIM
no Sb/Br)
no Sb/Br)
no Sb/Br)
TLV2464AIN ACTIVE PDIP N 14 25 Pb-Free CU NIPD N / A for Pkg Type
(RoHS)
TLV2464AINE4 ACTIVE PDIP N 14 25 Pb-Free CU NIPD N / A for Pkg Type
(RoHS)
TLV2464AIPW ACTIVE TSSOP PW 14 90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2464AIPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2464AIPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
no Sb/Br)
TLV2464CDG4 ACTIVE SOIC D 14 50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
no Sb/Br)
Addendum-Page 6
Type Drawing Qty
no Sb/Br)
TLV2464CN ACTIVE PDIP N 14 25 Pb-Free CU NIPD N / A for Pkg Type
(RoHS)
TLV2464CNE4 ACTIVE PDIP N 14 25 Pb-Free CU NIPD N / A for Pkg Type
(RoHS)
TLV2464CPW ACTIVE TSSOP PW 14 90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2464CPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2464CPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2464CPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
TLV2464IN ACTIVE PDIP N 14 25 Pb-Free CU NIPD N / A for Pkg Type
(RoHS)
TLV2464INE4 ACTIVE PDIP N 14 25 Pb-Free CU NIPD N / A for Pkg Type
(RoHS)
TLV2464IPW ACTIVE TSSOP PW 14 90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2464IPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2464IPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2464IPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
no Sb/Br)
TLV2465AIDG4 ACTIVE SOIC D 16 40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2465AIPWR ACTIVE TSSOP PW 16 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2465AIPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
TLV2465CN ACTIVE PDIP N 16 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2465CNE4 ACTIVE PDIP N 16 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
Addendum-Page 7
Type Drawing Qty
TLV2465CPW ACTIVE TSSOP PW 16 90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2465CPWR ACTIVE TSSOP PW 16 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2465CPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
TLV2465IN ACTIVE PDIP N 16 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2465INE4 ACTIVE PDIP N 16 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLV2465IPW ACTIVE TSSOP PW 16 90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2465IPWR ACTIVE TSSOP PW 16 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2465IPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
Addendum-Page 8
to Customer on an annual basis.
Addendum-Page 9
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8 5
0.280 (7,11)
0.245 (6,22)
1 4
0.065 (1,65)
0.045 (1,14)
0.063 (1,60) 0.310 (7,87)

0.020 (0,51) MIN
0.015 (0,38) 0.290 (7,37)
0.200 (5,08) MAX

Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0°–15°
0.015 (0,38)
0.100 (2,54) 0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA
MCFP001A – JANUARY 1995 – REVISED DECEMBER 1995
U (S-GDFP-F10) CERAMIC DUAL FLATPACK
Base and Seating Plane

0.250 (6,35)
0.045 (1,14) 0.246 (6,10)
0.026 (0,66)
0.008 (0,20)
0.080 (2,03) 0.004 (0,10)
0.050 (1,27)
0.300 (7,62) MAX
0.019 (0,48)
1 10
0.015 (0,38)
0.050 (1,27)
0.280 (7,11)
0.230 (5,84)
5 6
4 Places
0.005 (0,13) MIN
0.350 (8,89) 0.350 (8,89)
0.250 (6,35) 0.250 (6,35)
4040179 / B 03/95

C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only.
E. Falls within MIL STD 1835 GDFP1-F10 and JEDEC MO-092AA

MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER

28 TERMINAL SHOWN
NO. OF A B
18 17 16 15 14 13 12
TERMINALS
** MIN MAX MIN MAX
0.342 0.358 0.307 0.358

19 11 20
(8,69) (9,09) (7,80) (9,09)
20 10 0.442 0.458 0.406 0.458
28
(11,23) (11,63) (10,31) (11,63)
21 9
B SQ 0.640 0.660 0.495 0.560
22 8 44
(16,26) (16,76) (12,58) (14,22)
A SQ
23 7 0.739 0.761 0.495 0.560
52
(18,78) (19,32) (12,58) (14,22)
24 6
0.938 0.962 0.850 0.858
68
(23,83) (24,43) (21,6) (21,8)
25 5
1.141 1.165 1.047 1.063
84
(28,99) (29,59) (26,6) (27,0)
26 27 28 1 2 3 4
0.020 (0,51) 0.080 (2,03)

0.010 (0,25) 0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71) 0.045 (1,14)

0.022 (0,54) 0.035 (0,89)
0.050 (1,27)
4040140 / D 10/96

C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004

MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8) PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8 5
0.260 (6,60)
0.240 (6,10)
1 4
0.070 (1,78) MAX
0.325 (8,26)
0.020 (0,51) MIN
0.300 (7,62)
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.125 (3,18) MIN 0.010 (0,25) NOM
0.100 (2,54) 0.430 (10,92)

MAX
0.021 (0,53)
0.010 (0,25) M
0.015 (0,38)
4040082/D 05/98

C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm

MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN
0,30
0,65 0,10 M
0,19
14 8
0,15 NOM
4,50 6,60
4,30 6,20
Gage Plane
0,25
1 7
0°– 8°
A 0,75
0,50
Seating Plane
1,20 MAX 0,15 0,10

0,05
PINS **
8 14 16 20 24 28
DIM
A MAX 3,10 5,10 5,10 6,60 7,90 9,80
A MIN 2,90 4,90 4,90 6,40 7,70 9,60
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153

IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
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TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
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 

D Rail-to-Rail Output Swing TLV2460

D Input Offset Voltage . . . 100 µV GND 2 5 SHDN

D Micropower Shutdown Mode

TLV2460C/I/AI and TLV2461C/I/AI AVAILABLE OPTIONS

TLV2460M/AM/Q/AQ and TLV2461M/AM/Q/AQ AVAILABLE OPTIONS

TLV2462C/I/AI and TLV2463C/I/AI AVAILABLE OPTIONS

TLV2462M/AM/Q/AQ and TLV2463M/AM/Q/AQ AVAILABLE OPTIONS

TLV2464C/I/AI and TLV2465C/I/AI AVAILABLE OPTIONS

TLV2464M/AM/Q/AQ and TLV2465M/AM/Q/AQ AVAILABLE OPTIONS

TLV246x PACKAGE PINOUTS(1)

OUT 1 6 VDD+ OUT 1 5 VDD+ NC 1 8 SHDN

TLV2461 TLV2462 TLV2463

NC 1 8 NC 1OUT 1 8 VDD+ 1OUT 1 10 VDD+

TLV2463 TLV2464 TLV2465

1OUT 1 14 VDD+ 1OUT 1 16 4OUT

TYPICAL PIN 1 INDICATORS

TLV246x PACKAGE PINOUTS (continued)(1)

TLV2460 TLV2461 TLV2462

GND 6 16 2IN+ VDD+ 6 16 GND NC 6 16 NC

NC 8 14 NC 2IN+ 8 14 3IN+ 2IN− 8 14 3IN−

DISSIPATION RATING TABLE FOR C and I SUFFIX

DISSIPATION RATING TABLE FOR Q and M SUFFIX

recommended operating conditions

electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted)

electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted)

operating characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted)

V(STEP)PP = 2 V, 0.1% 1.47

electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)

VDD = 5 V, Full range 2200

operating characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)

INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE

VIO − Input Offset Voltage − mV

I IB and I IO − Input Bias and Input Offset Current − nA

HIGH-LEVEL OUTPUT VOLTAGE HIGH-LEVEL OUTPUT VOLTAGE

VOH − High-Level Output Voltage − V

LOW-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE

TA = −40°C 3.5 TA = −40°C

TA = 85°C 2.5 TA = 85°C

PEAK-TO-PEAK OUTPUT VOLTAGE PEAK-TO-PEAK OUTPUT VOLTAGE

VO(PP) − Peak-to-Peak Output Voltage − V

DIFFERENTIAL VOLTAGE AMPLIFICATION CAPACITIVE LOAD

60 Phase Margin > 30°

OUTPUT IMPEDANCE OUTPUT IMPEDANCE

SUPPLY-VOLTAGE REJECTION RATIO SUPPLY-VOLTAGE REJECTION RATIO

k SVR − Supply Voltage Rejection Ratio − dB

SUPPLY CURRENT SUPPLY CURRENT

IDD = −40°C 0.40

AMPLIFIER WITH A SHUTDOWN PULSE AMPLIFIER WITH A SHUTDOWN PULSE

VSD − Shutdown Voltage − V

3 Amplifier Output 3 Amplifier Output

VSD − Shutdown Voltage − V

0.4 Supply Current 2.5

SHUTDOWN SUPPLY CURRENT SLEW RATE

EQUIVALENT INPUT NOISE VOLTAGE EQUIVALENT INPUT NOISE VOLTAGE

Vn − Equivalent Input Noise Voltage − nV/ Hz

EQUIVALENT INPUT NOISE VOLTAGE EQUIVALENT INPUT NOISE VOLTAGE

TOTAL HARMONIC DISTORTION TOTAL HARMONIC DISTORTION

THD − Total Harmonic Distortion − %