ANALYSIS OF THE DUAL-FED DISTRIBUTED POWER AMPLIFIER

KW Ecclestont, LT Ong*, PS Kooi, BL Ooi

Department of Electrical Engineering, National University of Singapore, 119260

Email: [email protected]

* Agillis Communications, ST Electronic Engineering

Abstract A variation to the distributed amplifier topology, the dual-

The dual-fed distributed amplifier is a variation of the fed distributed amplifier, has been proposed as a means to
conventional single-fed distributed amplifier. Namely, the recover power in the backward waves [3][4]. The circuit
input signal is fed to both ends of the input line and the power diagram of the modified distributed amplifier is shown in Fig.
appearing at the ends of the output line is combined. This 1 and essentially involves a dual-feed at both the input and
approach has the advantages of utilising power in both the output lines. Briefly, the input signal is fed to both ends of the
forward and backward travelling waves on the output line, and input line using a hybrid, with a view to ensure equal voltages
the drain output power can be equalised among the FETs. In at the drains of the FETs. Power delivered to both ends of the
this paper, the operational behaviour of the dual-fed distributed output line is then combined using another hybrid. Despite the
power amplifier is investigated and the optimum operating promise that such feeding should provide, the previous work
conditions are identified. It has been shown that uniform [3][4]only considered a small-signal analysis and electrically
power distribution can be achieved when the spacing between small spacing between FETs, and did not lend insight into the
each FET has to of the order guide wavelength and is operational behaviour. It is therefore the purpose of this work
dependent on the phase difference of the two input signals. to investigate the operational behaviour of the dual-fed
distributed amplifier and determine its optimum operating
conditions. In particular, large electrical spacing between the
I. Introduction FETs will be considered, and as will be shown, equal power
The conventional distributed amplifier has proven highly distributed can be obtained with the dual-fed distributed
successful for small-signal applications. However, its success amplifier.
in power applications has been limited for a number of
fbndamental reasons such as: uneven output power
distribution among the FETs [ 1][2],and output power wastage
in the back-ward waves [3][4][5].The first problem results in
under utilisation of some of the FETs, whilst the second
problem results in lowered efficiency. Even under the most
ideal circumstances of zero loss: half of the output power
delivered by the FETs is wasted in the backward waves to be
subsequently dissipated in a termination; and the distribution
of output power among the FETs is non-uniform with the FETs
nearest the output terminal typically contributing the most
power. In fact, over some fiequency ranges, some of the FETs
sink rather than source power [ 11.

Methods such as output line tapering [5]may be used to

minimise power in the backward waves and improved circuit
optimisation [2]may be used to improve the output power
distribution among the FETs. However, their success is
limited as the problems they aim to cure are fundamental in
nature. Fig. 1. Distributed amplifier variant using Lange couplers [4].

-2/99/$10.00 0 1999 IEEE

0-7803-5761

Authorized licensed use limited to: University of Canterbury. Downloaded on November 29, 2009 at 22:16 from IEEE Xplore. Restrictions apply.
 11. Dual-Fed Amplifier Analysis at the right most output port and hence the corresponding
In the analysis that follows, we will represent the circuit of Fig. output voltage is labelled Vou,,+ Likewise, for E,nBand VOurE. In
1 by a simplified circuit so that the salient aspects of circuit the conventional single-fed case, EInEis zero whilst in the dual-
operation may be identified. As with the analysis of fed case, ElnEwill be equal to E,, d 4 where @ is the phase
conventional distributed amplifiers [6], the FET input and difference between the input voltages. Both the input and
output parasitics are absorbed into the input and output output transmission lines will be effectively matched at both
transmission lines based on the low frequency assumption for their ends.
artificial transmission lines. The input coupler may be
replaced by a pair of Thevenin sources representing the output We shall replace the exp(-yl) terms in the analysis that
signals fiom the input divider. The output coupler may be follows by the complex variable z (not unlike the delay
replaced by the loads it presents to the ends of the output variable z in sampled data systems). The gate voltages will
transmission line. For argument sake, we will firther assume therefore be related to the input voltages:
that the input and output transmission line sections have equal
length, both have effective characteristic impedance 2, and
n
propagation constant y. The effective transmission line Z
parameters Zoand y account for the effects of FET input and

I:[
zn-l
output parasitic parameters. It will be assumed that the ...2
*
couplers are both matched to 2, at the fiequencies of interest.
The result of these assumptions is the equivalent circuit shown
in Fig. 2. .%. z

The voltages and currents in Fig 2 are rms values and refer and the total drain voltages will be related to the gate voltages
to signals and do not include dc bias. It will be assumed that by:
the FETs are all identical, are operated in class A mode, and
have high linearity so that the drain current of the i* FET is
approximately related to its gate voltage by: %I
...1 x
vB3
where G,,, is the large-signal transconductance. We will
assume, as many other such analyses assume, that feedback
may be neglected.

...3

similarly, the output voltages will be:

...4

Equations (3) and (4) account for the fact that each drain
Fig. 2. Equivalent circuit of dual-fed distributed amplifier. current source causes waves to propagate in both directions
along the output transmission line, and hence, the total voltage
The amplified version of the input voltage ElnAwill appear at a given point on the output transmission line will be a

639

Authorized licensed use limited to: University of Canterbury. Downloaded on November 29, 2009 at 22:16 from IEEE Xplore. Restrictions apply.
 superposition of a number of wave voltages each attributed to It is clear from-this analysis that the minimum optimum
a drain current source. If E,,," and Einshave equal magnitude, spacing between FETs will be either half or one guide-
then ti-om (2) and (4) we see that Vo,,L.l
and VOylBwill have equal wavelength and that optimum performance can only be
magnitude and phase difference equal to the phase difference obtained over a narrow bandwidth. Such spacing would result
between Eid and EinB.Equation (3) is important as it allows in physically large circuits and the assumptions underlying the
one to determine values of z so that the drain voltages are conventional approach of "absorbing" FET capacitances into
equal. the transmission lines would be inaccurate. However, these
problems could be overcome by realising artificial
Finally, the output power by the i"' drain current source is transmission lines with periodic capacitive loading at intervals
given by: considerably less than one guide-wavelength [7]. Such lines
are expected to have lower values of attenuation per unit length
PO",, Re (- ' d , Id,* ) .5
..,
than in conventional distributed amplifiers where periodic
lossy capacitive loading is always associated with lossy
loading.
111. Numerical Results and Discussion
In this investigation, it is fiuther assumed that the transmission
lines are lossless and hence i will lie on the unit circle and
have an argument of -/31 where /3 is the effective phase constant
of the transmission lines. In the analysis 2, was set to 40 Q and
G;was set to 50 mS, giving G, Zo/ 2 equal to unity; and the
input voltage magnitudes were both set to unity. We
considered a 4-stage (n = 4) amplifier of which output powers
and output voltages were calculated as a fhction of Pl for the
case of in-phase inputs (Fig. 3) and quadrature phase inputs
(Fig. 4). The numbering of the traces in Figs. 3b and 4b
correspond to the FET numbering with 1 being the left most
-
0
FET and 4 being the right most FET. 0 2 4 6

For the case of equal phase inputs, Fig. 3 reveals that the
w
output voltages (and hence load power) will be maximum, and
the FET output powers equal, for ,Ofequal to integer multiples
of 2x. Under this condition, the total load power to total input 0.10 r
power is 6dB greater than the single ended case, as predicted
in reference [3], and illustrates the ability of this configuration $ 0.08

to utilise power in both the forward and backward travelling 3

0.06
waves. w
0.04
w
For the case of quadrature phase inputs, Fig. 4 reveals the a
0 0.02
output voltages (and hence load power) will be maximum, and t;
the FET output powers equal, for /3f equal to integer multiples LL 0.00
of TI. However, in this case, the maximum load power is 3dB -0.02 ' I I I I I

lower than for the in-phase case. It is interesting to note that 0 2 4 6

the output voltages vary by only 3dB with respect to pl for the pr
quadrature phase case compared to infinite variation for the in-
phase case.
Fig. 3. Output voltages and FET output powers for n = 4 and
Similar observations were made for other values of n; d = 0".
except that for odd n and in-phase inputs, output voltages were
maximum and FET output powers were equal for Pf equal to
multiples of IC.

640

Authorized licensed use limited to: University of Canterbury. Downloaded on November 29, 2009 at 22:16 from IEEE Xplore. Restrictions apply.
 IV. Conclusion References:
In conclusion, we have developed equations that give insight [ 11 J. L. B. Walker, "Some Observations on the Design and
into the operational behaviour of the dual-fed distributed Performance of Distributed Amplifiers", IEEE T. on
amplifier and determined the conditions under which maximum Microwave Theory & Tech., 40(1), Jan 1992, pp 164 -
load power and equal FET output power is obtained. This 168.
information has illustrated the benefits of this configuration
compared to the conventional single-fed distributed amplifier [2] M. Campovecchio, B.Le Bras, R. Hilal, M. Lajugie, &
and is useful in the design and operation of such amplifiers. J. Obregon, "Large Signal Design Method of Distributed
Power Amplifiers Applied to a 2-18-GHz GaAs Chip
Work is continuing to investigate the application of the Exhibiting High Power Density Performances", Int. J. of
above results when realising such dual-fed amplifiers using Microwave and Millimeter-Wave Computer-Aided
both MMIC and hybrid MIC technologies. Engineering, 6(4), 1996, pp 259 - 269.

[3] C. S. Aitchison, N Bukhari, C. Law & N Nazoa-Ruiz,

'The Dual-Fed Distributed Amplifier", 1988 IEEE
International Microwave Symposium, MTT-S, pp 9 1 1 -
914.

[4] S. D'Augustino & C. Paoloni, "Power Distributed

Amplifier With Input-Output Combiners", Microwave
and Optical Tech. Letters, 7(7), May 1994, pp 3 12 - 3 15.

"'t
-
>
[5] G. D Vendelin, A. M.Pavio & U. L. Rohde, Microwave
Circuit Design Using Linear and Nonlinear Techniques,
John Wiley, 1990, p 350 - 369.

[6] Y. Ayasli, R. L. Mozzi, J. L. Vorhaus, L. D. Reynolds

& R. A. Pucel, "A Monolithic GaAs 1 - 13 GHz
Travelling-Wave Amplifier", IEEE T. on Microwave
Theory & Tech., 30(7), July 1982, pp 976 - 981.

[7] P. Kangaslahti, P. Alinikula, & V. Porra, "Monolithic

artificial transmission line balanced fiequency doublers",
1997 European Microwave Conference, p 2 19-224.

-0.02 '
0
I

2
I I

4
I I

6
I

B1

Fig. 4. Output voltages and FET output powers for n = 4 and

d = 90".

641

Authorized licensed use limited to: University of Canterbury. Downloaded on November 29, 2009 at 22:16 from IEEE Xplore. Restrictions apply.