SMD Type GPS Receiver Module: Description
SMD Type GPS Receiver Module: Description
SMD Type GPS Receiver Module: Description
GXB5005
Description
Features
General
Implementation of Sony CXD2951GA-4 single chip GPS
Small size with SMD type pads and shield case
Module size (typ.): 22.4 (W) × 23.5 (D) × 3.2 (H) [mm]
Current consumption: Acquisition (typ): 70 [mA]
Tracking (typ): 41 [mA]
Battery backup (typ): 7 [µA]
Datum: WGS-84
Communication method: Supports NMEA-0183 version 3.01
Internal 32.768kHz RTC
Internal 18.414MHz TCXO
Antenna input 50Ω
Recommended antenna element
An active antenna with 0dB and RF amplifier with NF ≤ 2dB, 8 to 30dB gain
Functionality
12-channel GPS receiver capable of simultaneously receiving 12 satellites
All-in-view measurement
Valid fix indication output
1PPS output
WAAS/EGNOS compatible
Supported baud rate: 4800bps/9600bps/19200bps/38400bps by HW setting
Internal power on reset circuit
Antenna sense (option)
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license
by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating
the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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GXB5005
Performance
Tracking sensitivity: –152dBm (typ.)
Acquisition sensitivity: –139dBm (typ.)
Time to first fix (time until initial measurement after power-on) (typ., Open sky)
Cold start (without ephemeris and almanac): 40s
Warm start (without ephemeris with almanac): 33s
Hot start (with ephemeris and almanac): 2 to 3s
Positioning accuracy (Open air with ≥ –130dBm, PDOP ≤ 2.0)
Stand alone (GPS unit only) 2DRMS: approx. 2m
Follow-up performance: Velocity: 500km/h or less
Acceleration: 1G or less
Operating Conditions
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GXB5005
Architecture
CXD2951
BPF
Down
Converter LPF
1 bit RF/IF Unit
LNA LNA 1.023MHz
SAW
TCXO
Baseband Unit
Host I/O
ARM7TDMI Control signal
JTAG, GPIO, etc.
Time RAM/
CXO RTC
Counter ROM
32.768kHz CPU Computation & Control Block
1.8V
Multiplier/ CPU, Counter Regulator
TCXO
Divider DLL, D.MF, S/P
18.414MHz
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GXB5005
Pin Configuration
(Top View)
32kHz X'tal
22.4mm
23.5mm
4. BR1 15. GND
5. BR0 14. GND LNA
6. RXD0 13. Status Out
7. TXD0 12. RF GND
8. WA1 11. RF IN
9. WA0 10. RF GND
Pin Description
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GXB5005
WAAS Enable
*1 WAAS function is set by @WA command via UART when WA1 is Low.
-5-
GXB5005
Electrical Characteristics
DC Characteristics
(Ta = –40 to +85°C)
AC Characteristics
(Ta = 25°C)
Pin 7
(TXD0)
90% 90%
20pF 5kΩ Ttlh
10% 10%
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GXB5005
Status Out
1 2 3 4
H
Searching 1.0s
L 1.0s
H
Tracking 0.5s
L 0.5s
H
Positioning
3. Jitter
Turns over regular pulse width ±5% max.
|T – T1| / T ≤ 5%
T T
H H
T1
L T1 L
4. Status transition
Check internal status every 0.5s, only the status changes, “Status Out” output logic turns over and keeps
specified High-Low output interval.
Only status changes to positioning, “Status Out” output turns over High caused by the previous status.
1.0s 0.5s
High
Status Out
Low
Searching Tracking Positioning
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GXB5005
UART Interface
1 LSB MSB
D0 D1 D2 D3 D4 D5 D6 D7
NMEA0183 Format
The GXB5005 can output 8 different types of sentence: GPGGA, GPGLL, GPGSA, GPGSV, GPRMC, GPVTG,
GPZDA and PSGSA. If 9600bps, 19200bps or 38400bps baud rate is set for port setting, it outputs 7 types of
sentence: GPGGA, GPGSA, GPGSV, GPRMC, GPVTG, GPZDA and PSGSA as default. Moreover, if 4800bps
baud rate is set, it outputs 4 types of sentences: GPGGA, GPGSA, GPGSV and GPRMC as default.
1PPS
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GXB5005
1PPS Output
The 1PPS output provides a timing pulse synchronized to GPS time once a valid fix is available.
The figure below shows the behavior of the 1PPS output signal after reset. For a period of 160µs after reset,
the 1PPS signal outputs the system clock. The actual 1PPS signal is activated at 500ms after reset.
Reset 1+
ECLKOUT (1PPS)
500ms
Expansion
160µs
Reset 1+
ECLKOUT (1PPS)
Expansion
Reset
1+
ECLKOUT (1PPS)
145ns
(6.90MHz)
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GXB5005
Backup Mode
The backup mode is established by setting all inputs Low except for B.U. (Vbat: 2.6 to 3.0V). In this mode, the
low power consumption can be achieved by stopping all oscillators except for RTC oscillator. Although all
registers are initialized, the SRAM for both of Ephemeris data and Almanac data in backup area are held.
The antenna sensing function detects three kinds of external active antenna connection conditions, open/
normal/short, by using A/D converter incorporated into the CXD2951.
The @ANT command shows the previous antenna sensing result and users would know the three kinds of
conditions. For details, see the CXD2951 Communication Command Specifications.
Antenna
open normal short normal
condition
VDD
Voltage
(RFIN) 0
Threshold Levels
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GXB5005
Reference Circuit
The antenna sense circuit is available by putting a few components on the customer board.
Refer to the following diagram.
Antenna Power 3V
GXB5005
10kΩ
CXD2951 Sense Resistor
ANT Cont (1/8W)
EPORT12
22Ω
AD In1
EVON1
AD In0
EVON0 Choke Coil
Inductor
To Active
Antenna
Antenna
Customer Board Connector
Command Specifications
The GXB5005 modules have a command format, NMEA-0183 version 3.01. A list of the supported UART
interface is as follows. For detailed descriptions, see the CXD2951 Communication Command Specification
document.
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GXB5005
Mechanical Dimensions
(Unit: mm)
Top View
9.8
1.2 P = 2.2
1.1
21.55
22.4
R0.4
P = 2.2 1.1
22
23.5
3.2
- 12 - Sony Corporation